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2017-02-10dt-bindings: mtd: add a common label property to all mtd devicesCédric Le Goater
This can be used to easily identify a specific chip on a system with multiple chips. Signed-off-by: Cédric Le Goater <clg@kaod.org> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2017-02-10mtd: name the mtd device with an optional label propertyCédric Le Goater
This can be used to easily identify a specific chip on a system with multiple chips. Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2017-02-10Merge tag 'spi-nor/for-4.11-v2' of git://github.com/spi-nor/linuxBrian Norris
From Cyrille: """ This pull request contains the following notable changes: - add support to the 4-byte address instruction set. - add support to new memory parts. - add support to S3AN memories. - add support to the Intel SPI controller. - add support to the Aspeed AST2400 and AST2550 controllers. - fix max SPI transfer and message sizes in m25p80_read(). - fix the Candence QSPI driver. - fix the Freescale QSPI driver. """
2017-02-10mtd: physmap_of: fixup gemini/versatile dependenciesBrian Norris
physmap_of sort of depends on the gemini and versatile modules (when they're enabled), but this isn't expressed in Kconfig. Let's just merge the modules all together, when enabled. Then we can avoid exporting a few symbols, and the versatile and gemini code can now be modular again (the below commit accidentally made them built-in only). Resolves errors like this: ERROR: "of_flash_probe_versatile" [drivers/mtd/maps/physmap_of.ko] undefined! ERROR: "of_flash_probe_gemini" [drivers/mtd/maps/physmap_of.ko] undefined! Fixes: 56ff337ea433 ("mtd: physmap_of: add a hook for Gemini flash probing") Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2017-02-10Merge branches 'iommu/fixes', 'arm/exynos', 'arm/renesas', 'arm/smmu', ↵Joerg Roedel
'arm/mediatek', 'arm/core', 'x86/vt-d' and 'core' into next
2017-02-10vfio/type1: Fix error return code in vfio_iommu_type1_attach_group()Wei Yongjun
Fix to return a negative error code from the error handling case instead of 0, as done elsewhere in this function. Fixes: 5d704992189f ("vfio/type1: Allow transparent MSI IOVA allocation") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Acked-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2017-02-10iommu: Remove iommu_register_instance interfaceJoerg Roedel
And also move its remaining functionality to iommu_device_register() and 'struct iommu_device'. Cc: Rob Herring <robh+dt@kernel.org> Cc: Frank Rowand <frowand.list@gmail.com> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Joerg Roedel <jroedel@suse.de>
2017-02-10iommu/exynos: Make use of iommu_device_register interfaceJoerg Roedel
Register Exynos IOMMUs to the IOMMU core and make them visible in sysfs. This patch does not add the links between IOMMUs and translated devices yet. Cc: Marek Szyprowski <m.szyprowski@samsung.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Acked-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2017-02-10Merge tag 'irqchip-fixes-4.10' of ↵Thomas Gleixner
git://git.infradead.org/users/jcooper/linux into irq/urgent Pull irqchip fixes for v4.10 from Jason Cooper - keystone: Fix scheduling while atomic for realtime - mxs: Enable SKIP_SET_WAKE and MASK_ON_SUSPEND
2017-02-10irqdesc: Add a resource managed version of irq_alloc_descs()Bartosz Golaszewski
Add a devres flavor of __devm_irq_alloc_descs() and corresponding helper macros. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-doc@vger.kernel.org Cc: Jonathan Corbet <corbet@lwn.net> Link: http://lkml.kernel.org/r/1486729403-21132-1-git-send-email-bgolaszewski@baylibre.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2017-02-10mtd: spi-nor: cqspi: remove redundant dead code on error return checkColin Ian King
Checking for ret < 0 is redundant because a previous check on ret being non-zero already handles the ret < 0 case. Remove the redundant code. Found by CoverityScan, CID#1398863, CID#1398864 Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Richard Weinberger <richard@nod.at> Acked-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
2017-02-10Documentation: mtk-quadspi: update DT bindingsGuochun Mao
Add "mediatek,mt2701-nor" for nor flash node's compatible. Signed-off-by: Guochun Mao <guochun.mao@mediatek.com> Acked-by: John Crispin <john@phrozen.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
2017-02-10mtd: fsl-quadspi: Rename SEQID_QUAD_READ to SEQID_READYunhui Cui
There are some read modes for flash, such as NORMAL, FAST, QUAD, DDR QUAD. These modes will use the identical lut table base So rename SEQID_QUAD_READ to SEQID_READ. Signed-off-by: Yunhui Cui <B56489@freescale.com> Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com> Acked-by: Han xu <han.xu@nxp.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
2017-02-10mtd:fsl-quadspi:use the property fields of SPI-NORYunhui Cui
We can get the read/write/erase opcode from the spi nor framework directly. This patch uses the information stored in the SPI-NOR to remove the hardcode in the fsl_qspi_init_lut(). Signed-off-by: Yunhui Cui <B56489@freescale.com> Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com> Acked-by: Han xu <han.xu@nxp.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
2017-02-10mtd: spi-nor: Add support for gd25q16Kamal Dasu
Add GigaDevice GD25Q16 (16M-bit) to supported list. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Acked-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
2017-02-10mtd: spi-nor: Fix S3AN addressing calculationRicardo Ribalda
The page calculation under spi_nor_s3an_addr_convert() was wrong. On Default Address Mode we need to perform a divide by page_size. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Acked-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
2017-02-10mtd: aspeed: fix compile warning in aspeed_smc_read_from_ahb()Cédric Le Goater
The first argument of ioread32_rep() and ioread8_rep is not const. Change aspeed_smc_read_from_ahb() prototype to fix compile warning : drivers/mtd/spi-nor/aspeed-smc.c: In function 'aspeed_smc_read_from_ahb': drivers/mtd/spi-nor/aspeed-smc.c:212:16: warning: passing argument 1 of 'ioread32_rep' discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers] ioread32_rep(src, buf, len >> 2); Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
2017-02-10mtd: spi-nor: add dt support for Everspin MRAMsUwe Kleine-König
The MR25 family doesn't support JEDEC, so they need explicit mentioning in the list of supported spi IDs. This makes it possible to add these using for example: compatible = "everspin,mr25h40"; There was already an entry for mr25h256. Move that one out of the "keep for compatibility" section and put in a new group for Everspin MRAMs. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
2017-02-10Merge tag 'ib-mfd-mtd-v4.11' of ↵Cyrille Pitchen
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd From Lee Jones: """ Immutable branch between MFD and MTD due for the v4.11 merge window """
2017-02-10mtd: spi-nor: Add lock/unlock support for f25l32paVictor Shyba
This chip has write protection enabled on power-up, so this flag is necessary to support write operations. Signed-off-by: Victor Shyba <victor1984@riseup.net> Acked-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
2017-02-10mtd: spi-nor: add a stateless method to support memory size above 128MibCyrille Pitchen
This patch provides an alternative mean to support memory above 16MiB (128Mib) by replacing 3byte address op codes by their associated 4byte address versions. Using the dedicated 4byte address op codes doesn't change the internal state of the SPI NOR memory as opposed to using other means such as updating a Base Address Register (BAR) and sending command to enter/leave the 4byte mode. Hence when a CPU reset occurs, early bootloaders don't need to be aware of BAR value or 4byte mode being enabled: they can still access the first 16MiB of the SPI NOR memory using the regular 3byte address op codes. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Tested-by: Vignesh R <vigneshr@ti.com> Acked-by: Marek Vasut <marek.vasut@gmail.com>
2017-02-10mtd: spi-nor: rename SPINOR_OP_* macros of the 4-byte address op codesCyrille Pitchen
This patch renames the SPINOR_OP_* macros of the 4-byte address instruction set so the new names all share a common pattern: the 4-byte address name is built from the 3-byte address name appending the "_4B" suffix. The patch also introduces new op codes to support other SPI protocols such as SPI 1-4-4 and SPI 1-2-2. This is a transitional patch and will help a later patch of spi-nor.c to automate the translation from the 3-byte address op codes into their 4-byte address version. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Marek Vasut <marek.vasut@gmail.com>
2017-02-10mtd: m25p80: consider max message size in m25p80_readHeiner Kallweit
Consider a message size limit when calculating the maximum amount of data that can be read. The message size limit has been introduced with 4.9, so cc it to stable. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
2017-02-10mtd: spi-nor: bindings for the Aspeed memory controllersCédric Le Goater
Signed-off-by: Cédric Le Goater <clg@kaod.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
2017-02-10mtd: aspeed: add memory controllers for the Aspeed AST2400 SoCCédric Le Goater
This driver adds mtd support for the Aspeed AST2400 SoC static memory controllers: * New Static Memory Controller (referred as FMC) . BMC firmware . AST2500 compatible register set . 5 chip select pins (CE0 ∼ CE4) . supports NOR flash, NAND flash and SPI flash memory. * SPI Flash Controller (SPI) . host Firmware . slightly different register set, between AST2500 and the legacy controller . supports SPI flash memory . 1 chip select pin (CE0) The legacy static memory controller (referred as SMC) is not supported, as well as types other than SPI. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
2017-02-10mtd: spi-nor: add memory controllers for the Aspeed AST2500 SoCCédric Le Goater
This driver adds mtd support for the Aspeed AST2500 SoC static memory controllers : * Firmware SPI Memory Controller (FMC) . BMC firmware . 3 chip select pins (CE0 ~ CE2) . supports SPI type flash memory (CE0-CE1) . CE2 can be of NOR type flash but this is not supported by the driver * SPI Flash Controller (SPI1 and SPI2) . host firmware . 2 chip select pins (CE0 ~ CE1) . supports SPI type flash memory Each controller has a memory range on which it maps its flash module slaves. Each slave is assigned a memory window for its mapping that can be changed at bootime with the Segment Address Register. Each SPI flash slave can then be accessed in two modes: Command and User. When in User mode, accesses to the memory segment of the slaves are translated in SPI transfers. When in Command mode, the HW generates the SPI commands automatically and the memory segment is accessed as if doing a MMIO. Currently, only the User mode is supported. Command mode needs a little more work to check that the memory window on the AHB bus fits the module size. Based on previous work from Milton D. Miller II <miltonm@us.ibm.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
2017-02-10mtd: spi-nor: remove WARN_ONCE() message in spi_nor_write()Cyrille Pitchen
This patch removes the WARN_ONCE() test in spi_nor_write(). This macro triggers the display of a warning message almost every time we use a UBI file-system because a write operation is performed at offset 64, which is in the middle of the SPI NOR memory page. This is a valid operation for ubifs. Hence this warning is pretty annoying and useless so we just remove it. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Suggested-by: Richard Weinberger <richard@nod.at> Suggested-by: Andras Szemzo <szemzo.andras@gmail.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-02-10mtd: spi-nor: improve macronix_quad_enable()Cyrille Pitchen
The patch checks whether the Quad Enable bit is already set in the Status Register. If so, the function exits immediately with a successful return code. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Marek Vasut <marek.vasut@gmail.com>
2017-02-10mtd: spi-nor: Add support for S3AN spi-nor devicesRicardo Ribalda
Xilinx Spartan-3AN FPGAs contain an In-System Flash where they keep their configuration data and (optionally) some user data. The protocol of this flash follows most of the spi-nor standard. With the following differences: - Page size might not be a power of two. - The address calculation (default addressing mode). - The spi nor commands used. Protocol is described on Xilinx User Guide UG333 Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Marek Vasut <marek.vasut@gmail.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
2017-02-10iommu/mediatek: Make use of iommu_device_register interfaceJoerg Roedel
Register individual Mediatek IOMMUs to the iommu core and add sysfs entries. Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mediatek@lists.infradead.org Signed-off-by: Joerg Roedel <jroedel@suse.de>
2017-02-10iommu/msm: Make use of iommu_device_register interfaceJoerg Roedel
Register the MSM IOMMUs to the iommu core and add sysfs entries for that driver. Signed-off-by: Joerg Roedel <jroedel@suse.de>
2017-02-10iommu/arm-smmu: Make use of the iommu_register interfaceJoerg Roedel
Also add the smmu devices to sysfs. Signed-off-by: Joerg Roedel <jroedel@suse.de>
2017-02-10iommu: Add iommu_device_set_fwnode() interfaceJoerg Roedel
Allow to store a fwnode in 'struct iommu_device'; Signed-off-by: Joerg Roedel <jroedel@suse.de>
2017-02-10iommu: Make iommu_device_link/unlink take a struct iommu_deviceJoerg Roedel
This makes the interface more consistent with iommu_device_sysfs_add/remove. Signed-off-by: Joerg Roedel <jroedel@suse.de>
2017-02-10iommu: Add sysfs bindings for struct iommu_deviceJoerg Roedel
There is currently support for iommu sysfs bindings, but those need to be implemented in the IOMMU drivers. Add a more generic version of this by adding a struct device to struct iommu_device and use that for the sysfs bindings. Also convert the AMD and Intel IOMMU driver to make use of it. Signed-off-by: Joerg Roedel <jroedel@suse.de>
2017-02-10iommu: Introduce new 'struct iommu_device'Joerg Roedel
This struct represents one hardware iommu in the iommu core code. For now it only has the iommu-ops associated with it, but that will be extended soon. The register/unregister interface is also added, as well as making use of it in the Intel and AMD IOMMU drivers. Signed-off-by: Joerg Roedel <jroedel@suse.de>
2017-02-10iommu: Rename struct iommu_deviceJoerg Roedel
The struct is used to link devices to iommu-groups, so 'struct group_device' is a better name. Further this makes the name iommu_device available for a struct representing hardware iommus. Signed-off-by: Joerg Roedel <jroedel@suse.de>
2017-02-10iommu: Rename iommu_get_instance()Joerg Roedel
Rename the function to iommu_ops_from_fwnode(), because that is what the function actually does. The new name is much more descriptive about what the function does. Signed-off-by: Joerg Roedel <jroedel@suse.de>
2017-02-10timerfd: Protect the might cancel mechanism properThomas Gleixner
The handling of the might_cancel queueing is not properly protected, so parallel operations on the file descriptor can race with each other and lead to list corruptions or use after free. Protect the context for these operations with a seperate lock. The wait queue lock cannot be reused for this because that would create a lock inversion scenario vs. the cancel lock. Replacing might_cancel with an atomic (atomic_t or atomic bit) does not help either because it still can race vs. the actual list operation. Reported-by: Dmitry Vyukov <dvyukov@google.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: "linux-fsdevel@vger.kernel.org" Cc: syzkaller <syzkaller@googlegroups.com> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: linux-fsdevel@vger.kernel.org Link: http://lkml.kernel.org/r/alpine.DEB.2.20.1701311521430.3457@nanos Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2017-02-10timer_list: Remove useless cast when printingMars Cheng
hrtimer_resolution is already unsigned int, not necessary to cast it when printing. Signed-off-by: Mars Cheng <mars.cheng@mediatek.com> Cc: CC Hwang <cc.hwang@mediatek.com> Cc: wsd_upstream@mediatek.com Cc: Loda Chou <loda.chou@mediatek.com> Cc: Jades Shih <jades.shih@mediatek.com> Cc: Miles Chen <miles.chen@mediatek.com> Cc: John Stultz <john.stultz@linaro.org> Cc: My Chuang <my.chuang@mediatek.com> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Yingjoe Chen <yingjoe.chen@mediatek.com> Link: http://lkml.kernel.org/r/1486626615-5879-1-git-send-email-mars.cheng@mediatek.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2017-02-10time: Remove CONFIG_TIMER_STATSKees Cook
Currently CONFIG_TIMER_STATS exposes process information across namespaces: kernel/time/timer_list.c print_timer(): SEQ_printf(m, ", %s/%d", tmp, timer->start_pid); /proc/timer_list: #11: <0000000000000000>, hrtimer_wakeup, S:01, do_nanosleep, cron/2570 Given that the tracer can give the same information, this patch entirely removes CONFIG_TIMER_STATS. Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Kees Cook <keescook@chromium.org> Acked-by: John Stultz <john.stultz@linaro.org> Cc: Nicolas Pitre <nicolas.pitre@linaro.org> Cc: linux-doc@vger.kernel.org Cc: Lai Jiangshan <jiangshanlai@gmail.com> Cc: Shuah Khan <shuah@kernel.org> Cc: Xing Gao <xgao01@email.wm.edu> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Jessica Frazelle <me@jessfraz.com> Cc: kernel-hardening@lists.openwall.com Cc: Nicolas Iooss <nicolas.iooss_linux@m4x.org> Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> Cc: Petr Mladek <pmladek@suse.com> Cc: Richard Cochran <richardcochran@gmail.com> Cc: Tejun Heo <tj@kernel.org> Cc: Michal Marek <mmarek@suse.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Dmitry Vyukov <dvyukov@google.com> Cc: Oleg Nesterov <oleg@redhat.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Olof Johansson <olof@lixom.net> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: linux-api@vger.kernel.org Cc: Arjan van de Ven <arjan@linux.intel.com> Link: http://lkml.kernel.org/r/20170208192659.GA32582@beast Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2017-02-10x86/mm/ptdump: Fix soft lockup in page table walkerAndrey Ryabinin
CONFIG_KASAN=y needs a lot of virtual memory mapped for its shadow. In that case ptdump_walk_pgd_level_core() takes a lot of time to walk across all page tables and doing this without a rescheduling causes soft lockups: NMI watchdog: BUG: soft lockup - CPU#3 stuck for 23s! [swapper/0:1] ... Call Trace: ptdump_walk_pgd_level_core+0x40c/0x550 ptdump_walk_pgd_level_checkwx+0x17/0x20 mark_rodata_ro+0x13b/0x150 kernel_init+0x2f/0x120 ret_from_fork+0x2c/0x40 I guess that this issue might arise even without KASAN on huge machines with several terabytes of RAM. Stick cond_resched() in pgd loop to fix this. Reported-by: Tobias Regnery <tobias.regnery@gmail.com> Signed-off-by: Andrey Ryabinin <aryabinin@virtuozzo.com> Cc: kasan-dev@googlegroups.com Cc: Alexander Potapenko <glider@google.com> Cc: "Paul E . McKenney" <paulmck@linux.vnet.ibm.com> Cc: Dmitry Vyukov <dvyukov@google.com> Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/20170210095405.31802-1-aryabinin@virtuozzo.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2017-02-10debugobjects: Improve variable namingWaiman Long
As suggested by Ingo, the debug_objects_alloc counter is now renamed to debug_objects_allocated with minor twist in comment and debug output. Signed-off-by: Waiman Long <longman@redhat.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1486503630-1501-1-git-send-email-longman@redhat.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-02-10x86/tsc: Make the TSC ADJUST sanitizing work for tsc_reliableThomas Gleixner
When the TSC is marked reliable then the synchronization check is skipped, but that also skips the TSC ADJUST sanitizing code. So on a machine with a wreckaged BIOS the TSC deviation between CPUs might go unnoticed. Let the TSC adjust sanitizing code run unconditionally and just skip the expensive synchronization checks when TSC is marked reliable. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Olof Johansson <olof@lixom.net> Link: http://lkml.kernel.org/r/20170209151231.491189912@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2017-02-10x86/tsc: Avoid the large time jump when sanitizing TSC ADJUSTThomas Gleixner
Olof reported that on a machine which has a BIOS wreckaged TSC the timestamps in dmesg are making a large jump because the TSC value is jumping forward after resetting the TSC ADJUST register to a sane value. This can be avoided by calling the TSC ADJUST saniziting function before initializing the per cpu sched clock machinery. That takes the offset into account and avoid the time jump. What cannot be avoided is that the 'Firmware Bug' warnings on the secondary CPUs are printed with the large time offsets because it would be too much effort and ugly hackery to print those warnings into a buffer and emit them after the adjustemt on the starting CPUs. It's a firmware bug and should be fixed in firmware. The weird timestamps are collateral damage and just illustrate the sillyness of the BIOS folks: [ 0.397445] smp: Bringing up secondary CPUs ... [ 0.402100] x86: Booting SMP configuration: [ 0.406343] .... node #0, CPUs: #1 [1265776479.930667] [Firmware Bug]: TSC ADJUST differs: Reference CPU0: -2978888639075328 CPU1: -2978888639183101 [1265776479.944664] TSC ADJUST synchronize: Reference CPU0: 0 CPU1: -2978888639183101 [ 0.508119] #2 [1265776480.032346] [Firmware Bug]: TSC ADJUST differs: Reference CPU0: -2978888639075328 CPU2: -2978888639183677 [1265776480.044192] TSC ADJUST synchronize: Reference CPU0: 0 CPU2: -2978888639183677 [ 0.607643] #3 [1265776480.131874] [Firmware Bug]: TSC ADJUST differs: Reference CPU0: -2978888639075328 CPU3: -2978888639184530 [1265776480.143720] TSC ADJUST synchronize: Reference CPU0: 0 CPU3: -2978888639184530 [ 0.707108] smp: Brought up 1 node, 4 CPUs [ 0.711271] smpboot: Total of 4 processors activated (21698.88 BogoMIPS) Reported-by: Olof Johansson <olof@lixom.net> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20170209151231.411460506@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2017-02-10tick/nohz: Fix possible missing clock reprog after tick soft restartFrederic Weisbecker
ts->next_tick keeps track of the next tick deadline in order to optimize clock programmation on irq exit and avoid redundant clock device writes. Now if ts->next_tick missed an update, we may spuriously miss a clock reprog later as the nohz code is fooled by an obsolete next_tick value. This is what happens here on a specific path: when we observe an expired timer from the nohz update code on irq exit, we perform a soft tick restart which simply fires the closest possible tick without actually exiting the nohz mode and restoring a periodic state. But we forget to update ts->next_tick accordingly. As a result, after the next tick resulting from such soft tick restart, the nohz code sees a stale value on ts->next_tick which doesn't match the clock deadline that just expired. If that obsolete ts->next_tick value happens to collide with the actual next tick deadline to be scheduled, we may spuriously bypass the clock reprogramming. In the worst case, the tick may never fire again. Fix this with a ts->next_tick reset on soft tick restart. Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com> Reviewed: Wanpeng Li <wanpeng.li@hotmail.com> Acked-by: Rik van Riel <riel@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/1486485894-29173-1-git-send-email-fweisbec@gmail.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2017-02-10locking/spinlock/debug: Remove spinlock lockup detection codeWaiman Long
The current spinlock lockup detection code can sometimes produce false positives because of the unfairness of the locking algorithm itself. So the lockup detection code is now removed. Instead, we are relying on the NMI watchdog to detect potential lockup. We won't have lockup detection if the watchdog isn't running. The commented-out read-write lock lockup detection code are also removed. Signed-off-by: Waiman Long <longman@redhat.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Sasha Levin <sasha.levin@oracle.com> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1486583208-11038-1-git-send-email-longman@redhat.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-02-10lockdep: Fix incorrect condition to print bug msgs for MAX_LOCKDEP_CHAIN_HLOCKSByungchul Park
Bug messages and stack dump for MAX_LOCKDEP_CHAIN_HLOCKS should only be printed once. Signed-off-by: Byungchul Park <byungchul.park@lge.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Sasha Levin <sasha.levin@oracle.com> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1484275324-28192-1-git-send-email-byungchul.park@lge.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-02-10perf/core: Allow kernel filters on CPU eventsAlexander Shishkin
While supporting file-based address filters for CPU events requires some extra context switch handling, kernel address filters are easy, since the kernel mapping is preserved across address spaces. It is also useful as it permits tracing scheduling paths of the kernel. This patch allows setting up kernel filters for CPU events. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Cc: Will Deacon <will.deacon@arm.com> Cc: vince@deater.net Link: http://lkml.kernel.org/r/20170126094057.13805-4-alexander.shishkin@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-02-10perf/core: Do error out on a kernel filter on an exclude_filter eventAlexander Shishkin
It is currently possible to configure a kernel address filter for a event that excludes kernel from its traces (attr.exclude_kernel==1). While in reality this doesn't make sense, the SET_FILTER ioctl() should return a error in such case, currently it does not. Furthermore, it will still silently discard the filter and any potentially valid filters that came with it. This patch makes the SET_FILTER ioctl() error out in such cases. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Arnaldo Carvalho de Melo <acme@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Cc: Will Deacon <will.deacon@arm.com> Cc: vince@deater.net Link: http://lkml.kernel.org/r/20170126094057.13805-3-alexander.shishkin@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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