Age | Commit message (Collapse) | Author |
|
Adopt the SPDX license identifier headers to ease license compliance
management.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
Adopt the SPDX license identifier headers to ease license compliance
management.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
Bananapi released an updated revision of the H3/H5 based Bananapi M2+.
Version 1.2 enables voltage control for the CPU's regulator by using
a GPIO line to toggle a MOSFET that can change the effective resistance
value in the regulator's feedback network.
This patch adds a common .dtsi file for this new revision, which
includes the original common sunxi-bananapi-m2-plus.dtsi file, and
adds the GPIO-controlled regulator and a cpu-supply reference. H3
and H5 variant dts files are added as well.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
|
This adds nodes for the Video Engine and the associated reserved memory
for the H3. Up to 96 MiB of memory are dedicated to the CMA pool.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
|
|
The Bananapi M2 Plus H5 is a variant of the original Bananapi M2 Plus,
with the H3 SoC replaced with an H5. Everything else is the same.
Add a stub device tree incorporating the shared bananapi-m2-plus dtsi
file.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
|
Three more variants of the Bananapi M2 Plus have been introduced. One
with the H5 instead of the H3, another with the H2+ instead, and the
last with the H3 but with WiFi and eMMC removed.
All these variants use the same board. This patch splits out the
non-SoC-specific parts of the device tree, so that they can be shared
among all the variants. The original Bananapi M2 Plus has been renamed
to Bananapi M2 Plus H3.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
|
The external RTL8211E RGMII Ethernet PHY is configured via external
resistors to use the address 0x1. The 0x0 address is a broadcast address
for this family of PHYs, and should not be used explicitly.
Fixes: 8c7ba536e709 ("ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i")
Fixes: 4904337fe34f ("ARM: dts: sunxi: Restore EMAC changes (boards)")
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
|
The size of the register should be the size of the whole memory block,
not just the registers, that are needed.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
|
The H5 has a Mali-450 GPU with 4 Pixel Processor cores.
Interestingly, while the datasheet lists an interrupt line for the GPU's
PMU, the hardware block itself doesn't seem to have it. Reads from the
PMU address range all return zero, and writes are ignored.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
|
|
Orangepi Zero Plus 2 is an open-source single-board computer, available in two
Allwinner SOC variants, H3 and H5. We add support for H3 variant here, as the
H5 is already supported by sun50i-h5-orangepi-zero-plus2.dts.
H3 Orangepi Zero Plus 2 has:
- Quad-core Cortex-A7
- 512MB DDR3
- microSD slot and 8GB eMMC
- Debug TTL UART
- HDMI
- Wifi + BT
- OTG + power supply
Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
|
|
The H5 SoC have a SID controller that looks like the one in A64, the
cells are in the same offset but doesn't contain the same data (thermal
sensor calibration for example).
Add a binding for it.
Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
|
|
This patch adds MT2712 spi slave into device tree.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
|
|
Looks like we still have two instances of phy_handle that did not
get update by Grygorii's series. Let's replace these too with
standard phy-handle.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Neeraj Dantu <dantuguf14105@gmail.com>
Reported-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Add support for Moxa UC-2101 open platform
The UC-2101 computing platform is designed for industrial embedded
data acquisition and processing applications.
The features of UC-2101 are:
* eMMC
* SPI flash
* 1x LAN
* 1x RS-232/422/485 ports, software-selectable
* EEPROM
* TPM 2.0
* Watchdog
* RTC
* User gpio-keys
* User LEDs
* User button
Signed-off-by: Wes Huang (黃淵河) <wes.huang@moxa.com>
Signed-off-by: Fero JD Zhou (周俊達) <FeroJD.Zhou@moxa.com>
Signed-off-by: SZ Lin (林上智) <sz.lin@moxa.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
The UC-2100 series consists many boards with different peripheral
devices and wireless modules, hence we fetch common items and
create a common dtsi file to increase reusability. All boards in
UC-2100 series will include this common dtsi file.
Signed-off-by: Wes Huang (黃淵河) <wes.huang@moxa.com>
Signed-off-by: Fero JD Zhou (周俊達) <FeroJD.Zhou@moxa.com>
Signed-off-by: SZ Lin (林上智) <sz.lin@moxa.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Since SMPS10 and OTG cable detection extcon are described here, and
work to enable OTG power when an OTG cable is plugged in, we can
define OTG mode in the controller (which is disabled by default in
omap5.dtsi).
Tested on OMAP5EVM and Pyra.
Suggested-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Add ti,syscon-unaligned-access property to PCIe RC nodes to set
appropriate bits in CTRL_CORE_SMA_SW_7 register to enable workaround for
errata i870.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Bit positions of PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE and
PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE in CTRL_CORE_SMA_SW_7 are
incorrectly documented in the TRM. In fact, the bit positions are
swapped. Update the DT bindings for PCIe EP to reflect the same.
Fixes: d23f3839fe97 ("ARM: dts: DRA7: Add pcie1 dt node for EP mode")
Cc: stable@vger.kernel.org
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Renesas ARM Based SoC DT Bindings Updates for v4.20
* Document bindings for:
- RZ/G2E (r8a774c0), RZ/G2M (r8a774a1) and RZ/A2 (r7s9210) SoCs
- R-Car M3-N (r8a77965) SoC based ULCB board
* tag 'renesas-dt-bindings-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
dt-bindings: arm: Document RZ/G2E SoC DT bindings
dt-bindings: arm: Document Renesas R-Car M3-N-based ULCB board
dt-bindings: arm: Document RZ/A2 SoC DT bindings
dt-bindings: arm: Document RZ/G2M SoC DT bindings
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Updates for v4.20
* RZ/G1M (r8a7743) based iWave G20D-Q7 board and camera daughter board
- Move PCIe node out of common dtsi to allow reuse of the common dtsi
on the iWave RZ/G1N board
* RZ/G1C (r8a77470) SoC: Add I2C4, SDHI2 and SMP support
* R-Car Gen1 based boards and R-Car Gen2 SoCs:
- Enhance top-of-file comments to include SoC name
* RZ/N1D (r9a06g032) SoC:
- Correct UART0 description and add all other UARTs
* tag 'renesas-arm-dt2-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: iwg20d-q7-common: Move pciec node out of common dtsi
ARM: dts: r8a77470: Add I2C4 support
ARM: dts: r8a77470: Add SDHI2 support
ARM: dts: r8a77470: Add SMP support
ARM: dts: R-Car Gen1 board comment update
ARM: dts: Include R-Car Gen2 product name in DTSI files
ARM: dts: r9a06g032: Correct UART and add all other UARTs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM64 Based SoC DT Updates for v4.20
* Remove unneeded status from thermal nodes
* R-Car Gen 3 SoCs:
- Use 400kHz for I2C DVFS bus
- Revise USB2.0 properties
* R-Car Gen 3 SoC based ULCB boards: Add default bootargs
* R-Car M3-N (r8a77965) SoC based boards: Enable audio with DMA
* R-Car V3M (r8a77970 and V3H (r8a77980) SoCs:
- Add compare match timer (CMT) support
- Add timer pulse unit (TPU) support
* R-Car V3H (r8a77980) and E3 (r8a77990) SoCs:
- Attach the SYS-DMAC to the IPMMU
* E3 (r8a77990) SoC: Add display output support
* R-Car E3 (r8a77990) based Ebisu board:
- Enable HDMI and CVBS input, and VGA and HDMI display output
* R-Car D3 (r8a77995) SoC: Add LVDS support
* R-Car D3 (r8a77995) based Draak board: Enable HDMI display output
* tag 'renesas-arm64-dt2-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: renesas: r8a77965: Add Sound and Audio DMAC device nodes
arm64: dts: renesas: r8a77995: draak: Enable HDMI display output
arm64: dts: renesas: r8a77990: ebisu: Enable VGA and HDMI outputs
arm64: dts: renesas: r8a77995: Add LVDS support
arm64: dts: renesas: r8a77990: Add display output support
arm64: dts: renesas: r8a779{7|8}0: add TPU support
arm64: dts: renesas: revise properties for R-Car Gen3 SoCs' usb 2.0
arm64: dts: renesas: ulcb: add default bootargs
arm64: dts: renesas: r8a779{7|8}0: add CMT support
arm64: dts: renesas: gen3: use 400kHz for I2C DVFS bus
arm64: dts: renesas: r8a77980: Attach the SYS-DMAC to the IPMMU
arm64: dts: renesas: r8a77990: Attach the SYS-DMAC to the IPMMU
arm64: dts: renesas: ebisu: Add HDMI and CVBS input
arm64: dts: renesas: Remove unneeded status from thermal nodes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
arm64: tegra: Device tree changes for v4.20-rc1
This contains mostly device tree changes to support faster SDHCI modes
on Tegra210 and Tegra186.
* tag 'tegra-for-4.20-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: I2C on Tegra194 is not compatible with Tegra114
arm64: dts: tegra186: Enable HS400
arm64: dts: tegra210: Enable HS400
arm64: dts: tegra186: Add SDMMC4 DQS trim value
arm64: dts: tegra210: Add SDMMC4 DQS trim value
arm64: dts: tegra186: Assign clocks for sdmmc1 and sdmmc4
arm64: dts: tegra210: Assign clocks for sdmmc1 and sdmmc4
arm64: dts: tegra186: Add SDHCI tap and trim values
arm64: dts: tegra210: Add SDHCI tap and trim values
arm64: dts: tegra186: Add sdmmc pad auto calibration offsets
arm64: dts: tegra210: Add sdmmc pad auto calibration offsets
arm64: dts: tegra210-p2597: Remove no-1-8-v from sdmmc1
arm64: dts: tegra210-p2180: Correct sdmmc4 vqmmc-supply
arm64: dts: tegra210-p2180: Allow ldo2 to go down to 1.8 V
arm64: dts: Add Tegra186 sdmmc pinctrl voltage states
arm64: dts: Add Tegra210 sdmmc pinctrl voltage states
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
ARM: tegra: Device tree changes for v4.20-rc1
This contains a massive amount of changes from Marcel Ziswiler for
various boards by Toradex.
* tag 'tegra-for-4.20-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (129 commits)
ARM: dts: paz00: fix wakeup gpio keycode
ARM: tegra: tegra20: Fix mixed tabs-spaces indentation
ARM: tegra: colibri_t20: add eval board device tree
ARM: tegra: colibri_t20: rename ac97 label to tegra_ac97
ARM: tegra: colibri_t20: get rid of fake clocks simple bus
ARM: tegra: colibri_t20: rename tps6586x@34 and drop unused pmic label
ARM: tegra: colibri_t20: iris: drop unused i2c_ddc label
ARM: tegra: colibri_t20: rename i2c_ddc to hdmi_ddc
ARM: tegra: colibri_t20: drop module level model and compatible
ARM: tegra: colibri_t20: iris: add colibri ssp support
ARM: tegra: colibri_t20: iris: simplify model and compatible properties
ARM: tegra: colibri_t20: simplify model and compatible properties
ARM: tegra: colibri_t20: add compatibility comment
ARM: tegra: colibri_t20: annotate/move sd card detect
ARM: tegra: colibri_t20: add gpio hogs for gmi_wr_n buffers
ARM: tegra: colibri_t20: add gpio hog to unreset usb ethernet chip
ARM: tegra: colibri_t20: add i2c-thermtrip
ARM: tegra: colibri_t20: annotate/rename lm95245 temperature sensor
ARM: tegra: colibri_t20: iris: add dr_mode property
ARM: tegra: colibri_t20: iris: add gpio wakeup key
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
dt-bindings: Changes for v4.20-rc1
This contains the PMC pad configuration bindings which are used to
control the voltage of various pads found on Tegra chips. Among other
things this is required to enable faster modes on SDHCI.
* tag 'tegra-for-4.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: Add Tegra PMC pad configuration bindings
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Enable necessary nodes to get output on the hdmi port of the board.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
Add the chain of display nodes from the core display-subsystem
through the one vop to the dw-hdmi output.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Robin Murphy <robin.murphy@arm.com>
changes in v3:
- drop reg from hdmi-in-port
changes in v2:
- remove trailing 0 from vop irq
|
|
The rk3328 uses a hdmiphy from Innosilicon, so add the necessary node
to the rk3328 soc devicetree.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Robin Murphy <robin.murphy@arm.com>
|
|
This device-tree pxa update brings :
- a couple of changes for future pxa2xx platforms
- 2 fixes in RTC and I2C domain
* tag 'pxa-dt-4.20' of https://github.com/rjarzmik/linux:
ARM: dts: pxa: add pincontrol helpers
ARM: dts: pxa: fix power i2c base address
ARM: dts: pxa: fix the rtc controller
ARM: dts: pxa: change serial node names
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Amlogic ARM64 DT updates for v4.20, round 2
- new SoC support: basic support for G12A family
- new board: Amlogic U200 board, using G12A SoC
- fix SPI bus warnings from new dtc updates
* tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support
dt-bindings: arm: amlogic: Add Meson G12A binding
arm64: dts: meson: Fix erroneous SPI bus warnings
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
ARM: dts: Amlogic updates for v4.20
- fix clock controller register sizes
- new board: Endless Mini (EC-100) by Endless Mobile
- add voltage regulators
* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8b: odroidc1: add stdout-path property
ARM: dts: meson8b: odroidc1: enable the SAR ADC
ARM: dts: meson8b: odroidc1: add the fixed voltage regulators
ARM: dts: meson8b: odroidc1: add the CPU voltage regulator
ARM: dts: meson8b: Add support for the Endless Mini (EC-100)
ARM: dts: meson8b: add the RMII pins
ARM: dts: meson8b: add the I2C_A, PWM_C and UART_B pins
dt-bindings: arm: amlogic: Add the Endless Mobile Endless Mini (EC-100)
dt-bindings: add vendor prefix for "Endless Mobile, Inc."
ARM: dts: meson8b: fix the clock controller register size
ARM: dts: meson8: fix the clock controller register size
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/jszhang/linux-berlin into next/dt
Berlin64 DT changes for v4.20
* tag 'berlin64-dt-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/jszhang/linux-berlin:
arm64: dts: synaptics: add dtsi file for Synaptics AS370 SoC
dt-bindings: arm: syna: add support for the AS370 SoC
dt-bindings: arm: move berlin binding documentation to syna.txt
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/dt
Realview DTS update for v4.20:
- One patch from Rob fixing SPI node names
* tag 'realview-dts-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: dts: realview: Fix SPI controller node names
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the
name enables dtc SPI bus checks.
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the
name enables dtc SPI bus checks.
Cc: Chanho Min <chanho.min@lge.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
dtc has new checks for SPI buses. Fix the warnings in node names.
arch/arm64/boot/dts/amd/amd-overdrive.dtb: Warning (spi_bus_bridge): /smb/ssp@e1030000: node name for SPI buses should be 'spi'
arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dtb: Warning (spi_bus_bridge): /smb/ssp@e1030000: node name for SPI buses should be 'spi'
arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dtb: Warning (spi_bus_bridge): /smb/ssp@e1030000: node name for SPI buses should be 'spi'
Cc: Brijesh Singh <brijeshkumar.singh@amd.com>
Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
PCIe is not populated by default on iWave RZ/G1N board. RZ/G1N board
is almost identical to RZ/G1M. In order to reuse the common dtsi for
both the boards, it is required to move pcie node from common dtsi
to board specific dts.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
Add I2C4 support to RZ/G1C (a.k.a. r8a77470) SoC specific
device tree.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
Add SoC specific device tree definitions for the SDHI2 interface.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
Add DT node for the Advanced Power Management Unit (APMU), add the
second CPU core, and use "renesas,apmu" as "enable-method".
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
Include R-Car Gen1 product names for Bock-W and Marzen.
The product names are taken from:
Documentation/devicetree/bindings/arm/shmobile.txt
Signed-off-by: Magnus Damm <damm@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
Improve the user friendliness of the DTS code base by including the
R-Car product name in each R-Car Gen2 DTSI file.
The product names are taken from:
Documentation/devicetree/bindings/arm/shmobile.txt
Signed-off-by: Magnus Damm <damm@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
This adds the system controller node for CPU Miscellaneous Registers
(which is needed for the watchdog node) and the watchdog node.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
|
|
We have defined a new DTS and it should be compiled.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
The PHY found on the A64-OLinuXino requires a TX delay in order to
operate properly. Olimex uses a 600ps second delay in their BSP, and
that has been found to work, so let's use that value in the current
DT.
Signed-off-by: Rodrigo Exterckötter Tjäder <rodrigo@tjader.xyz>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
|
SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the
name enables dtc SPI bus checks.
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Add initial dtsi file to support Synaptics AS370 SoC with quad
Cortex-A53 CPUs.
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
|
|
The AS370 SoC is a new derivative of the berlin family. However, the
SoC isn't named as berlin*.
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Reviewed-by: Rob Herring <robh@kernel.org>
|
|
Move berlin binding documentation as part of transition from Marvell
berlin to Synaptics SoC.
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Acked-by: Rob Herring <robh@kernel.org>
|
|
Switch to updated coresight bindings for hw ports
Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
|
|
The following commits used IRQ_TYPE_NONE since that matched what was
already in the file and I do not have access to the datasheets for
these devices. After these patches were submitted, commit dcf145011400
("ARM: dts: qcom-msm8974: change invalid flag IRQ NONE to valid value")
changed all of these values to IRQ_TYPE_LEVEL_HIGH. This patch corrects
the IRQ type for these two commits:
commit bd9392507588 ("ARM: dts: qcom: msm8974-hammerhead: add device
tree bindings for ALS / proximity")
commit fe8d81fe7d9a ("ARM: dts: qcom: msm8974-hammerhead: add device
tree bindings for mpu6515")
Prior to these patches, I was having issues with the bmp280 sensor
returning temperature / pressure skipped errors, however these errors
have gone away with these patches.
Patches were tested on a LG Nexus 5 (hammerhead) phone.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
|