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2019-05-02soundwire: bus: fix alignment issuesPierre-Louis Bossart
Use Linux style Reviewed-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-02soundwire: fix alignment issues in header filesPierre-Louis Bossart
use Linux style Reviewed-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-02soundwire: intel: fix SPDX license for header fileVinod Koul
Some more headers had C++ style SDPX line, fix that and change copyright so that it is consistent with rest of the code in subsystem Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-02soundwire: fix SPDX license for header filesPierre-Louis Bossart
No C++ comments in .h files Reviewed-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-02soundwire: Kconfig: fix help formatPierre-Louis Bossart
Move to the regular help format, --help-- is no longer recommended. Reviewed-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-02habanalabs: Update CPU DMA memory label nameTomer Tayar
The CPU accessible DMA memory is general and not used only for PQ. Accordingly, this patch renames the "free_cpu_pq_dma_mem" label with "free_cpu_dma_mem". Signed-off-by: Tomer Tayar <ttayar@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2019-05-02habanalabs: Update CPU DMA pool label nameTomer Tayar
The CPU accessible DMA pool is general and not used only for PQ. Accordingly, this patch rename the "free_cpu_pq_pool" label with "free_cpu_accessible_dma_pool". Signed-off-by: Tomer Tayar <ttayar@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2019-04-30habanalabs: increase timeout if working with simulatorDalit Ben Zoor
Where there is a spike in the CPU consumption, it may cause random failures in the C/I since the KMD timeout for CPU and/or QMAN0 jobs expires and it stops communicating to the simulator. This commit fixes it by increasing timeout on polling functions if working with simulator. Signed-off-by: Dalit Ben Zoor <dbenzoor@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2019-05-01habanalabs: remove condition that is always trueDalit Ben Zoor
After removing the parsing of the command submission when doing memset of the device memory, goya_validate_dma_pkt_host is never called by the kernel, so there is no need to check context id. Signed-off-by: Dalit Ben Zoor <dbenzoor@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2019-05-01habanalabs: remove redundant member from parser structDalit Ben Zoor
use_virt_addr member was used for telling whether to treat the addresses in the CB as virtual during parsing. We disabled it only when calling the parser from the driver memset device function, and since this call had been removed, it should always be enabled. Signed-off-by: Dalit Ben Zoor <dbenzoor@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2019-05-01habanalabs: Manipulate DMA addresses in ASIC functionsTomer Tayar
Routing device accesses to the host memory requires the usage of a base offset, which is canceled by the iATU just before leaving the device. The value of the base offset might be distinctive between different ASIC types. The manipulation of the addresses is currently used throughout the driver code, and one should be aware to it whenever providing a host memory address to the device. This patch removes this manipulation from the driver common code, and moves it to the ASIC specific functions that are responsible for host memory allocation/mapping. Signed-off-by: Tomer Tayar <ttayar@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2019-05-01habanalabs: rename functions to improve code readabilityOded Gabbay
This patch renames four functions in the ASIC-specific functions section, so it will be easier to differentiate them from the generic kernel functions with the same name. This will help in future code reviews, to make sure we don't use the kernel functions directly. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2019-04-30habanalabs: remove call to cs_parser()Dalit Ben Zoor
There is no need to parse the command submission when doing memset of the device memory using the DMA engine because only the driver calls the memset function and therefore, the CS is trusted and doesn't require validation and patching. Signed-off-by: Dalit Ben Zoor <dbenzoor@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2019-04-29Merge tag 'soundwire-5.2-rc1' of ↵Greg Kroah-Hartman
git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire into char-misc-next Vinod writes: soundwire updates for v5.2-rc1 This round saw interest from Intel, Linaro and Cadence in Soundwire. More patches are in pipeline (maybe next cycle) - removal of useless initialzation in core - couple of header and kcalloc inversion fixes on Intel driver * tag 'soundwire-5.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire: soundwire: intel: fix implicit header use of module.h/export.h soundwire: stream: remove useless initialization of local variable soundwire: remove useless initializations soundwire: intel: fix inversion in devm_kcalloc parameters
2019-04-28habanalabs: Use single pool for CPU accessible host memoryTomer Tayar
The device's CPU accessible memory on host is managed in a dedicated pool, except for 2 regions - Primary Queue (PQ) and Event Queue (EQ) - which are allocated from generic DMA pools. Due to address length limitations of the CPU, the addresses of all these memory regions must have the same MSBs starting at bit 40. This patch modifies the allocation of the PQ and EQ to be also from the dedicated pool, to ensure compliance with the limitation. Signed-off-by: Tomer Tayar <ttayar@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2019-04-28habanalabs: return old dram bar address upon changeOded Gabbay
This patch changes the ASIC interface function that changes the DRAM bar window. The change is to return the old address that the DRAM bar pointed to instead of an error code. This simplifies the code that use this function (mainly in debugfs) to restore the bar to the old setting. This is also needed for easier support in future ASICs. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2019-04-27Merge tag 'thunderbolt-for-v5.2' of ↵Greg Kroah-Hartman
git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt into char-misc-next Mika writes: thunderbolt: Changes for v5.2 merge window This improves software connection manager on older Apple systems with Thunderbolt 1 and 2 controller to support full PCIe daisy chains, Display Port tunneling and P2P networking. There are also fixes for potential NULL pointer dereferences at various places in the driver. * tag 'thunderbolt-for-v5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt: (44 commits) thunderbolt: Make priority unsigned in struct tb_path thunderbolt: Start firmware on Titan Ridge Apple systems thunderbolt: Reword output of tb_dump_hop() thunderbolt: Make rest of the logging to happen at debug level thunderbolt: Make __TB_[SW|PORT]_PRINT take const parameters thunderbolt: Add support for XDomain connections thunderbolt: Make tb_switch_alloc() return ERR_PTR() thunderbolt: Add support for DMA tunnels thunderbolt: Add XDomain UUID exchange support thunderbolt: Run tb_xdp_handle_request() in system workqueue thunderbolt: Do not tear down tunnels when driver is unloaded thunderbolt: Add support for Display Port tunnels thunderbolt: Rework NFC credits handling thunderbolt: Generalize port finding routines to support all port types thunderbolt: Scan only valid NULL adapter ports in hotplug thunderbolt: Add support for full PCIe daisy chains thunderbolt: Discover preboot PCIe paths the boot firmware established thunderbolt: Deactivate all paths before restarting them thunderbolt: Extend tunnel creation to more than 2 adjacent switches thunderbolt: Add helper function to iterate from one port to another ...
2019-04-27w1: fix the resume command APIMariusz Bialonczyk
>From the DS2408 datasheet [1]: "Resume Command function checks the status of the RC flag and, if it is set, directly transfers control to the control functions, similar to a Skip ROM command. The only way to set the RC flag is through successfully executing the Match ROM, Search ROM, Conditional Search ROM, or Overdrive-Match ROM command" The function currently works perfectly fine in a multidrop bus, but when we have only a single slave connected, then only a Skip ROM is used and Match ROM is not called at all. This is leading to problems e.g. with single one DS2408 connected, as the Resume Command is not working properly and the device is responding with failing results after the Resume Command. This commit is fixing this by using a Skip ROM instead in those cases. The bandwidth / performance advantage is exactly the same. Refs: [1] https://datasheets.maximintegrated.com/en/ds/DS2408.pdf Signed-off-by: Mariusz Bialonczyk <manio@skyboo.net> Reviewed-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-27misc: aspeed-p2a-ctrl: fix mixed declarationsPatrick Venture
Fix up mixed declarations and code in aspeed_p2a_mmap. Tested: Verified the build had the error and that this patch resolved it and there were no other warnings or build errors associated with compilation of this driver. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Patrick Venture <venture@google.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25drivers/misc: Add Aspeed P2A control driverPatrick Venture
Fixup compiler warnings: - 108 warning: ISO C90 forbids mixed declarations and code - 264 warning: unused variable 'value' - 335 warning: unused variable 'res' Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Patrick Venture <venture@google.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25slimbus: fix a potential NULL pointer dereference in of_qcom_slim_ngd_registerKangjie Lu
In case platform_device_alloc fails, the fix returns an error code to avoid the NULL pointer dereference. Signed-off-by: Kangjie Lu <kjlu@umn.edu> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25Drivers: misc: fix out-of-bounds access in function param_set_kgdbts_varYoung Xiao
There is an out-of-bounds access to "config[len - 1]" array when the variable "len" is zero. See commit dada6a43b040 ("kgdboc: fix KASAN global-out-of-bounds bug in param_set_kgdboc_var()") for details. Signed-off-by: Young Xiao <YangX92@hotmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25dt-bindings: imx-ocotp: Add i.MX8MQ compatibleLucas Stach
Add compatible for i.MX8MQ and add i.MX7D/S, i.MX7ULP and i.M8MQ to the description. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: etb10: Add support for CPU-wide trace scenariosMathieu Poirier
This patch adds support for CPU-wide trace scenarios by making sure that only the sources monitoring the same process have access to a common sink. Because the sink is shared between sources, the first source to use the sink switches it on while the last one does the cleanup. Any attempt to modify the HW is overlooked for as long as more than one source is using a sink. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: tmc-etf: Add support for CPU-wide trace scenariosMathieu Poirier
This patch adds support for CPU-wide trace scenarios by making sure that only the sources monitoring the same process have access to a common sink. Because the sink is shared between sources, the first source to use the sink switches it on while the last one does the cleanup. Any attempt to modify the HW is overlooked for as long as more than one source is using a sink. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: tmc-etr: Add support for CPU-wide trace scenariosMathieu Poirier
This patch adds support for CPU-wide trace scenarios by making sure that only the sources monitoring the same process have access to a common sink. Because the sink is shared between sources, the first source to use the sink switches it on while the last one does the cleanup. Any attempt to modify the HW is overlooked for as long as more than one source is using a sink. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: tmc-etr: Allocate and free ETR memory buffers for CPU-wide scenariosMathieu Poirier
This patch uses the PID of the process being traced to allocate and free ETR memory buffers for CPU-wide scenarios. The implementation is tailored to handle both N:1 and 1:1 source/sink HW topologies. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: tmc-etr: Introduce the notion of IDR to ETR devicesMathieu Poirier
In CPU-wide scenarios with an N:1 source/sink topology, sources share the same sink. In order to reuse the same sink for all sources an IDR is needed to archive events that have already been accounted for. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: tmc-etr: Introduce the notion of reference counting to ETR devicesMathieu Poirier
This patch adds reference counting to struct etr_buf so that, in CPU-wide trace scenarios, shared buffers can be disposed of when no longer used. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: tmc-etr: Introduce the notion of process ID to ETR devicesMathieu Poirier
In preparation to support CPU-wide trace scenarios, introduce the notion of process ID to ETR devices. That way events monitoring the same process can use the same etr_buf, allowing multiple CPUs to use the same sink. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: tmc-etr: Create per-thread buffer allocation functionMathieu Poirier
Buffer allocation is different when dealing with per-thread and CPU-wide sessions. In preparation to support CPU-wide trace scenarios simplify things by keeping allocation functions for both type separate. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: tmc-etr: Refactor function tmc_etr_setup_perf_buf()Mathieu Poirier
Refactoring function tmc_etr_setup_perf_buf() so that it only deals with the high level etr_perf_buffer, leaving the allocation of the backend buffer (i.e etr_buf) to another function. That way the backend buffer allocation function can decide if it wants to reuse an existing buffer (CPU-wide trace scenarios) or simply create a new one. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: Communicate perf event to sink buffer allocation functionsMathieu Poirier
Make struct perf_event available to sink buffer allocation functions in order to use the pid they carry to allocate and free buffer memory along with regimenting access to what source a sink can collect data for. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: perf: Refactor function free_event_data()Mathieu Poirier
Function free_event_data() is already busy and is bound to become worse with the addition of CPU-wide trace scenarios. As such spin off a new function to strickly take care of the sink buffers. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: perf: Clean up function etm_setup_aux()Mathieu Poirier
There is no point in allocating sink memory for a trace session if there is not a way to free it once it is no longer needed. As such make sure the sink API function to allocate and free memory have been implemented before moving ahead with the establishment of a trace session. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: Properly address concurrency in sink::update() functionsMathieu Poirier
When operating in CPU-wide trace scenarios and working with an N:1 source/sink HW topology, update() functions need to be made atomic in order to avoid racing with start and stop operations. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: Properly address errors in sink::disable() functionsMathieu Poirier
When disabling a sink the reference counter ensures the operation goes through if nobody else is using it. As such if drvdata::mode is already set do CS_MODE_DISABLED, it is an error and should be reported as such. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: Move reference counting inside sink driversMathieu Poirier
When operating in CPU-wide mode with an N:1 source/sink HW topology, multiple CPUs can access a sink concurrently. As such reference counting needs to happen when the device's spinlock is held to avoid racing with other operations (start(), update(), stop()), such as: session A Session B ----- ------- enable_sink atomic_inc(refcount) = 1 ... atomic_dec(refcount) = 0 enable_sink if (refcount == 0) disable_sink atomic_inc() Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: Adding return code to sink::disable() operationMathieu Poirier
In preparation to handle device reference counting inside of the sink drivers, add a return code to the sink::disable() operation so that proper action can be taken if a sink has not been disabled. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: etm4x: Configure tracers to emit timestampsMathieu Poirier
Configure timestamps to be emitted at regular intervals in the trace stream to temporally correlate instructions executed on different CPUs. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: etm4x: Skip selector pair 0Mathieu Poirier
Resource selector pair 0 is always implemented and reserved. As such it should not be explicitly programmed. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: etm4x: Add kernel configuration for CONTEXTIDMathieu Poirier
Set the proper bit in the configuration register when contextID tracing has been requested by user space. That way PE_CONTEXT elements are generated by the tracers when a process is installed on a CPU. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: pmu: Adding ITRACE property to cs_etm PMUMathieu Poirier
Add to the capabilities the ITRACE property so that ITRACE START events are generated when the PMU is switched on by the core. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: tmc: Cleanup power managementSuzuki K Poulose
Drop the power only if we were successful in probing the device. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: catu: Cleanup power managementSuzuki K Poulose
Drop the power handle only if we were successful. Otherwise the AMBA bus code would do the rest. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: tpiu: Cleanup power managementSuzuki K Poulose
Drop the power only when we have successfully probed. Otherwise leave it to the amba probe to do the rest. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> [Removed extra newline left after original modification] Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: etb10: Cleanup power managementSuzuki K Poulose
We drop the power before we complete the probe successfully. We are supposed to drop it only when we are successful. Also, probing the etb_buffer_length happens with the power turned up. So we don't need to do that again in the helper. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: Fix freeing up the coresight connectionsSuzuki K Poulose
With commit c2c729415b2d2132 ("coresight: platform: Cleanup coresight connection handling"), we switched to re-using coresight_connections for the coresight_device. However, that introduced a mismatch in the alloc/free of the connections. The allocation is made using devm_*, while we use kfree() to release the memory when a device is released (even though we don't support this at the moment). Fix this by leaving it to the automatic freeing of the memory. Fixes: c2c729415b2d2132 ("coresight: platform: Cleanup coresight connection handling") Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: Merge the static and dynamic replicator driversSuzuki K Poulose
Merge the drivers for the two varieties of replicators into a singel one. The dynamic replicator has programming base which can be programmed to filter the trace data. The driver detects the type based on the "base" address value of the device, which is NULL for the static device. Also, while at it, remove the now obsolete DYNAMIC_REPLICATOR config entry. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-25coresight: dynamic-replicator: Prepare for merging with static replicatorSuzuki K Poulose
Rename the dynamic replicator specific routines for merging with the replicator driver. Also re-arrange the probe routine to make it easier to merge. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>