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2020-07-08arm64: dts: qcom: sc7180: Drop the unused non-MSA SIDSibi Sankar
Having a non-MSA (Modem Self-Authentication) SID bypassed breaks modem sandboxing i.e if a transaction were to originate from it, the hardware memory protections units (XPUs) would fail to flag them (any transaction originating from modem are historically termed as an MSA transaction). Drop the unused non-MSA modem SID on SC7180 SoCs and cheza so that SMMU continues to block them. Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Fixes: bec71ba243e95 ("arm64: dts: qcom: sc7180: Update Q6V5 MSS node") Fixes: 68aee4af5f620 ("arm64: dts: qcom: sdm845-cheza: Add iommus property") Cc: stable@vger.kernel.org Reported-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200630081938.8131-1-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-01arm64: dts: qcom: sdm845: Add IMEM and PIL info regionBjorn Andersson
Add a simple-mfd representing IMEM on SDM845 and define the PIL relocation info region, so that post mortem tools will be able to locate the loaded remoteprocs. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200622191942.255460-6-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-01arm64: dts: qcom: qcs404: Add IMEM and PIL info regionBjorn Andersson
Add a simple-mfd representing IMEM on QCS404 and define the PIL relocation info region, so that post mortem tools will be able to locate the loaded remoteprocs. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200622191942.255460-5-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-30arm64: dts: qcom: sc7180: Add cpu OPP tablesSibi Sankar
Add OPP tables required to scale DDR/L3 per freq-domain on SC7180 SoCs. Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200626190808.8716-1-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24arm64: dts: sc7180: Add interconnect for QUP and QSPIAkash Asthana
Add interconnect ports for GENI QUPs and QSPI to set bus capabilities. Signed-off-by: Akash Asthana <akashast@codeaurora.org> Link: https://lore.kernel.org/r/1592908737-7068-9-git-send-email-akashast@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24arm64: dts: ipq8074: enable USB supportSivaprakash Murugesan
IPQ8074 has two super speed usb ports, add phy and dwc3 nodes to enable them. Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Link: https://lore.kernel.org/r/1591625479-4483-6-git-send-email-sivaprak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: angler: Add qcom,msm-id and pmic-idKonrad Dybcio
Add properties required for the bootloader to select the correct bootloader blob. They have been removed from the SoC device tree as they should be set on a per-device basis. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200623224813.297077-11-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: msm8994: Add PSCI nodeKonrad Dybcio
Add PSCI node to enable multi-processor startup. Note that not every 8994 device firmware supports PSCI, and even if, then it can only start the cores and not shut them down. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200623224813.297077-10-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: msm8994: Add pmu nodeKonrad Dybcio
Add the CPU PMU to get perf support for hardware events. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200623224813.297077-9-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: msm8994: Add I2C, SPI and BLSP DMA nodesKonrad Dybcio
Add support for I2C and SPI buses to enable peripherals such as touchscreens or sensors. Also add DMA nodes, configuration and BLSP2 UART2 interface. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200623224813.297077-8-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: msm8994: Add SDHCI1 nodeKonrad Dybcio
Enable support for SDHCI on msm8994-based devices. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200623224813.297077-6-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: msm8994: Add a proper CPU mapKonrad Dybcio
Add a proper CPU map to enable the use of all 8 cores. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200623224813.297077-4-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: msm8994: Add SPMI PMIC arbiter deviceKonrad Dybcio
Add SPMI PMIC arbiter device to communicate with PMICs attached to SPMI bus. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200623224813.297077-3-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: msm8994: Modernize the DTS styleKonrad Dybcio
Following changes have been made: - remove name, compatible and msm-id - wrap clocks in clocks{} - order nodes by name and by address - clock_gcc -> gcc - msmgpio -> tlmm - qcom,smem -> smem - remove unit-address from smem - retire msm8994-pins.dtsi - add some of the missing pins - make comments C-style Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200623224813.297077-2-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: sm8250: Add remoteprocsBjorn Andersson
Add remoteproc nodes for the audio, compute and sensor cores, define glink for each one and enable them on the MTP with appropriate firmware defined. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200622222747.717306-6-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: sm8250: Add SMP2P nodesBjorn Andersson
SMP2P is used for interrupting and being interrupted about remoteproc state changes related to the audio, compute and sensor subsystems. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200622222747.717306-5-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: sm8250: Add QMP AOSS nodeBjorn Andersson
Add a node for the QMP AOSS. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200622222747.717306-4-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: sm8250: Add IPCCBjorn Andersson
Add the IPCC node, used to send and receive IPC signals with remoteprocs. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200622222747.717306-3-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: sm8250-mtp: Drop PM8150 ldo11Bjorn Andersson
PM8150 ldo11 on the MTP is wired to VDD_SSC_CX and controlled in levels, rather than as a regulator. As such it's available from the rpmhpd as the SM8250_LCX power domain. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Fixes: ec13d5c23a33 ("arm64: dts: qcom: sm8250-mtp: Add pm8150, pm8150l and pm8009") Link: https://lore.kernel.org/r/20200622222747.717306-2-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: Add support for Sony Xperia 10/10 Plus (Ganges platform)Martin Botka
Add device tree support for the Sony Xperia 10 and 10 Plus smartphones. They are all based on the Sony Ganges platform (sdm630/636) and share a lot of common code. The differences are really minor, so a Ganges-common DTSI has been created to reduce clutter. 10 - Kirin 10 Plus - Mermaid This platform is based on SoMC Nile, but there are some major differences when it comes to pin configuration and panel setup (among others). The boards currently support: * Screen console * SDHCI * I2C * pstore log dump * GPIO keys * PSCI idle states Signed-off-by: Martin Botka <martin.botka1@gmail.com> Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Tested-by: Martin Botka <martin.botka1@gmail.com> Link: https://lore.kernel.org/r/20200622192558.152828-7-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: Add support for Sony Xperia XA2/Plus/Ultra (Nile platform)Konrad Dybcio
Add device tree support for the Sony Xperia XA2, XA2 Plus and XA2 Ultra smartphones. They are all based on the Sony Nile platform (sdm630) and share a lot of common code. The differences are really minor, so a Nile-common DTSI has been created to reduce clutter. XA2 - Pioneer XA2 Plus - Voyager XA2 Ultra - Discovery The boards currently support: * Screen console * SDHCI * I2C * pstore log dump * GPIO keys * PSCI idle states Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Tested-by: Łukasz Patron <priv.luk@gmail.com> Link: https://lore.kernel.org/r/20200622192558.152828-6-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: sdm630: Add sdm630 dts fileKonrad Dybcio
Add devicetree files for SDM630 SoC and its pin configuration. This commit adds basic nodes like cpu, psci and other required configuration for booting up from eMMC to the serial console. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200622192558.152828-5-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: pm660(l): Add base dts filesKonrad Dybcio
Add base DTS files for pm660(l) along with GPIOs, power-on and rtc nodes. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200622192558.152828-4-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-21arm64: dts: qcom: sm8250: add I2C and SPI nodesDmitry Baryshkov
Much like SDM845 each serial engine has 4 pins attached. Add all possible I2C and SPI nodes for all 20 serial engines. Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20200606131300.3874987-1-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-21arm64: dts: qcom: sm8250: Add TLMM pinctrl nodeBjorn Andersson
Add the TLMM pinctrl node for SM8250 and reserve pins 28-31 and 40-43 on the MTP as firmware does not allow Linux to touch these pins. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20200430181716.3797842-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-21arm64: dts: qcom: pm8150x: add thermal alarms and thermal zonesDmitry Baryshkov
Add temperature alarm and thermal zone configuration to all three pm8150 instances. Configuration is largely based on the msm-4.19 tree. These alarms use main adc of the pmic. Separate temperature adc is not supported yet. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20200621192824.2069145-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-21arm64: dts: qcom: sm8250-mtp: include pmic filesDmitry Baryshkov
Include files describing used PMIC chips, GPIOs, power on, etc nodes. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20200621192824.2069145-2-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-21arm64: dts: qcom: pm8009: Add base dts fileDmitry Baryshkov
Add base DTS file for pm8009 along with GPIOs and power-on nodes. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20200621192824.2069145-1-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-21arm64: dts: ipq8074: enable sdhci nodeSivaprakash Murugesan
Enable mmc device found on ipq8074 devices Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Link: https://lore.kernel.org/r/1591702511-18571-1-git-send-email-sivaprak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-21arm64: dts: qcom: sm8150: Add USB and PHY device nodesJack Pham
Add device nodes for the USB3 controller, QMP SS PHY and SNPS HS PHY. Signed-off-by: Jack Pham <jackp@codeaurora.org> Signed-off-by: Wesley Cheng <wcheng@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Tested-by: Vinod Koul <vinod.koul@linaro.org> Link: https://lore.kernel.org/r/1586566362-21450-3-git-send-email-wcheng@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-21arm64: dts: qcom: sm8150: Add thermal zones and throttling supportAmit Kucheria
sm8150 has 27 thermal sensors split across two tsens controllers. Add the thermal zones to expose them and wireup the cpus to throttle their frequencies on crossing passive temperature thresholds. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Link: https://lore.kernel.org/r/1cdbebe6f7f69ccd8468a4138b56e8a200289d95.1591684754.git.amit.kucheria@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-21dt-bindings: thermal: qcom-tsens: Add compatible for sm8150, sm8250Amit Kucheria
Added tsens bindings for sm8150 and sm8250 Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Link: https://lore.kernel.org/r/c3361043e66139812bd4cd85b917659d85e1564f.1591684754.git.amit.kucheria@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-21arm64: dts: msm8916: Add interconnect provider DT nodesGeorgi Djakov
Add nodes for the network-on-chip interconnect buses present on MSM8916-based platforms. Tested-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Link: https://lore.kernel.org/r/20200617134515.25229-1-georgi.djakov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-20arm64: dts: qcom: sc7180: Add WCN3990 WLAN module device nodeRakesh Pillai
Add device node for the ath10k SNOC platform driver probe and add resources required for WCN3990 on sc7180 soc. Signed-off-by: Rakesh Pillai <pillair@codeaurora.org> Link: https://lore.kernel.org/r/1592668635-10894-1-git-send-email-pillair@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-20arm64: dts: qcom: sm8250: add watchdog deviceDmitry Baryshkov
Add on-SoC watchdog device node. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20200604004331.669936-7-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-20arm64: dts: qcom: apq8016-sbc: Replace spaces with tabsStephan Gerhold
apq8016-sbc.dtsi uses spaces on some lines instead of tabs. Make this consistent by converting them to tabs. Also remove some redundant comments from the DAI link definitions - this is already visible from the comment block before the "sound" node or the device node entries itself. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200605185916.318494-4-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-20arm64: dts: qcom: msm8916: Pull down PDM GPIOs during sleepStephan Gerhold
The original qcom kernel changed the PDM GPIOs to be pull-down during sleep at some point. Reportedly this was done because there was some "leakage at PDM outputs during sleep": https://source.codeaurora.org/quic/la/kernel/msm-3.10/commit/?id=0f87e08c1cd3e6484a6f7fb3e74e37340bdcdee0 I cannot say how effective this is, but everything seems to work fine with this change so let's apply the same to mainline just to be sure. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200605185916.318494-3-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-20arm64: dts: qcom: msm8916: Replace invalid bias-pull-none propertyStephan Gerhold
msm8916-pins.dtsi specifies "bias-pull-none" for most of the audio pin configurations. This was likely copied from the qcom kernel fork where the same property was used for these audio pins. However, "bias-pull-none" actually does not exist at all - not in mainline and not in downstream. I can only guess that the original intention was to configure "no pull", i.e. bias-disable. Change it to that instead. Fixes: 143bb9ad85b7 ("arm64: dts: qcom: add audio pinctrls") Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200605185916.318494-2-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-20arm64: dts: qcom: msm8916: Set #address-cells for lpassStephan Gerhold
As of commit 4ff028f6c108 ("ASoC: qcom: lpass-cpu: Make I2S SD lines configurable"), lpass now supports children nodes to configure the MI2S SD lines to use for one of the I2S ports. For example: lpass@7708000 { dai@3 { reg = <MI2S_QUATERNARY>; qcom,playback-sd-lines = <1>; }; }; The "reg" property refers to the DAI number in this case, so we need to set #address-cells and #size-cells appropriately to avoid DTC warnings. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200605185916.318494-1-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-20arm64: dts: qcom: lenovo630: Add Modem firmware filesJeffrey Hugo
By specifying the modem firmware files, we can boot the modem subsystem which also gives us wifi. Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Link: https://lore.kernel.org/r/20200528185341.4891-1-jeffrey.l.hugo@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-20arm64: dts: qcom: msm8998-clamshell: Fix label on l15 regulatorJeffrey Hugo
The label on the l15 regulator node does not follow the style of the rest of the regulator nodes. Luckily, no one has used the label yet, so lets fix it. Fixes: 2c6d2d3a580a ("arm64: dts: qcom: Add Lenovo Miix 630") Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Link: https://lore.kernel.org/r/20200528145135.44269-1-jeffrey.l.hugo@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-20arm64: dts: qcom: msm8998-mtp: Fix label on l15 regulatorJeffrey Hugo
The label on the l15 regulator node does not follow the style of the rest of the regulator nodes. Luckily, no one has used the label yet, so lets fix it. Fixes: 31c1f0e33deb ("arm64: dts: qcom: msm8998: Add RPM and regulators for MTP") Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Link: https://lore.kernel.org/r/20200528144814.44143-1-jeffrey.l.hugo@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-20arm64: dts: qcom: sc7180: Move mss node to the right placeStephen Boyd
The modem node has an address of 4080000 and thus should come after tlmm and before gpu. Move the node to the right place to maintainer proper address sort order. Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Cc: Evan Green <evgreen@chromium.org> Cc: Sibi Sankar <sibis@codeaurora.org> Fixes: e14a15eba89a ("arm64: dts: qcom: sc7180: Add Q6V5 MSS node") Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200521010337.229177-1-swboyd@chromium.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-20arm64: dts: qcom: sm8250: change ufs node name to ufshcJonathan Marek
The ufs-qcom driver checks that the name matches the androidboot.bootdevice parameter provided by the bootloader, which uses the name ufshc. Without this change UFS fails to probe. I think this is broken behavior from the ufs-qcom driver, but using the name ufshc is consistent with dts for sdm845/sm8150/etc. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20200523175232.13721-1-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-20arm64: dts: qcom: sm8250: sort nodes by physical addressJonathan Marek
Other dts have nodes sorted by physical address, be consistent with that. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20200523132223.31108-1-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-20arm64: dts: qcom: sm8250: rename spmi node to spmi_busJonathan Marek
The pm8150 dtsi files refer to it as spmi_bus, so change it. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20200523132104.31046-1-jonathan@marek.ca [bjorn: Dropped qcom, from node name while we're poking at it] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-20arm64: dts: qcom: sm8250: use dt-bindings defines for clocksJonathan Marek
Use the dt-bindings defines for qupv3_id_1 node's clocks. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20200523131213.18653-1-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-14Linux 5.8-rc1Linus Torvalds
2020-06-14Merge tag 'LSM-add-setgid-hook-5.8-author-fix' of ↵Linus Torvalds
git://github.com/micah-morton/linux Pull SafeSetID update from Micah Morton: "Add additional LSM hooks for SafeSetID SafeSetID is capable of making allow/deny decisions for set*uid calls on a system, and we want to add similar functionality for set*gid calls. The work to do that is not yet complete, so probably won't make it in for v5.8, but we are looking to get this simple patch in for v5.8 since we have it ready. We are planning on the rest of the work for extending the SafeSetID LSM being merged during the v5.9 merge window" * tag 'LSM-add-setgid-hook-5.8-author-fix' of git://github.com/micah-morton/linux: security: Add LSM hooks to set*gid syscalls
2020-06-14security: Add LSM hooks to set*gid syscallsThomas Cedeno
The SafeSetID LSM uses the security_task_fix_setuid hook to filter set*uid() syscalls according to its configured security policy. In preparation for adding analagous support in the LSM for set*gid() syscalls, we add the requisite hook here. Tested by putting print statements in the security_task_fix_setgid hook and seeing them get hit during kernel boot. Signed-off-by: Thomas Cedeno <thomascedeno@google.com> Signed-off-by: Micah Morton <mortonm@chromium.org>
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