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SoCFPGA DT changes from Dinh Nguyen.
* socfpga/dt:
dts: Rename DW APB timer compatible strings
dts: Deprecate ALTR as a vendor prefix
of: add vendor prefix for Altera Corp.
Signed-off-by: Olof Johansson <olof@lixom.net>
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next/dt
From Christian Daudt, DT changes for Broadcom.
* 'armsoc/for-3.12/dt' of git://github.com/broadcom/bcm11351:
ARM: DT: binding fixup to align with vendor-prefixes.txt (DT)
ARM: dts: add sdio blocks to bcm28155-ap board
ARM: dts: align sdio numbers to HW definition
ARM: bcm281xx: DT changes for reboot code
ARM: bcm281xx: Adding bcm28155-ap.dts
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into next/dt
From Shawn Guo:
It contains mxs device tree changes for 3.12.
- New board addition and hogpins cleanup for Crystalfontz
- New pinctrl entry addition for lcd, ssp2 and saif0
- Add alias and labels for various nodes
- Enable devices like LRADC and USB for a couple of imx23 boards,
and backlight for M28EVK
* tag 'mxs-dt-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: dts: mxs: add pin config for LCD sync and clock pins
ARM: dts: mxs: add pin config for SSP3 interface
ARM: dts: mxs: add another set of saif0_pins (without MCLK)
ARM: dts: mxs: add labels to most nodes for easier reference
ARM: dts: mxs: whitespace cleanup
ARM: dts: mxs: Add spi alias
ARM: dts: imx23-olinuxino: enable Low Resolution ADC
ARM: dts: imx23-evk: enable Low Resolution ADC
ARM: dts: imx23-evk: enable USB PHY and controller
ARM: dts: mxs: remove old DMA binding data from client nodes
ARM: mxs: Add backlight support for M28EVK
ARM: mxs: dt: cfa10036: make hogpins grabbed by respective drivers
ARM: mxs: dt: cfa10057: remove hogpins
ARM: mxs: dt: cfa10055: make hogpins grabbed by respective drivers
ARM: mxs: dt: cfa10049: make hogpins grabbed by respective drivers
ARM: mxs: dt: cfa10037: make hogpins grabbed by respective drivers
ARM: mxs: dt: Add Crystalfontz CFA-10058 device tree
ARM: mxs: dt: Add Crystalfontz CFA-10056 device tree
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Somehow we've lost the error handling in the patch split-up between
the internal and external patch. This regression has been introduced
in
commit 5032d871f7d300aee10c309ea004eb4f851553fe
Author: Rafael Barbalho <rafael.barbalho@intel.com>
Date: Wed Aug 21 17:10:51 2013 +0100
drm/i915: Cleaning up the relocate entry function
This bug is exercised by igt/gem_reloc_vs_gpu/interruptible.
Cc: Rafael Barbalho <rafael.barbalho@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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intel_fixed_panel_mode() overwrote the adjusted_mode with the fixed mode
only partially. Notably it forgot to copy over the sync flags. The LVDS code however programmed the hardware with the sync flags from fixed mode, and then later the pipe config comparison obviously failed as we
filled out the adjusted_mode in get_config from the real registers.
Just call drm_mode_copy() in intel_fixed_panel_mode() to copy over the
whole thing, and then just use adjusted_mode in the LVDS code to figure
out which sync settings the hardware needs.
Also constify the fixed_mode argument to intel_fixed_panel_mode().
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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One needs to call __sg_free_table() if __sg_alloc_table() fails, but
sg_alloc_table() does that for us already.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewd-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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This is intended to add VGA arbiter support for Intel HD graphics on
Core processors. The old GMCH registers no longer exist, so even
though it appears that i915 participates in VGA arbitration, it doesn't
work. On Intel HD graphics we already attempt to disable VGA regions
of the device. This makes registering as a VGA client unnecessary since
we don't intend to operate differently depending on how many VGA devices
are present. We can disable VGA memory regions by clearing the memory
enable bit in the VGA MSR. That only leaves VGA IO, which we update
the VGA arbiter to know that we don't participate in VGA memory
arbitration. We also add a hook on unload to re-enable memory and
reinstate VGA memory arbitration.
v3: Use explicit LEGACY_IO | LEGACY_MEM when restoring rather than
LEGACY_MASK, per Ville's comments.
v2: I915_READ/WRITE accessors don't work in i915_disable_vga, use inb/outb
directly. Also, on the driver unbind VGA enable path, acquire legacy
IO to re-enable VGA memory. Correct comment.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
[danvet: Add patch changelog. Also squash in a fixup to have a dummy
static inline for vga_set_legacy_decoding for CONFIG_VGA_ARB=n as
reported by the 0-day kernel build bot.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
fixup 2
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When VGA decodes change we need to do a bit more evaluation of exactly what
has changed. We don't necessarily give up all the old owns resources and
we need to account for resources with locks. The new algorithm is: If
something is added, update decodes. If legacy resources were added and
none were there before, we have a new participant. If something is
removed, update decodes. If we previously owned it, we no longer own it.
If it was previously locked, invalidate all locks and release it. If
legacy resources were removed and none are left, remove the participant
from VGA arbitration.
Previously we updated decodes, released ownership of everything that was
previously decoded, ignored all locks, and went off looking for another
device to transfer VGA to. In a test case where Intel IGD removes only
legacy VGA memory decoding, this left the arbiter switching to discrete
graphics without actually disabling legacy VGA IO from the IGD. As a
bonus, we bumped up the count of VGA arbitration participants for no
good reason.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Cc: Dave Airlie <airlied@redhat.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
[danvet: Kill now unused variables, reported by the 0-day kernel
builtbot.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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If a device does not own a resource then we don't need to disable it.
This resolves the case where an Intel IGD device can be configured to
disable decode of VGA memory but we still need the arbiter to handle
VGA I/O port routing. When the IGD device is in conflict, only
PCI_COMMAND_IO should be disabled since VGA memory does not require
arbitration on this device.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Cc: Dave Airlie <airlied@redhat.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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As we attempt to kmalloc after calling get_pages, there is a possibility
that the shrinker may reap the pages we just acquired. To prevent this
we need to increment the pages_pin_count early, so rearrange the code
and error paths to make it so.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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We shouldn't disable the trickle feed bits on Haswell. Our
documentation explicitly says the trickle feed bits of PRI_CTL and
CUR_CTL should not be programmed to 1, and the hardware engineer also
asked us to not program the SPR_CTL field to 1. Leaving the bits as 1
could cause underflows.
Reported-by: Arthur Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Systems with Intel graphics controllers set aside memory exclusively for
gfx driver use. This memory is not always marked in the E820 as
reserved or as RAM, and so is subject to overlap from E820 manipulation
later in the boot process. On some systems, MMIO space is allocated on
top, despite the efforts of the "RAM buffer" approach, which simply
rounds memory boundaries up to 64M to try to catch space that may decode
as RAM and so is not suitable for MMIO.
v2: use read_pci_config for 32 bit reads instead of adding a new one
(Chris)
add gen6 stolen size function (Chris)
v3: use a function pointer (Chris)
drop gen2 bits (Daniel)
v4: call e820_sanitize_map after adding the region
v5: fixup comments (Peter)
simplify loop (Chris)
Acked-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66726
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66844
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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For use by userspace (at some point in the future) and other kernel code.
v2: move PCI IDs to uabi (Chris)
move PCI IDs to drm/ (Dave)
v3: fixup Quanta detection - needs to come first (Daniel)
v4: fix up PCI match structure init for easier use by userspace (Chris)
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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The helper exists, might as well use it instead of __GFP_ZERO.
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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RCS flips do work on Iybridge+ so long as we can unmask the messages
through DERRMR. However, there are quite a few workarounds mentioned
regarding unmasking more than one event or triggering more than one
message through DERRMR. Those workarounds in principle prevent us from
performing pipelined flips (and asynchronous flips across multiple
planes) and equally apply to the "known good" BCS ring. Given that it
already appears to work, and also appears to work with unmasking all 3
planes at once (and queuing flips across multiple planes), be brave.
Bugzlla: https://bugs.freedesktop.org/show_bug.cgi?id=67600
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Lightly-tested-by: Stephane Marchesin <marchesin@icps.u-strasbg.fr>
Cc: Stephane Marchesin <marchesin@icps.u-strasbg.fr>
Cc: Ben Widawsky <ben@bwidawsk.net>
Tested-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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We now have more devices using ring->private than not, and they all want
the same structure. Worse, I would like to use a scratch page from
outside of intel_ringbuffer.c and so for convenience would like to reuse
ring->private. Embed the object into the struct intel_ringbuffer so that
we can keep the code clean.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull regulator updates from Mark Brown:
"Not much exciting going on with the regulator API this time around,
lots of driver fixes and enhancements - the main thing is the addition
of a new API to help make the stubbing code do the right thing for
missing regulator mappings.
Highlights:
- A new regulator_get_optional() API call for regulators that can be
absent in normal operation. This currently does nothing but will
be used to improve the stubbing code for unspecified regulators,
helping avoid some of the issues we've seen with adding new
regulator support.
- Helpers for devices with multiple linear ranges of voltages in the
same regulator.
- Moved the helpers into a separate file since core.c is getting
rather large.
- New drivers for Dialog DA9210 and DA9063, Freescale pfuze100 and
Marvell 88pm800"
* tag 'regulator-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (70 commits)
regulator: da9063: Statize da9063_ldo_lim_event
regulator: lp872x: Make REGULATOR_LP872X depend on I2C rather than I2C=y
regulator: tps65217: Convert to use linear ranges
regulator: da9063: Use IS_ERR to check return value of regulator_register()
regulator: da9063: Optimize da9063_set_current_limit implementation
regulator: build: Allow most regulators to be built as modules
regulator: Add devm_regulator_get_exclusive()
regulator: da9063: Add Dialog DA9063 voltage regulators support.
regulator: ti-abb: simplify platform_get_resource_byname/devm_ioremap_resource
hwmon: (sht15) Use devm_regulator_get_optional()
regulator: core: Use bool for exclusivitity flag
regulator: 88pm800: forever loop in pm800_regulator_probe()
cpufreq: cpufreq-cpu0: Use devm_regulator_get_optional()
regulator: da9210: Remove redundant MODULE_ALIAS
regulator: 88pm800: Fix checking whether num_regulator is valid
regulator: s2mps11: Fix setting ramp_delay
regulator: s2mps11: Fix wrong arguments for regmap_update_bits() call
regulator: palmas: Update the DT binding doc for smps10 out1 and out2
regulator: palmas: model SMPS10 as two regulators
regulator: core: Move list_voltage_{linear,linear_range,table} to helpers.c
...
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"Business as usual for SPI - some new drivers, lots of fixes and
updates to existing drivers plus some new framework features. Notable
changes are:
- Support for dual and quad data lines, commonly used by flash chips
to improve performance, from Wang Yuhang.
- Factored out a common pattern for runtime PM implementation into
the core saving a bunch of code.
- A particularly nice set of updates to the ep93xx driver from
H Hartley Sweeten, modernising it and reducing the code size a lot.
- New drivers for Blackfin v3, EFM32, Freescale DSPI and TI QSPI"
* tag 'spi-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (133 commits)
spi/qspi: fix missing unlock on error in ti_qspi_start_transfer_one()
spi: quad: fix the name of DT property
spi: core: Fix spi_register_master error handling
spi: efm32: Fix build error
spi: altera: Use DIV_ROUND_UP to calculate hw->bytes_per_word
spi: rspi: Add spi_master_get() call to prevent use after free
spi: quad: Make DT properties optional
spi: quad: Fix missing return
spi: Use dev_get_drvdata at appropriate places
spi: use dev_get_platdata()
spi: nuc900: Fix mode_bits setting
spi: simplify devm_request_mem_region/devm_ioremap
spi: altera: Simplify altera_spi_txrx implementation for noirq case
spi: spi-rspi: fix inconsistent spin_lock_irqsave
spi/qspi: Add compatible string for am4372.
spi/qspi: Fix device table entry
spi/sirf: fix the misunderstanding about len of spi_transfer
spi/qspi: Add dual/quad spi read support
spi: sirf: fix error return code in spi_sirfsoc_probe()
spi: bcm2835: Add spi_master_get() call to prevent use after free
...
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap
Pull regmap updates from Mark Brown:
"A quiet release for regmap, some cleanups, fixes and:
- Improved node coalescing for rbtree, reducing memory usage and
improving performance during syncs.
- Support for registering multiple register patches.
- A quirk for handling interrupts that need to be clear when masked
in regmap-irq"
* tag 'regmap-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap:
regmap: rbtree: Make cache_present bitmap per node
regmap: rbtree: Reduce number of nodes, take 2
regmap: rbtree: Simplify adjacent node look-up
regmap: debugfs: Fix continued read from registers file
regcache-rbtree: Fix reg_stride != 1
regmap: Allow multiple patches to be registered
regmap: regcache: allow read-only regs to be cached
regmap: fix regcache_reg_present() for empty cache
regmap: core: allow a virtual range to cover its own data window
regmap: irq: document mask/wake_invert flags
regmap: irq: make flags bool and put them in a bitfield
regmap: irq: Allow to acknowledge masked interrupts during initialization
regmap: Provide __acquires/__releases annotations
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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'qib' into for-next
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Fix:
drivers/infiniband/hw/ocrdma/ocrdma_verbs.c: In function 'ocrdma_build_fr':
>> drivers/infiniband/hw/ocrdma/ocrdma_verbs.c:1832:7: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
mr = (struct ocrdma_mr *)qp->dev->stag_arr[(hdr->lkey >> 8) &
^
drivers/infiniband/hw/ocrdma/ocrdma_verbs.c: In function 'ocrdma_alloc_frmr':
>> drivers/infiniband/hw/ocrdma/ocrdma_verbs.c:2661:64: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
dev->stag_arr[(mr->hwmr.lkey >> 8) & (OCRDMA_MAX_STAG - 1)] = (u64) mr;
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>
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Add a uImage build target for MIPS, which builds uImage.gz (a U-Boot
image of vmlinux.bin.gz), and then symlinks it to uImage. This allows
for the use of other compression algorithms in future, and is how a few
other architectures do it.
It's enabled conditionally on load-y >= 0xffffffff80000000 which
hopefully allows 64bit kernels to also work as long as the load and
entry address can be represented by the 32bit addresses in the U-Boot
image format.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5795/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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The vmlinux load address and entry address is calculated in multiple
places:
- arch/mips/Makefile defines load-y from CONFIG_PHYSICAL_START (or
defined by the platform) and passes it to
arch/mips/boot/compressed/Makefile.
- arch/mips/boot/compressed/Makefile calculates kernel entry using nm.
- arch/mips/lasat/image/Makefile calculates both load and entry address
using nm.
Lets combine these in the main Makefile and then pass them as Make
parameters to each of the three boot image Makefiles (in boot/,
boot/compressed, lasat/image/). The boot/ Makefile doesn't currently use
them, but will soon need to for U-Boot image targets.
The existing load-y definition is used in preference to calculating the
load address using nm.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5794/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Split out the arch/mips/boot/ and arch/mips/boot/compressed/ targets
into boot-y and bootz-y variables. This makes it slightly cleaner to add
new targets.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5793/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Add symlink to include/dt-bindings from arch/mips/boot/dts/include/ to
match the ones in ARM and Meta architectures so that preprocessed device
tree files can include various useful constant definitions.
See commit c58299a (kbuild: create an "include chroot" for DT bindings)
merged in v3.10-rc1 for details.
MIPS structures it's dts files a little differently to other
architectures, having a separate dts directory for each SoC/platform,
but most of the definitions in the dt-bindings/ directory are common so
for now lets just have a single "include chroot" for all MIPS platforms.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Steven. J. Hill <steven.hill@imgtec.com>
Cc: Michal Marek <mmarek@suse.cz>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Ian Campbell <ian.campbell@citrix.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kbuild@vger.kernel.org
Acked-by: Stephen Warren <swarren@nvidia.com>
Patchwork: http://patchwork.linux-mips.org/patch/5745/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Merge lockref infrastructure code by me and Waiman Long.
I already merged some of the preparatory patches that didn't actually do
any semantic changes earlier, but this merges the actual _reason_ for
those preparatory patches.
The "lockref" structure is a combination "spinlock and reference count"
that allows optimized reference count accesses. In particular, it
guarantees that the reference count will be updated AS IF the spinlock
was held, but using atomic accesses that cover both the reference count
and the spinlock words, we can often do the update without actually
having to take the lock.
This allows us to avoid the nastiest cases of spinlock contention on
large machines under heavy pathname lookup loads. When updating the
dentry reference counts on a large system, we'll still end up with the
cache line bouncing around, but that's much less noticeable than
actually having to spin waiting for the lock.
* lockref:
lockref: implement lockless reference count updates using cmpxchg()
lockref: uninline lockref helper functions
vfs: reimplement d_rcu_to_refcount() using lockref_get_or_lock()
vfs: use lockref_get_not_zero() for optimistic lockless dget_parent()
lockref: add 'lockref_get_or_lock() helper
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The kbldr.h header file required for this was neither committed in the
original submission in a3a0f8c8ed2e2470f4dcd6da95020d41fed84747
"MIPS: PowerTV: Base files for Cisco PowerTV platform"
nor was it ever present in the git tree so this option never worked.
Fixes the following build problem:
arch/mips/powertv/reset.c:25:36: fatal error: asm/mach-powertv/kbldr.h: No such
file or directory
compilation terminated.
Cc: David VomLehn <dvomlehn@cisco.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: David VomLehn <dvomlehn@cisco.com>
Patchwork: https://patchwork.linux-mips.org/patch/5801/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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The endianness attribute on the 'aux' local variable is wrong, and can
lead to wrong endianness on big-endian machines,
Signed-off-by: Marc Carino <marc.ceeeee@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
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The NR_CPUS_DEFAULT_1 introduced as an aid for the QEMU
platform in 72ede9b18967e7a8a62a88f164f003193f6d891f
"[MIPS] Qemu: Fix Symmetric Uniprocessor support"
which was later removed in
302922e5f6901eb6f29c58539631f71b3d9746b8
"[MIPS] Qemu: Remove platform."
On certain randconfigs it may happen for NR_CPUS to have an
empty value because not all SMP platforms select a suitable
NR_CPUS_DEFAULT_* value. We fix this by restoring the range
of NR_CPUS to 2..64 and drop the NR_CPUS_DEFAULT_{1,2} symbols.
The first one is no longer used and the latter is not needed since
NR_CPUS=2 is now the default value.
Fixes the following problem on a randconfig:
.config:164:warning: symbol value '' invalid for NR_CPUS
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5747/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Currently the linux.bin target creates both linux.bin and linux.bin.ub.
Add linux.bin.ub as separate target to generate linux.bin.ub.
Signed-off-by: Jason Wu <huanyu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Extend PVR reg decoding.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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The main reason that this driver can be used by ARM
and PPC. The part of preparing of move to generic location.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Update dates in header and add Xilinx to it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Remove unused headers.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Push file descriptor list locking down to per-device locking. Let sg_index_lock
only protect device lookup.
sdp->detached is also set and checked with this lock held.
Signed-off-by: Vaughan Cao <vaughan.cao@oracle.com>
Acked-by: Douglas Gilbert <dgilbert@interlog.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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@detached is set under the protection of sg_index_lock. Without getting the
lock, new sfp will be added during sg removal and there is no chance for it
to be picked out. So check with sg_index_lock held in sg_add_sfp().
Signed-off-by: Vaughan Cao <vaughan.cao@oracle.com>
Acked-by: Douglas Gilbert <dgilbert@interlog.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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Open exclusive check is protected by o_sem, no need sg_open_exclusive_lock.
@exclude is used to record which type of rwsem we are holding.
Signed-off-by: Vaughan Cao <vaughan.cao@oracle.com>
Acked-by: Douglas Gilbert <dgilbert@interlog.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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A race condition may happen if two threads are both trying to open the same sg
with O_EXCL simultaneously. It's possible that they both find fsds list is
empty and get_exclude(sdp) returns 0, then they both call set_exclude() and
break out from wait_event_interruptible and resume open.
Now use rwsem to protect this process. Exclusive open gets write lock and
others get read lock. The lock will be held until file descriptor is closed.
This also leads 'exclude' only a status rather than a check mark.
Signed-off-by: Vaughan Cao <vaughan.cao@oracle.com>
Acked-by: Douglas Gilbert <dgilbert@interlog.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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unmap_alignment != 0
Commit b90ebc3d5c41c9164ae04efd2e4f8204c2a186f1 ("[SCSI] scsi_debug:
fix logical block provisioning support") fixed several issues with
logical block provisioning support, but it still doesn't properly fix
the cases when unmap_alignment > 0.
For example, load scsi_debug module with the following module parameters
and make all blocks mapped by filling the storage with zero.
# modprobe scsi_debug lbpu=1 unmap_alignment=1 unmap_granularity=4
# dd if=/dev/zero of=$DEV
Then, try to unmap the first unmappable blocks at lba=1, but GET LBA STATUS
unexpectedly reports that the last UNMAP has done nothing.
# sg_unmap --lba=1 --num=4 $DEV
# sg_get_lba_status --lba=1 $DEV
descriptor LBA: 0x0000000000000001 blocks: 16383 mapped
The problem is in map_index_to_lba(), which should return the first
LBA which is corresponding to a given index of provisioning map
(map_storep).
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Acked-by: "Martin K. Petersen" <martin.petersen@oracle.com>
Acked-by: Douglas Gilbert <dgilbert@interlog.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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With module parameter num_parts > 0, partition table is built on the
ramdisk storage when loading the driver. Unfortunately, there is an
endianness bug in sdebug_build_parts(). So the partition table is not
correctly initialized on big-endian systems.
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Tested-by: Martin Peschke <mpeschke@linux.vnet.ibm.com>
Acked-by: Douglas Gilbert <dgilbert@interlog.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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Signed-off-by: Giridhar Malavali <giridhar.malavali@qlogic.com>
Signed-off-by: Saurav Kashyap <saurav.kashyap@qlogic.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Saurav Kashyap <saurav.kashyap@qlogic.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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Signed-off-by: Giridhar Malavali <giridhar.malavali@qlogic.com>
Signed-off-by: Saurav Kashyap <saurav.kashyap@qlogic.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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At mailbox/buffer debug level, print the correct values of the
outgoing and incoming mailbox registers.
Signed-off-by: Joe Carnuccio <joe.carnuccio@qlogic.com>
Signed-off-by: Saurav Kashyap <saurav.kashyap@qlogic.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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On any Adapter when we flash through FC/FCoE without card reset option it still
shows the Running FW version in Flashed FW version. This new interface will be
used by API to instruct the driver to update its cache versions.
Signed-off-by: Sawan Chandak <sawan.chandak@qlogic.com>
Signed-off-by: Saurav Kashyap <saurav.kashyap@qlogic.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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Unless there is a need to observe them, the queue depth ramp up/down messages
are a nuisance and may cause the system to become unresponsive so move it a
non-default logging level.
Signed-off-by: Chad Dupuis <chad.dupuis@qlogic.com>
Signed-off-by: Saurav Kashyap <saurav.kashyap@qlogic.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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operating mode.
Signed-off-by: Joe Carnuccio <joe.carnuccio@qlogic.com>
Signed-off-by: Saurav Kashyap <saurav.kashyap@qlogic.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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Earlier IDC-TIME-EXTEND aen was a nop and ignored by driver.
We now have to handle the aen so that other protocol drivers can use time
extension during some loopback operations.
Signed-off-by: Santosh Vernekar <santosh.vernekar@qlogic.com>
Signed-off-by: Saurav Kashyap <saurav.kashyap@qlogic.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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firmware doesn't provide it
Signed-off-by: Armen Baloyan <armen.baloyan@qlogic.com>
Signed-off-by: Saurav Kashyap <saurav.kashyap@qlogic.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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