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2011-01-05ASoC: Change Samsung Kconfig from ASOC_ to SND_SOC_Mark Brown
The rest of ASoC is using SND_SOC_ as the prefix for all the Kconfig symbols so do so for the new Samsung drivers too, rather than using ASOC_ as they currently are. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Seungwhan Youn <sw.youn@samsung.com> Acked-by: Jassi Brar <jassi.brar@samsung.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
2011-01-05Revert "fs: use RCU read side protection in d_validate"Nick Piggin
This reverts commit 3825bdb7ed920845961f32f364454bee5f469abb. You cannot dget() a dentry without having a reference, or holding a lock that guarantees it remains valid. Signed-off-by: Nick Piggin <npiggin@kernel.dk>
2011-01-05Merge branch 'common/fbdev-mipi' of ↵Paul Mundt
master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
2011-01-05Merge branches 'rmobile/mmcif', 'rmobile/ag5' and 'rmobile/mackerel' into ↵Paul Mundt
rmobile-latest Conflicts: arch/arm/mach-shmobile/Kconfig Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-01-05fbdev: sh_mipi_dsi: use platform provided register layout and valuesGuennadi Liakhovetski
Different sh-mobile SoCs have variations in their MIPI DSI register layouts, besides, different LCD panels require different configuration parameters. This patch switches the driver to use platform-provided MIPI DSI parameters. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-01-05ARM: mach-shmobile: specify sh7372 MIPI DSI register layoutGuennadi Liakhovetski
Prepare the ap4evb board for the MIPI DSI driver transition to support different register layouts. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-01-05fbdev: sh_mipi_dsi: support different register layoutsGuennadi Liakhovetski
The register layout of the MIPI DSI unit on sh-mobile SoCs differ. Add platform parameters to support such variations. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-01-05ARM: mach-shmobile: improve MIPI DSI clock configurationGuennadi Liakhovetski
Now, that the MIPI DSI driver implements runtime PM, we don't need anymore to configure clocks statically in the platform code. This patch also adds a DSITX1 clock definition for sh7372 and attaches PHY clocks to respective devices. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-01-05fbdev: sh-mobile: implement MIPI DSI runtime PM supportGuennadi Liakhovetski
On SH-Mobile platforms using runtime PM with the MIPI DSI driver switches the DSI Tx link clock on PM events. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-01-05ARM: mach-shmobile: sh73a0: fix div4 tableTakashi YOSHII
sh73a0 has divisor[12] setting as 1/7 on FRQCRA. Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-01-05ARM: mach-shmobile: ap4/mackerel: modify wrong comment out of USBKuninori Morimoto
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-01-05ARM: mach-shmobile: Mackerel VGA camera supportMagnus Damm
Add VGA camera support to the Mackerel board using soc_camera_platform. The VGA camera module is hooked up using the 8-bit CEU bus, and it is constantly bursting out frames in fixed video mode setting. The camera module does not allow any I2C control. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-01-05sh: correct definitions to access stack pointersRoel Kluin
A definition like: #define regs_return_value(regs) ((regs)->regs[0]) called with regs_return_value(foo) will be preprocessed to: ((foo)->foo[0]) ^^^ So to fix this to ensure the preprocessor compiles such calls correctly. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-01-05mmc: sh_mmcif: make DMA support by the driver unconditionalGuennadi Liakhovetski
Simplify the driver by removing the possibility to build it without the DMA support and remove the respective Kconfig parameter. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-01-05m68knommu: switch to using -mcpu= flags for ColdFire targetsGreg Ungerer
Gcc has deprecated the use of the following ColdFire cpu options: -m5206e, -m528x, -m5307 and -m5407. In there place we should use the equivilent -mcpu= option and setting. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: arch/m68knommu/Kconfig whitespace cleanupPhilippe De Muyter
Replace 8 spaces, or even 7, by TAB at begin of lines. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: create optimal separate instruction and data cache for ColdFireGreg Ungerer
Create separate functions to deal with instruction and data cache flushing. This way we can optimize them for the vairous cache types and arrangements used across the ColdFire family. For example the unified caches in the version 3 cores means we don't need to flush the instruction cache. For the version 2 cores that do not do data cacheing (or where we choose instruction cache only) we don't need to do any data flushing. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: support ColdFire caches that do copyback and write-throughGreg Ungerer
The version 3 and version 4 ColdFire cache controllers support both write-through and copy-back modes on the data cache. Allow for Kconfig time configuration of this, and set the cache mode appropriately. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: support version 2 ColdFire split cacheGreg Ungerer
The newer version 2 ColdFire CPU cores support a configurable cache arrangement. The cache memory can be used as all instruction cache, all data cache, or split in half for both instruction and data caching. Support this setup via a Kconfig time menu that allows a kernel builder to choose the arrangement they want to use. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: make cache push code ColdFire genericGreg Ungerer
Currently the code to push cache lines is only available to version 4 cores. Version 3 cores may also need to use this if we support copy- back caches on them. Move this code to make it more generic, and useful for all version ColdFire cores. With this in place we can now have a single cache_flush_all() code path that does all the right things on all version cores. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: clean up ColdFire cache control codeGreg Ungerer
The cache control code for the ColdFire CPU's is a big ugly mess of "#ifdef"ery liberally coated with bit constants. Clean it up. The cache controllers in the various ColdFire parts are actually quite similar. Just differing in some bit flags and options supported. Using the header defines now in place it is pretty easy to factor out the small differences and use common setup and flush/invalidate code. I have preserved the cache setups as they where in the old code (except where obviously wrong - like in the case of the 5249). Following from this it should be easy now to extend the possible setups used on the CACHE controllers that support split cacheing or copy-back or write through options. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: move inclusion of ColdFire v4 cache registersGreg Ungerer
Move the inclusion of the version 4 cache controller registers so that it is with all the other register bit flag definitions. This makes it consistent with the other version core inclusion points, and means we don't need "#ifdef"ery in odd-ball places for these definitions. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: merge bit definitions for version 3 ColdFire cache controllerGreg Ungerer
All version 3 based ColdFire CPU cores have a similar cache controller. Merge all the exitsing definitions into a single file, and make them similar in style and naming to the existing version 2 and version 4 cache controller definitions. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: create bit definitions for the version 2 ColdFire cache controllerGreg Ungerer
The version 2 ColdFire CPU based cores all contain a similar cache controller unit. Create a set of bit flag definitions for the supporting registers. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: remove empty __iounmap() it is no usedGreg Ungerer
The empty __iounmap() function is not used on m68knommu at all. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: remove kernel_map() code, it is not usedGreg Ungerer
The kernel_map() functions is not used anywhere, remove it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: remove do_page_fault(), it is not usedGreg Ungerer
The non-MMU m68k does not use the do_page_fault() code, so remove it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: use user stack pointer hardware on some ColdFire coresGreg Ungerer
The more modern ColdFire parts (even if based on older version cores) have separate user and supervisor stack pointers (a7 register). Modify the ColdFire CPU setup and exception code to enable and use this on parts that have it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: remove command line printing DEBUGGreg Ungerer
There is no need for the DEBUG based command line printing in here. The kernel will print out the command line in the banner later in the boot up. So remove it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: remove fasthandler interrupt codeGreg Ungerer
There are no users of the old "fasthandler" interrupt entry code. So remove it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: move UART addressing to part specific includesGreg Ungerer
The ColdFire UART base addresses varies between the different ColdFire family members. Instead of keeping the base addresses with the UART definitions keep them with the other addresses definitions for each ColdFire part. The motivation for this move is so that when we add new ColdFire part definitions, they are all in a single file (and we shouldn't normally need to modify the UART definitions in mcfuart.h at all). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: fix clock rate value reported for ColdFire 54xx partsGreg Ungerer
The instruction timings of the ColdFire 54xx family parts are different to other version 4 parts (or version 2 or 3 parts for that matter too). Move the instruction timing setting into the ColdFire part specific headers, and set the 54xx value appropriately. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: move ColdFire CPU names into their headersGreg Ungerer
Move the ColdFire CPU names out of setup.c and into their repsective headers. That way when we add new ones we won't need to modify setup.c any more. Add the missing 548x CPU name. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: add support for the ColdFire 547x family of processorsGreg Ungerer
The Freescale M547x family of ColdFire processors is very similar to the M548x series. We use all the same support for it. Initially all we need is a high level configuration option for it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: make Coldfire 548x support more genericGreg Ungerer
The ColdFire 547x family of processors is very similar to the ColdFire 548x series. Almost all of the support for them is the same. Make the code supporting the 548x more gneric, so it will be capable of supporting both families. For the most part this is a renaming excerise to make the support code more obviously apply to both families. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: Use symbolic constants for cache operations on M54xxPhilippe De Muyter
Now that we have meaningfull symbolic constants for bit definitions of the cache registers of m5407 and m548x chips, use them to improve readability, portability and efficiency of the cache operations. This also fixes __flush_cache_all for m548x chips : implicit DCACHE_SIZE was exact for m5407, but wrong for m548x. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: Move __flush_cache_all definition for m54xx in m54xxacr.hPhilippe De Muyter
__flush_cache_all for m54xx is intrinsically related to the bit definitions in m54xxacr.h. Move it there from cacheflush_no.h, for easier maintenance. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: Create new m54xxacr.h from m5407sim.h subpartPhilippe De Muyter
The MCF548x have the same cache control registers as the MCF5407. Extract the bit definitions for the ACR and CACR registers from m5407sim.h and move them to a new file m54xxacr.h. Those definitions are not used anywhere yet, so no other file is involved. This is a preparation for m54xx cache support cleanup. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05vga_switcheroo: split switching into two stages.Dave Airlie
stage 1: turn card on, switch boot vga pointer. stage 2: switch fbs, switch mux and power off old card. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-05drm/switcheroo: track state of switch in drivers.Dave Airlie
We need to track the state of the switch in drivers, so that after s/r we don't resume the card we've explicitly switched off before. Also don't allow a userspace open to occur if we've switched the gpu off. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-05vga_switcheroo: add reprobe hook for fbcon to recheck connected outputs.Dave Airlie
This adds a hook after the mux is switched for the driver to reprobe the connected outputs. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-05nouveau/acpi: improve detection of what is IGD and what is DIS.Dave Airlie
This improves the IGD/DIS picking using firstly if Intel, then if the bus is bus 0. There may be a correct way to do this, but I've no idea what it is. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-05drm/nouveau: add delayed switch complete callback.Dave Airlie
this just adds the callback on the delayed switch mechanism. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-05vga_switcheroo: add debugging mux switch option.Dave Airlie
This allows the mux to be switched from userspace using MIGD/MDIS command to the switch. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-05vga_switcheroo: make power switch handler optionalDave Airlie
At least on the nvidia mux the power switch seems to be executed by the ACPI PS0/PS3 methods so need to do it explicitly. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-05vga_switcheroo: print the IGD/DIS flag in the debugfs output.Dave Airlie
We really want to see this so we can confirm that we pick the right one. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-04sparc: update copyright in piggyback.cSam Ravnborg
Update copyright info in piggyback.c to include info from piggyback_64.c. Include my own copyright too. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Josip Rodin <joy@entuzijast.net> Cc: Jakub Jelinek <jakub@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-04sparc: unify strip command in boot/MakefileSam Ravnborg
Include an additional "Kernel is ready" print for zImage Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-04sparc: rename piggyback_32 to piggybackSam Ravnborg
Now that we use the same piggyback for 32 and 64 bit we can drop the _32 suffix. Include some trivial unification in the Makefile now that 32 and 64 bit can share the same piggyback command. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-04sparc: fix tftpboot.img for sparc64 on little-endian hostSam Ravnborg
piggyback_32 adapted to support sparc64: - locating "HdrS" differs for sparc and sparc64 - sparc64 updates a_text, a_data + a_bss in the final a.out header Updated Makefile to use piggyback_32 for sparc64. Deleted the now unused piggyback_64.c piggyback_32.c is host endian neutral and works on both little-endian and big-endian hosts. This fixes a long standing bug where sparc64 could not generate tftpboot.img on a x86 host. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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