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2011-01-05m68knommu: create bit definitions for the version 2 ColdFire cache controllerGreg Ungerer
The version 2 ColdFire CPU based cores all contain a similar cache controller unit. Create a set of bit flag definitions for the supporting registers. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: remove empty __iounmap() it is no usedGreg Ungerer
The empty __iounmap() function is not used on m68knommu at all. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: remove kernel_map() code, it is not usedGreg Ungerer
The kernel_map() functions is not used anywhere, remove it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: remove do_page_fault(), it is not usedGreg Ungerer
The non-MMU m68k does not use the do_page_fault() code, so remove it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: use user stack pointer hardware on some ColdFire coresGreg Ungerer
The more modern ColdFire parts (even if based on older version cores) have separate user and supervisor stack pointers (a7 register). Modify the ColdFire CPU setup and exception code to enable and use this on parts that have it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: remove command line printing DEBUGGreg Ungerer
There is no need for the DEBUG based command line printing in here. The kernel will print out the command line in the banner later in the boot up. So remove it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: remove fasthandler interrupt codeGreg Ungerer
There are no users of the old "fasthandler" interrupt entry code. So remove it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: move UART addressing to part specific includesGreg Ungerer
The ColdFire UART base addresses varies between the different ColdFire family members. Instead of keeping the base addresses with the UART definitions keep them with the other addresses definitions for each ColdFire part. The motivation for this move is so that when we add new ColdFire part definitions, they are all in a single file (and we shouldn't normally need to modify the UART definitions in mcfuart.h at all). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: fix clock rate value reported for ColdFire 54xx partsGreg Ungerer
The instruction timings of the ColdFire 54xx family parts are different to other version 4 parts (or version 2 or 3 parts for that matter too). Move the instruction timing setting into the ColdFire part specific headers, and set the 54xx value appropriately. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: move ColdFire CPU names into their headersGreg Ungerer
Move the ColdFire CPU names out of setup.c and into their repsective headers. That way when we add new ones we won't need to modify setup.c any more. Add the missing 548x CPU name. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: add support for the ColdFire 547x family of processorsGreg Ungerer
The Freescale M547x family of ColdFire processors is very similar to the M548x series. We use all the same support for it. Initially all we need is a high level configuration option for it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: make Coldfire 548x support more genericGreg Ungerer
The ColdFire 547x family of processors is very similar to the ColdFire 548x series. Almost all of the support for them is the same. Make the code supporting the 548x more gneric, so it will be capable of supporting both families. For the most part this is a renaming excerise to make the support code more obviously apply to both families. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: Use symbolic constants for cache operations on M54xxPhilippe De Muyter
Now that we have meaningfull symbolic constants for bit definitions of the cache registers of m5407 and m548x chips, use them to improve readability, portability and efficiency of the cache operations. This also fixes __flush_cache_all for m548x chips : implicit DCACHE_SIZE was exact for m5407, but wrong for m548x. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: Move __flush_cache_all definition for m54xx in m54xxacr.hPhilippe De Muyter
__flush_cache_all for m54xx is intrinsically related to the bit definitions in m54xxacr.h. Move it there from cacheflush_no.h, for easier maintenance. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05m68knommu: Create new m54xxacr.h from m5407sim.h subpartPhilippe De Muyter
The MCF548x have the same cache control registers as the MCF5407. Extract the bit definitions for the ACR and CACR registers from m5407sim.h and move them to a new file m54xxacr.h. Those definitions are not used anywhere yet, so no other file is involved. This is a preparation for m54xx cache support cleanup. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05vga_switcheroo: split switching into two stages.Dave Airlie
stage 1: turn card on, switch boot vga pointer. stage 2: switch fbs, switch mux and power off old card. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-05drm/switcheroo: track state of switch in drivers.Dave Airlie
We need to track the state of the switch in drivers, so that after s/r we don't resume the card we've explicitly switched off before. Also don't allow a userspace open to occur if we've switched the gpu off. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-05vga_switcheroo: add reprobe hook for fbcon to recheck connected outputs.Dave Airlie
This adds a hook after the mux is switched for the driver to reprobe the connected outputs. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-05nouveau/acpi: improve detection of what is IGD and what is DIS.Dave Airlie
This improves the IGD/DIS picking using firstly if Intel, then if the bus is bus 0. There may be a correct way to do this, but I've no idea what it is. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-05drm/nouveau: add delayed switch complete callback.Dave Airlie
this just adds the callback on the delayed switch mechanism. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-05vga_switcheroo: add debugging mux switch option.Dave Airlie
This allows the mux to be switched from userspace using MIGD/MDIS command to the switch. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-05vga_switcheroo: make power switch handler optionalDave Airlie
At least on the nvidia mux the power switch seems to be executed by the ACPI PS0/PS3 methods so need to do it explicitly. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-05vga_switcheroo: print the IGD/DIS flag in the debugfs output.Dave Airlie
We really want to see this so we can confirm that we pick the right one. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-04sparc: update copyright in piggyback.cSam Ravnborg
Update copyright info in piggyback.c to include info from piggyback_64.c. Include my own copyright too. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Josip Rodin <joy@entuzijast.net> Cc: Jakub Jelinek <jakub@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-04sparc: unify strip command in boot/MakefileSam Ravnborg
Include an additional "Kernel is ready" print for zImage Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-04sparc: rename piggyback_32 to piggybackSam Ravnborg
Now that we use the same piggyback for 32 and 64 bit we can drop the _32 suffix. Include some trivial unification in the Makefile now that 32 and 64 bit can share the same piggyback command. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-04sparc: fix tftpboot.img for sparc64 on little-endian hostSam Ravnborg
piggyback_32 adapted to support sparc64: - locating "HdrS" differs for sparc and sparc64 - sparc64 updates a_text, a_data + a_bss in the final a.out header Updated Makefile to use piggyback_32 for sparc64. Deleted the now unused piggyback_64.c piggyback_32.c is host endian neutral and works on both little-endian and big-endian hosts. This fixes a long standing bug where sparc64 could not generate tftpboot.img on a x86 host. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-04sparc: add $BITS to piggyback argumentsSam Ravnborg
Add new option to piggyback that identify if this is for 32 or 64 bit. Use this information to determine the alignment used. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-04sparc: remove obsolete ELF support in piggyback_32.cSam Ravnborg
As we always convert to a.out there is no need to support ELF. Removing ELF support because: - it is not used - it simplifies code to support a.out only Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-04sparc: additional comments to piggyback_32.cSam Ravnborg
While reverse engineering the functionality of piggyback I missed that the code was actually commented. So I added a few comments. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-04sparc: use _start for the start entry (like 64 bit does)Sam Ravnborg
We use "_start" in 64 bit - do the same in 32 bit. It is always good to be consistent. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-04sparc: use trapbase in setup_archSam Ravnborg
start and trapbase point to the same address. But using start to assing to sparc_ttable looked confusing. Replace this with the use of trapbase. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-04sparc: refactor piggy_32.cSam Ravnborg
Refactoring to increase readability (a little). - sort includes - spaces around operators - small helpers introduced - added a few comments Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-04ARM: PL08x: prevent dma_set_runtime_config() reconfiguring memcpy channelsRussell King - ARM Linux
Prevent dma_set_runtime_config() being used to alter the configuration supplied by the platform for memcpy channel configuration. No one should be trying to change this configuration. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-01-04ARM: PL08x: allow dma_set_runtime_config() to return errorsRussell King - ARM Linux
There are cases in dma_set_runtime_config() where we fail to perform the requested action - and we just issue a KERN_ERR message in that case. We have the facility to return an error to the caller, so that is what we should do. When we encounter an error due to invalid parameters, we should not modify driver state. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-01-04ARM: PL08x: fix locking between prepare function and submit functionRussell King - ARM Linux
The PL08x driver holds on to the channel lock with interrupts disabled between the prepare and the subsequent submit API functions. This means that the locking state when the prepare function returns is dependent on whether it suceeeds or not. It did this to ensure that the physical channel wasn't released, and as it used to add the descriptor onto the pending list at prepare time rather than submit time. Now that we have reorganized the code to remove those reasons, we can now safely release the spinlock at the end of preparation and reacquire it in our submit function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-01-04ARM: PL08x: introduce 'phychan_hold' to hold on to physical channelsRussell King - ARM Linux
Introduce 'phychan_hold' to hold on to physical DMA channels while we're preparing a new descriptor for it. This will be incremented when we allocate a physical channel and set the MUX registers during the preparation of the TXD, and will only be decremented when the TXD is submitted. This prevents the physical channel being given up before the new TXD is placed on the queue. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-01-04ARM: PL08x: put txd's on the pending list in pl08x_tx_submit()Russell King - ARM Linux
Don't place TXDs on the pending list when they're prepared - place them on the list when they're ready to be submitted. Also, only place memcpy requests in the wait state when they're submitted and don't have a physical channel associated. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-01-04ARM: PL08x: rename 'desc_list' as 'pend_list'Russell King - ARM Linux
This 'desc_list' is actually a list of pending descriptors, so name it after its function (pending list) rather than what it contains (descriptors). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-01-04ARM: PL08x: implement unmapping of memcpy buffersRussell King - ARM Linux
The DMA engine API requires DMA engine implementations to unmap buffers passed into the non-slave DMA methods unless the relevant completion flag is set. We aren't doing this, so implement this facility. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-01-04ARM: PL08x: store prep_* flags in async_tx structureRussell King - ARM Linux
Like other DMA engine drivers do, store the passed flags into the async_tx structure, so they can be checked when the operation completes. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-01-04ARM: PL08x: shrink srcbus/dstbus in txd structureRussell King - ARM Linux
We only need to store the dma address. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-01-04ARM: PL08x: don't manipulate txd->srcbus or txd->dstbus during LLI fillRussell King - ARM Linux
Don't alter any txd->srcbus or txd->dstbus values while building the LLI list. This allows us to see the original dma_addr_t values passed in via the prep_memcpy() method. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-01-04ARM: PL08x: fix fill_bytes calculationRussell King - ARM Linux
The number of bytes we want to fill into any LLI is the minimum of: - number of bytes remaining in the transfer - number of bytes we can transfer in a single LLI - number of bytes we can transfer without overflowing the source boundary - number of bytes we can transfer without overflowing the destination boundary The minimum of the first two is already calculated (target_len). We limit the boundary calculations to this number of bytes, which will then give us the number of bytes we can place into this LLI. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-01-04ARM: PL08x: use min() to calculate target_lenRussell King - ARM Linux
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-01-04ARM: PL08x: ensure pl08x_pre_boundary() works for any value of addrRussell King - ARM Linux
pl08x_pre_boundary() was unsafe with addresses towards the top of memory space: boundary = ((addr >> PL08X_BOUNDARY_SHIFT) + 1) << PL08X_BOUNDARY_SHIFT; This can overflow a 32-bit number, producing zero. When it does: if (boundary < addr + len) return boundary - addr; else return len; results in (boundary - addr) returning either a large positive value. Also if addr + len overflows, this calculation also fails. We can fix this trivially as the only thing we're actually interested in is the value of the least significant PL08X_BOUNDARY_SHIFT bits: boundary_len = PL08X_BOUNDARY_SIZE - (addr & (PL08X_BOUNDARY_SIZE - 1)); gives us the number of bytes before 'addr' becomes a multiple of PL08X_BOUNDARY_SIZE. We can then just take the min() of the two calculated lengths. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-01-04ARM: PL08x: make pl08x_fill_lli_for_desc() return voidRussell King - ARM Linux
We don't need pl08x_fill_lli_for_desc() to return num_llis + 1 as we know that's what it always does. We can just pass in num_llis and use post-increment in the caller. This makes the code slightly easier to read. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-01-04ARM: PL08x: move callback outside spinlock'd regionRussell King - ARM Linux
Calling the callback handler with spinlocks in the tasklet held leads to deadlock when dmaengine functions are called: BUG: spinlock lockup on CPU#0, sh/417, c1870a08 Backtrace: ... [<c017b408>] (do_raw_spin_lock+0x0/0x154) from [<c02c4b98>] (_raw_spin_lock_irqsave+0x54/0x60) [<c02c4b44>] (_raw_spin_lock_irqsave+0x0/0x60) from [<c01f5828>] (pl08x_prep_channel_resources+0x718/0x8b4) [<c01f5110>] (pl08x_prep_channel_resources+0x0/0x8b4) from [<c01f5bb4>] (pl08x_prep_slave_sg+0x120/0x19c) [<c01f5a94>] (pl08x_prep_slave_sg+0x0/0x19c) from [<c01be7a0>] (pl011_dma_tx_refill+0x164/0x224) [<c01be63c>] (pl011_dma_tx_refill+0x0/0x224) from [<c01bf1c8>] (pl011_dma_tx_callback+0x7c/0xc4) [<c01bf14c>] (pl011_dma_tx_callback+0x0/0xc4) from [<c01f4d34>] (pl08x_tasklet+0x60/0x368) [<c01f4cd4>] (pl08x_tasklet+0x0/0x368) from [<c004d978>] (tasklet_action+0xa0/0x100) Dan quoted the documentation: > 2/ Completion callback routines cannot submit new operations.  This >    results in recursion in the synchronous case and spin_locks being >    acquired twice in the asynchronous case. but then followed up to say: > I should clarify, this is the async_memcpy() api requirement which is > not used outside of md/raid5. DMA drivers can and do allow new > submissions from callbacks, and the ones that do so properly move the > callback outside of the driver lock. So let's fix it by moving the callback out of the spinlocked region. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-01-04ARM: PL08x: allow AHB master port selection to be configuredRussell King - ARM Linux
Platforms need to be able to control which AHB master interface is used, as each AHB master interface may be asymetric. Allow the interfaces used for fetching LLIs, memory, and each peripheral to be configured individually. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2011-01-04ARM: PL08x: move AHB master port selection into prep_* functionsRussell King - ARM Linux
As we initialize the default cctl value in the prep_* functions along with the increment settings, we don't need to repeat the selection of the AHB ports each time we create a LLI entry. Do this in the prep_* functions once per transfer. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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