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2025-06-27drm/i915/fbdev: Add intel_fbdev_get_map()Jocelyn Falempe
The vaddr of the fbdev framebuffer is private to the struct intel_fbdev, so this function is needed to access it for drm_panic. Also the struct i915_vma is different between i915 and xe, so it requires a few functions to access fbdev->vma->iomap. Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://lore.kernel.org/r/20250624091501.257661-3-jfalempe@redhat.com Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
2025-06-27drm/panic: Add a private field to struct drm_scanout_bufferJocelyn Falempe
This allows driver to set some private data in get_scanout_buffer(), and re-use them in set_pixel() callback. Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://lore.kernel.org/r/20250624091501.257661-2-jfalempe@redhat.com Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
2025-06-26drm/i915/power: convert {SKL, ICL}_PW_CTL_IDX_TO_PG() macros to a functionJani Nikula
Add pw_ctl_idx_to_pg() helper function to deduplicate the open-coded usage of the {SKL,ICL}_PW_CTL_IDX_TO_PG() macros. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/3aa74825db0b900f93b94aa89d0242a354929b85.1750855148.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/power: relocate {SKL,ICL}_PW_CTL_IDX_TO_PG()Jani Nikula
Move the {SKL,ICL}_PW_CTL_IDX_TO_PG() macros from intel_display_regs.h to intel_display_power_well.c. The mapping from index to PG can be hidden there. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/18e40b77eeb3517a056f1e567672163ec568ec55.1750855148.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/power: move enum skl_power_gate under displayJani Nikula
When the display registers were split off from i915_reg.h, enum skl_power_gate was left behind. Move it to intel_display_regs.h. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/495054983b74163ca7dcbf5a1b6a24099047bc64.1750855148.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/selftests: Change mock_request() to return error pointersDan Carpenter
There was an error pointer vs NULL bug in __igt_breadcrumbs_smoketest(). The __mock_request_alloc() function implements the smoketest->request_alloc() function pointer. It was supposed to return error pointers, but it propogates the NULL return from mock_request() so in the event of a failure, it would lead to a NULL pointer dereference. To fix this, change the mock_request() function to return error pointers and update all the callers to expect that. Fixes: 52c0fdb25c7c ("drm/i915: Replace global breadcrumbs with per-context interrupt tracking") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/685c1417.050a0220.696f5.5c05@mx.google.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-06-26drm/i915/display: move unordered works to new private workqueueLuca Coelho
Create a new unordered workqueue to be used by the display code instead of relying on the i915 one. Then move all the unordered works used in the display code to use this new queue. Since this is an unordered workqueue, by definition there can't be any order dependency with non-display works, so no extra care is needed in regard to that. This is part of the effort to isolate the display code from i915. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://lore.kernel.org/r/20250620091632.1256135-1-luciano.coelho@intel.com Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2025-06-26drm/i915/cdclk: make struct intel_cdclk_state opaqueJani Nikula
With all the code touching struct intel_cdclk_state moved inside intel_cdclk.c, we move the struct definition there too, and make the type opaque. This nicely reduces includes from intel_cdclk.h. Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/2b58c52e8cbcb66a48ecd4a1453e49dc7bd66289.1750847509.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/cdclk: abstract intel_cdclk_actual() and ↵Jani Nikula
intel_cdclk_actual_voltage_level() Add intel_cdclk_actual() and intel_cdclk_actual_voltage_level() helpers to avoid looking at struct intel_cdclk_state internals outside of intel_cdclk.c. v2: Better location (Imre) Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/241a9b80a8262b82fded54707ca5622af215dd86.1750847509.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/cdclk: abstract intel_cdclk_read_hw()Jani Nikula
Add intel_cdclk_read_hw() function to avoid looking at struct intel_cdclk_state internals outside of intel_cdclk.c. intel_cdclk_init_hw() would be a better name, but we already have that. Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/ef720d37bfeee933d59b64e382dc976f3c9fade1.1750847509.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/cdclk: abstract intel_cdclk_force_min_cdclk()Jani Nikula
Add intel_cdclk_force_min_cdclk() helper to avoid modifying struct intel_cdclk_state internals outside of intel_cdclk.c. Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/0bf8a94a1a7d3ac564406ba427d12c4c8eefb5bb.1750847509.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/cdclk: abstract intel_cdclk_pmdemand_needs_update()Jani Nikula
Add intel_cdclk_pmdemand_needs_update() helper to avoid looking at struct intel_cdclk_state internals outside of intel_cdclk.c. Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/d0d4f073707a2badb432187f6e02d6d7f9fe431b.1750847509.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/cdclk: abstract intel_cdclk_bw_min_cdclk()Jani Nikula
Add intel_cdclk_bw_min_cdclk() helper to avoid looking at struct intel_cdclk_state internals outside of intel_cdclk.c. Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/d07499174ebe55fa8fb98d4cb5ff541b6f5ec95b.1750847509.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/cdclk: abstract intel_cdclk_min_cdclk()Jani Nikula
Add intel_cdclk_min_cdclk() helper to avoid looking at struct intel_cdclk_state internals outside of intel_cdclk.c. Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/af768e7fc32d8fa8ddcbbe2683266c30ae3b925d.1750847509.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/cdclk: abstract intel_cdclk_logical()Jani Nikula
Add intel_cdclk_logical() helper to avoid looking at struct intel_cdclk_state internals outside of intel_cdclk.c. Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/e965667550e82307341d6abbeedc67b93cae9fc6.1750847509.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/bw: make struct intel_bw_state opaqueJani Nikula
With all the code touching struct intel_bw_state moved inside intel_bw.c, we move the struct definition there too, and make the type opaque. to_intel_bw_state() needs to be turned into a proper function. All of this nicely reduces includes from intel_bw.h. Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/743ba67e4e3c5dac4f5e58ab4d2357edea601d09.1750847509.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/bw: abstract intel_bw_qgv_point_peakbw()Jani Nikula
Add intel_bw_qgv_point_peakbw() helper to avoid looking at struct intel_bw_state internals outside of intel_bw.c. Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/49a723e0f23e06a6045f8f9e0d06648a6bc899c7.1750847509.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915: move icl_sagv_{pre, post}_plane_update() to intel_bw.cJani Nikula
Prefer only looking at struct intel_bw_state internals inside intel_bw.c. To that effect, move icl_sagv_{pre,post}_plane_update() there. Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/dedcbeb3389ecd50195aa37de75e9992fae5d197.1750847509.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/bw: relocate intel_can_enable_sagv() and rename to ↵Jani Nikula
intel_bw_can_enable_sagv() Prefer only looking at struct intel_bw_state internals inside intel_bw.c. To that effect, move intel_can_enable_sagv() there, and rename to intel_bw_can_enable_sagv() to have consistent naming. Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/dd6e3857bd1343c07a36826e99c1c04f7dd5ddb5.1750847509.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/bw: abstract intel_bw_pmdemand_needs_update()Jani Nikula
Add intel_bw_pmdemand_needs_update() helper to avoid looking at struct intel_bw_state internals outside of intel_bw.c. Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/163fda39da2e1cf0f0c4fcb9c71103c98863179e.1750847509.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/wm: make struct intel_dbuf_state opaque typeJani Nikula
With all the code touching struct intel_dbuf_state moved inside skl_watermark.c, we move the struct definition there too, and make the type opaque. This nicely reduces includes from skl_watermark.h. Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/83ae5f022a1d6d83c031e5c079b04dc739102565.1750847509.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/wm: add more accessors to dbuf stateJani Nikula
Add intel_dbuf_num_enabled_slices() and intel_dbuf_num_active_pipes() helpers to avoid looking at struct intel_dbuf_state internals outside of skl_watermark.c. Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/7d555e7b4e93632b732b8b5a3cd4076baf781bee.1750847509.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/wm: abstract intel_dbuf_pmdemand_needs_update()Jani Nikula
Add intel_dbuf_pmdemand_needs_update() helper to avoid looking at struct intel_dbuf_state internals outside of skl_watermark.c. With this, we can also move to_intel_dbuf_state(), intel_atomic_get_old_dbuf_state(), and intel_atomic_get_new_dbuf_state() inside skl_watermark.c. Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/b493f259d0d3db047151fee18d7e801ad469fa88.1750847509.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915: remove unused DISPLAY_PLANE_FLIP_PENDING() macroJani Nikula
DISPLAY_PLANE_FLIP_PENDING() has been unused since commit fd3a40242e87 ("drm/i915: Rip out legacy page_flip completion/irq handling"). Remove. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/20250625132140.1564473-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-26drm/i915/display: Implement wa_16011342517Nemesa Garg
While doing voltage swing for type-c phy for DP 1.62 and HDMI write the LOADGEN_SHARING_PMD_DISABLE bit to 1. -v2: Update commit. Add bspec[Suraj] -v3: Move w/a before DKL_TX_PMD_LANE_SUS. Use DKL_TX_DPCNTL2[Ville] -v4: Use intel_encoder_is_dp and intel_encoder_is_hdmi. [Suraj] Bspec: 55359 Signed-off-by: Nemesa Garg <nemesa.garg@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://lore.kernel.org/r/20250625074911.194085-1-nemesa.garg@intel.com
2025-06-26drm/i915/panel: register drm_panel and call prepare/unprepare for eDPArun R Murthy
Allocate and register drm_panel to allow the panel_follower framework to detect the eDP panel and pass drm_connector::kdev device to drm_panel allocation for matching. Call drm_panel_prepare/unprepare in ddi_enable for eDP to allow the followers to get notified of the panel power state changes. Note: This is for eDP with DDI platforms only. v2: remove backlight setup from panel_register (Jani) v3: Updated the commit message (Jani) Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://lore.kernel.org/r/20250624-edp_panel-v3-1-e8197b6d9fde@intel.com
2025-06-24drm/i915/wm: reduce stack usage in skl_print_wm_changes()Arnd Bergmann
When KMSAN is enabled, this function causes has a rather excessive stack usage: drivers/gpu/drm/i915/display/skl_watermark.c:2977:1: error: stack frame size (1432) exceeds limit (1408) in 'skl_compute_wm' [-Werror,-Wframe-larger-than] This is apparently all caused by the varargs calls to drm_dbg_kms(). Inlining this into skl_compute_wm() means that any function called by skl_compute_wm() has its own stack on top of that. Move the worst bit into a separate function marked as noinline_for_stack to limit that to the one code path that actually needs it. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20250620113748.3869160-1-arnd@kernel.org Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-06-24drm/i915/hdcp: Use HDCP2_STREAM_STATUS instead of HDCP2_AUTH_STREAMSuraj Kandpal
From PTL we need to move to using HDCP2_STREAM_STATUS as a WARN_ON to see if written content type info is not the same since HDCP2_AUTH_STREAM is inaccessible to us now. --v2 -Fix commit message [Jani] Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://lore.kernel.org/r/20250619113340.3379200-3-suraj.kandpal@intel.com
2025-06-24drm/i915/hdcp: Do not use inline intel_de_readSuraj Kandpal
Do not use intel_de_read() inline in the WARN_ON functions. While we are at it make the comparision for stream_type u8 to u8. --v2 -Use REG_GENMASK() [Jani] -USe REG_FIELD_GET() [Jani] -Fix the WARN_ON() condition [Jani] Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://lore.kernel.org/r/20250619113340.3379200-2-suraj.kandpal@intel.com
2025-06-23drm/xe/compat: remove old pcode compat interfaceJani Nikula
With display code using the struct drm_device based pcode interface, we can drop the old pcode compat interface. We can also drop the __compat_uncore_to_tile() helper from intel_uncore.h compat header. Turns out a couple of headers depended on the intel_uncore.h include via intel_pcode.h. Fix them. Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/948016a031dcb2acef0c97071aac09fa49613e07.1750678991.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-23drm/i915/dram: switch to struct drm_device based pcode interfaceJani Nikula
With the struct drm_device based pcode interface in place in both i915 and xe, we can switch dram code to use that. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/e0d74a3317cc61d1cbb096b962cfbd7c60f038d4.1750678991.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-23drm/i915/display: switch to struct drm_device based pcode interfaceJani Nikula
With the struct drm_device based pcode interface in place in both i915 and xe, we can switch display code to use that, and ditch a number of struct drm_i915_private uses. Also drop the dependency on i915_drv.h from a couple of files. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/f948fad1b8208522e15140692c17cf493ef305d9.1750678991.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-23drm/xe/pcode: add struct drm_device based interfaceJani Nikula
In preparation for dropping the dependency on struct intel_uncore or struct xe_tile from display code, add a struct drm_device based interface to pcode. Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/eeaa9cc8438caab2e22f9cb2142fbc18cc0fd861.1750678991.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-23drm/i915/pcode: add struct drm_device based interfaceJani Nikula
In preparation for dropping the dependency on struct intel_uncore from display code, add a struct drm_device based interface to pcode. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/e4ee176ca5454cfc636cbe71feb9f55d9e91f4ea.1750678991.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-23drm/i915/pcode: drop fast wait from snb_pcode_write_timeout()Jani Nikula
Only use the ms granularity wait in snb_pcode_write_timeout(), primarily to better align with the xe driver, which also only has the millisecond wait. Use an arbitrary 250 us fast wait before the specified ms wait, and have snb_pcode_write() default to 1 ms. This means snb_pcode_write() and snb_pcode_write_timeout() will always be sleeping functions. There should not be any atomic users for pcode writes though, and any display code using pcode via xe has already been non-atomic. The uncore wait will do a might_sleep() annotation that should catch any problems. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/ba86280f53cea2d020308db35f1ecbd615d07d8a.1750678991.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-23drm/i915/dmc: Do not enable the pipe DMC on TGL when PSR is possibleVille Syrjälä
On TGL/derivatives the pipe DMC state is lost when PG1 is disabled, and the main DMC does not restore any of it. This means the state will also be lost during PSR+DC5/6. It seems safest to not even enable the pipe DMC in that case (the main DMC does restore the pipe DMC enable bit in PIPEDMC_CONTROL_A for some reason). Since pipe DMC is only needed for "fast LACE" on these platforms we aren't actually losing anything here. In the future if we do want to enable "fast LACE" we'll just have to remember that it won't be compatible with PSR. Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250617170759.19552-10-ville.syrjala@linux.intel.com
2025-06-23drm/i915/dmc: Pass crtc_state to intel_dmc_{enable,disable}_pipe()Ville Syrjälä
I'll need to examine the crtc state during intel_dmc_enable_pipe(). To that end pass the whole crtc into intel_dmc_{enable,disable}_pipe(). Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250617170759.19552-9-ville.syrjala@linux.intel.com
2025-06-23drm/i915/dmc: Assert DMC is loaded harderVille Syrjälä
Currently we have some asserts to make sure the main DMC has been loaded. Add similar asserts for the pipe DMCs. And we might as well just check all the mmio registers the firmware has asked us to initialize. That also covers the hardcoded SSP/HTP registers we were checking for the main DMC. TODO: Maybe always configure DMC_EVT_CTL_ENABLE the way the firmware has it set so that we wouldn't need to special case in the assert? v2: Also assert in intel_dmc_load_program() Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250617170759.19552-8-ville.syrjala@linux.intel.com
2025-06-23drm/i915/dmc: Reload pipe DMC MMIO registers for pipe C/D on various platformsVille Syrjälä
On ADL/MTL pipe DMC MMIO state evidently lives in PG0. The main DMC saves/restores it for pipes A/B, but for pipes C/D we have to do it in the driver. On PTL the situation is mostly the same, except the main DMC firmware doesn't seem to have the PG0 save/restore code anymore, and instead the hardware (or maybe Punit?) seems to take care of this job now. Pipes C/D still need a manual restore by the driver. On LNL I've been unable to lose any pipe DMC state, despite the main DMC firmware still implementing the PG0 save/restore for pipes A/B. Not sure what's going on here. On DG2 I've also not been able to lose the pipe DMC state. DG2 doesn't support DC6, so that might explain part of it. But even DC9 doesn't make a difference here. Perhaps PG0 is just always on for DG2? BMG I've not tested at all. The main DMC firmware does appaer to implement the PG0 pipe A/B save/restore logic. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250617170759.19552-7-ville.syrjala@linux.intel.com Reviewed-by: Uma Shankar <uma.shankar@intel.com>
2025-06-23drm/i915/dmc: Reload pipe DMC state on TGL when enabling pipe AVille Syrjälä
On TGL/derivatives the entire pipe DMC state (program + MMIO) is lost when PG1 is disabled, and the main DMC does not restore any of it. Reload the state when enabling a pipe. The other option would be to not load the pipe DMC at all since it's only needed for "fast LACE" (which we don't use) on these platforms. But let's keep it around just in case we ever decide that "fast LACE" is something we want. Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250617170759.19552-6-ville.syrjala@linux.intel.com
2025-06-23drm/i915/dmc: Extract dmc_load_program()Ville Syrjälä
We'll be needing to reload the program for individual DMCs. To make that possible pull the code to load the program for a single DMC into a new function. This does change the order of things during init/resume a bit; previously we loaded the program RAM for all DMCs first, and then loaded the MMIO registers for all DMCs. Now those operations will be interleaved between different DMCs. Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250617170759.19552-5-ville.syrjala@linux.intel.com
2025-06-23drm/i915/dmc: Shuffle code aroundVille Syrjälä
Shuffle the DMC_EVT_CTL related stuff around once more. We'll need this stuff during intel_dmc_enable_pipe(), and this lets us avoid forward declarations. Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250617170759.19552-4-ville.syrjala@linux.intel.com
2025-06-23drm/i915/dmc: Parametrize MTL_PIPEDMC_GATING_DISVille Syrjälä
The MTL+ pipe DMC clock gating bits can be parametrized. Make it so. Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250617170759.19552-3-ville.syrjala@linux.intel.com
2025-06-23drm/i915/dmc: Limit pipe DMC clock gating w/a to just ADL/DG2/MTLVille Syrjälä
Supposedly nothing post-MTL (even BMG) needs the pipe DMC clock gating w/a (Wa_16015201720), so don't apply it. TODO: check if the ADL/DG2 "clock gating needed during DMC loading" part is actually needed, not seeing anything in the docs about it... Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250617170759.19552-2-ville.syrjala@linux.intel.com
2025-06-23drm/i915/panel: make panel funcs staticJani Nikula
The drm panel funcs should be static, fix it. Fixes: 3fdd5bfbd638 ("drm/i915/panel: register drm_panel and call prepare/unprepare for ICL+ DSI") Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://lore.kernel.org/r/20250612124617.626958-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-23Merge drm/drm-next into drm-intel-nextJani Nikula
Sync with drm_panel changes from drm-misc-next, and xe driver changes from drm-xe-next. Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-06-23drm/xe/display: read PCON capability only when presentChaitanya Kumar Borah
Avoid reading the PCON capabilities redundantly on non-branch devices. v2: - Make commit description more accurate. (Imre) - Clear intel_dp->pcon_dsc_dpcd irrespective of presense of PCON. (Imre) Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://lore.kernel.org/r/20250619042629.3980244-1-chaitanya.kumar.borah@intel.com
2025-06-23Merge tag 'drm-intel-next-2025-06-18' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/i915/kernel into drm-next drm/i915 feature pull for v6.17: Features and functionality: - Add support for DSC fractional link bpp on DP MST (Imre) - Add support for simultaneous Panel Replay and Adaptive Sync (Jouni) - Add support for PTL+ double buffered LUT registers (Chaitanya, Ville) - Add PIPEDMC event handling in preparation for flip queue (Ville) Refactoring and cleanups: - Rename lots of DPLL interfaces to unify them (Suraj) - Allocate struct intel_display dynamically (Jani) - Abstract VLV IOSF sideband better (Jani) - Use str_true_false() helper (Yumeng Fang) - Refactor DSB code in preparation for flip queue (Ville) - Use drm_modeset_lock_assert_held() instead of open coding (Luca) - Remove unused arg from skl_scaler_get_filter_select() (Luca) - Split out a separate display register header (Jani) - Abstract DRAM detection better (Jani) - Convert LPT/WPT SBI sideband to struct intel_display (Jani) Fixes: - Fix DSI HS command dispatch with forced pipeline flush (Gareth Yu) - Fix BMG and LNL+ DP adaptive sync SDP programming (Ankit) - Fix error path for xe display workqueue allocation (Haoxiang Li) - Disable DP AUX access probe where not required (Imre) - Fix DKL PHY access if the port is invalid (Luca) - Fix PSR2_SU_STATUS access on ADL+ (Jouni) - Add sanity checks for porch and sync on BXT/GLK DSI (Ville) DRM core changes: - Change AUX DPCD access probe address (Imre) - Refactor EDID quirks, amd make them available to drivers (Imre) - Add quirk for DPCD access probe (Imre) - Add DPCD definitions for Panel Replay capabilities (Jouni) Merges: - Backmerges to sync with v6.15-rcs and v6.16-rc1 (Jani) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Jani Nikula <jani.nikula@intel.com> Link: https://lore.kernel.org/r/fff9f231850ed410bd81b53de43eff0b98240d31@intel.com
2025-06-20Merge tag 'drm-misc-next-2025-06-19' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/misc/kernel into drm-next drm-misc-next for 6.17: UAPI Changes: - Add Task Information for the wedge API Cross-subsystem Changes: Core Changes: - Fix warnings related to export.h - fbdev: Make CONFIG_FIRMWARE_EDID available on all architectures - fence: Fix UAF issues - format-helper: Improve tests Driver Changes: - ivpu: Add turbo flag, Add Wildcat Lake Support - rz-du: Improve MIPI-DSI Support - vmwgfx: fence improvement Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <mripard@redhat.com> Link: https://lore.kernel.org/r/20250619-perfect-industrious-whippet-8ed3db@houat
2025-06-20Merge tag 'drm-xe-next-2025-06-18' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/xe/kernel into drm-next UAPI Changes: - Expose media OA units (Ashutosh) Merge: - Restore GuC submit UAF fix around queue destruction accidentally removed in a drm-xe-fixes merge (Auld) Core Changes: - drm/gpusvm: Introduce devmem_only flag for allocation (Himal) - drm/gpusvm: Add timeslicing support to GPU SVM (Brost) Driver Changes: - Make gem shrinker drm managed (Thomas) - SRIOV VF Post-migration recovery of GGTT nodes and CTB (Tomasz) - Some W/A additions and updates (Aradhya, Shekhar, Vinay, Daniele) - Prefetch Support for svm ranges (Himal, Brost) - Don't allocate managed BO for each policy change (Michal) - Simplify and fix diff calculation in GuC submit (Lucas) - Track FAST_REQ GuC H2Gs to report where errors came from (John) - SRIOV PF: Don't allow LMEM provisioning if LMTT isn't available (Piotr) - Check if all domains awake for MOCS dump (Tejas) - Make creation of SLPC debugfs files conditional (Aradhya) - Default auto_link_downgrade status to false (Aradhya) - Use xe_mmio_read32() to read mtcfg register (Shuicheng) - Updates in PCI ID tables (Atwood, Shekhar) - SRIOV VF: Fail migration recovery if fixups needed but not supported (Tomasz) - Add missing documentation around freq and RPa (Rodrigo) - Some other SVM related fixes (Himal, Auld, Brost, Maarten) - Allow to trigger GT resets using debugfs writes (Michal) - Optimise CCS case for WB pages (Auld) - Create LRC BO without VM (Niranjana) - Initialize MOCS index early (Bala) - HWMON fixes for BMG (Karthik, Lucas) - Drop redundant conversion to bool (Raag) - Rework eviction rejection of bound external bos (Thomas) - Stop re-submitting signalled jobs (Auld) - Small fixes and cleanups for PXP (Daniele) - Convert some print messages to GT-oriented ones (Michal) - Resend potentially lost GuC H2G MMIO request (Michal) - Add configfs to load with fewer engines (Lucas) - Remove unmatched xe_vm_unlock from __xe_exec_queue_init (Maciej) - SRIOV VF: Small updates around GGTT handling (Michal) - Make VMA tile_present, tile_invalidated access rules clear (Brost) - Xe3 Tuning: Disable NULL query for Anyhit Shader (Nitin) - Fixes for VF GuC version (Daniele) - Don't store the xe device pointer inside xe_ttm_tt (Dave) - Small improvements in topology code (Michal) - Stop relying on GGTT internals (Maarten) - GSM size should be constant on most platforms (Roper) - Reorder 'Get pages failed' message (Brost) - WA BB related fixes and improvements (Lucas, Brost) - Fix early wedge on GuC load failure (Daniele) - Add helper function to inject fault into ct_dead_capture (Satyanarayana) - Determine ATS / PTA programming during early sw init (Roper) - Consolidate PAT programming logic for pre-Xe2 and post-Xe2 (Roper) - Fix kconfig prompt (Lucas) - Convert xe_pci tests to parametrized tests (Michal) - Do not kill VM in PT code on -ENODATA (Brost) - Move LRC_ENGINE_ID_PPHWSP_OFFSET outside of parallel offset (Brost) - Enable media OA (Ashutosh) - GuC log level tuning (Lucas) - Add xe_vm_has_valid_gpu_mapping helper (Brost) - Opportunistically skip TLB invalidaion on unbind (Brost) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/aFMb_NVF_oCW7UVl@intel.com
generated by cgit (git 2.34.1) at 2025-09-08 16:37:00 +0000