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2021-02-04coresight: etm4x: Detect system instructions supportSuzuki K Poulose
ETM v4.4 onwards adds support for system instruction access to the ETM. Detect the support on an ETM and switch to using the mode when available. Link: https://lore.kernel.org/r/20210110224850.1880240-23-suzuki.poulose@arm.com Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-25-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: Add necessary synchronization for sysreg accessSuzuki K Poulose
As per the specification any update to the TRCPRGCTLR must be synchronized by a context synchronization event (in our case an explicist ISB) before the TRCSTATR is checked. Link: https://lore.kernel.org/r/20210110224850.1880240-22-suzuki.poulose@arm.com Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-24-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: Expose trcdevarch via sysfsSuzuki K Poulose
Expose the TRCDEVARCH register via the sysfs for component detection. Given that the TRCIDR1 may not completely identify the ETM component and instead need to use TRCDEVARCH, expose this via sysfs for tools to use it for identification. Link: https://lore.kernel.org/r/20210110224850.1880240-21-suzuki.poulose@arm.com Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-23-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: Use TRCDEVARCH for component discoverySuzuki K Poulose
We have been using TRCIDR1 for detecting the ETM version. This is in preparation for the future IP support. Link: https://lore.kernel.org/r/20210110224850.1880240-20-suzuki.poulose@arm.com Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-22-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: Detect access early on the target CPUSuzuki K Poulose
In preparation to detect the support for system instruction support, move the detection of the device access to the target CPU. Link: https://lore.kernel.org/r/20210110224850.1880240-19-suzuki.poulose@arm.com Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-21-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: Handle ETM architecture versionSuzuki K Poulose
We are about to rely on TRCDEVARCH for detecting the ETM and its architecture version, falling back to TRCIDR1 if the former is not implemented (in older broken implementations). Also, we use the architecture version information to make some decisions. Streamline the architecture version handling by adding helpers. Link: https://lore.kernel.org/r/20210110224850.1880240-18-suzuki.poulose@arm.com Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-20-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: Clean up exception level masksSuzuki K Poulose
etm4_get_access_type() calculates the exception level bits for use in address comparator registers. This is also used by the TRCVICTLR register by shifting to the required position. This patch cleans up the logic to make etm4_get_access_type() calculate a generic mask which can be used by all users by shifting to their field. No functional changes intended. Link: https://lore.kernel.org/r/20210110224850.1880240-17-suzuki.poulose@arm.com Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-19-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: Cleanup secure exception level masksSuzuki K Poulose
We rely on the ETM architecture version to decide whether Secure EL2 is available on the CPU for excluding the level for address comparators and viewinst main control register. We must instead use the TRCDIDR3.EXLEVEL_S field to detect the supported levels. Link: https://lore.kernel.org/r/20210110224850.1880240-16-suzuki.poulose@arm.com Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-18-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: Check for Software LockSuzuki K Poulose
The Software lock is not implemented for system instructions based accesses. So, skip the lock register access in such cases. Link: https://lore.kernel.org/r/20210110224850.1880240-15-suzuki.poulose@arm.com Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-17-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: Define DEVARCH register fieldsSuzuki K Poulose
Define the fields of the DEVARCH register for identifying a component as an ETMv4.x unit. Going forward, we use the DEVARCH register for the component identification, rather than the TRCIDR3. Link: https://lore.kernel.org/r/20210110224850.1880240-14-suzuki.poulose@arm.com Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-16-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: Hide sysfs attributes for unavailable registersSuzuki K Poulose
Some of the management registers in ETMv4.x are not accessible via system register instructions. Thus we must hide the sysfs files exposing them to the userspace, to prevent system crashes. This patch adds an is_visible() routine to control the visibility at runtime for the registers that may not be accessed. Link: https://lore.kernel.org/r/20210110224850.1880240-13-suzuki.poulose@arm.com Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-15-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: Add sysreg access helpersSuzuki K Poulose
ETM architecture defines the system instructions for accessing via register accesses. Add basic support for accessing a given register via system instructions. We split the list of registers as : 1) Accessible only from memory mapped interface 2) Accessible from system register instructions. All registers are accessible via the memory-mapped interface. However, some registers are not accessible via the system instructions. This list is then used to further filter out the files we expose via sysfs. Link: https://lore.kernel.org/r/20210110224850.1880240-12-suzuki.poulose@arm.com Cc: Mike Leach <mike.leach@linaro.org> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-14-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: Add commentary on the registersSuzuki K Poulose
As we are about define a switch..case table for individual register access by offset for implementing the system instruction support, document the possible set of registers for each group to make it easier to correlate. Link: https://lore.kernel.org/r/20210110224850.1880240-11-suzuki.poulose@arm.com Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-13-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: Make offset available for sysfs attributesSuzuki K Poulose
Some of the ETM management registers are not accessible via system instructions. Thus we need to filter accesses to these registers depending on the access mechanism for the ETM at runtime. The driver can cope with this for normal operation, by regular checks. But the driver also exposes them via sysfs, which now needs to be removed. So far, we have used the generic coresight sysfs helper macros to export a given device register, defining a "show" operation per register. This is not helpful to filter the files at runtime, based on the access. In order to do this dynamically, we need to filter the attributes by offsets and hard coded "show" functions doesn't make this easy. Thus, switch to extended attributes, storing the offset in the scratch space. This allows us to implement filtering based on the offset and also saves us some text size. This will be later used for determining a given attribute must be "visible" via sysfs. Link: https://lore.kernel.org/r/20210110224850.1880240-10-suzuki.poulose@arm.com Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-12-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: Convert all register accessesSuzuki K Poulose
Convert all register accesses from etm4x driver to use a wrapper to allow switching the access at runtime with little overhead. co-developed by sed tool ;-), mostly equivalent to : s/readl\(_relaxed\)\?(drvdata->base + \(.*\))/etm4x_\1_read32(csdev, \2) s/writel\(_relaxed\)\?(\(.*\), drvdata->base + \(.*\))/etm4x_\1_write32(csdev, \2, \3) We don't want to replace them with the csdev_access_* to avoid a function call for every register access for system register access. This is a prepartory step to add system register access later where the support is available. Link: https://lore.kernel.org/r/20210110224850.1880240-9-suzuki.poulose@arm.com Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-11-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: Always read the registers on the host CPUSuzuki K Poulose
As we are about to add support for sysreg access to ETM4.4+ components, make sure that we read the registers only on the host CPU. Link: https://lore.kernel.org/r/20210110224850.1880240-8-suzuki.poulose@arm.com Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-10-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: Convert claim/disclaim operations to use access wrappersSuzuki K Poulose
Convert the generic CLAIM tag management APIs to use the device access layer abstraction. Link: https://lore.kernel.org/r/20210110224850.1880240-7-suzuki.poulose@arm.com Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-9-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: Convert coresight_timeout to use access abstractionSuzuki K Poulose
Convert the generic routines to use the new access abstraction layer gradually, starting with coresigth_timeout. Link: https://lore.kernel.org/r/20210110224850.1880240-6-suzuki.poulose@arm.com Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-8-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: tpiu: Prepare for using coresight device access abstractionSuzuki K Poulose
Prepare the TPIU driver to make use of the CoreSight device access abstraction layer. The driver touches the device even before the coresight device is registered. Thus we could be accessing the devices without a csdev. As we are about to use the abstraction layer for accessing the device, pass in the access directly to avoid having to deal with the un-initialised csdev. Link: https://lore.kernel.org/r/20210110224850.1880240-5-suzuki.poulose@arm.com Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-7-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: Introduce device access abstractionSuzuki K Poulose
We are about to introduce support for sysreg access to ETMv4.4+ component. Since there are generic routines that access the registers (e.g, CS_LOCK/UNLOCK , claim/disclaim operations, timeout) and in order to preserve the logic of these operations at a single place we introduce an abstraction layer for the accesses to a given device. Link: https://lore.kernel.org/r/20210110224850.1880240-4-suzuki.poulose@arm.com Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-6-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: Skip accessing TRCPDCR in save/restoreSuzuki K Poulose
When the ETM is affected by Qualcomm errata, modifying the TRCPDCR could cause the system hang. Even though this is taken care of during enable/disable ETM, the ETM state save/restore could still access the TRCPDCR. Make sure we skip the access during the save/restore. Found by code inspection. Link: https://lore.kernel.org/r/20210110224850.1880240-3-suzuki.poulose@arm.com Fixes: 02510a5aa78d ("coresight: etm4x: Add support to skip trace unit power up") Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Cc: Tingwei Zhang <tingwei@codeaurora.org> Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-5-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: Handle access to TRCSSPCICRnSuzuki K Poulose
TRCSSPCICR<n> is present only if all of the following are true: TRCIDR4.NUMSSCC > n. TRCIDR4.NUMPC > 0b0000 . TRCSSCSR<n>.PC == 0b1 Add a helper function to check all the conditions. Link: https://lore.kernel.org/r/20210110224850.1880240-2-suzuki.poulose@arm.com Cc: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-4-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: etm4x: add AMBA id for Cortex-A55 and Cortex-A75Chunyan Zhang
Add AMBA UCI id to support Cortex-A55(Ananke) and Cortex-A75(Promethus). Reviewed by: Mike Leach <mike.leach@linaro.org> Link: https://lore.kernel.org/r/20210118065549.197489-1-zhang.lyra@gmail.com Signed-off-by: Bin Ji <bin.ji@unisoc.com> Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-3-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04coresight: cti: Reduce scope for the variable 'cs_fwnode' in ↵Markus Elfring
cti_plat_create_connection() A local variable was used only within an else branch. Thus move the definition for the variable “cs_fwnode” into the corresponding code block. This issue was detected by using the Coccinelle software. Link: https://lore.kernel.org/r/c1b09b27-9012-324f-28d0-ba820dc468a5@web.de Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-2-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04random: fix the RNDRESEEDCRNG ioctlEric Biggers
The RNDRESEEDCRNG ioctl reseeds the primary_crng from itself, which doesn't make sense. Reseed it from the input_pool instead. Fixes: d848e5f8e1eb ("random: add new ioctl RNDRESEEDCRNG") Cc: stable@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: Andy Lutomirski <luto@kernel.org> Cc: Jann Horn <jannh@google.com> Cc: Theodore Ts'o <tytso@mit.edu> Reviewed-by: Jann Horn <jannh@google.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Eric Biggers <ebiggers@google.com> Link: https://lore.kernel.org/r/20210112192818.69921-1-ebiggers@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04misc: pvpanic: sysfs_emit uses should have a newlineJoe Perches
Add newline terminations to the sysfs_emit uses added by -next commit 8d6da6575ffe ("misc: pvpanic: introduce events device attribue") Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: zhenwei pi <pizhenwei@bytedance.com> Link: https://lore.kernel.org/r/13b1c892d52c27d4caeccc89506aadda74f61365.camel@perches.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04Merge tag 'misc-habanalabs-next-2021-01-27' of ↵Greg Kroah-Hartman
https://git.kernel.org/pub/scm/linux/kernel/git/ogabbay/linux into char-misc-next Oded writes: This tag contains habanalabs driver changes for v5.12: - Add feature called "staged command submissions". In this feature, the driver allows the user to submit multiple command submissions that describe a single pass on the deep learning graph. The driver tracks the completion of the entire pass by the last stage CS. - Update code to support the latest firmware image - Optimizations and improvements to MMU code: - Support page size that is not power-of-2 - Make the locks scheme simpler - mmap areas in device configuration space to userspace - Security fixes: - Make ETR non-secured - Remove access to kernel memory through debug-fs interface - Remove access through PCI bar to SyncManager register block in Gaudi - Many small bug fixes * tag 'misc-habanalabs-next-2021-01-27' of https://git.kernel.org/pub/scm/linux/kernel/git/ogabbay/linux: (41 commits) habanalabs: update to latest hl_boot_if.h spec from F/W habanalabs/gaudi: unmask HBM interrupts after handling habanalabs: update SyncManager interrupt handling habanalabs: fix ETR security issue habanalabs: staged submission support habanalabs: modify device_idle interface habanalabs: add CS completion and timeout properties habanalabs: add new mem ioctl op for mapping hw blocks habanalabs: fix MMU debugfs related nodes habanalabs: add user available interrupt to hw_ip habanalabs: always try to use the hint address CREDITS: update email address and home address habanalabs: update email address in sysfs/debugfs docs habanalabs: add security violations dump to debugfs habanalabs: ignore F/W BMC errors in case no BMC present habanalabs/gaudi: print sync manager SEI interrupt info habanalabs: Use 'dma_set_mask_and_coherent()' habanalabs/gaudi: remove PCI access to SM block habanalabs: add driver support for internal cb scheduling habanalabs: increment ctx ref from within a cs allocation ...
2021-02-04phy: mediatek: Add missing MODULE_DEVICE_TABLE()Boris Brezillon
This patch adds the missing MODULE_DEVICE_TABLE definitions on different Mediatek phy drivers which generates correct modalias for automatic loading when these drivers are compiled as an external module. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210203110631.686003-1-enric.balletbo@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-04phy: phy-brcm-sata: remove unneeded semicolonYang Li
Eliminate the following coccicheck warning: ./drivers/phy/broadcom/phy-brcm-sata.c:654:2-3: Unneeded semicolon Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/1612321087-14743-1-git-send-email-yang.lee@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-04phy: qualcomm: usb28nm: Add MDM9607 init sequenceKonrad Dybcio
This is required to bring up the PHY on MDM9607-based boards. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210131013124.54484-1-konrad.dybcio@somainline.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-04phy: USB_LGM_PHY should depend on X86Geert Uytterhoeven
The Intel Lightning Mountain (LGM) USB3 USB is only present on Intel Lightning Mountain SoCs. Hence add a dependency on X86, to prevent asking the user about this driver when configuring a kernel without Intel Lightning Mountain platform support. Fixes: 1cce8f73a561c944 ("phy: Add USB3 PHY support for Intel LGM SoC") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20210129131753.2656306-1-geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-04dt-bindings: phy: qcom,qusb2: document ipq6018 compatibleBaruch Siach
This compatible string is for the USB PHY on IPQ60xx systems. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Link: https://lore.kernel.org/r/7e1e7bda6ccdaab9adeeb956fac1acc39908a8dc.1611756920.git.baruch@tkos.co.il Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-04phy: qcom-qusb2: add QUSB2 support for IPQ6018Kathiravan T
Add the phy init sequence for the Super Speed ports found on IPQ6018. Signed-off-by: Kathiravan T <kathirav@codeaurora.org> [baruch: add ipq6018_regs_layout[], drop binding change] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Link: https://lore.kernel.org/r/b8c22dddf1f70d89e135fe1ae705ddc68e295ebb.1611756920.git.baruch@tkos.co.il Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-04phy: qcom-qmp: Add SC8180X USB phyBjorn Andersson
The Qualcomm SC8180X has two QMP phys used for SuperSpeed USB, which are either the same or very similar to the same found in SM8150. Add a compatible for this, reusing the existing SM8150 USB phy config. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210121014339.1612525-2-bjorn.andersson@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-04phy: qcom-qmp: Add SC8180X UFS phyBjorn Andersson
The UFS phy found in the Qualcomm SC8180X is either the same or very similar to the phy present in SM8150, so add a compatible and reuse the SM8150 configuration. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210120224531.1610709-2-bjorn.andersson@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-04dt-bindings: phy: qcom,qmp: Add SC8180X USB phyBjorn Andersson
Add compatibles for the Qualcomm QMP PHY binding for the SuperSpeed USB phys found in the SC8180x platform. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210121014339.1612525-1-bjorn.andersson@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-04dt-bindings: phy: qcom,qmp: Add SC8180X UFS to the QMP bindingBjorn Andersson
Add compatible for the SC8180x UFS PHY to the QMP binding. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210120224531.1610709-1-bjorn.andersson@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-04misc: bcm-vk: only support ttyVK if CONFIG_TTY is setScott Branden
Correct compile issue if CONFIG_TTY is not set by only adding ttyVK devices if CONFIG_BCM_VK_TTY is set. Reported-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested Signed-off-by: Scott Branden <scott.branden@broadcom.com> Link: https://lore.kernel.org/r/20210203223826.21674-1-scott.branden@broadcom.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-04misc: bcm-vk: Fix a couple error codes in probe()Dan Carpenter
These errors should return negative error codes instead of returning success. Fixes: 064ffc7c3939 ("misc: bcm-vk: add autoload support") Fixes: 522f692686a7 ("misc: bcm-vk: add Broadcom VK driver") Acked-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/YBpyEbmz00rjvT9S@mwanda Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-03misc: rtsx: Remove unneeded return variableYang Li
This patch removes unneeded return variables, using only '0' instead. It fixes the following warning detected by coccinelle: ./drivers/misc/cardreader/rtsx_pcr.c:1808:5-8: Unneeded variable: "ret". Return "0" on line 1833. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/1612164640-84541-1-git-send-email-yang.lee@linux.alibaba.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-03misc: bcm-vk: unlock on error in bcm_to_h_msg_dequeue()Dan Carpenter
Unlock before returning on this error path. Fixes: 111d746bb476 ("misc: bcm-vk: add VK messaging support") Acked-by: Desmond Yan <desmond.yan@broadcom.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/YBfyb+jU5lDUe+5g@mwanda Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-02Merge tag 'amba-make-remove-return-void' of ↵Russell King
https://git.pengutronix.de/git/ukl/linux into devel-stable Tag for adaptions to struct amba_driver::remove changing prototype
2021-02-02amba: Make use of bus_type functionsUwe Kleine-König
Instead of assigning the needed functions for each driver separately do it only once in amba_bustype. Move the definition of the functions to their proper place among the other callbacks used there. Note that the bus's shutdown function might be called for unbound devices, too, so it needs additional guarding. This prepares getting rid of these callbacks in struct device_driver. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20210126165835.687514-6-u.kleine-koenig@pengutronix.de Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2021-02-02amba: Make the remove callback return voidUwe Kleine-König
All amba drivers return 0 in their remove callback. Together with the driver core ignoring the return value anyhow, it doesn't make sense to return a value here. Change the remove prototype to return void, which makes it explicit that returning an error value doesn't work as expected. This simplifies changing the core remove callback to return void, too. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> # for drivers/memory Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> # for hwtracing/coresight Acked-By: Vinod Koul <vkoul@kernel.org> # for dmaengine Acked-by: Guenter Roeck <linux@roeck-us.net> # for watchdog Acked-by: Wolfram Sang <wsa@kernel.org> # for I2C Acked-by: Takashi Iwai <tiwai@suse.de> # for sound Acked-by: Vladimir Zapolskiy <vz@mleia.com> # for memory/pl172 Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/20210126165835.687514-5-u.kleine-koenig@pengutronix.de Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2021-02-02vfio: platform: simplify device removalUwe Kleine-König
vfio_platform_remove_common() cannot return non-NULL in vfio_amba_remove() as the latter is only called if vfio_amba_probe() returned success. Diagnosed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Eric Auger <eric.auger@redhat.com> Link: https://lore.kernel.org/r/20210126165835.687514-4-u.kleine-koenig@pengutronix.de Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2021-02-02amba: reorder functionsUwe Kleine-König
Put helpers (here: amba_get_enable_pclk and amba_put_disable_pclk) at the top of the file and then define callbacks directly before the structs they are used in; in the same order. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20210126165835.687514-3-u.kleine-koenig@pengutronix.de Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2021-02-02amba: Fix resource leak for drivers without .removeUwe Kleine-König
Consider an amba driver with a .probe but without a .remove callback (e.g. pl061_gpio_driver). The function amba_probe() is called to bind a device and so dev_pm_domain_attach() and others are called. As there is no remove callback amba_remove() isn't called at unbind time however and so calling dev_pm_domain_detach() is missed and the pm domain keeps active. To fix this always use the core driver callbacks and handle missing amba callbacks there. For probe refuse registration as a driver without probe doesn't make sense. Fixes: 7cfe249475fd ("ARM: AMBA: Add pclk support to AMBA bus infrastructure") Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20210126165835.687514-2-u.kleine-koenig@pengutronix.de Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2021-02-01Merge branch 'icc-sdx55' into icc-nextGeorgi Djakov
Add interconnect driver support for SDX55 platform for scaling the bandwidth requirements over RPMh. * icc-sdx55 dt-bindings: interconnect: Add Qualcomm SDX55 DT bindings interconnect: qcom: Add SDX55 interconnect provider driver Link: https://lore.kernel.org/r/20210121053254.8355-1-manivannan.sadhasivam@linaro.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2021-02-01soundwire: return earlier if no slave is attachedChao Song
If there is no slave attached to soundwire bus, we can return earlier from sdw_bus_prep_clk_stop() and sdw_bus_exit_clk_stop(), this saves a redundant value check. Signed-off-by: Chao Song <chao.song@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://lore.kernel.org/r/20210126085439.4349-1-yung-chuan.liao@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01soundwire: bus: add better dev_dbg to track complete() callsPierre-Louis Bossart
Add a dev_dbg() log for both enumeration and initialization completion to better track suspend-resume issues. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Reviewed-by: Chao Song <chao.song@intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://lore.kernel.org/r/20210126085402.4264-1-yung-chuan.liao@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
generated by cgit (git 2.34.1) at 2025-09-16 05:22:20 +0000