summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2020-07-13clk: renesas: Add r8a774e1 CPG Core Clock DefinitionsMarian-Cristian Rotariu
Add all RZ/G2H Clock Pulse Generator Core Clock Outputs, as listed in Table 11.2 ("List of Clocks [RZ/G2H]") of the RZ/G2H Hardware User's Manual. Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/1594138692-16816-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-13dt-bindings: power: Add r8a774e1 SYSC power domain definitionsMarian-Cristian Rotariu
This patch adds power domain indices for the RZ/G2H (r8a774e1) SoC. Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/1594138692-16816-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-13firmware: imx: Move i.MX SCU soc driver into imx firmware folderAnson Huang
The i.MX SCU soc driver depends on SCU firmware driver, so it has to use platform driver model for proper defer probe operation, since it has no device binding in DT file, a simple platform device is created together inside the platform driver. To make it more clean, we can just move the entire SCU soc driver into imx firmware folder and initialized by i.MX SCU firmware driver. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-10<linux/of.h>: add stub for of_get_next_parent() to fix qcom build errorRandy Dunlap
Fix a (COMPILE_TEST) build error when CONFIG_OF is not set/enabled by adding a stub for of_get_next_parent(). ../drivers/soc/qcom/qcom-geni-se.c:819:11: error: implicit declaration of function 'of_get_next_parent'; did you mean 'of_get_parent'? [-Werror=implicit-function-declaration] ../drivers/soc/qcom/qcom-geni-se.c:819:9: warning: assignment makes pointer from integer without a cast [-Wint-conversion] Fixes: 048eb908a1f2 ("soc: qcom-geni-se: Add interconnect support to fix earlycon crash") Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Frank Rowand <frowand.list@gmail.com> Cc: devicetree@vger.kernel.org Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: linux-arm-msm@vger.kernel.org Link: https://lore.kernel.org/r/ce0d7561-ff93-d267-b57a-6505014c728c@infradead.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-10firmware: arm_scmi: Keep the discrete clock rates sortedSudeep Holla
Instead of relying on the firmware to keep the clock rates sorted, let us sort the list. This is not essential for clock layer but it helps to find the min and max rates easily from the list. Link: https://lore.kernel.org/r/20200709081705.46084-1-sudeep.holla@arm.com Fixes: 5f6c6430e904 ("firmware: arm_scmi: add initial support for clock protocol") Reported-and-tested-by: Dien Pham <dien.pham.ry@renesas.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-10tpm_ftpm_tee: register driver on TEE busMaxim Uvarov
OP-TEE based fTPM Trusted Application depends on tee-supplicant to provide NV RAM implementation based on RPMB secure storage. So this dependency can be resolved via TEE bus where we only invoke fTPM driver probe once fTPM device is registered on the bus which is only true after the tee-supplicant is up and running. Additionally, TEE bus provides auto device enumeration. Signed-off-by: Maxim Uvarov <maxim.uvarov@linaro.org> Suggested-by: Sumit Garg <sumit.garg@linaro.org> Suggested-by: Arnd Bergmann <arnd@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Tested-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2020-07-10optee: enable support for multi-stage bus enumerationMaxim Uvarov
Some drivers (like ftpm) can operate only after tee-supplicant runs because of tee-supplicant provides things like storage services (rpmb, shm).  This patch splits probe of non tee-supplicant dependable drivers to the early stage, and after tee-supplicant run probe other drivers. Signed-off-by: Maxim Uvarov <maxim.uvarov@linaro.org> Suggested-by: Sumit Garg <sumit.garg@linaro.org> Suggested-by: Arnd Bergmann <arnd@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Tested-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2020-07-10optee: use uuid for sysfs driver entryMaxim Uvarov
With the evolving use-cases for TEE bus, now it's required to support multi-stage enumeration process. But using a simple index doesn't suffice this requirement and instead leads to duplicate sysfs entries. So instead switch to use more informative device UUID for sysfs entry like: /sys/bus/tee/devices/optee-ta-<uuid> Signed-off-by: Maxim Uvarov <maxim.uvarov@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Tested-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2020-07-06Merge tag 'soc-attr-updates-5.9' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers SoC attributes update for v5.9 1. Addition of ARM SMCCC ARCH_SOC_ID support 2. Usage of the custom soc attribute groups already supported in the infrastucture instead of device_create_file which eliminates the need for any cleanup when soc is unregistered 3. Minor clean up switching to use standard DEVICE_ATTR_RO() instead of direct __ATTR * tag 'soc-attr-updates-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: firmware: smccc: Add ARCH_SOC_ID support ARM: OMAP2: Use custom soc attribute group instead of device_create_file ARM: OMAP2: Switch to use DEVICE_ATTR_RO() soc: ux500: Use custom soc attribute group instead of device_create_file soc: ux500: Switch to use DEVICE_ATTR_RO() soc: integrator: Use custom soc attribute group instead of device_create_file soc: integrator: Switch to use DEVICE_ATTR_RO() soc: realview: Use custom soc attribute group instead of device_create_file soc: realview: Switch to use DEVICE_ATTR_RO() Link: https://lore.kernel.org/r/20200706165312.40697-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-06firmware: smccc: Add ARCH_SOC_ID supportSudeep Holla
SMCCC v1.2 adds a new optional function SMCCC_ARCH_SOC_ID to obtain a SiP defined SoC identification value. Add support for the same. Also using the SoC bus infrastructure, let us expose the platform specific SoC atrributes under sysfs. There are various ways in which it can be represented in shortened form for efficiency and ease of parsing for userspace. The chosen form is described in the ABI document. Link: https://lore.kernel.org/r/20200625095939.50861-1-sudeep.holla@arm.com Cc: Etienne Carriere <etienne.carriere@st.com> Reviewed-by: Steven Price <steven.price@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-06ARM: OMAP2: Use custom soc attribute group instead of device_create_fileSudeep Holla
Commit c31e73121f4c ("base: soc: Handle custom soc information sysfs entries") introduced custom soc attribute group in soc_device_attribute structure but there are no users treewide. While trying to understand the motivation and tried to use it, it was found lot of existing custom attributes can moved to use it instead of device_create_file. Though most of these never remove/cleanup the custom attribute as they never call soc_device_unregister, using these custom attribute group eliminate the need for any cleanup as the driver infrastructure will take care of that. Let us remove device_create_file and start using the custom attribute group in soc_device_attribute. Link: https://lore.kernel.org/r/20200523170859.50003-9-sudeep.holla@arm.com Cc: Tony Lindgren <tony@atomide.com> Cc: linux-omap@vger.kernel.org Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-06ARM: OMAP2: Switch to use DEVICE_ATTR_RO()Sudeep Holla
Move device attributes to DEVICE_ATTR_RO() as that would make things a lot more "obvious" what is happening over the existing __ATTR usage. Link: https://lore.kernel.org/r/20200523170859.50003-8-sudeep.holla@arm.com Cc: Tony Lindgren <tony@atomide.com> Cc: linux-omap@vger.kernel.org Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-06soc: ux500: Use custom soc attribute group instead of device_create_fileSudeep Holla
Commit c31e73121f4c ("base: soc: Handle custom soc information sysfs entries") introduced custom soc attribute group in soc_device_attribute structure but there are no users treewide. While trying to understand the motivation and tried to use it, it was found lot of existing custom attributes can moved to use it instead of device_create_file. Though most of these never remove/cleanup the custom attribute as they never call soc_device_unregister, using these custom attribute group eliminate the need for any cleanup as the driver infrastructure will take care of that. Let us remove device_create_file and start using the custom attribute group in soc_device_attribute. Link: https://lore.kernel.org/r/20200523170859.50003-7-sudeep.holla@arm.com Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-06soc: ux500: Switch to use DEVICE_ATTR_RO()Sudeep Holla
Move device attributes to DEVICE_ATTR_RO() as that would make things a lot more "obvious" what is happening over the existing __ATTR usage. Link: https://lore.kernel.org/r/20200523170859.50003-6-sudeep.holla@arm.com Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-06soc: integrator: Use custom soc attribute group instead of device_create_fileSudeep Holla
Commit c31e73121f4c ("base: soc: Handle custom soc information sysfs entries") introduced custom soc attribute group in soc_device_attribute structure but there are no users treewide. While trying to understand the motivation and tried to use it, it was found lot of existing custom attributes can moved to use it instead of device_create_file. Though most of these never remove/cleanup the custom attribute as they never call soc_device_unregister, using these custom attribute group eliminate the need for any cleanup as the driver infrastructure will take care of that. Let us remove device_create_file and start using the custom attribute group in soc_device_attribute. Link: https://lore.kernel.org/r/20200523170859.50003-5-sudeep.holla@arm.com Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-06soc: integrator: Switch to use DEVICE_ATTR_RO()Sudeep Holla
Move device attributes to DEVICE_ATTR_RO() as that would make things a lot more "obvious" what is happening over the existing __ATTR usage. Link: https://lore.kernel.org/r/20200523170859.50003-4-sudeep.holla@arm.com Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-06soc: realview: Use custom soc attribute group instead of device_create_fileSudeep Holla
Commit c31e73121f4c ("base: soc: Handle custom soc information sysfs entries") introduced custom soc attribute group in soc_device_attribute structure but there are no users treewide. While trying to understand the motivation and tried to use it, it was found lot of existing custom attributes can moved to use it instead of device_create_file. Though most of these never remove/cleanup the custom attribute as they never call soc_device_unregister, using these custom attribute group eliminate the need for any cleanup as the driver infrastructure will take care of that. Let us remove device_create_file and start using the custom attribute group in soc_device_attribute. Link: https://lore.kernel.org/r/20200523170859.50003-3-sudeep.holla@arm.com Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-06soc: realview: Switch to use DEVICE_ATTR_RO()Sudeep Holla
Move device attributes to DEVICE_ATTR_RO() as that would make things a lot more "obvious" what is happening over the existing __ATTR usage. Link: https://lore.kernel.org/r/20200523170859.50003-2-sudeep.holla@arm.com Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-01dt-bindings: firmware: qcom: Add compatible for IPQ8074 SoCGokul Sriram Palanisamy
Add compatible for IPQ8074 support. This does not need clocks for scm calls. Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org> Signed-off-by: Sricharan R <sricharan@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1589362265-22702-9-git-send-email-gokulsri@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-01firmware: arm_scmi: Add base notifications supportCristian Marussi
Make SCMI base protocol register with the notification core. Link: https://lore.kernel.org/r/20200701155348.52864-10-cristian.marussi@arm.com Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-01firmware: arm_scmi: Add reset notifications supportCristian Marussi
Make SCMI reset protocol register with the notification core. Link: https://lore.kernel.org/r/20200701155348.52864-9-cristian.marussi@arm.com Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-01firmware: arm_scmi: Add sensor notifications supportCristian Marussi
Make SCMI sensor protocol register with the notification core. Link: https://lore.kernel.org/r/20200701155348.52864-8-cristian.marussi@arm.com Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-01firmware: arm_scmi: Add perf notifications supportCristian Marussi
Make SCMI perf protocol register with the notification core. Link: https://lore.kernel.org/r/20200701155348.52864-7-cristian.marussi@arm.com Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-01firmware: arm_scmi: Add power notifications supportCristian Marussi
Make SCMI power protocol register with the notification core. Link: https://lore.kernel.org/r/20200701155348.52864-6-cristian.marussi@arm.com Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-01firmware: arm_scmi: Enable notification coreCristian Marussi
Initialize and enable SCMI notifications core support during bus/driver probe phase, so that protocols can start registering their supported events during their initialization. Link: https://lore.kernel.org/r/20200701155348.52864-5-cristian.marussi@arm.com Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-01firmware: arm_scmi: Add notification dispatch and deliveryCristian Marussi
Add the core SCMI notifications dispatch and delivery support logic which is able to dispatch well-known received events from the Rx interrupt handler to the dedicated deferred worker. From there, it will deliver the events to the registered users' callbacks. Dispatch and delivery support is just added here, still not enabled. Link: https://lore.kernel.org/r/20200701155348.52864-4-cristian.marussi@arm.com Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-01firmware: arm_scmi: Add notification callbacks-registrationCristian Marussi
Add the core SCMI notifications callbacks-registration support: allow users to register their own callbacks against the desired events. Whenever a registration request is issued against a still non existent event, mark such request as pending for later processing, in order to account for possible late initializations of SCMI Protocols associated to loadable drivers. Link: https://lore.kernel.org/r/20200701155348.52864-3-cristian.marussi@arm.com Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-01firmware: arm_scmi: Add notification protocol-registrationCristian Marussi
Add the core SCMI notifications protocol-registration support: allow protocols to register their own set of supported events, during their initialization phase. Notification core can track multiple platform instances by their handles. Link: https://lore.kernel.org/r/20200701155348.52864-2-cristian.marussi@arm.com Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-06-30firmware: arm_scmi: Fix SCMI genpd domain probingCristian Marussi
When, at probe time, an SCMI communication failure inhibits the capacity to query power domains states, such domains should be skipped. Registering partially initialized SCMI power domains with genpd will causes kernel panic. arm-scmi timed out in resp(caller: scmi_power_state_get+0xa4/0xd0) scmi-power-domain scmi_dev.2: failed to get state for domain 9 Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000 Mem abort info: ESR = 0x96000006 EC = 0x25: DABT (current EL), IL = 32 bits SET = 0, FnV = 0 EA = 0, S1PTW = 0 Data abort info: ISV = 0, ISS = 0x00000006 CM = 0, WnR = 0 user pgtable: 4k pages, 48-bit VAs, pgdp=00000009f3691000 [0000000000000000] pgd=00000009f1ca0003, p4d=00000009f1ca0003, pud=00000009f35ea003, pmd=0000000000000000 Internal error: Oops: 96000006 [#1] PREEMPT SMP CPU: 2 PID: 381 Comm: bash Not tainted 5.8.0-rc1-00011-gebd118c2cca8 #2 Hardware name: ARM LTD ARM Juno Development Platform/ARM Juno Development Platform, BIOS EDK II Jan 3 2020 Internal error: Oops: 96000006 [#1] PREEMPT SMP pstate: 80000005 (Nzcv daif -PAN -UAO BTYPE=--) pc : of_genpd_add_provider_onecell+0x98/0x1f8 lr : of_genpd_add_provider_onecell+0x48/0x1f8 Call trace: of_genpd_add_provider_onecell+0x98/0x1f8 scmi_pm_domain_probe+0x174/0x1e8 scmi_dev_probe+0x90/0xe0 really_probe+0xe4/0x448 driver_probe_device+0xfc/0x168 device_driver_attach+0x7c/0x88 bind_store+0xe8/0x128 drv_attr_store+0x2c/0x40 sysfs_kf_write+0x4c/0x60 kernfs_fop_write+0x114/0x230 __vfs_write+0x24/0x50 vfs_write+0xbc/0x1e0 ksys_write+0x70/0xf8 __arm64_sys_write+0x24/0x30 el0_svc_common.constprop.3+0x94/0x160 do_el0_svc+0x2c/0x98 el0_sync_handler+0x148/0x1a8 el0_sync+0x158/0x180 Do not register any power domain that failed to be queried with genpd. Fixes: 898216c97ed2 ("firmware: arm_scmi: add device power domain support using genpd") Link: https://lore.kernel.org/r/20200619220330.12217-1-cristian.marussi@arm.com Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-06-30firmware: arm_scmi: Use HAVE_ARM_SMCCC_DISCOVERY instead of ARM_PSCI_FWSudeep Holla
Commit e5bfb21d98b6 ("firmware: smccc: Add HAVE_ARM_SMCCC_DISCOVERY to identify SMCCC v1.1 and above") introduced new config option to identify the availability of SMCCC discoverability of version and features transparently hiding the indirect dependency on ARM_PSCI_FW. Commit 5a897e3ab429 ("firmware: arm_scmi: fix psci dependency") just worked around the build dependency making SCMI SMC/HVC transport depend on ARM_PSCI_FW at the time. Since it really just relies on SMCCC directly and not on ARM_PSCI_FW, let us move to use CONFIG_HAVE_ARM_SMCCC_DISCOVERY instead of CONFIG_ARM_PSCI_FW. Link: https://lore.kernel.org/r/20200625101937.51939-1-sudeep.holla@arm.com Cc: Peng Fan <peng.fan@nxp.com> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-06-30cpufreq: arm_scmi: Set fast_switch_possible conditionallyNicola Mazzucato
Currently the fast_switch_possible flag is set unconditionally to true. Based on this, schedutil does not create a thread for frequency switching and would always use the fast switch path. However, if the platform does not support SCMI fast channel, we use polling mode for SCMI message transfer. This may be possible only if there is dedicated channel for DVFS and all operations are in polling mode. Update this by retrieving the fast_switch capability based on the presence of fast channels in SCMI platform firmware. Link: https://lore.kernel.org/r/20200617094332.8391-2-nicola.mazzucato@arm.com Suggested-by: Lukasz Luba <lukasz.luba@arm.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-06-30firmware: arm_scmi: Add fast_switch_possible() interfaceNicola Mazzucato
Add a new fast_switch_possible interface to the existing perf_ops to export the information of whether or not fast_switch is possible for a given device. This can be used by the cpufreq driver and framework to choose proper mechanism for frequency change. Link: https://lore.kernel.org/r/20200617094332.8391-1-nicola.mazzucato@arm.com Suggested-by: Lukasz Luba <lukasz.luba@arm.com> Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-06-30firmware: arm_scmi: Use signed integer to report transfer statusSudeep Holla
Currently the trace event 'scmi_xfer_end' reports the status of the transfer using the unsigned status field read from the firmware which may not be easy to interpret. It may also miss to emit any timeouts that happen in the driver resulting in emitting garbage in the status field in those scenarios. Let us use signed integer so that error values are emitted out after they are mapped from firmware error formats to standard linux error codes. While at this, also include any timeouts in the driver itself. Link: https://lore.kernel.org/r/20200609134503.55860-1-sudeep.holla@arm.com Cc: Jim Quinlan <james.quinlan@broadcom.com> Cc: Lukasz Luba <lukasz.luba@arm.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-06-24spi: spi-geni-qcom: Use OPP API to set clk/perf stateRajendra Nayak
geni spi needs to express a perforamnce state requirement on CX depending on the frequency of the clock rates. Use OPP table from DT to register with OPP framework and use dev_pm_opp_set_rate() to set the clk/perf state. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Acked-by: Mark Brown <broonie@kernel.org> Cc: Alok Chauhan <alokc@codeaurora.org> Cc: Akash Asthana <akashast@codeaurora.org> Cc: linux-spi@vger.kernel.org Link: https://lore.kernel.org/r/1592222564-13556-3-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24tty: serial: qcom_geni_serial: Use OPP API to set clk/perf stateRajendra Nayak
geni serial needs to express a perforamnce state requirement on CX powerdomain depending on the frequency of the clock rates. Use OPP table from DT to register with OPP framework and use dev_pm_opp_set_rate() to set the clk/perf state. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Akash Asthana <akashast@codeaurora.org> Cc: linux-serial@vger.kernel.org Link: https://lore.kernel.org/r/1592222564-13556-2-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24spi: spi-qcom-qspi: Add interconnect supportAkash Asthana
Get the interconnect paths for QSPI device and vote according to the current bus speed of the driver. Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Akash Asthana <akashast@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/1592908737-7068-8-git-send-email-akashast@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24spi: spi-geni-qcom: Add interconnect supportAkash Asthana
Get the interconnect paths for SPI based Serial Engine device and vote according to the current bus speed of the driver. Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Akash Asthana <akashast@codeaurora.org> Link: https://lore.kernel.org/r/1592908737-7068-7-git-send-email-akashast@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24spi: spi-geni-qcom: Combine the clock setting codeDouglas Anderson
There is code for adjusting the clock both in setup_fifo_params() (called from prepare_message()) and in setup_fifo_xfer() (called from transfer_one()). The code is the same. Abstract it out to a shared function. This is a no-op cleanup patch. The only change is to the error string if we fail to set the clock. Since the two paths has marginally different error messages I picked the clean one. Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Akash Asthana <akashast@codeaurora.org> Link: https://lore.kernel.org/r/1592908737-7068-6-git-send-email-akashast@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24tty: serial: qcom_geni_serial: Add interconnect supportAkash Asthana
Get the interconnect paths for Uart based Serial Engine device and vote according to the baud rate requirement of the driver. Signed-off-by: Akash Asthana <akashast@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/1592908737-7068-5-git-send-email-akashast@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24i2c: i2c-qcom-geni: Add interconnect supportAkash Asthana
Get the interconnect paths for I2C based Serial Engine device and vote according to the bus speed of the driver. Signed-off-by: Akash Asthana <akashast@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Acked-by: Wolfram Sang <wsa@kernel.org> Link: https://lore.kernel.org/r/1592908737-7068-4-git-send-email-akashast@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24soc: qcom-geni-se: Add interconnect support to fix earlycon crashAkash Asthana
QUP core clock is shared among all the SE drivers present on particular QUP wrapper, the system will reset(unclocked access) if earlycon used after QUP core clock is put to 0 from other SE drivers before real console comes up. As earlycon can't vote for it's QUP core need, to fix this add ICC support to common/QUP wrapper driver and put vote for QUP core from probe on behalf of earlycon and remove vote during earlycon exit call. Signed-off-by: Akash Asthana <akashast@codeaurora.org> Reported-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/1592908737-7068-3-git-send-email-akashast@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24soc: qcom: geni: Support for ICC votingAkash Asthana
Add necessary macros and structure variables to support ICC BW voting from individual SE drivers. Signed-off-by: Akash Asthana <akashast@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/1592908737-7068-2-git-send-email-akashast@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24soc: qcom: rpmh-rsc: Don't use ktime for timeout in write_tcs_reg_sync()Douglas Anderson
The write_tcs_reg_sync() may be called after timekeeping is suspended so it's not OK to use ktime. The readl_poll_timeout_atomic() macro implicitly uses ktime. This was causing a warning at suspend time. Change to just loop 1000000 times with a delay of 1 us between loops. This may give a timeout of more than 1 second but never less and is safe even if timekeeping is suspended. NOTE: I don't have any actual evidence that we need to loop here. It's possibly that all we really need to do is just read the value back to ensure that the pipes are cleaned and the looping/comparing is totally not needed. I never saw the loop being needed in my tests. However, the loop shouldn't hurt. Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Maulik Shah <mkshah@codeaurora.org> Fixes: 91160150aba0 ("soc: qcom: rpmh-rsc: Timeout after 1 second in write_tcs_reg_sync()") Reported-by: Maulik Shah <mkshah@codeaurora.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200528074530.1.Ib86e5b406fe7d16575ae1bb276d650faa144b63c@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23soc: qcom: smd-rpm: Add msm8994 compatibleKonrad Dybcio
Add the compatible for the RPM in msm8994. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200602200407.320908-1-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23soc: qcom: socinfo: add SM8250 entry to soc_id arrayDmitry Baryshkov
Add an entry for SM8250 SoC. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20200525164817.2938638-4-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23soc: qcom: socinfo: add file with SoC info format versionDmitry Baryshkov
To ease debugging socinfo driver for newer chips add debugfs file returning SoC info format version. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20200525164817.2938638-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23soc: qcom: socinfo: fix printing of pmic_modelDmitry Baryshkov
Print sensible string instead of just "(null)" for unknown PMIC models. Also as we are at it, do not let debugfs handler access past pmic_models array. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20200525164817.2938638-2-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23soc: qcom: socinfo: add support for newer socinfo dataDmitry Baryshkov
Add support for newer Qualcomm SoC info structures (up to version 0.15). Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20200525164817.2938638-1-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23firmware: imx: scu-pd: add more cm4 resourcesPeng Fan
Add more cm4 resources, then linux could use cm4's i2c/lpuart and could kick cm4 core. Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-23firmware: imx: add resource management apiPeng Fan
Add resource management API, when we have multiple partition running together, resources not owned to current partition should not be used. Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
generated by cgit (git 2.34.1) at 2025-10-03 00:45:28 +0000