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git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.7/soc
ARM: OMAP2+: first set of hwmod changes for v4.7
For the DRA7xx platform, add IP block data for the McASP, PWMSS,
and GPTimer12 IP blocks. Add lock and unlock functions for the
RTC IP blocks on the DRA7xx, AM33xx, and AM43xx devices. And add
a fix for the hwmod core for device driver unbind operations for
IP blocks with hardreset lines.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/omap-hwmod-a-for-v4.7/20160410132119/
Note that the testbed here does not have the DRA7xx board included yet.
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "omap fixes against v4.6-rc2" from Tony Lindgren
Fixes for omaps against v4.6-rc2, mostly to fix suspend for beagle-x15
that broke when we added runtime based SoC revision detection earlier.
It seems suspend worked earlier as things were only partially initialized,
while now we initialize things properly for dra7.
Note that the "ARM: OMAP: Catch callers of revision information prior
to it being populated" had to be reverted as it caused bogus warnings
for other SoCs because omap initcalls bail out based on revision being
set to 0 for other SoCs. These initcalls will mostly just disappear
when we drop support for omap3 legacy booting.
Also included is a fix for dra7 sys_32k_ck clock source that is not
enabled on boot making system fall back to using emulated clock.
* tag 'omap-for-v4.6/fixes-rc2-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (198 commits)
Revert "ARM: OMAP: Catch callers of revision information prior to it being populated"
ARM: OMAP: Catch callers of revision information prior to it being populated
ARM: dts: dra7: Correct clock tree for sys_32k_ck
ARM: OMAP: DRA7: Provide proper class to omap2_set_globals_tap
ARM: OMAP: DRA7: wakeupgen: Skip SAR save for wakeupgen
Linux 4.6-rc2
v4l2-mc: avoid warning about unused variable
Convert straggling drivers to new six-argument get_user_pages()
.mailmap: add Christophe Ricard
Make CONFIG_FHANDLE default y
mm/page_isolation.c: fix the function comments
oom, oom_reaper: do not enqueue task if it is on the oom_reaper_list head
mm/page_isolation: fix tracepoint to mirror check function behavior
mm/rmap: batched invalidations should use existing api
x86/mm: TLB_REMOTE_SEND_IPI should count pages
mm: fix invalid node in alloc_migrate_target()
include/linux/huge_mm.h: return NULL instead of false for pmd_trans_huge_lock()
mm, kasan: fix compilation for CONFIG_SLAB
MAINTAINERS: orangefs mailing list is subscribers-only
net: mvneta: fix changing MTU when using per-cpu processing
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populated"
This reverts commit 571afb4c8a4bbe88541364e7f6827340562f2736.
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We can now just use the compatible if there's no need to have
device instance specific auxdata.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Move NAND specific device tree parsing to NAND driver.
The NAND controller node must have a compatible id, register space
resource and interrupt resource.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
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Deprecate nand register passing via platform data and use
gpmc_omap_get_nand_ops() instead.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
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Depending on timing during the resume path from off mode on 36xx, we may
see external aborts. These seem to be caused by the following:
- OMAP3 Advisory 1.62 "MPU Cannot Exit from Standby" says we need to
disable intc autoidle before WFI
- DM3730 Advisory 1.106 "MPU Leaves MSTANDBY State Before IDLEREQ of
Interrupt Controller is Released" says we need to wait before
accessing intc
omap3_intc_resume_idle restores the intc autoidle for all resume paths,
however in the resume path from off mode only it is also being restored
by omap_intc_restore_context before this call to omap3_intc_resume_idle
happens. The second restore of the intc autoidle in this path is what
appears to be causing the external abort so for the off mode resume path
let's rely on omap_intc_restore_context to restore intc autoidle, and
for all other paths let omap3_intc_resume_idle handle it as it is now.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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FROZEN hotplug notifiers are not handled and do not have to be. Insert
a comment to remember that the lack of the FROZEN transitions is no
accident.
Cc: Tony Lindgren <tony@atomide.com>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: linux-omap@vger.kernel.org
Signed-off-by: Anna-Maria Gleixner <anna-maria@linutronix.de>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Open Switch Retention(OSWR) is a retention state which is unsupported
in DRA7 SoC. This state is achieved when power state is set to
retention and logic power state is set to OFF.
Even though DRA7 architecture is a OMAP derivative, none of the
powerdomains are actually implemented to achieve OSWR in the SoC.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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When the power domain is in "ON" state, the memories should be always
in "ON", even though the hardware register allows other states to be
written, wrong states may confuse certain hardware blocks.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Erratum i892 as will be documented in the upcoming G or later revision
of DRA7xx/ AM57xx errata documentation (SPRZ398F) states that L3 clock
needs to be kept active all the time to ensure that asymmetric aging
degradation is minimal and within the design allowed margin.
By allowing core domain to transition to INA and allowing L3 clock to be
turned off for extended periods of time, there is a risk of functional
issues and device failure as a result.
Ref: http://www.ti.com/lit/er/sprz429h/sprz429h.pdf
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The directory arch/arm/mach-omap2 is only selected for compilation if
CONFIG_ARCH_OMAP2PLUS is selected. CONFIG_ARCH_OMAP2PLUS itself is a
silent option and all machines selecting this option are multiplatform
devices. As a consequence checks for CONFIG_ARCH_MULTIPLATFORM as well
as CONFIG_ARCH_OMAP2PLUS within that directory are superfluous and can
be removed.
Signed-off-by: Jonas Rabenstein <jonas.rabenstein@studium.uni-erlangen.de>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.6/fixes
ARM: OMAP2+: clockdomain: another fix for v4.6-rc
For DRA7xx platforms, add a workaround for missed timer interrupts
that appears to be due to an integration bug (erratum i874)
Basic build, boot, and PM test logs are available here:
http://www.pwsan.com/omap/testlogs/omap-fixes-b-for-v4.6-rc/20160413020850/
(The DRA7xx board here has not yet been added into the testbed.)
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The omap_hwmod _enable() function can return success without setting
the hwmod state to _HWMOD_STATE_ENABLED for IPs with reset lines when
all of the reset lines are asserted. The omap_hwmod _idle() function
also performs a similar check, but after checking for the hwmod state
first. This triggers the WARN when pm_runtime_get and pm_runtime_put
are invoked on IPs with all reset lines asserted. Reverse the checks
for hwmod state and reset lines status to fix this.
Issue found during a unbind operation on a device with reset lines
still asserted, example backtrace below
------------[ cut here ]------------
WARNING: CPU: 1 PID: 879 at arch/arm/mach-omap2/omap_hwmod.c:2207 _idle+0x1e4/0x240()
omap_hwmod: mmu_dsp: idle state can only be entered from enabled state
Modules linked in:
CPU: 1 PID: 879 Comm: sh Not tainted 4.4.0-00008-ga989d951331a #3
Hardware name: Generic OMAP5 (Flattened Device Tree)
[<c0018e60>] (unwind_backtrace) from [<c0014dc4>] (show_stack+0x10/0x14)
[<c0014dc4>] (show_stack) from [<c037ac28>] (dump_stack+0x90/0xc0)
[<c037ac28>] (dump_stack) from [<c003f420>] (warn_slowpath_common+0x78/0xb4)
[<c003f420>] (warn_slowpath_common) from [<c003f48c>] (warn_slowpath_fmt+0x30/0x40)
[<c003f48c>] (warn_slowpath_fmt) from [<c0028c20>] (_idle+0x1e4/0x240)
[<c0028c20>] (_idle) from [<c0029080>] (omap_hwmod_idle+0x28/0x48)
[<c0029080>] (omap_hwmod_idle) from [<c002a5a4>] (omap_device_idle+0x3c/0x90)
[<c002a5a4>] (omap_device_idle) from [<c0427a90>] (__rpm_callback+0x2c/0x60)
[<c0427a90>] (__rpm_callback) from [<c0427ae4>] (rpm_callback+0x20/0x80)
[<c0427ae4>] (rpm_callback) from [<c0427f84>] (rpm_suspend+0x138/0x74c)
[<c0427f84>] (rpm_suspend) from [<c0428b78>] (__pm_runtime_idle+0x78/0xa8)
[<c0428b78>] (__pm_runtime_idle) from [<c041f514>] (__device_release_driver+0x64/0x100)
[<c041f514>] (__device_release_driver) from [<c041f5d0>] (device_release_driver+0x20/0x2c)
[<c041f5d0>] (device_release_driver) from [<c041d85c>] (unbind_store+0x78/0xf8)
[<c041d85c>] (unbind_store) from [<c0206df8>] (kernfs_fop_write+0xc0/0x1c4)
[<c0206df8>] (kernfs_fop_write) from [<c018a120>] (__vfs_write+0x20/0xdc)
[<c018a120>] (__vfs_write) from [<c018a9cc>] (vfs_write+0x90/0x164)
[<c018a9cc>] (vfs_write) from [<c018b1f0>] (SyS_write+0x44/0x9c)
[<c018b1f0>] (SyS_write) from [<c0010420>] (ret_fast_syscall+0x0/0x1c)
---[ end trace a4182013c75a9f50 ]---
While at this, fix the sequence in _shutdown() as well, though there
is no easy reproducible scenario.
Fixes: 747834ab8347 ("ARM: OMAP2+: hwmod: revise hardreset behavior")
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Add the hwmod data for GPTimer 12. GPTimer 12 is present in
WKUPAON power domain and is clocked from a secure 32K clock.
GPTimer 12 serves as a secure timer on HS devices, but is
available for kernel on regular GP devices.
The hwmod link is registered only on GP devices. The hwmod data
also reused the existing timer class instead of reintroducing
the identical dra7xx_timer_secure_sysc class which was dropped
in commit edec17863362 ("ARM: DRA7: hwmod: Fix the hwmod class
for GPTimer4").
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Hook omap_hwmod_rtc_unlock/lock functions into RTC hwmod,
so that SYSCONFIG register is updated properly.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Hook omap_hwmod_rtc_unlock/lock functions into RTC hwmod,
so that SYSCONFIG register is updated properly
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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RTC IP have kicker feature which prevents spurious writes to its registers.
In order to write into any of the RTC registers, KICK values has to be
written to KICK registers. Also, RTC busy flag needs to be polled for
non-TC registers as well, without which update is not proper and confirmed
it by testing on DRA7-evm.
Introduce omap_hwmod_rtc_unlock/lock functions, which writes into these
KICK registers inorder to lock and unlock RTC registers.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[paul@pwsan.com: fixed subject line]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Add hwmod entries for the PWMSS on DRA7.
Set l4_root_clk_div as the main_clk of PWMSS. It is fixed-factored clock
equal to L4PER2_L3_GICLK/2(l3_iclk_div/2).
Signed-off-by: Vignesh R <vigneshr@ti.com>
[fcooper@ti.com: Do not add eQEP, ePWM and eCAP hwmod entries]
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
[paul@pwsan.com: fixed sparse warnings; added missing comments]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Add missing data for all McASP ports for the dra7 family
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Errata Title:
i874: TIMER5/6/7/8 interrupts not propagated
Description:
When TIMER5, TIMER6, TIMER7, or TIMER8 clocks are enabled
(CM_IPU_TIMER5/6/7/8_CLKCTRL[0:1]MODULEMODE=0x2:ENABLE) and the CD-IPU
is in HW_AUTO mode (CM_IPU_CLKSTCTRL[0:1]CLKTRCTRL=0x3:HW_AUTO) the
corresponding TIMER will continue counting, but enabled interrupts
will not be propagated to the destinations (MPU, DSP, etc) in the
SoC until the TIMER registers are accessed from the CPUs (MPU, DSP
etc.). This can result in missed timer interrupts.
Workaround:
In order for TIMER5/6/7/8 interrupts to be propagated and serviced
correctly the CD_IPU domain should be set to SW_WKUP mode
(CM_IPU_CLKSTCTRL[0:1]CLKTRCTRL=0x2:SW_WKUP).
The above workaround is achieved by switching the IPU clockdomain
flags from HWSUP_SWSUP to SWSUP only.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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omap_rev is used to detect various SoC types, however any misuse of
the usage by invoking it earlier than it being populated will result
in invalid results. Lets flag them as early as possible to prevent
unintended side effects taking place. We get 0 if it is uninitialized
and -1 when detection is done using device tree (as the case was for
DRA7 as the case was prior to commit 06c2d368fc36 ("ARM: OMAP: DRA7:
Make use of omap_revision information for soc_is* calls")
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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When commit 06c2d368fc36 ("ARM: OMAP: DRA7: Make use of omap_revision
information for soc_is* calls") introduced SoC check using
omap_revision, it missed providing DRA7 as class for initializing
the omap_version variable. Without doing this, soc_is_dra7xx() will
fail and as a result, omap4_pm_init_early never initializes the dra7
erratum for CPU power state. This causes the suspend path to fail
on DRA7 devices.
Fixes: 06c2d368fc36 ("ARM: OMAP: DRA7: Make use of omap_revision information for soc_is* calls")
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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DRA7 has no SAR region for automated save and restore of wakeupgen,
which does not make real since the SoC really does not do legacy OFF
mode anymore. Further wakeupgen should never loose context in CSWR
retention mode for MPU domain on DRA7 since that is the deepest state
we will enter.
So, just skip, instead of oopsing as follows while attemptint to enter
suspend on BeagleBoard-X15.
[ 55.589771] Unable to handle kernel paging request at virtual address 00002684
[ 55.589771] pgd = ec69c000
[...]
[ 55.589771] [<c0123cc8>] (irq_notifier) from [<c015ad70>] (notifier_call_chain+0x4c/0x8c)
[ 55.589771] [<c015ad70>] (notifier_call_chain) from [<c021469c>] (cpu_cluster_pm_enter+0x2c/0x78)
[ 55.589771] [<c021469c>] (cpu_cluster_pm_enter) from [<c0514508>] (syscore_suspend+0xb8/0x31c)
[ 55.589771] [<c0514508>] (syscore_suspend) from [<c0197d24>] (suspend_devices_and_enter+0x308/0x9e4)
[ 55.589771] [<c0197d24>] (suspend_devices_and_enter) from [<c0198a40>] (pm_suspend+0x640/0x75c)
[ 55.589771] [<c0198a40>] (pm_suspend) from [<c0196bcc>] (state_store+0x64/0xb8)
[ 55.589771] [<c0196bcc>] (state_store) from [<c0307914>] (kernfs_fop_write+0xc0/0x1bc)
[ 55.589771] [<c0307914>] (kernfs_fop_write) from [<c028ac80>] (__vfs_write+0x1c/0xd8)
[ 55.589771] [<c028ac80>] (__vfs_write) from [<c028bb70>] (vfs_write+0x90/0x16c)
[ 55.589771] [<c028bb70>] (vfs_write) from [<c028c890>] (SyS_write+0x44/0x9c)
[ 55.589771] [<c028c890>] (SyS_write) from [<c0107840>] (ret_fast_syscall+0x0/0x1c)
[...]
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Silicon Rev 2.0 is a minor variant of Rev 1.0. Rev 2.0 is an incremental revision
with various fixes including the following:
- Reset logic fixes
- Few asymmetric aging logic fixes
- Ethernet speed fixes
- EDMA fixes for McASP
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The following commits:
commit 3fa609755c11 ("ARM: omap2: restore OMAP4 barrier behaviour")
commit f746929ffdc8 ("Revert "ARM: OMAP4: remove dead kconfig option OMAP4_ERRATA_I688"")
and
commit ea827ad5ffbb ("ARM: DRA7: Provide proper IO map table")
came in around the same time, unfortunately this seem to have missed
initializing the barrier for DRA7 platforms - omap5_map_io was reused
for dra7 till it was split out by the last patch. barrier_init
needs to be hence carried forward as it is valid for DRA7 family of
processors as they are for OMAP5.
Fixes: ea827ad5ffbb7 ("ARM: DRA7: Provide proper IO map table")
Cc: stable@vger.kernel.org # v4.1+
Reported-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.6/fixes
ARM: OMAP2+: first hwmod fix for v4.6-rc
Fix a longstanding bug in the hwmod code that could cause
hardware SYSCONFIG register values to not match the kernel's
idea of what they should be, and that could result in lower
performance during IP block idle entry.
Basic build, boot, and PM test logs are available here:
http://www.pwsan.com/omap/testlogs/omap-hwmod-fixes-a-for-v4.6-rc/20160326231727/
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Commit 127500ccb766f ("ARM: OMAP2+: Only write the sysconfig on idle
when necessary") talks about verification of sysconfig cache value before
updating it, only during idle path. But the patch is adding the
verification in the enable path. So, adding the check in a proper place
as per the commit description.
Not keeping this check during enable path as there is a chance of losing
context and it is safe to do on idle as the context of the register will
never be lost while the device is active.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Cc: Jon Hunter <jonathanh@nvidia.com>
Cc: <stable@vger.kernel.org> # 3.12+
Fixes: commit 127500ccb766 "ARM: OMAP2+: Only write the sysconfig on idle when necessary"
[paul@pwsan.com: appears to have been caused by my own mismerge of the
originally posted patch]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann:
"Newly added support for additional SoCs:
- Axis Artpec-6 SoC family
- Allwinner A83T SoC
- Mediatek MT7623
- NXP i.MX6QP SoC
- ST Microelectronics stm32f469 microcontroller
New features:
- SMP support for Mediatek mt2701
- Big-endian support for NXP i.MX
- DaVinci now uses the new DMA engine dma_slave_map
- OMAP now uses the new DMA engine dma_slave_map
- earlyprintk support for palmchip uart on mach-tango
- delay timer support for orion
Other:
- Exynos PMU driver moved out to drivers/soc/
- Various smaller updates for Renesas, Xilinx, PXA, AT91, OMAP,
uniphier"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
ARM: uniphier: rework SMP code to support new System Bus binding
ARM: uniphier: add missing of_node_put()
ARM: at91: avoid defining CONFIG_* symbols in source code
ARM: DRA7: hwmod: Add data for eDMA tpcc, tptc0, tptc1
ARM: imx: Make reset_control_ops const
ARM: imx: Do L2 errata only if the L2 cache isn't enabled
ARM: imx: select ARM_CPU_SUSPEND only for imx6
dmaengine: pxa_dma: fix the maximum requestor line
ARM: alpine: select the Alpine MSI controller driver
ARM: pxa: add the number of DMA requestor lines
dmaengine: mmp-pdma: add number of requestors
dma: mmp_pdma: Add the #dma-requests DT property documentation
ARM: OMAP2+: Add rtc hwmod configuration for ti81xx
ARM: s3c24xx: Avoid warning for inb/outb
ARM: zynq: Move early printk virtual address to vmalloc area
ARM: DRA7: hwmod: Add custom reset handler for PCIeSS
ARM: SAMSUNG: Remove unused register offset definition
ARM: EXYNOS: Cleanup header files inclusion
drivers: soc: samsung: Enable COMPILE_TEST
MAINTAINERS: Add maintainers entry for drivers/soc/samsung
...
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Arnd Bergmann:
"A few simple cleanups across multiple platforms, not much standing
out:
- lpc32xx removes its private implementation of the clk API, after
generic code was merged in 4.5
- all unused Makefile.boot files get removed
- a number of simplifications for shmobile
- asm/clkdev.h gets replaced with the asm-generic version after all
mach/clkdev.h implementations are gone"
* tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: shmobile: Kconfig: Get rid of old comment
ARM: shmobile: Consolidate SCU mapping code
arm: lpc32xx: remove direct control of GPIOs from shared mach file
arm: lpc32xx: remove selected HAVE_IDE
arm: lpc32xx: switch to common clock framework
ARM: Use generic clkdev.h header
ARM: plat-versatile: Remove unused clock.c file
ARM: netx: remove redundant "depends on ARCH_NETX"
ARM: integrator: remove redundant select in Kconfig
ARM: drop unused Makefile.boot of Multiplatform SoCs
ARM: mvebu: add missing of_node_put()
ARM: shmobile: r8a7779: Remove remainings of removed SCU boot setup code
ARM: shmobile: Typo s/MIPDR/MPIDR/
ARM: shmobile: Add includes providing forward declarations
ARM: shmobile: rcar-gen2: Make rcar_gen2_dma_contiguous static
ARM: mv78xx0: use "depends on" instead of "if" after prompt
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC non-urgent fixes from Arnd Bergmann:
"As usual, we queue up a few fixes that don't seem urgent enough to go
in through -rc.
- a number of randconfig warning fixes from Arnd
- various small fixes for OMAP
- one somewhat larger patch to restore the OMAP3 cpuidle tuning that
was lost in a cleanup
- a small regression fix for cns3xxx PCI"
* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (26 commits)
CNS3xxx: Fix PCI cns3xxx_write_config()
MAINTAINERS: unify email addrs for Kevin Hilman
CNS3xxx: remove unused *_VIRT definitions
ARM: OMAP2+: Fix hwmod clock for l4_ls
soc: TI knav_qmss: fix dma_addr_t printing
ARM: prima2: always enable reset controller
ARM: socfpga: hide unused functions
ARM: ux500: fix ureachable iounmap()
ARM: ks8695: fix __initdata annotation
ARM: mvebu: mark mvebu_hwcc_pci_nb as __maybe_unused
ARM: mv78xx0: avoid unused function warning
ARM: orion: only select I2C_BOARDINFO when using I2C
ARM: OMAP2+: Fix out of range register access with syscon_config.max_register
ARM: OMAP3: Add cpuidle parameters table for omap3430
ARM: davinci: make I2C support optional
ARM: davinci: DA8xx+DMx combined kernels need PATCH_PHYS_VIRT
ARM: davinci: avoid unused mityomapl138_pn_info variable
ARM: davinci: limit DT support to DA850
ARM: DRA7: hwmod: Add reset data for PCIe
ARM: DRA7: hwmod: Fix OCP2SCP sysconfig
...
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty/serial updates from Greg KH:
"Here's the big tty/serial driver pull request for 4.6-rc1.
Lots of changes in here, Peter has been on a tear again, with lots of
refactoring and bugs fixes, many thanks to the great work he has been
doing. Lots of driver updates and fixes as well, full details in the
shortlog.
All have been in linux-next for a while with no reported issues"
* tag 'tty-4.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (220 commits)
serial: 8250: describe CONFIG_SERIAL_8250_RSA
serial: samsung: optimize UART rx fifo access routine
serial: pl011: add mark/space parity support
serial: sa1100: make sa1100_register_uart_fns a function
tty: serial: 8250: add MOXA Smartio MUE boards support
serial: 8250: convert drivers to use up_to_u8250p()
serial: 8250/mediatek: fix building with SERIAL_8250=m
serial: 8250/ingenic: fix building with SERIAL_8250=m
serial: 8250/uniphier: fix modular build
Revert "drivers/tty/serial: make 8250/8250_ingenic.c explicitly non-modular"
Revert "drivers/tty/serial: make 8250/8250_mtk.c explicitly non-modular"
serial: mvebu-uart: initial support for Armada-3700 serial port
serial: mctrl_gpio: Add missing module license
serial: ifx6x60: avoid uninitialized variable use
tty/serial: at91: fix bad offset for UART timeout register
tty/serial: at91: restore dynamic driver binding
serial: 8250: Add hardware dependency to RT288X option
TTY, devpts: document pty count limiting
tty: goldfish: support platform_device with id -1
drivers: tty: goldfish: Add device tree bindings
...
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git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into fixes
ARM: OMAP2+: critical DRA7xx fix for v4.5-rc
Force the DRA7xx Ethernet internal clock source to stay enabled
per TI erratum i877:
http://www.ti.com/lit/er/sprz429h/sprz429h.pdf
Otherwise, if the Ethernet internal clock source is disabled, the
chip will age prematurely, and the RGMII I/O timing will soon
fail to meet the delay time and skew specifications for 1000Mbps
Ethernet.
This fix should go in as soon as possible.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/omap-critical-fixes-for-v4.5-rc/20160307014209/
* tag 'for-v4.5-rc/omap-critical-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending:
ARM: dts: dra7: do not gate cpsw clock due to errata i877
ARM: OMAP2+: hwmod: Introduce ti,no-idle dt property
Signed-off-by: Olof Johansson <olof@lixom.net>
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Introduce a dt property, ti,no-idle, that prevents an IP to idle at any
point. This is to handle Errata i877, which tells that GMAC clocks
cannot be disabled.
Acked-by: Roger Quadros <rogerq@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: <stable@vger.kernel.org>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Merge "omap soc changes for v4.6 merge window" from Tony Lindgren:
SoC related changes for omaps for v4.6 merge window:
- Enable runtime revision detection for dra7 to avoid multiple dts
files for various variants
- Add dma_slave_map for omap1/2/3 legacy mode booting
- Add RTC interconnect target data for ti81xx and am43x
- Add custom reset handler for PCIeSS
- Add eDMA interconnect target data for dra7
* tag 'omap-for-v4.6/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: DRA7: hwmod: Add data for eDMA tpcc, tptc0, tptc1
ARM: OMAP2+: Add rtc hwmod configuration for ti81xx
ARM: DRA7: hwmod: Add custom reset handler for PCIeSS
ARM: OMAP2+: DMA: Provide dma_slave_map to omap-dma for legacy boot
ARM: OMAP1: DMA: Provide dma_slave_map to omap-dma
ARM: OMAP: DRA7: Make use of omap_revision information for soc_is* calls
ARM: AM43XX: hwmod: Add rtc hwmod
ARM: DRA7: hwmod: Add reset data for PCIe
ARM: DRA7: hwmod: Fix OCP2SCP sysconfig
ARM: OMAP2+: hwmod data: Add SSI data for omap36xx
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical
Merge "omap non-urgent fixes for v4.6 merge window" from Tony Lindgren:
Fixes for omaps for v4.6 merge window that are not urgent
for the v4.5-rc cycle:
- Add back optimized cpuidle parameters for 34xx that were
incorrecly removed earlier with cpuidle cleanup
- Fix SSI for omap36xx to get modem working on N950/N9
- A series of omap hwmod fixes via Paul Walmsley <paul@pwsan.com>
to fix SSI for omap36xx for modem on N950/N9, fix for
OCP2SCP sysconfig idle mode, and reset data for PCIe on
dra7
- Fix out of range register access for omap3 control module
if syscon max_register is initialized like v4.6 will be
doing
- Fix l4_ls interconnect clocks for 81xx, it should always
be sysclk6_ck
* tag 'omap-for-v4.6/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Fix hwmod clock for l4_ls
ARM: OMAP2+: Fix out of range register access with syscon_config.max_register
ARM: OMAP3: Add cpuidle parameters table for omap3430
ARM: DRA7: hwmod: Add reset data for PCIe
ARM: DRA7: hwmod: Fix OCP2SCP sysconfig
ARM: OMAP2+: hwmod data: Add SSI data for omap36xx
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Without this booting t410 can fail randomly with no output
depending on the .config options chosen. Enabling debug_ll
causes the problem to go away. I narrowed this down to USB
by disabling one module at a time.
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.6/soc
ARM: OMAP2+: second set of hwmod changes for v4.6
These patches add RTC support for the AM43xx, and add support for
the DRA7xx eDMA controller's TPCC, TPTC0, and TPTC1 IP blocks.
Also included is a workaround for PRCM hardreset control of the DRA7xx
PCIe subsystem.
Note that I do not have a DRA7xx board, and therefore cannot
test any patches for that SoC family.
Basic build, boot, and PM test logs can be found here:
http://www.pwsan.com/omap/testlogs/omap-hwmod-b-for-v4.6/20160301021258/
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Add hwmod data for the eDMA blocks:
- TPCC: Third-party channel controller
- TPTC0: Third-party transfer controller 0
- TPTC1: Third-party transfer controller 1
The TPCC's clock gating status follows the status of its clock and
power domain. This means that the hwmod code can not directly control
the TPCC enable/disable status.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
[paul@pwsan.com: rephrased last two sentences of the patch description]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Looks like we have few cases with wrong clock, and some
entries with missing clock. It should always be sysclk6
for the l4_ls instance.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This allows RTC to work properly with the related DTS
changes.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add a custom reset handler for DRA7x PCIeSS. This
handler is required to deassert PCIe hardreset lines
after they have been asserted.
This enables the PCIe driver to access registers after
PCIeSS has been runtime enabled without having to
deassert hardreset lines itself.
With this patch applied, used lspci to make sure
connected PCIe device enumerates on DRA74x and DRA72x
EVMs.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reported-by: Richard Cochran <richardcochran@gmail.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Suman Anna <s-anna@ti.com>
Cc: Dave Gerlach <d-gerlach@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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We still have some boards booting in legacy mode and they will need to have
the device/slave -> filter_fn mapping so we can convert the OMAP drivers
to use the new dmaengine API for requesting channels.
Only some OMAP24xx and OMAP3xxx boards can boot in legacy mode which means
we only need to provide the map for these SoCs.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Commit e7b11dc7b77b ("ARM: OMAP2+: Fix onenand rate detection to avoid
filesystem corruption") partially fixed onenand configuration when GPMC
module is reset. Finish the job by also providing the correct values in
ONENAND_REG_SYS_CFG1 register.
Fixes: e7b11dc7b77b ("ARM: OMAP2+: Fix onenand rate detection to avoid
filesystem corruption")
Cc: stable@vger.kernel.org # v4.2+
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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If syscon_config.max_register is initialized like it should be, we have
omap_ctrl_read/write() fail with out of range register access at least
for omap3.
We have omap3.dtsi setting up a regmap range for scm_conf, but we now
have omap_ctrl_read/write() also attempt to use the regmap. However,
omap_ctrl_read/write() is also used for other register ranges in the
system control module (SCM).
Let's fix the issue by just removing the regmap_read/write() usage for
control module as suggested by Tero Kristo <t-kristo@ti.com>.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.6/fixes-not-urgent
ARM: OMAP2+: first set of hwmod fixes and additions for v4.6
A few fixes for OMAP hwmod data. SSI hwmod data for the OMAP 3730,
and some fixes for the DRA7xx hwmod data. These shouldn't interfere
or impact anything else.
Basic build, boot, and PM test logs are available here:
http://www.pwsan.com/omap/testlogs/omap-hwmod-a-for-v4.6/20160214161224/
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Based on CPU type choose generic omap3 or omap3430 specific cpuidle
parameters. Parameters for omap3430 were measured on Nokia N900 device and
added by commit 5a1b1d3a9efa ("OMAP3: RX-51: Pass cpu idle parameters")
which were later removed by commit 231900afba52 ("ARM: OMAP3: cpuidle -
remove rx51 cpuidle parameters table") due to huge code complexity.
This patch brings cpuidle parameters for omap3430 devices again, but uses
simple condition based on CPU type.
Fixes: 231900afba52 ("ARM: OMAP3: cpuidle - remove rx51 cpuidle
parameters table")
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Currently of_machine_is_compatible is used to detect the soc which
employs string comparison operations. We already have all the required
information in the omap_revision. Hence make use of the same like
the previous OMAPs and avoid costly string comparisons.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The patch registers the rtc hwmod on AM437x chips. The RTC module is
physically present on the AM438x SoC used on AM43X-EPOS-EVM, but it is
permanently disabled. A secure RTC is used instead on these devices,
where needed. Hence adding it selectively using a separate list to get
RTC Module functional on the other am43x SoCs used on am437x-gp-evm
and am437x-sk-evm.
Signed-off-by: Keerthy <j-keerthy@ti.com>
[paul@pwsan.com: cleaned up patch description]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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