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2025-06-30arm64: dts: imx943-evk: add bt-sco sound card supportShengjiu Wang
Add bt-sco sound card, which is used by BT HFP case. It supports wb profile as default. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-30arm64: dts: imx943-evk: add sound-wm8962 supportShengjiu Wang
Add WM8962 codec connected to SAI1 interface. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-30arm64: dts: imx943-evk: add i2c io expander supportCarlos Song
Add i2c io expander support for imx943 evk board. Signed-off-by: Carlos Song <carlos.song@nxp.com> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-30arm64: dts: imx943-evk: add lpi2c supportCarlos Song
Add lpi2c and i2c-mux support for imx943 evk board. Signed-off-by: Carlos Song <carlos.song@nxp.com> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-30arm64: dts: imx94: Add micfil and mqs device nodesShengjiu Wang
Add micfil and mqs device nodes Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-27arm64: dts: exynos: gs101: add dm-verity-device-corrupted syscon-reboot-modeAndré Draszik
On gs101, the boot mode is stored both in a syscon register, and in nvmem. Add the dm-verity-device-corrupted reboot mode to the syscon-reboot- based boot mode as well, as both (nvmem & syscon) modes should be in sync. Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250524-b4-max77759-mfd-dts-v2-4-b479542eb97d@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-27arm64: dts: exynos: gs101-pixel-common: add nvmem-reboot-modeAndré Draszik
Add the 'nvmem-reboot-mode' which is used to communicate a requested boot mode to the boot loader. Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250524-b4-max77759-mfd-dts-v2-3-b479542eb97d@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-27arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMICAndré Draszik
On Pixel 6 (and Pro), a MAX77759 companion PMIC for USB Type-C applications is used, which contains four functional blocks (at distinct I2C addresses): * top (including GPIO & NVMEM) * charger * fuel gauge * TCPCi This change adds the PMIC and the subnodes for the GPIO expander and NVMEM, and defines the NVMEM layout. The NVMEM layout is declared such that it matches downstream's open-coded configuration [1]. Note: The pinctrl nodes are kept sorted by the 'samsung,pins' property rather than node name, as I think that makes it easier to look at and to add new nodes unambiguously in the future. Its label is prefixed with 'if' (for interface), because there are three PMICs in total in use on Pixel 6 (Pro). Link: https://android.googlesource.com/kernel/google-modules/bms/+/96e729a83817/max77759_maxq.c#67 [1] Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250524-b4-max77759-mfd-dts-v2-2-b479542eb97d@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-27arm64: defconfig: enable Maxim max77759 driverAndré Draszik
Enable the Maxim max77759 as this is used by the gs101-oriole and gs101-raven (Google Pixel 6 and Pixel 6 Pro) boards, The child devices' defaults are based on this MFD driver's state, so this commit enables those implicitly as well. Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250524-b4-max77759-mfd-dts-v2-1-b479542eb97d@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-27Merge tag 'drm-misc-next-2025-06-26' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/misc/kernel into drm-next drm-misc-next for 6.17: UAPI Changes: Cross-subsystem Changes: Core Changes: - ci: Add Device tree validation and kunit - connector: Move HDR sink metadat to drm_display_info Driver Changes: - bochs: drm_panic Support - panfrost: MT8370 Support - bridge: - tc358767: Convert to devm_drm_bridge_alloc() Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <mripard@redhat.com> Link: https://lore.kernel.org/r/20250626-sincere-loon-of-effort-6dbdf9@houat
2025-06-26arm64: dts: qcom: x1-asus-zenbook: support soundAleksandrs Vinarskis
Works: * Both speakers * Both MICs * Headphones jack, L/R channels * Headphones jack, MIC Now working/untested: * Sound over DisplayPort * Sound over HDMI Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250623113709.21184-3-alex.vinarskis@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-26arm64: dts: qcom: x1-asus-zenbook: fixup GPU nodesAleksandrs Vinarskis
It appears not the latest version of the patch was merged. Align with latest upstreamed version by correcting GPU enable location and typo in GPU firmware path for x1p42100 variant. Fixes: 6516961352a1 ("arm64: dts: qcom: Add support for X1-based Asus Zenbook A14") Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250623113709.21184-2-alex.vinarskis@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-26Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf after rc3Alexei Starovoitov
Cross-merge BPF, perf and other fixes after downstream PRs. It restores BPF CI to green after critical fix commit bc4394e5e79c ("perf: Fix the throttle error of some clock events") No conflicts. Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2025-06-26arm64: dts: renesas: r9a09g047: Add GBETH nodesJohn Madieu
Add GBETH nodes to RZ/G3E (R9A09G047) SoC DTSI. Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Tested-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Link: https://lore.kernel.org/20250623080405.355083-3-john.madieu.xa@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-06-26arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Rename fixed regulator node namesLad Prabhakar
Rename "regulator0" to "regulator-0p8v" and "regulator1" to "regulator-3p3v" for consistency as done in the RZ/V2N EVK. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250620121045.56114-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-06-26arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Add RAA215300 PMICLad Prabhakar
Add support for the Renesas RAA215300 PMIC to the RZ/V2N EVK. The PMIC is connected to I2C8 and uses a 32.768kHz fixed clock source (x6). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250619135539.207828-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-06-26arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add RAA215300 PMICLad Prabhakar
Add support for the Renesas RAA215300 PMIC to the RZ/V2H EVK. The PMIC is connected to I2C8 and uses a 32.768kHz fixed clock source (x6). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250619135539.207828-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-06-26KVM: arm64: Don't free hyp pages with pKVM on GICv2Quentin Perret
Marc reported that enabling protected mode on a device with GICv2 doesn't fail gracefully as one would expect, and leads to a host kernel crash. As it turns out, the first half of pKVM init happens before the vgic probe, and so by the time we find out we have a GICv2 we're already committed to keeping the pKVM vectors installed at EL2 -- pKVM rejects stub HVCs for obvious security reasons. However, the error path on KVM init leads to teardown_hyp_mode() which unconditionally frees hypervisor allocations (including the EL2 stacks and per-cpu pages) under the assumption that a previous cpu_hyp_uninit() execution has reset the vectors back to the stubs, which is false with pKVM. Interestingly, host stage-2 protection is not enabled yet at this point, so this use-after-free may go unnoticed for a while. The issue becomes more obvious after the finalize_pkvm() call. Fix this by keeping track of the CPUs on which pKVM is initialized in the kvm_hyp_initialized per-cpu variable, and use it from teardown_hyp_mode() to skip freeing pages that are in fact used. Fixes: a770ee80e662 ("KVM: arm64: pkvm: Disable GICv2 support") Reported-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Quentin Perret <qperret@google.com> Link: https://lore.kernel.org/r/20250626101014.1519345-1-qperret@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-06-26arm64: dts: ti: k3-j784s4-j742s2-main-common: Add ACSPCIE1 nodeParth Pancholi
The ACSPCIE1 module on TI's J784S4 SoC is capable of driving the reference clock required by the PCIe Endpoint device. It is an alternative to on- board and external reference clock generators. Add the device-tree node for the same. Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com> Link: https://lore.kernel.org/r/20250513152155.1590689-1-parth105105@gmail.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-06-26arm64: dts: ti: k3-j722s-evm: Fix USB gpio-hog level for Type-CSiddharth Vadapalli
According to the "GPIO Expander Map / Table" section of the J722S EVM Schematic within the Evaluation Module Design Files package [0], the GPIO Pin P05 located on the GPIO Expander 1 (I2C0/0x23) has to be pulled down to select the Type-C interface. Since commit under Fixes claims to enable the Type-C interface, update the property within "p05-hog" from "output-high" to "output-low", thereby switching from the Type-A interface to the Type-C interface. [0]: https://www.ti.com/lit/zip/sprr495 Cc: stable@vger.kernel.org Fixes: 485705df5d5f ("arm64: dts: ti: k3-j722s: Enable PCIe and USB support on J722S-EVM") Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Link: https://lore.kernel.org/r/20250623100657.4082031-1-s-vadapalli@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-06-26KVM: arm64: Fix error path in init_hyp_mode()Mostafa Saleh
In the unlikely case pKVM failed to allocate carveout, the error path tries to access NULL ptr when it de-reference the SVE state from the uninitialized nVHE per-cpu base. [ 1.575420] pstate: 61400005 (nZCv daif +PAN -UAO -TCO +DIT -SSBS BTYPE=--) [ 1.576010] pc : teardown_hyp_mode+0xe4/0x180 [ 1.576920] lr : teardown_hyp_mode+0xd0/0x180 [ 1.577308] sp : ffff8000826fb9d0 [ 1.577600] x29: ffff8000826fb9d0 x28: 0000000000000000 x27: ffff80008209b000 [ 1.578383] x26: ffff800081dde000 x25: ffff8000820493c0 x24: ffff80008209eb00 [ 1.579180] x23: 0000000000000040 x22: 0000000000000001 x21: 0000000000000000 [ 1.579881] x20: 0000000000000002 x19: ffff800081d540b8 x18: 0000000000000000 [ 1.580544] x17: ffff800081205230 x16: 0000000000000152 x15: 00000000fffffff8 [ 1.581183] x14: 0000000000000008 x13: fff00000ff7f6880 x12: 000000000000003e [ 1.581813] x11: 0000000000000002 x10: 00000000000000ff x9 : 0000000000000000 [ 1.582503] x8 : 0000000000000000 x7 : 7f7f7f7f7f7f7f7f x6 : 43485e525851ff30 [ 1.583140] x5 : fff00000ff6e9030 x4 : fff00000ff6e8f80 x3 : 0000000000000000 [ 1.583780] x2 : 0000000000000000 x1 : 0000000000000002 x0 : 0000000000000000 [ 1.584526] Call trace: [ 1.584945] teardown_hyp_mode+0xe4/0x180 (P) [ 1.585578] init_hyp_mode+0x920/0x994 [ 1.586005] kvm_arm_init+0xb4/0x25c [ 1.586387] do_one_initcall+0xe0/0x258 [ 1.586819] do_initcall_level+0xa0/0xd4 [ 1.587224] do_initcalls+0x54/0x94 [ 1.587606] do_basic_setup+0x1c/0x28 [ 1.587998] kernel_init_freeable+0xc8/0x130 [ 1.588409] kernel_init+0x20/0x1a4 [ 1.588768] ret_from_fork+0x10/0x20 [ 1.589568] Code: f875db48 8b1c0109 f100011f 9a8903e8 (f9463100) [ 1.590332] ---[ end trace 0000000000000000 ]--- As Quentin pointed, the order of free is also wrong, we need to free SVE state first before freeing the per CPU ptrs. I initially observed this on 6.12, but I could also repro in master. Signed-off-by: Mostafa Saleh <smostafa@google.com> Fixes: 66d5b53e20a6 ("KVM: arm64: Allocate memory mapped at hyp for host sve state in pKVM") Reviewed-by: Quentin Perret <qperret@google.com> Link: https://lore.kernel.org/r/20250625123058.875179-1-smostafa@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-06-26KVM: arm64: Adjust range correctly during host stage-2 faultsQuentin Perret
host_stage2_adjust_range() tries to find the largest block mapping that fits within a memory or mmio region (represented by a kvm_mem_range in this function) during host stage-2 faults under pKVM. To do so, it walks the host stage-2 page-table, finds the faulting PTE and its level, and then progressively increments the level until it finds a granule of the appropriate size. However, the condition in the loop implementing the above is broken as it checks kvm_level_supports_block_mapping() for the next level instead of the current, so pKVM may attempt to map a region larger than can be covered with a single block. This is not a security problem and is quite rare in practice (the kvm_mem_range check usually forces host_stage2_adjust_range() to choose a smaller granule), but this is clearly not the expected behaviour. Refactor the loop to fix the bug and improve readability. Fixes: c4f0935e4d95 ("KVM: arm64: Optimize host memory aborts") Signed-off-by: Quentin Perret <qperret@google.com> Link: https://lore.kernel.org/r/20250625105548.984572-1-qperret@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-06-26KVM: arm64: nv: Fix MI line level calculation in vgic_v3_nested_update_mi()Wei-Lin Chang
The state of the vcpu's MI line should be asserted when its ICH_HCR_EL2.En is set and ICH_MISR_EL2 is non-zero. Using bitwise AND (&=) directly for this calculation will not give us the correct result when the LSB of the vcpu's ICH_MISR_EL2 isn't set. Correct this by directly computing the line level with a logical AND operation. Signed-off-by: Wei-Lin Chang <r09922117@csie.ntu.edu.tw> Link: https://lore.kernel.org/r/20250625084709.3968844-1-r09922117@csie.ntu.edu.tw [maz: drop the level check from the original code] Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-06-25arm64: dts: qcom: sm6115: add debug UART pinsBartosz Golaszewski
We should not rely on the bootloader to set up the pinmux of the debug UART port. Let's add pin definitions for uart4 to tlmm and bind them to the relevant device node. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20250625152839.193672-1-brgl@bgdev.pl Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-25arm64: dts: exynos5433: Align i2c-gpio node names with dtschemaKrzysztof Kozlowski
New dtschema v2025.6 enforces different naming on I2C nodes thus new dtbs_check warnings appeared for I2C GPIO nodes: exynos5433-tm2.dtb: i2c-gpio-0 (i2c-gpio): $nodename:0: 'i2c-gpio-0' does not match '^i2c(@.+|-[a-z0-9]+)?$' exynos5433-tm2.dtb: i2c-gpio-0 (i2c-gpio): Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'amplifier@31' were unexpected) Rename the nodes to a generic i2c-[0-9]+ style with numbers continuing the SoC I2C controller indexing (3 controllers) for simplicity and obviousness, even if the SoC I2C controller is not enabled on given board. The names anyway would not conflict with SoC ones because of unit addresses. Verified with comparing two fdt (after fdtdump). Reported-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Closes: https://lore.kernel.org/all/aCtD7BH5N_uPGkq7@shikoro/ Link: https://lore.kernel.org/r/20250612095549.77954-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-23KVM: Fold kvm_arch_irqfd_route_changed() into kvm_arch_update_irqfd_routing()Sean Christopherson
Fold kvm_arch_irqfd_route_changed() into kvm_arch_update_irqfd_routing(). Calling arch code to know whether or not to call arch code is absurd. Reviewed-by: Oliver Upton <oliver.upton@linux.dev> Link: https://lore.kernel.org/r/20250611224604.313496-35-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-06-23KVM: Don't WARN if updating IRQ bypass route failsSean Christopherson
Don't bother WARNing if updating an IRTE route fails now that vendor code provides much more precise WARNs. The generic WARN doesn't provide enough information to actually debug the problem, and has obviously done nothing to surface the myriad bugs in KVM x86's implementation. Drop all of the associated return code plumbing that existed just so that common KVM could WARN. Link: https://lore.kernel.org/r/20250611224604.313496-34-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-06-22Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds
Pull kvm fixes from Paolo Bonzini: "ARM: - Fix another set of FP/SIMD/SVE bugs affecting NV, and plugging some missing synchronisation - A small fix for the irqbypass hook fixes, tightening the check and ensuring that we only deal with MSI for both the old and the new route entry - Rework the way the shadow LRs are addressed in a nesting configuration, plugging an embarrassing bug as well as simplifying the whole process - Add yet another fix for the dreaded arch_timer_edge_cases selftest RISC-V: - Fix the size parameter check in SBI SFENCE calls - Don't treat SBI HFENCE calls as NOPs x86 TDX: - Complete API for handling complex TDVMCALLs in userspace. This was delayed because the spec lacked a way for userspace to deny supporting these calls; the new exit code is now approved" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: TDX: Exit to userspace for GetTdVmCallInfo KVM: TDX: Handle TDG.VP.VMCALL<GetQuote> KVM: TDX: Add new TDVMCALL status code for unsupported subfuncs KVM: arm64: VHE: Centralize ISBs when returning to host KVM: arm64: Remove cpacr_clear_set() KVM: arm64: Remove ad-hoc CPTR manipulation from kvm_hyp_handle_fpsimd() KVM: arm64: Remove ad-hoc CPTR manipulation from fpsimd_sve_sync() KVM: arm64: Reorganise CPTR trap manipulation KVM: arm64: VHE: Synchronize CPTR trap deactivation KVM: arm64: VHE: Synchronize restore of host debug registers KVM: arm64: selftests: Close the GIC FD in arch_timer_edge_cases KVM: arm64: Explicitly treat routing entry type changes as changes KVM: arm64: nv: Fix tracking of shadow list registers RISC-V: KVM: Don't treat SBI HFENCE calls as NOPs RISC-V: KVM: Fix the size parameter check in SBI SFENCE calls
2025-06-21arm64: dts: rockchip: add DTs for Firefly ROC-RK3588S-PCHsun Lai
The Firefly ROC-RK3588S-PC is a SBC based on the Rockchip RK3588s SoC. Link: https://wiki.t-firefly.com/en/Station-M3/index.html The device contains the following hardware that is tested/working: - 32 or 64GB eMMC - SDMMC card slot - Realtek USB WiFi 5/BT - NVME 2242 socket - 4 or 8GB of RAM - RTL8211 GbE - USB 3.0 port - USB 2.0 port - HDMI port Signed-off-by: Hsun Lai <i@chainsx.cn> Link: https://lore.kernel.org/r/20250609113044.8846-3-i@chainsx.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-21arm64: dts: rockchip: Enable GPU on Radxa E20CJonas Karlman
Enable the Mali-450 MP2 GPU on the Radxa E20C. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20250518225418.682182-4-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-21arm64: dts: rockchip: Add GPU node for RK3528Jonas Karlman
Add a GPU node and a opp-table for the Mali-450 MP2 in the RK3528 SoC. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20250518225418.682182-3-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-21arm64: dts: ti: k3-am642-evm-pcie0-ep: Add boot phase tag to "pcie0_ep"Hrushikesh Salunke
AM64X SoC has one instance of PCIe which is PCIe0. To support PCIe boot on AM64X SoC, PCIe0 needs to be in endpoint mode and it needs to be functional at all stages of PCIe boot process. Thus add the "bootph-all" boot phase tag to "pcie0_ep" device tree node. Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com> Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com> Link: https://lore.kernel.org/r/20250610054920.2395509-1-h-salunke@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-06-21arm64: dts: ti: k3-j722s-main: Add audio-refclk0 nodeMichael Walle
Add the node for the AUDIO_EXT_REFCLK0 clock output. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20250618090724.1917731-1-mwalle@kernel.org Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-06-21arm64: dts: ti: k3-am62p-j722s: fix pinctrl-single sizeMichael Walle
Pinmux registers ends at 0x000f42ac (including). Thus, the size argument of the pinctrl-single node has to be 0x2b0. Fix it. This will fix the following error: pinctrl-single f4000.pinctrl: mux offset out of range: 0x2ac (0x2ac) Fixes: 29075cc09f43 ("arm64: dts: ti: Introduce AM62P5 family of SoCs") Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20250618065239.1904953-1-mwalle@kernel.org Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-06-21arm64: dts: ti: k3-am62a7-sk: Describe the SPI NANDMiquel Raynal
Describe the octal SPI NAND available on the low-power starter kit. The pinctrl configuration comes from TI fork. With the current mainline tree, we currently get the following performances: eraseblock write speed is 7507 KiB/s eraseblock read speed is 15802 KiB/s page write speed is 7551 KiB/s page read speed is 15609 KiB/s 2 page write speed is 7551 KiB/s 2 page read speed is 15609 KiB/s erase speed is 284444 KiB/s 2x multi-block erase speed is 512000 KiB/s Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20250613182356.1272642-1-miquel.raynal@bootlin.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-06-21arm64: dts: ti: k3-j721s2-main: Add McASP nodesJayesh Choudhary
Add McASP 0-4 instances and keep them disabled because several required properties are missing as they are board specific. Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Link: https://lore.kernel.org/r/20250604104656.38752-2-j-choudhary@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-06-21arm64: dts: ti: k3-am62p-verdin: Enable pull-ups on I2C_3_HDMIEmanuele Ghidoli
Enable internal bias pull-ups on the SoC-side I2C_3_HDMI that do not have external pull resistors populated on the SoM. This ensures proper default line levels. Fixes: 87f95ea316ac ("arm64: dts: ti: Add Toradex Verdin AM62P") Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20250529102601.452859-1-ghidoliemanuele@gmail.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-06-21arm64: dts: ti: k3-am62-verdin: Enable pull-ups on I2C busesEmanuele Ghidoli
Enable internal bias pull-ups on the SoC-side I2C buses that do not have external pull resistors populated on the SoM. This ensures proper default line levels. Cc: stable@vger.kernel.org Fixes: 316b80246b16 ("arm64: dts: ti: add verdin am62") Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20250528110741.262336-1-ghidoliemanuele@gmail.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-06-21arm64: dts: ti: k3-am642-phyboard-electra: Fix PRU-ICSSG Ethernet portsWadim Egorov
For the ICSSG PHYs to operate correctly, a 25 MHz reference clock must be supplied on CLKOUT0. Previously, our bootloader configured this clock, which is why the PRU Ethernet ports appeared to work, but the change never made it into the device tree. Add clock properties to make EXT_REFCLK1.CLKOUT0 output a 25MHz clock. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Fixes: 87adfd1ab03a ("arm64: dts: ti: am642-phyboard-electra: Add PRU-ICSSG nodes") Link: https://lore.kernel.org/r/20250521053339.1751844-1-w.egorov@phytec.de Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-06-21arm64: Kconfig.platforms: remove useless select for ARCH_K3Guillaume La Roque
After patch done on TI_MESSAGE_MANAGER[1] and TI_SCI_PROTOCOL[2] driver select on ARCH_K3 are not needed anymore. Select MAILBOX by default is not needed anymore[3], PM_GENERIC_DOMAIN if PM was enabled by default so not needed. Remove it and give possibility to enable this driver in modules. [1] https://lore.kernel.org/all/20180828005311.8529-1-nm@ti.com/ [2] https://lore.kernel.org/all/20250220-ti-firmware-v2-1-ff26883c6ce9@baylibre.com/ [3] https://lore.kernel.org/all/20250507135213.g6li6ufp3cosxoys@stinging/ Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Link: https://lore.kernel.org/r/20250519-kconfig-v2-1-56c1a0137a0f@baylibre.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-06-20KVM: Pass new routing entries and irqfd when updating IRTEsSean Christopherson
When updating IRTEs in response to a GSI routing or IRQ bypass change, pass the new/current routing information along with the associated irqfd. This will allow KVM x86 to harden, simplify, and deduplicate its code. Since adding/removing a bypass producer is now conveniently protected with irqfds.lock, i.e. can't run concurrently with kvm_irq_routing_update(), use the routing information cached in the irqfd instead of looking up the information in the current GSI routing tables. Opportunistically convert an existing printk() to pr_info() and put its string onto a single line (old code that strictly adhered to 80 chars). Link: https://lore.kernel.org/r/20250611224604.313496-5-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-06-20KVM: arm64: WARN if unmapping a vLPI fails in any pathSean Christopherson
When unmapping a vLPI, WARN if nullifying vCPU affinity fails, not just if failure occurs when freeing an ITE. If undoing vCPU affinity fails, then odds are very good that vLPI state tracking has has gotten out of whack, i.e. that KVM and the GIC disagree on the state of an IRQ/vLPI. At best, inconsistent state means there is a lurking bug/flaw somewhere. At worst, the inconsistency could eventually be fatal to the host, e.g. if an ITS command fails because KVM's view of things doesn't match reality/hardware. Note, only the call from kvm_arch_irq_bypass_del_producer() by way of kvm_vgic_v4_unset_forwarding() doesn't already WARN. Common KVM's kvm_irq_routing_update() WARNs if kvm_arch_update_irqfd_routing() fails. For that path, if its_unmap_vlpi() fails in kvm_vgic_v4_unset_forwarding(), the only possible causes are that the GIC doesn't have a v4 ITS (from its_irq_set_vcpu_affinity()): /* Need a v4 ITS */ if (!is_v4(its_dev->its)) return -EINVAL; guard(raw_spinlock)(&its_dev->event_map.vlpi_lock); /* Unmap request? */ if (!info) return its_vlpi_unmap(d); or that KVM has gotten out of sync with the GIC/ITS (from its_vlpi_unmap()): if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) return -EINVAL; All of the above failure scenarios are warnable offences, as they should never occur absent a kernel/KVM bug. Acked-by: Oliver Upton <oliver.upton@linux.dev> Link: https://lore.kernel.org/all/aFWY2LTVIxz5rfhh@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-06-20Merge tag 'arm64-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: "There's nothing major (even the vmalloc one is just suppressing a potential warning) but all worth having, nonetheless. - Suppress KASAN false positive in stack unwinding code - Drop redundant reset of the GCS state on exec() - Don't try to descend into a !present PMD when creating a huge vmap() entry at the PUD level - Fix a small typo in the arm64 booting Documentation" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64/ptrace: Fix stack-out-of-bounds read in regs_get_kernel_stack_nth() arm64/gcs: Don't call gcs_free() during flush_gcs() arm64: Restrict pagetable teardown to avoid false warning docs: arm64: Fix ICC_SRE_EL2 register typo in booting.rst
2025-06-20arm64: dts: mediatek: mt8370: Enable gpu supportLouis-Alexis Eyraud
Add a new gpu node in mt8370.dtsi to enable support for the ARM Mali G57 MC2 GPU (Valhall-JM) found on the MT8370 SoC, using the Panfrost driver. On a Mediatek Genio 510 EVK board, the panfrost driver probed with the following message: ``` panfrost 13000000.gpu: clock rate = 390000000 panfrost 13000000.gpu: mali-g57 id 0x9093 major 0x0 minor 0x0 status 0x0 panfrost 13000000.gpu: features: 00000000,000019f7, issues: 00000003, 80000400 panfrost 13000000.gpu: Features: L2:0x08130206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7 panfrost 13000000.gpu: shader_present=0x5 l2_present=0x1 [drm] Initialized panfrost 1.3.0 for 13000000.gpu on minor 0 ``` Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> Signed-off-by: Steven Price <steven.price@arm.com> Link: https://lore.kernel.org/r/20250509-mt8370-enable-gpu-v6-5-2833888cb1d3@collabora.com
2025-06-20arm64: stacktrace: Implement arch_stack_walk_reliable()Song Liu
Add arch_stack_walk_reliable(), which will be used during kernel live patching to detect when threads have completed executing old versions of functions. Note that arch_stack_walk_reliable() only needs to guarantee that it returns an error code when it cannot provide a reliable stacktrace. It is not required to provide a reliable stacktrace in all scenarios so long as it returns said error code. At present we can only reliably unwind up to an exception boundary. In future we should be able to improve this with additional data from the compiler (e.g. sframe). Signed-off-by: Song Liu <song@kernel.org> Link: https://lore.kernel.org/r/20250320171559.3423224-2-song@kernel.org [ Mark: Simplify logic, clarify commit message ] Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Andrea della Porta <andrea.porta@suse.com> Cc: Breno Leitao <leitao@debian.org> Cc: Josh Poimboeuf <jpoimboe@kernel.org> Cc: Miroslav Benes <mbenes@suse.cz> Cc: Petr Mladek <pmladek@suse.com> Cc: Song Liu <song@kernel.org> Cc: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20250521111000.2237470-3-mark.rutland@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2025-06-20arm64: stacktrace: Check kretprobe_find_ret_addr() return valueMark Rutland
If kretprobe_find_ret_addr() fails to find the original return address, it returns 0. Check for this case so that a reliable stacktrace won't silently ignore it. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Andrea della Porta <andrea.porta@suse.com> Cc: Breno Leitao <leitao@debian.org> Cc: Josh Poimboeuf <jpoimboe@kernel.org> Cc: Miroslav Benes <mbenes@suse.cz> Cc: Petr Mladek <pmladek@suse.com> Cc: Song Liu <song@kernel.org> Cc: Will Deacon <will@kernel.org> Reviewed-and-tested-by: Song Liu <song@kernel.org> Link: https://lore.kernel.org/r/20250521111000.2237470-2-mark.rutland@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2025-06-20arm64/module: Use text-poke API for late relocations.Dylan Hatch
To enable late module patching, livepatch modules need to be able to apply some of their relocations well after being loaded. In this scenario however, the livepatch module text and data is already RX-only, so special treatment is needed to make the late relocations possible. To do this, use the text-poking API for these late relocations. This patch is partially based off commit 88fc078a7a8f6 ("x86/module: Use text_poke() for late relocations"). Signed-off-by: Dylan Hatch <dylanbhatch@google.com> Acked-by: Song Liu <song@kernel.org> Acked-by: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20250603223417.3700218-1-dylanbhatch@google.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2025-06-20arm64: dts: rockchip: support camera module on Haikou Video Demo on PX30 ↵Quentin Schulz
Ringneck The Haikou Video Demo adapter has a proprietary connector for a camera module which has an OV5675 camera sensor and a companion DW9714 focus lens driver. This adds support for the camera module on PX30 Ringneck module fitted on a Haikou devkit with the Haikou Video Demo adapter. Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20250610-ringneck-haikou-video-demo-cam-v2-3-de1bf87e0732@cherry.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-20arm64: dts: rockchip: add label to first port of ISP on px30Quentin Schulz
This will make it slightly easier for Device Trees (and Overlays) to link the ISP controller to a video input such as a CSI camera while also bringing it closer to what's been done already for the DSI controller. Suggested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20250610-ringneck-haikou-video-demo-cam-v2-2-de1bf87e0732@cherry.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-20arm64: dts: rockchip: fix endpoint dtc warning for PX30 ISPQuentin Schulz
dtc complains with the following message for DTSes which use the ISP: arch/arm64/boot/dts/rockchip/px30.dtsi:1272.19-1276.6: Warning (graph_child_address): /isp@ff4a0000/ports/port@0: graph node has single child node 'endpoint@0', #address-cells/#size-cells are not necessary Typically, it is expected from the device DTS(I) to update the SoC DTSI nodes if they have more than one endpoint, so let's assume there's only one endpoint in port@0 by default, instead of forcing board DTS(I)s to /delete-property/ address-cells and size-cells to make dtc happy. Because PX30 PP1516/EVB's endpoint@0 is the only endpoint and considering its parent node now has no address-cells property, dtc complains (same messages for PX30 EVB): arch/arm64/boot/dts/rockchip/px30-pp1516.dtsi:447.29-451.6: Warning (avoid_default_addr_size): /isp@ff4a0000/ports/port@0/endpoint@0: Relying on default #address-cells value arch/arm64/boot/dts/rockchip/px30-pp1516.dtsi:447.29-451.6: Warning (avoid_default_addr_size): /isp@ff4a0000/ports/port@0/endpoint@0: Relying on default #size-cells value arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3146w-a2.dtb: Warning (avoid_unnecessary_addr_size): Failed prerequisite 'avoid_default_addr_size' arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3146w-a2.dtb: Warning (unique_unit_address_if_enabled): Failed prerequisite 'avoid_default_addr_size' arch/arm64/boot/dts/rockchip/px30-pp1516.dtsi:447.29-451.6: Warning (graph_endpoint): /isp@ff4a0000/ports/port@0/endpoint@0: graph node '#address-cells' is -1, must be 1 arch/arm64/boot/dts/rockchip/px30-pp1516.dtsi:447.29-451.6: Warning (graph_endpoint): /isp@ff4a0000/ports/port@0/endpoint@0: graph node '#size-cells' is -1, must be 0 arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3146w-a2.dtb: Warning (graph_child_address): Failed prerequisite 'graph_endpoint' so we fix that by removing the reg property. dtc still complains (same messages for PX30 EVB): arch/arm64/boot/dts/rockchip/px30-pp1516.dtsi:447.29-450.6: Warning (unit_address_vs_reg): /isp@ff4a0000/ports/port@0/endpoint@0: node has a unit name, but no reg or ranges property so we also remove the @0 suffix off the node name. Fixes: 8df7b4537dfb ("arm64: dts: rockchip: add isp node for px30") Fixes: 474a77395be2 ("arm64: dts: rockchip: hook up camera on px30-evb") Fixes: 56198acdbf0d ("arm64: dts: rockchip: add px30-pp1516 base dtsi and board variants") Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20250610-ringneck-haikou-video-demo-cam-v2-1-de1bf87e0732@cherry.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>