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2019-11-01ARM: dts: aspeed: cmm: Use common dtsiTao Ren
Simplify the CMM device tree by using the common dtsi. In addition this enables the second firmware flash and the emmc device in slot #0. Signed-off-by: Tao Ren <taoren@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: Common dtsi for Facebook AST2500 Network BMCsTao Ren
This common descirption is included by all Facebook AST2500 Network BMC platforms to minimize duplicated device entries across Facebook Network BMC device trees. Signed-off-by: Tao Ren <taoren@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: rainier: gpio-keys for PSU presenceBrandon Wyman
Add in a gpio-keys section to the Rainier device tree source, add in the power supply presence GPIOs. Signed-off-by: Brandon Wyman <bjwyman@gmail.com> Reviewed-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: rainier: Fix i2c eeprom sizeJinu Thomas
Fix the size of the Proc VRM card's eeprom used for vpd storage. The size is changed from 64Kbit to 128Kbit. Signed-off-by: Jinu Joy Thomas <jinu.joy.thomas@in.ibm.com> Reviewed-by: Santosh Puranik <santosh.puranik.ibm@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: tacoma: Hog LPC pinmuxAndrew Jeffery
Requesting pinmux configuration is done at driver probe time. The LPC IP is composed of many sub-devices, each with their own driver, and no driver exists for the entire IP block. Avoid having each sub-device request the LPC pinmux by just hogging it in the pinctrl node. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: rainier: Enable VUART1Brad Bishop
Like most OpenPower machines the VUART is expected to be at /dev/ttyS5 for communication with the host over LPC. Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: rainier: Add i2c eepromsJinu Thomas
Added eeproms for the below VPD devices - BMC - TPM - System Planar - DCM 0 VRM - DCM 1 VRM - Base Op panel - Lcd Op panel - DASD (All) - PCIe Cards (All) Signed-off-by: Jinu Joy Thomas <jinu.joy.thomas@in.ibm.com> Reviewed-by: Santosh Puranik <santosh.puranik.ibm@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: tacoma: Use 64MB for firmware memoryJoel Stanley
OpenBMC requires a window the same size as the image being loaded. Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: tacoma: Add host FSI descriptionJoel Stanley
This adds the description of the Power9 CPUs that are attached to the BMC. Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: ast2600evb: Enable UART workaroundJoel Stanley
The UART has an issue on A0 that can be worked around by using the Synopsis driver. Tested-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: tacoma: Add UART1 and workaroundJoel Stanley
The UARTs on the AST2600 A0 have a known issue that can be worked around by using the Synopsys driver. Tested-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Add remaining UARTsJoel Stanley
The AST2600 has five UARTs. Add UART 1 to 4. Tested-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Fix i2c clock sourceJoel Stanley
The upstream clock for the I2C buses is APB2. Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: Add RCLK to MAC clocks for RMII interfacesAndrew Jeffery
We need to ungate RCLK on AST2500- and AST2600-based platforms for RMII to function. RMII interfaces are commonly used for NCSI. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: sunxi: h3/h5: add missing uart2 rts/cts pinsKarl Palsson
uart1 and uart3 had existing pin definitions for the rts/cts pairs. Add definitions for uart2 as well. Signed-off-by: Karl Palsson <karlp@tweak.net.au> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01ARM: configs: sunxi: Enable MICREL_PHYPriit Laes
Include support for Micrel KSZ9031 PHY driver in sunxi_defconfig, which fixes issues of link not coming up at boot time with certain link partners. Micrel KSZ9031 PHY chip is used on Olimex A20-OLinuXino-LIME2 boards. The errata fix itself has been implemented in commit "3aed3e2a143c96: net: phy: micrel: add Asym Pause workaround" Signed-off-by: Priit Laes <plaes@plaes.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01ARM: configs: sunxi: add new Allwinner crypto optionsCorentin Labbe
This patch adds the new Allwinner crypto configs to sunxi_defconfig Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01ARM: dts: sun9i: a80: Add Security System nodeCorentin Labbe
The Security System is a hardware cryptographic accelerator that support AES/MD5/SHA1/DES/3DES/PRNG/RSA algorithms. It could be found on Allwinner SoC A80 and A83T This patch adds it on the Allwinner A80 SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01ARM: dts: sun8i: a83t: Add Security System nodeCorentin Labbe
The Security System is a hardware cryptographic accelerator that support AES/MD5/SHA1/DES/3DES/PRNG/RSA algorithms. It could be found on Allwinner SoC A80 and A83T This patch adds it on the Allwinner A83T SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01ARM: dts: sun8i: H3: Add Crypto Engine nodeCorentin Labbe
The Crypto Engine is a hardware cryptographic accelerator that supports many algorithms. It could be found on most Allwinner SoCs. This patch enables the Crypto Engine on the Allwinner H3 SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01ARM: dts: sun8i: R40: add crypto engine nodeCorentin Labbe
The Crypto Engine is a hardware cryptographic offloader that supports many algorithms. It could be found on most Allwinner SoCs. This patch enables the Crypto Engine on the Allwinner R40 SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01crypto: skcipher - rename the crypto_blkcipher module and kconfig optionEric Biggers
Now that the blkcipher algorithm type has been removed in favor of skcipher, rename the crypto_blkcipher kernel module to crypto_skcipher, and rename the config options accordingly: CONFIG_CRYPTO_BLKCIPHER => CONFIG_CRYPTO_SKCIPHER CONFIG_CRYPTO_BLKCIPHER2 => CONFIG_CRYPTO_SKCIPHER2 Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-01ARM: dts: aspeed: tacoma: Enable FMC and SPI devicesJoel Stanley
Tacoma has two SPI flash devices attached to the FMC, and one on the SPI controller. Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: rainier: Add i2c devicesBrad Bishop
Add fan controllers, regulators, temperature sensors, power supplies and regulators. Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Describe FSI mastersJoel Stanley
The ast2600 has two FSI masters on the APB. Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: Add "spi-max-frequency" propertyCédric Le Goater
Keep the FMC controller chips at a safe 50 MHz rate and use 100 MHz for the PNOR on the machines using a AST2500 SoC. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: Migrate away from aspeed, g[45].* compatiblesAndrew Jeffery
Use the SoC-specific compatible strings instead. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: vesnin: Add power_green ledAlexander Filippov
Adds a new power_green led to show the host state. Signed-off-by: Alexander Filippov <a.filippov@yadro.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: tacoma: Add gpio-key definitionsEddie James
Add gpio-keys for various signals on Tacoma. Signed-off-by: Eddie James <eajames@linux.ibm.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: ast2600-evb: Add pinmux properties for enabled MACsAndrew Jeffery
All 2600-evb MACs use RGMII/MDIO. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Add pinctrl properties to MDIO nodesAndrew Jeffery
This way enabling the MDIO controllers automatically requests the right pinmux configuration. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Fix EMMC function in pinctrl dtsiAndrew Jeffery
The binding was updated to better reflect the intended use of the hardware and the existing function/groups for SD3 were dropped. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: ast2600evb: Use custom flash layoutJoel Stanley
The AST2600 u-boot and kernel images have outgrown the OpenBMC layout. While BMC machines use 128MB SPI NOR chips, we only have 64MB on the EVB so use a layout that has a smaller region for the ro and rw filesystems. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: ast2600-evb: Enable FMC and SPI devicesCédric Le Goater
Signed-off-by: Cédric Le Goater <clg@kaod.org> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: tacoma: Enable FMC and SPI devicesJoel Stanley
Tacoma has two SPI flash devices attached to the FMC, and one on the SPI controller. Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: rainier: Enable FMC and SPI devicesCédric Le Goater
Signed-off-by: Cédric Le Goater <clg@kaod.org> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: rainier: Add i2c devicesBrad Bishop
Add fan controllers, regulators, temperature sensors, power supplies and regulators. Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: rainier: Add mac devicesBrad Bishop
Rainier contains two NCSI network devices. Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: Add Rainier systemBrad Bishop
Rainier is a new IBM server with POWER host processors and an AST2600 BMC. Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: Add 128MiB OpenBMC flash layoutBrad Bishop
This is an alternate layout used by OpenBMC systems that require more space on the BMC's flash. In addition to more space for the rootfs, it supports a larger u-boot and Linux kernel FIT image. The division of space is as follows: u-boot + env: 1MB kernel/FIT: 9MB rwfs: 86MB rofs: 32MB Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: fp5280g2: Add LED configurationChicago Duan
Change BMC init-ok from GPIO to LED, which needs to blink when BMC initialization is complete. Use TAB to align some lines. Signed-off-by: Chicago Duan <duanzhijia01@inspur.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: tacoma: Enable I2C bussesEddie James
Enable all the I2C busses on Tacoma and add the I2C slave devices that exist on the busses. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: Add Tacoma machineJoel Stanley
This is an AST2600 based BMC card for a Power9 system. Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Add FMC and SPI devicesCédric Le Goater
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Add lpc devicesBrad Bishop
Everything is the same as G5, except the devices have their own interrupt now. Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Add VUART descriptionsJoel Stanley
The AST2600 has two VUART devices. Reviewed-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Add i2c busesJoel Stanley
The AST2600 has 16 I2C buses each with their own global IRQ line. Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Add gpio devicesRashmica Gupta
The AST2600 has 208 normal GPIO pins and 36 1.8V GPIOs. Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: ast2600-evb: eMMC configurationAndrew Jeffery
Enable the eMMC controller and limit it to 52MHz to avoid the host controller reporting bus error conditions. Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-10-31ARM: 8928/1: ARM_ERRATA_775420: Spelling s/date/data/Geert Uytterhoeven
Caching dates is never a good idea ;-) Fixes: 7253b85cc62d6ff8 ("ARM: 7541/1: Add ARM ERRATA 775420 workaround") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
generated by cgit (git 2.34.1) at 2025-09-18 23:14:41 +0000