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2020-01-17KVM: PPC: Book3S: Replace current->mm by kvm->mmLeonardo Bras
Given that in kvm_create_vm() there is: kvm->mm = current->mm; And that on every kvm_*_ioctl we have: if (kvm->mm != current->mm) return -EIO; I see no reason to keep using current->mm instead of kvm->mm. By doing so, we would reduce the use of 'global' variables on code, relying more in the contents of kvm struct. Signed-off-by: Leonardo Bras <leonardo@linux.ibm.com> Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2020-01-17KVM: PPC: Remove set but not used variable 'ra', 'rs', 'rt'zhengbin
Fixes gcc '-Wunused-but-set-variable' warning: arch/powerpc/kvm/emulate_loadstore.c: In function kvmppc_emulate_loadstore: arch/powerpc/kvm/emulate_loadstore.c:87:6: warning: variable ra set but not used [-Wunused-but-set-variable] arch/powerpc/kvm/emulate_loadstore.c: In function kvmppc_emulate_loadstore: arch/powerpc/kvm/emulate_loadstore.c:87:10: warning: variable rs set but not used [-Wunused-but-set-variable] arch/powerpc/kvm/emulate_loadstore.c: In function kvmppc_emulate_loadstore: arch/powerpc/kvm/emulate_loadstore.c:87:14: warning: variable rt set but not used [-Wunused-but-set-variable] They are not used since commit 2b33cb585f94 ("KVM: PPC: Reimplement LOAD_FP/STORE_FP instruction mmio emulation with analyse_instr() input") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2020-01-16Merge tag 'armsoc-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Olof Johansson: "I've been sitting on these longer than I meant, so the patch count is a bit higher than ideal for this part of the release. There's also some reverts of double-applied patches that brings the diffstat up a bit. With that said, the biggest changes are: - Revert of duplicate i2c device addition on two Aspeed (BMC) Devicetrees. - Move of two device nodes that got applied to the wrong part of the tree on ASpeed G6. - Regulator fix for Beaglebone X15 (adding 12/5V supplies) - Use interrupts for keys on Amlogic SM1 to avoid missed polls In addition to that, there is a collection of smaller DT fixes: - Power supply assignment fixes for i.MX6 - Fix of interrupt line for magnetometer on i.MX8 Librem5 devkit - Build fixlets (selects) for davinci/omap2+ - More interrupt number fixes for Stratix10, Amlogic SM1, etc. - ... and more similar fixes across different platforms And some non-DT stuff: - optee fix to register multiple shared pages properly - Clock calculation fixes for MMP3 - Clock fixes for OMAP as well" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (42 commits) MAINTAINERS: Add myself as the co-maintainer for Actions Semi platforms ARM: dts: imx7: Fix Toradex Colibri iMX7S 256MB NAND flash support ARM: dts: imx6sll-evk: Remove incorrect power supply assignment ARM: dts: imx6sl-evk: Remove incorrect power supply assignment ARM: dts: imx6sx-sdb: Remove incorrect power supply assignment ARM: dts: imx6qdl-sabresd: Remove incorrect power supply assignment ARM: dts: imx6q-icore-mipi: Use 1.5 version of i.Core MX6DL ARM: omap2plus: select RESET_CONTROLLER ARM: davinci: select CONFIG_RESET_CONTROLLER ARM: dts: aspeed: rainier: Fix fan fault and presence ARM: dts: aspeed: rainier: Remove duplicate i2c busses ARM: dts: aspeed: tacoma: Remove duplicate flash nodes ARM: dts: aspeed: tacoma: Remove duplicate i2c busses ARM: dts: aspeed: tacoma: Fix fsi master node ARM: dts: aspeed-g6: Fix FSI master location ARM: dts: mmp3: Fix the TWSI ranges clk: mmp2: Fix the order of timer mux parents ARM: mmp: do not divide the clock rate arm64: dts: rockchip: Fix IR on Beelink A1 optee: Fix multi page dynamic shm pool alloc ...
2020-01-16Merge tag 'omap-for-v5.6/dt-part2-signed' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt More dts changes for omaps for v5.6 merge window Add basic support for first generation Amazon omap3-echo. This got applied rather late as we discussed how to deal with SoC variants with some accelerators unaccessible, and eventually ended up setting up few more SoC specific dtsi files. Eventually we'll need to also detect the disabled accelerators on driver init, but more patching is needed for that. * tag 'omap-for-v5.6/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: Add omap3-echo ARM: dts: Add dtsi files for AM3703, AM3715 and DM3725 Link: https://lore.kernel.org/r/pull-1579200367-372444@atomide.com-4 Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'omap-for-v5.6/soc-smc-signed' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc SMC related changes for omaps for v5.6 merge window A series of changes to use optee SMC calls if optee is initialized by the bootloader. Based on the discussions on LAKML in mailing list thread "arm_smccc_smc as generic smc interface?" we don't want to add more quirk handling to arm_smccc_smc() and want to handle it locally instead. * tag 'omap-for-v5.6/soc-smc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: sleep43xx: Call secure suspend/resume handlers ARM: OMAP2+: Use ARM SMC Calling Convention when OP-TEE is available ARM: OMAP2+: Introduce check for OP-TEE in omap_secure_init() ARM: OMAP2+: Add omap_secure_init callback hook for secure initialization Link: https://lore.kernel.org/r/pull-1579200367-372444@atomide.com-2 Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16arm64: defconfig: Enable Actions Semi specific driversManivannan Sadhasivam
Since the Actions Semi platform has been enabled in defconfig, let's also enable the relevant device drivers there. Link: https://lore.kernel.org/r/20200114084348.25659-3-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16arm64: dts: bitmain: Source common clock for UART controllersManivannan Sadhasivam
Remove fixed clock and source common clock for UART controllers. Link: https://lore.kernel.org/r/20200114040311.6599-3-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16arm64: dts: bitmain: Add clock controller support for BM1880 SoCManivannan Sadhasivam
Add clock controller support for Bitmain BM1880 SoC. Link: https://lore.kernel.org/r/20200114040311.6599-2-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'amlogic-dt' of ↵Olof Johansson
https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt ARM: dts: Amlogic updates for v5.6 - add DDR clock controller - GPU OPP updates * tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM: dts: meson8b: use the actual frequency for the GPU's 364MHz OPP ARM: dts: meson8: use the actual frequency for the GPU's 182.1MHz OPP ARM: dts: meson8b: fix the clock controller compatible string ARM: dts: meson8b: add the DDR clock controller ARM: dts: meson8: add the DDR clock controller ARM: dts: meson: provide the XTAL clock using a fixed-clock dt-bindings: clock: meson8b: add the clock inputs dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding Link: https://lore.kernel.org/r/7hwo9udi7m.fsf@baylibre.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'amlogic-dt64' of ↵Olof Johansson
https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt arm64: dts: Amlogic updates for v5.6 - new boards: libretech-pc (S912 and S905D versions) - new board: Videostrong KII Pro - A1: add reset controller * tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: meson: add audio fifo depths arm64: dts: meson: add libretech-pc boards support dt-bindings: arm: amlogic: add libretech-pc bindings arm64: dts: meson: gxl: add i2c C pins arm64: dts: meson-sm1: add video decoder compatible arm64: dts: meson-g12-common: add video decoder node arm64: dts: meson-gxbb: add support for Videostrong KII Pro dt-bindings: arm: amlogic: add Videostrong KII Pro bindings dt-bindings: Add vendor prefix for Videostrong arm64: dts: meson: a1: add pinctrl controller support arm64: dts: meson: add reset controller for Meson-A1 SoC Link: https://lore.kernel.org/r/7hsgkidi3k.fsf@baylibre.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'qcom-dts-for-5.6' of ↵Olof Johansson
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM dts updates for v5.6 * Add SAW L2 nodes to boot secondary cpus on IPQ40xx * Fix remaining IRQ_TYPE_NONE on APQ8084 * Update tsens node to new style * Add modem remoteproc node to MSM8974 * Move ADSP SMD edge into ADSP remoteproc node for MSM8974 * Add and enable wireless communication subsystem on MSM8974 and Fairphone 2 * Add MSM8974 interconnect provider nodes * Add MSM8974 OCMEM node * tag 'qcom-dts-for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: Add nodes for SMP boot in IPQ40xx ARM: dts: qcom: apq8084: Remove all instances of IRQ_TYPE_NONE ARM: dts: qcom: apq8084: Change tsens definition to new style ARM: dts: msm8974: Move ADSP smd edge to ADSP PIL ARM: dts: msm8974: Add modem remoteproc node ARM: dts: msm8974-FP2: Introduce the wcnss remoteproc node ARM: dts: msm8974: Introduce the wcnss remoteproc node ARM: dts: qcom: msm8974: add interconnect nodes ARM: dts: qcom: msm8974: add ocmem node Link: https://lore.kernel.org/r/20200113204448.GE3325@yoga Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'qcom-defconfig-for-5.6' of ↵Olof Johansson
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/defconfig Qualcomm ARM defconfig updates for v5.6 * Enable anx78xx HDMI bridge driver * Enable MSM8974 interconnect provider driver * tag 'qcom-defconfig-for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: qcom_defconfig: add anx78xx HDMI bridge support ARM: qcom_defconfig: add msm8974 interconnect support Link: https://lore.kernel.org/r/20200113204313.GC3325@yoga Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'qcom-arm64-for-5.6' of ↵Olof Johansson
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM64 DT updates for v5.6 * Align SDM845 firmware paths with linux-firmware * Make WiFi work on Dragonboard845c * Wire up wakeup controller for SDM845 * Critical thermal interrupt support for SDM845, MSM8996 and MSM8998 * Enable UFS for SM8150 * Add remoteproc enablers and nodes for SM8150 * Add CPUfreq for SM8150 * Add RPMH power-domain node for SM8150 * Cleanup and refactor MSM8996 dts structure * Add initial Inforce Computing IFC6640 dts * Increase MSM8996 core voltage * Fix MSM8996 USB phy settings * Add missing alias for BLSP UART in MSM8998 MTP * Add remoteproc nodes for ADSP, modem and sensor core for MSM8998 * Enable WiFI for MSM8998 * Introduce the SC7180 platform and the IDP development board * Add CPUfreq, QUPs, USB, remoteproc etc for SC7180 * Enable USB OTG for Dragonboard 410c * Add vibrator motor node for PM8916 * Properly specify APCS clocks for MSM8916 * Add CPR and HFPLL for QCS404 * Enable full CPUfreq (with AVS) for QCS404 * tag 'qcom-arm64-for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (88 commits) arm64: dts: qcom: sdm845: move gpu zap nodes to per-device dts arm64: dts: qcom: sm8150: Hard code rpmhpd constants arm64: dts: apq8096-db820c: Fix VDD core voltage arm64: dts: qcom: qcs404-evb: Set vdd_apc regulator in high power mode arm64: dts: qcom: msm8998-mtp: Add alias for blsp1_uart3 arm64: dts: qcom: sc7180: Add critical interrupt and cooling maps for TSENS in SC7180 arm64: dts: qcom: msm8996: Fix venus iommu nodename error arm64: dts: qcom: sdm845: add the ufs reset arm64: dts: qcom: sm8150: Fix UFS phy register size arm64: dts: qcom: sm8150-mtp: Add UFS gpio reset arm64: dts: qcom: qcs404: Add CPR and populate OPP table arm64: dts: qcom: qcs404: Add DVFS support arm64: dts: qcom: qcs404: Add the clocks for APCS mux/divider arm64: dts: qcom: qcs404: Add HFPLL node arm64: dts: qcom: msm8916: Add the clocks for the APCS mux/divider arm64: dts: qcom: sc7180: Add rpmh power-domain node arm64: dts: pm8004: Add SPMI regulator and add phandles to lsids arm64: dts: msm8998: thermal: Add critical interrupt support arm64: dts: msm8996: thermal: Add critical interrupt support arm64: dts: qcom: db845c: Move remoteproc firmware to sdm845 ... Link: https://lore.kernel.org/r/20200113204225.GB3325@yoga Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'qcom-arm64-defconfig-for-5.6' of ↵Olof Johansson
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/defconfig Qualcomm ARM64 defconfig updates for v5.6 * Enable NVMEM and OSM CPUfreq drivers * Enable CPR driver * Enable HFPLL driver * Enable ATH10k SNOC driver * Enable PMIC thermal driver * Enable wakeup controller driver * Enable watchdog driver * Enable PRNG driver * Enable SN65DSI86 DSI to DisplayPort bridge driver * Enable QCA Bluetooth driver * Enable Qualcomm SoCinfo driver * Enable SPI and QSPI drivers * Enable drivers providing remoteproc dependencies * tag 'qcom-arm64-defconfig-for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: defconfig: enable CONFIG_ARM_QCOM_CPUFREQ_NVMEM arm64: defconfig: enable CONFIG_QCOM_CPR arm64: defconfig: Enable HFPLL arm64: defconfig: Enable ATH10K_SNOC arm64: defconfig: Enable QCOM PMIC thermal arm64: defconfig: enable PDC interrupt controller for Qualcomm SDM845 arm64: defconfig: Enable Qualcomm watchdog driver arm64: defconfig: Enable Qualcomm pseudo rng arm64: defconfig: Enable SN65DSI86 display bridge arm64: defconfig: Enable QCA Bluetooth over UART arm64: defconfig: Enable Qualcomm CPUfreq HW driver arm64: defconfig: Enable Qualcomm socinfo driver arm64: defconfig: Enable Qualcomm SPI and QSPI controller arm64: defconfig: Enable Qualcomm remoteproc dependencies Link: https://lore.kernel.org/r/20200113204130.GA3325@yoga Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'at91-5.6-soc' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/soc AT91 SoC for 5.5 - Document new SoC: sam9x60 - rework sam9x60 Kconfig option * tag 'at91-5.6-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: Documentation: add sam9x60 product and datasheet ARM: at91: pm: use of_device_id array to find the proper shdwc node ARM: at91: pm: use SAM9X60 PMC's compatible ARM: debug-ll: select DEBUG_AT91_RM9200_DBGU for sam9x60 drivers: soc: atmel: select POWER_RESET_AT91_SAMA5D2_SHDWC for sam9x60 power: reset: Kconfig: select POWER_RESET_AT91_RESET for sam9x60 drivers: soc: atmel: move sam9x60 under its own config flag ARM: at91: pm: move SAM9X60's PM under its own SoC config flag ARM: at91: Kconfig: add config flag for SAM9X60 SoC ARM: at91: Kconfig: add sam9x60 pll config flag Link: https://lore.kernel.org/r/20200113161612.GA1358903@piout.net Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'at91-5.6-defconfig' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/defconfig AT91 defconfig for 5.6 - Add sam9x60 to at91_dt_defconfig * tag 'at91-5.6-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: configs: at91: enable config flags for sam9x60 SoC ARM: configs: at91: use savedefconfig Link: https://lore.kernel.org/r/20200113161033.GA1358651@piout.net Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'at91-5.6-dt-1' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt AT91 DT for 5.6 - Fix sama5d3 peripheral clock rate range - New boards: Overkiz Smartikz and Kizbox Mini, Microchip SAMA5D27 wlsom1-ek - sama5d2 sdmcc fixes * tag 'at91-5.6-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sama5d3: define clock rate range for tcb1 ARM: dts: at91: sama5d3: fix maximum peripheral clock rates ARM: dts: at91: nattis 2: remove unnecessary include ARM: dts: at91: add smartkiz support and a common kizboxmini dtsi file dt-bindings: arm: at91: Document Kizboxmini and Smartkiz boards binding ARM: dts: at91: rearrange kizbox dts using aliases nodes ARM: dts: at91: sama5d27_som1_ek: add the microchip,sdcal-inverted on sdmmc0 ARM: dts: at91: Reenable UART TX pull-ups ARM: dts: at91: sama5d2: set the sdmmc gclk frequency ARM: dts: at91: sama5d27_som1_ek: add i2c filters properties ARM: dts: at91: sama5d27_wlsom1: add SAMA5D27 wlsom1 and wlsom1-ek dt-bindings: ARM: at91: Document SAMA5D27 WLSOM1 and Evaluation Kit ARM: dts: at91: sama5d2: mark secumod as a GPIO controller ARM: dts: at91: sama5d2: disable pwm0 by default Link: https://lore.kernel.org/r/20200113155423.GA1357189@piout.net Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'v5.5-next-dts64' of ↵Olof Johansson
https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt mt8173: - add dynamic power coefficient to the cpu clusters - add jpeg decoder node mt8183: - add node for the Global Command Engine (gce) - add reset cells to the infracfg node * tag 'v5.5-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: arm64: dts: mt8183: add reset-cells in infracfg arm64: dts: mt8173: add Mediatek JPEG Codec arm64: dts: add gce node for mt8183 arm64: dts: mt8173: Add dynamic power node. Link: https://lore.kernel.org/r/46c1a244-3f74-8069-6600-8ced02775677@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'sunxi-dt-for-5.6-2' of ↵Olof Johansson
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt This is our usual set of DT patches for the Allwinner SoCs. It's fairly big this time, but the highlights are: - Enable cpufreq and CPU thermal throttling on the A64 - CLK_CPUX macro usage removed (changed from first pull request) - CSI0 support on the R40 - CSI1 support on the A10 and A20 - SPI support on the R40 - PMU support on the H3, H5, H6 and R40 - MIPI-DSI support on the A64 - PWM support on the H6 - Thermal sensor on the A64, A83t, H3, H5, H6 and R40 - More DT schemas fixes and conversions - New boards: LibreComputer ALL-H5-CC H5, LibreComputer ALL-H3-IT H5, Pine64 H64 Model B, Neutis N5H3 * tag 'sunxi-dt-for-5.6-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (52 commits) arm64: dts: allwinner: a64: enable DVFS arm64: dts: allwinner: a64: add dtsi with CPU operating points arm64: dts: allwinner: a64: add cooling maps and thermal tripping points arm64: dts: allwinner: a64: add CPU clock to CPU0-3 nodes arm64: dts: allwinner: sun50i-a64: Use macros for newly exported clocks ARM: dts: sunxi: Use macros for references to CCU clocks arm64: dts: allwinner: h5: Add Libre Computer ALL-H5-CC H5 board ARM: dts: sun8i: R40: Add SPI controllers nodes and pinmuxes arm64: dts: allwinner: a64: pinebook: Fix lid wakeup ARM: dts: sun8i: r40: Add device node for CSI0 ARM: dts: sun7i: Add CSI1 controller and pinmux options ARM: dts: sun4i: Add CSI1 controller and pinmux options ARM: dts: sunxi: Add missing LVDS resets and clocks ARM: dts: sun8i: r40: Use tcon top clock index macros ARM: dts: sun8i: R40: Add PMU node ARM: dts: sun8i: R40: Upgrade GICC reg size to 8K arm64: dts: allwinner: h6: Add thermal sensor and thermal zones ARM: dts: sunxi: Add Libre Computer ALL-H3-IT H5 board arm64: dts: allwinner: a64: Add MIPI DSI pipeline arm64: dts: allwinner: a64: Add thermal sensors and thermal zones ... Link: https://lore.kernel.org/r/20200113095555.GA29848@wens.csie.org Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'soc-fsl-next-v5.6' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers NXP/FSL SoC driver updates for v5.6 QUICC Engine drivers - Improve the QE drivers to be compatible with ARM/ARM64/PPC64 architectures - Various cleanups to the QE drivers * tag 'soc-fsl-next-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux: (49 commits) soc: fsl: qe: remove set but not used variable 'mm_gc' soc: fsl: qe: remove PPC32 dependency from CONFIG_QUICC_ENGINE soc: fsl: qe: remove unused #include of asm/irq.h from ucc.c net: ethernet: freescale: make UCC_GETH explicitly depend on PPC32 net/wan/fsl_ucc_hdlc: reject muram offsets above 64K net/wan/fsl_ucc_hdlc: fix reading of __be16 registers net/wan/fsl_ucc_hdlc: avoid use of IS_ERR_VALUE() soc: fsl: qe: avoid IS_ERR_VALUE in ucc_fast.c soc: fsl: qe: drop pointless check in qe_sdma_init() soc: fsl: qe: drop use of IS_ERR_VALUE in qe_sdma_init() soc: fsl: qe: avoid IS_ERR_VALUE in ucc_slow.c soc: fsl: qe: refactor cpm_muram_alloc_common to prevent BUG on error path soc: fsl: qe: drop broken lazy call of cpm_muram_init() soc: fsl: qe: make cpm_muram_free() ignore a negative offset soc: fsl: qe: make cpm_muram_free() return void soc: fsl: qe: change return type of cpm_muram_alloc() to s32 serial: ucc_uart: access __be32 field using be32_to_cpu serial: ucc_uart: limit brg-frequency workaround to PPC32 serial: ucc_uart: use of_property_read_u32() in ucc_uart_probe() serial: ucc_uart: stub out soft_uart_init for !CONFIG_PPC32 ... Link: https://lore.kernel.org/r/1578608351-23289-1-git-send-email-leoyang.li@nxp.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16MIPS: vdso: Define BUILD_VDSO32 when building a 32bit kernelThomas Gleixner
The confinement of the 32bit specific VDSO functions missed to define BUILD_VDSO32 when building a 32bit MIPS kernel: arch/mips/vdso/vgettimeofday.c: In function __vdso_clock_gettime: arch/mips/vdso/vgettimeofday.c:17:9: error: implicit declaration of function __cvdso_clock_gettime32 arch/mips/vdso/vgettimeofday.c: In function __vdso_clock_getres: arch/mips/vdso/vgettimeofday.c:39:9: error: implicit declaration of function __cvdso_clock_getres_time32 Force the define for 32bit builds in the VDSO Makefile. Fixes: bf279849ad59 ("lib/vdso: Build 32 bit specific functions in the right context") Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Paul Burton <paulburton@kernel.org> Link: https://lore.kernel.org/r/87d0bjfaqa.fsf@nanos.tec.linutronix.de
2020-01-16x86/CPU/AMD: Ensure clearing of SME/SEV features is maintainedTom Lendacky
If the SME and SEV features are present via CPUID, but memory encryption support is not enabled (MSR 0xC001_0010[23]), the feature flags are cleared using clear_cpu_cap(). However, if get_cpu_cap() is later called, these feature flags will be reset back to present, which is not desired. Change from using clear_cpu_cap() to setup_clear_cpu_cap() so that the clearing of the flags is maintained. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: <stable@vger.kernel.org> # 4.16.x- Link: https://lkml.kernel.org/r/226de90a703c3c0be5a49565047905ac4e94e8f3.1579125915.git.thomas.lendacky@amd.com
2020-01-16Merge tag 'imx-defconfig-5.6' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfig i.MX defconfig update for 5.6: - Enable i.MX8MP clock driver in arm64 defconfig. - Enable Crypto CAAM driver support as module in arm64 defconfig. - Enable ILI210X touch driver, USB CDC ACM function, NFS_V4 support and TFP410 DVI bridge driver support in arm32 imx_v6_v7_defconfig. * tag 'imx-defconfig-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: defconfig: Enable CONFIG_CLK_IMX8MP by default arm64: defconfig: Enable CRYPTO_DEV_FSL_CAAM ARM: imx_v6_v7_defconfig: Select the TFP410 driver ARM: imx_v6_v7_defconfig: Enable NFS_V4_1 and NFS_V4_2 support ARM: configs: imx_v6_v7_defconfig: enable USB ACM ARM: imx_v6_v7_defconfig: Enable TOUCHSCREEN_ILI210X Link: https://lore.kernel.org/r/20200113034006.17430-6-shawnguo@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'imx-dt64-5.6' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX arm64 device tree update for 5.6: - New board support: i.MX8MQ based Thor96 board, Google i.MX8MQ Phanbell board, LX2160A based Solidrun Clearfog CX and Honeycomb boards. - Add eLCDIF controller and missing SAI nodes for i.MX8MQ SoC. - Add Crypto CAAM support for i.MX8MM and i.MX8MN. - Drop unneeded "simple-bus" from anatop node on i.MX8MM and i.MX8MN. - Drop unused/undocumented "fsl,aips-bus" and "fsl,imx8mq-aips-bus" compatibles from i.MX8M SoCs. - Add DDR controller nodes for i.MX8M devices. - Add EEPROM description for imx8mq-hummingboard-pulse and imx8mq-sr-som boards. - Enable USB1 and TypeC support for imx8mn-evk board. - Add FlexSPI and QSPI support for a few Layerscape SoCs and boards. - Add External MDIO1 node and the two RGMII PHYs connected on LX2160A. - Add missing SAI devices and set SAIs into async mode on LS1028A. - Other random device additions and enhancement for various platforms. * tag 'imx-dt64-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (35 commits) arm64: dts: imx8mn: Memory node should be in board DT arm64: dts: imx8mm: Memory node should be in board DT arm64: dts: imx8mn: add crypto node arm64: dts: imx8mq-hummingboard-pulse: add eeprom description arm64: dts: imx8mq-sr-som: add eeprom description arm64: dts: ls208xa: Update qspi node properties for LS2088ARDB arm64: dts: freescale: Add devicetree support for Thor96 board arm64: dts: imx8mq-librem5-devkit: add accelerometer and gyro sensor arm64: dts: imx8mm: Add Crypto CAAM support arm64: dts: freescale: add initial support for Google i.MX 8MQ Phanbell arm64: dts: ls1028a-rdb: enable emmc hs400 mode arm64: dts: ls1028a: Update edma compatible to fit eDMA driver arm64: dts: imx8m: drop "fsl,aips-bus" and "fsl,imx8mq-aips-bus" arm64: dts: imx8mm: Add missing mux options for UART1 and UART2 signals arm64: dts: lx2160a: add dts for CEX7 platforms arm64: dts: lx2160a: add emdio2 node arm64: dts: ls1028a: put SAIs into async mode arm64: dts: ls1028a: add missing sai nodes arm64: dts: imx8mn-evk: enable usb1 and typec support arm64: dts: imx8mn: Remove setting for IMX8MN_CLK_USB_CORE_REF ... Link: https://lore.kernel.org/r/20200113034006.17430-5-shawnguo@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'imx-dt-5.6' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX device tree update for 5.6: - New board support: i.MX6SL based Tolino Shine 3 eBook reader, i.MX7ULP Embedded Artists COM Board, i.MX6Q/DL based Gateworks Ventana Boards. - A couple of series from Andrey Smirnov to enhance i.MX6 RDU2 and VF610 ZII boards. - Add revision in board compatible string for imx6sx-sdb-reva and imx7d-sdb-reva board. - A fixup on imx6sl-tolino-shine3 board to remove incorrect power supply assignment. - Set initial buck regulator modes explicitly for phycore-imx6 board, so that a wrong initial mode set by bootloader does not interfere. - Add Add LCD support for imx7d-pico board. - A couple of patches from Michael Grzeschik to enhance USB Host support on i.MX25. - A couple of patches from Michael Trimarchi to remove duplicate Ethernet PHY reset properties on imx6qdl-icore and switch to phy-handle. - A couple of changes to add extirq node support on LS1021A SoC and make use of it on the LS1021A-TSN board. - A few random device additions and improvements on various boards. * tag 'imx-dt-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (33 commits) ARM: dts: imx: Add GW5912 board support ARM: dts: imx: Add GW5913 board support ARM: dts: imx: Add GW5910 board support ARM: dts: imx: Add GW5907 board support ARM: dts: imx6ul-14x14-evk: Pass the "broken-cd" property ARM: dts: imx6sl-tolino-shine3: Remove incorrect power supply assignment ARM: dts: imx7d-pico: Add LCD support ARM: dts: imx6qdl-icore: Add fec phy-handle ARM: dts: imx6qdl-icore-1.5: Remove duplicate phy reset methods ARM: dts: imx7: Unify temp-grade and speed-grade nodes ARM: dts: imx6: phycore-som: add pmic onkey device ARM: dts: imx51-babbage: Fix the DVI output description ARM: dts: imx6qdl-apalis: mux HDMI CEC pin ARM: dts: imx6sll: add PXP module ARM: dts: colibri-imx6ull: correct wrong pinmuxing and add comments ARM: dts: vf610-zii-scu4-aib: Add node for switch watchdog ARM: dts: vf610-zii-scu4-aib: Use generic names for DT nodes ARM: dts: vf610-zii-dev-rev-b: Drop redundant I2C properties ARM: dts: phycore-imx6: set buck regulator modes explicitly ARM: dts: imx6: rdu2: Limit USBH1 to Full Speed ... Link: https://lore.kernel.org/r/20200113034006.17430-4-shawnguo@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'imx-soc-5.6' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc i.MX SoC changes for 5.6: - Add support for reading serial number from OCOTP on i.MX7ULP. - A patch from Anson to enable ARM_ERRATA_814220 for i.MX6UL & i.MX7D, and a fixup patch from Arnd to select the option only for ARMv7-A. * tag 'imx-soc-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx: only select ARM_ERRATA_814220 for ARMv7-A ARM: imx: Enable ARM_ERRATA_814220 for i.MX6UL and i.MX7D ARM: imx: Add i.MX7ULP SoC serial number support ARM: imx: Fix boot crash if ocotp is not found ARM: imx_v6_v7_defconfig: Explicitly restore CONFIG_DEBUG_FS ARM: dts: imx6ul-evk: Fix peripheral regulator arm64: dts: ls1028a: fix reboot node arm64: dts: ls1028a: fix typo in TMU calibration data ARM: imx: Correct ocotp id for serial number support of i.MX6ULL/ULZ SoCs ARM: dts: e60k02: fix power button ARM: dts: imx6ul: imx6ul-14x14-evk.dtsi: Fix SPI NOR probing Link: https://lore.kernel.org/r/20200113034006.17430-2-shawnguo@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'mvebu-dt64-5.6-1' of git://git.infradead.org/linux-mvebu into arm/dtOlof Johansson
mvebu dt64 for 5.6 (part 1) micro-DPU (uDPU) board changes (Armada 3270 based board): - Fix broken ethernet - Remove i2c-fast-mode property - Indicate that SFP cages support 3W modules SolidRun Clearfog GT 8K (Armada 8040 base board): - Fix switch cpu port node * tag 'mvebu-dt64-5.6-1' of git://git.infradead.org/linux-mvebu: arm64: dts: marvell: clearfog-gt-8k: fix switch cpu port node arm64: dts: uDPU: SFP cages support 3W modules arm64: dts: uDPU: remove i2c-fast-mode arm64: dts: uDPU: fix broken ethernet Link: https://lore.kernel.org/r/871rs53nu5.fsf@FE-laptop Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'mvebu-dt-5.6-1' of git://git.infradead.org/linux-mvebu into arm/dtOlof Johansson
mvebu dt for 5.6 (part 1) - Add support for SolidRun Clearfog GTR (Armada 385 based board) - Move i2c0 to the SoliRrun Microsom dtsi (Armada 38x based) - Add EEPROM node on SoliRrun Microsom (rev 2.1) - Add EEPROM node on SoliRrun ClearFog Pro * tag 'mvebu-dt-5.6-1' of git://git.infradead.org/linux-mvebu: ARM: dts: armada-388-clearfog: add eeprom ARM: dts: armada-38x-solidrun-microsom: add eeprom ARM: armada-38x-solidrun-microsom: move i2c0 to SOM DT ARM: dts: mvebu: add support for SolidRun Clearfog GTR Link: https://lore.kernel.org/r/874kx13nvh.fsf@FE-laptop Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'tegra-for-5.6-arm64-defconfig' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/defconfig arm64: tegra: Default configuration updates for v5.6-rc1 This enables the USB GPIO connector and Tegra XUDC drivers in the default configuration. * tag 'tegra-for-5.6-arm64-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: defconfig: Enable tegra XUDC support Link: https://lore.kernel.org/r/20200111005526.2413959-1-thierry.reding@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'tegra-for-5.6-arm64-dt' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt arm64: tegra: Device tree changes for v5.6-rc1 These patches do some cleanup to existing nodes, add the memory subsystem on Tegra186 and Tegra194 as well as the FUSE and APB MISC nodes on Tegra194. There are also a few additions to the Jetson Nano device tree to enable additional features and the force recovery button on the Jetson AGX Xavier now produces a key code that is actually valid. Finally, an alias is added for the Ethernet card on Jetson TX2 to allow firmware to find it and pass a MAC address via device tree. * tag 'tegra-for-5.6-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Allow bootloader to configure Ethernet MAC on Jetson TX2 arm64: tegra: Redefine force recovery key on Jetson AGX Xavier arm64: tegra: Enable SDIO on Jetson Nano M.2 Key E arm64: tegra: Enable PWM fan on Jetson Nano arm64: tegra: Add fuse/apbmisc node on Tegra194 arm64: tegra: Make XUSB node consistent with the rest arm64: tegra: Add the memory subsystem on Tegra194 arm64: tegra: Add external memory controller on Tegra186 arm64: tegra: Add interrupt for memory controller on Tegra186 arm64: tegra: Rename EMC on Tegra132 arm64: tegra: Let the EMC hardware use the EMC clock Link: https://lore.kernel.org/r/20200111003553.2411874-7-thierry.reding@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'tegra-for-5.6-arm-dt' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt ARM: tegra: Device tree changes for v5.6-rc1 This adds memory timings for the PAZ100 and does some minor cleanup for the external memory controller device tree node on Tegra124. * tag 'tegra-for-5.6-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: dts: tegra20: paz00: Add memory timings ARM: tegra: Rename EMC on Tegra124 ARM: tegra: Let the EMC hardware use the EMC clock Link: https://lore.kernel.org/r/20200111003553.2411874-6-thierry.reding@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'tegra-for-5.6-arm-core' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/soc ARM: tegra: Core changes for v5.6-rc1 Contains a couple of fixes for RAM repair on Tegra124. * tag 'tegra-for-5.6-arm-core' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: Use clk_m CPU on Tegra124 LP1 resume ARM: tegra: Modify reshift divider during LP1 ARM: tegra: Enable PLLP bypass during Tegra124 LP1 Link: https://lore.kernel.org/r/20200111003553.2411874-5-thierry.reding@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16arm64: kernel: avoid x18 in __cpu_soft_restartArd Biesheuvel
The code in __cpu_soft_restart() uses x18 as an arbitrary temp register, which will shortly be disallowed. So use x8 instead. Link: https://patchwork.kernel.org/patch/9836877/ Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> [Sami: updated commit message] Signed-off-by: Sami Tolvanen <samitolvanen@google.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Will Deacon <will@kernel.org>
2020-01-16arm64: kvm: stop treating register x18 as caller saveArd Biesheuvel
In preparation of reserving x18, stop treating it as caller save in the KVM guest entry/exit code. Currently, the code assumes there is no need to preserve it for the host, given that it would have been assumed clobbered anyway by the function call to __guest_enter(). Instead, preserve its value and restore it upon return. Link: https://patchwork.kernel.org/patch/9836891/ Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> [Sami: updated commit message, switched from x18 to x29 for the guest context] Signed-off-by: Sami Tolvanen <samitolvanen@google.com> Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2020-01-16arm64/lib: copy_page: avoid x18 register in assembler codeArd Biesheuvel
Register x18 will no longer be used as a caller save register in the future, so stop using it in the copy_page() code. Link: https://patchwork.kernel.org/patch/9836869/ Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> [Sami: changed the offset and bias to be explicit] Signed-off-by: Sami Tolvanen <samitolvanen@google.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2020-01-16arm64: mm: avoid x18 in idmap_kpti_install_ng_mappingsSami Tolvanen
idmap_kpti_install_ng_mappings uses x18 as a temporary register, which will result in a conflict when x18 is reserved. Use x16 and x17 instead where needed. Signed-off-by: Sami Tolvanen <samitolvanen@google.com> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2020-01-16arm64: fix alternatives with LLVM's integrated assemblerSami Tolvanen
LLVM's integrated assembler fails with the following error when building KVM: <inline asm>:12:6: error: expected absolute expression .if kvm_update_va_mask == 0 ^ <inline asm>:21:6: error: expected absolute expression .if kvm_update_va_mask == 0 ^ <inline asm>:24:2: error: unrecognized instruction mnemonic NOT_AN_INSTRUCTION ^ LLVM ERROR: Error parsing inline asm These errors come from ALTERNATIVE_CB and __ALTERNATIVE_CFG, which test for the existence of the callback parameter in inline assembly using the following expression: " .if " __stringify(cb) " == 0\n" This works with GNU as, but isn't supported by LLVM. This change splits __ALTERNATIVE_CFG and ALTINSTR_ENTRY into separate macros to fix the LLVM build. Link: https://github.com/ClangBuiltLinux/linux/issues/472 Signed-off-by: Sami Tolvanen <samitolvanen@google.com> Tested-by: Nick Desaulniers <ndesaulniers@google.com> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Will Deacon <will@kernel.org>
2020-01-16arm64: lse: fix LSE atomics with LLVM's integrated assemblerSami Tolvanen
Unlike gcc, clang considers each inline assembly block to be independent and therefore, when using the integrated assembler for inline assembly, any preambles that enable features must be repeated in each block. This change defines __LSE_PREAMBLE and adds it to each inline assembly block that has LSE instructions, which allows them to be compiled also with clang's assembler. Link: https://github.com/ClangBuiltLinux/linux/issues/671 Signed-off-by: Sami Tolvanen <samitolvanen@google.com> Tested-by: Andrew Murray <andrew.murray@arm.com> Tested-by: Kees Cook <keescook@chromium.org> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Will Deacon <will@kernel.org>
2020-01-16arm64: defconfig: Enable Broadcom's STB PCIe controllerNicolas Saenz Julienne
For now mainly used in the Raspberry Pi 4. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-01-16x86/amd_nb: Add Family 19h PCI IDsYazen Ghannam
Add the new PCI Device 18h IDs for AMD Family 19h systems. Note that Family 19h systems will not have a new PCI root device ID. Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20200110015651.14887-4-Yazen.Ghannam@amd.com
2020-01-16x86/MCE/AMD, EDAC/mce_amd: Add new Load Store unit McaTypeYazen Ghannam
Add support for a new version of the Load Store unit bank type as indicated by its McaType value, which will be present in future SMCA systems. Add the new (HWID, MCATYPE) tuple. Reuse the same name, since this is logically the same to the user. Also, add the new error descriptions to edac_mce_amd. Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20200110015651.14887-2-Yazen.Ghannam@amd.com
2020-01-16arm64: Implement optimised checksum routineRobin Murphy
Apparently there exist certain workloads which rely heavily on software checksumming, for which the generic do_csum() implementation becomes a significant bottleneck. Therefore let's give arm64 its own optimised version - for ease of maintenance this foregoes assembly or intrisics, and is thus not actually arm64-specific, but does rely heavily on C idioms that translate well to the A64 ISA and the typical load/store capabilities of most ARMv8 CPU cores. The resulting increase in checksum throughput scales nicely with buffer size, tending towards 4x for a small in-order core (Cortex-A53), and up to 6x or more for an aggressive big core (Ampere eMAG). Reported-by: Lingyan Huang <huanglingyan2@huawei.com> Tested-by: Lingyan Huang <huanglingyan2@huawei.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2020-01-16ARM: dts: at91: sam9x60: add device tree for soc and boardSandeep Sheriker Mallikarjun
Add device tree files for SAM9X60 SoC and SAM9X60-EK board. Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/1579085987-13976-6-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-01-16arm64: context: Free up kernel ASIDs if KPTI is not in useVladimir Murzin
We can extend user ASID space if it turns out that system does not require KPTI. We start with kernel ASIDs reserved because CPU caps are not finalized yet and free them up lazily on the next rollover if we confirm than KPTI is not in use. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2020-01-16arm64: Workaround for Cortex-A55 erratum 1530923Steven Price
Cortex-A55 erratum 1530923 allows TLB entries to be allocated as a result of a speculative AT instruction. This may happen in the middle of a guest world switch while the relevant VMSA configuration is in an inconsistent state, leading to erroneous content being allocated into TLBs. The same workaround as is used for Cortex-A76 erratum 1165522 (WORKAROUND_SPECULATIVE_AT_VHE) can be used here. Note that this mandates the use of VHE on affected parts. Acked-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Steven Price <steven.price@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2020-01-16arm64: Rename WORKAROUND_1319367 to SPECULATIVE_AT_NVHESteven Price
To match SPECULATIVE_AT_VHE let's also have a generic name for the NVHE variant. Acked-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Steven Price <steven.price@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2020-01-16arm64: Rename WORKAROUND_1165522 to SPECULATIVE_AT_VHESteven Price
Cortex-A55 is affected by a similar erratum, so rename the existing workaround for errarum 1165522 so it can be used for both errata. Acked-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Steven Price <steven.price@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2020-01-16crypto: {arm,arm64,mips}/poly1305 - remove redundant non-reduction from emitJason A. Donenfeld
This appears to be some kind of copy and paste error, and is actually dead code. Pre: f = 0 ⇒ (f >> 32) = 0 f = (f >> 32) + le32_to_cpu(digest[0]); Post: 0 ≤ f < 2³² put_unaligned_le32(f, dst); Pre: 0 ≤ f < 2³² ⇒ (f >> 32) = 0 f = (f >> 32) + le32_to_cpu(digest[1]); Post: 0 ≤ f < 2³² put_unaligned_le32(f, dst + 4); Pre: 0 ≤ f < 2³² ⇒ (f >> 32) = 0 f = (f >> 32) + le32_to_cpu(digest[2]); Post: 0 ≤ f < 2³² put_unaligned_le32(f, dst + 8); Pre: 0 ≤ f < 2³² ⇒ (f >> 32) = 0 f = (f >> 32) + le32_to_cpu(digest[3]); Post: 0 ≤ f < 2³² put_unaligned_le32(f, dst + 12); Therefore this sequence is redundant. And Andy's code appears to handle misalignment acceptably. Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Tested-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-16crypto: x86/poly1305 - wire up faster implementations for kernelJason A. Donenfeld
These x86_64 vectorized implementations support AVX, AVX-2, and AVX512F. The AVX-512F implementation is disabled on Skylake, due to throttling, but it is quite fast on >= Cannonlake. On the left is cycle counts on a Core i7 6700HQ using the AVX-2 codepath, comparing this implementation ("new") to the implementation in the current crypto api ("old"). On the right are benchmarks on a Xeon Gold 5120 using the AVX-512 codepath. The new implementation is faster on all benchmarks. AVX-2 AVX-512 --------- ----------- size old new size old new ---- ---- ---- ---- ---- ---- 0 70 68 0 74 70 16 92 90 16 96 92 32 134 104 32 136 106 48 172 120 48 184 124 64 218 136 64 218 138 80 254 158 80 260 160 96 298 174 96 300 176 112 342 192 112 342 194 128 388 212 128 384 212 144 428 228 144 420 226 160 466 246 160 464 248 176 510 264 176 504 264 192 550 282 192 544 282 208 594 302 208 582 300 224 628 316 224 624 318 240 676 334 240 662 338 256 716 354 256 708 358 272 764 374 272 748 372 288 802 352 288 788 358 304 420 366 304 422 370 320 428 360 320 432 364 336 484 378 336 486 380 352 426 384 352 434 390 368 478 400 368 480 408 384 488 394 384 490 398 400 542 408 400 542 412 416 486 416 416 492 426 432 534 430 432 538 436 448 544 422 448 546 432 464 600 438 464 600 448 480 540 448 480 548 456 496 594 464 496 594 476 512 602 456 512 606 470 528 656 476 528 656 480 544 600 480 544 606 498 560 650 494 560 652 512 576 664 490 576 662 508 592 714 508 592 716 522 608 656 514 608 664 538 624 708 532 624 710 552 640 716 524 640 720 516 656 770 536 656 772 526 672 716 548 672 722 544 688 770 562 688 768 556 704 774 552 704 778 556 720 826 568 720 832 568 736 768 574 736 780 584 752 822 592 752 826 600 768 830 584 768 836 560 784 884 602 784 888 572 800 828 610 800 838 588 816 884 628 816 884 604 832 888 618 832 894 598 848 942 632 848 946 612 864 884 644 864 896 628 880 936 660 880 942 644 896 948 652 896 952 608 912 1000 664 912 1004 616 928 942 676 928 954 634 944 994 690 944 1000 646 960 1002 680 960 1008 646 976 1054 694 976 1062 658 992 1002 706 992 1012 674 1008 1052 720 1008 1058 690 This commit wires in the prior implementation from Andy, and makes the following changes to be suitable for kernel land. - Some cosmetic and structural changes, like renaming labels to .Lname, constants, and other Linux conventions, as well as making the code easy for us to maintain moving forward. - CPU feature checking is done in C by the glue code. - We avoid jumping into the middle of functions, to appease objtool, and instead parameterize shared code. - We maintain frame pointers so that stack traces make sense. - We remove the dependency on the perl xlate code, which transforms the output into things that assemblers we don't care about use. Importantly, none of our changes affect the arithmetic or core code, but just involve the differing environment of kernel space. Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Signed-off-by: Samuel Neves <sneves@dei.uc.pt> Co-developed-by: Samuel Neves <sneves@dei.uc.pt> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-16crypto: x86/poly1305 - import unmodified cryptogams implementationJason A. Donenfeld
These x86_64 vectorized implementations come from Andy Polyakov's CRYPTOGAMS implementation, and are included here in raw form without modification, so that subsequent commits that fix these up for the kernel can see how it has changed. Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
generated by cgit (git 2.34.1) at 2025-09-13 03:44:22 +0000