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2020-01-07powerpc32/booke: consistently return phys_addr_t in __pa()Bai Yingjie
When CONFIG_RELOCATABLE=y is set, VIRT_PHYS_OFFSET is a 64bit variable, thus __pa() returns as 64bit value. But when CONFIG_RELOCATABLE=n, __pa() returns 32bit value. When CONFIG_PHYS_64BIT is set, __pa() should consistently return as 64bit value irrelevant to CONFIG_RELOCATABLE. So we'd make __pa() consistently return phys_addr_t, which is 64bit when CONFIG_PHYS_64BIT is set. Signed-off-by: Bai Yingjie <byj.tea@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200106042957.26494-1-yingjie_bai@126.com
2020-01-07powerpc/powernv: use resource_sizeJulia Lawall
Use resource_size rather than a verbose computation on the end and start fields. The semantic patch that makes these changes is as follows: (http://coccinelle.lip6.fr/) <smpl> @@ struct resource ptr; @@ - (ptr.end - ptr.start + 1) + resource_size(&ptr) </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/1577900990-8588-11-git-send-email-Julia.Lawall@inria.fr
2020-01-07powerpc/83xx: use resource_sizeJulia Lawall
Use resource_size rather than a verbose computation on the end and start fields. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) <smpl> @@ struct resource ptr; @@ - (ptr.end - ptr.start + 1) + resource_size(&ptr) </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Acked-by: Scott Wood <oss@buserror.net> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/1577900990-8588-6-git-send-email-Julia.Lawall@inria.fr
2020-01-07powerpc/mpic: constify copied structureJulia Lawall
The mpic_ipi_chip and mpic_irq_ht_chip structures are only copied into other structures, so make them const. The opportunity for this change was found using Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/1577864614-5543-10-git-send-email-Julia.Lawall@inria.fr
2020-01-07x86/unwind/orc: Fix !CONFIG_MODULES build warningShile Zhang
To fix follwowing warning due to ORC sort moved to build time: arch/x86/kernel/unwind_orc.c:210:12: warning: ‘orc_sort_cmp’ defined but not used [-Wunused-function] arch/x86/kernel/unwind_orc.c:190:13: warning: ‘orc_sort_swap’ defined but not used [-Wunused-function] Signed-off-by: Shile Zhang <shile.zhang@linux.alibaba.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/c9c81536-2afc-c8aa-c5f8-c7618ecd4f54@linux.alibaba.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-01-07x86/context-tracking: Remove exception_enter/exit() from ↵Frederic Weisbecker
KVM_PV_REASON_PAGE_NOT_PRESENT async page fault This is a leftover. Page faults, just like most other exceptions, are protected inside user_exit() / user_enter() calls in x86 entry code when we fault from userspace. So this pair of calls is now superfluous. Signed-off-by: Frederic Weisbecker <frederic@kernel.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Jim Mattson <jmattson@google.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: Sean Christopherson <sean.j.christopherson@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vitaly Kuznetsov <vkuznets@redhat.com> Cc: Wanpeng Li <wanpengli@tencent.com> Link: https://lkml.kernel.org/r/20191227163612.10039-3-frederic@kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-01-07x86/context-tracking: Remove exception_enter/exit() from do_page_fault()Frederic Weisbecker
do_page_fault(), like other exceptions, is already covered by user_enter() and user_exit() when the exception triggers in userspace. As explained in: 8c84014f3bbb11 ("x86/entry: Remove exception_enter() from most trap handlers") exception_enter/exit() only remained to handle possible page fault from kernel mode while context tracking is in CONTEXT_USER mode, ie: on kernel entry before we manage to call user_exit(). The only known offender was do_fast_syscall_32() fetching EBP register from where vDSO stashed it. Meanwhile this got fixed in: 9999c8c01f34c9 ("x86/entry: Call enter_from_user_mode() with IRQs off") that moved enter_from_user_mode() before the call to get_user(). So we can safely remove it now. Signed-off-by: Frederic Weisbecker <frederic@kernel.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Jim Mattson <jmattson@google.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: Sean Christopherson <sean.j.christopherson@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vitaly Kuznetsov <vkuznets@redhat.com> Cc: Wanpeng Li <wanpengli@tencent.com> Link: https://lkml.kernel.org/r/20191227163612.10039-2-frederic@kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-01-06arm64: dts: qcom: sc7180: Add critical interrupt and cooling maps for TSENS ↵Rajeshwari
in SC7180 Added critical interrupt support in TSENS node and cooling maps in Thermal-zones node. Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Rajeshwari <rkambl@codeaurora.org> Link: https://lore.kernel.org/r/1578317369-16045-2-git-send-email-rkambl@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-06arm64: dts: allwinner: sun50i-a64: Use macros for newly exported clocksChen-Yu Tsai
A few clocks from the CCU were exported later, and references to them in the device tree were using raw numbers. Now that the DT binding header changes are in as well, switch to the macros for more clarity. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-06ARM: dts: sunxi: Use macros for references to CCU clocksChen-Yu Tsai
A few clocks from the CCU were exported later, and references to them in the device tree were using raw numbers. Now that the DT binding header changes are in as well, switch to the macros for more clarity. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-06arm64: dts: allwinner: h5: Add Libre Computer ALL-H5-CC H5 boardChen-Yu Tsai
The Libre Computer ALL-H5-CC board is an upgraded version of the ALL-H3-CC. Changes include: - Gigabit Ethernet via external RTL8211E Ethernet PHY - 16 MiB SPI NOR flash memory - PoE tap header - Line out jack removed Only H5 variant test samples were made available, and the vendor is not certain whether other SoC variants would be made or not. Furthermore the board is a minor upgrade compared to the ALL-H3-CC. Thus the device tree simply includes the one for the ALL-H3-CC, and adds the changes on top. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-06ARM: dts: sun8i: R40: Add SPI controllers nodes and pinmuxesAndre Przywara
The Allwinner R40 SoC contains four SPI controllers, using the newer sun6i design (but at the legacy addresses). The controller seems to be fully compatible to the A64 one, so no driver changes are necessary. The first three controllers can be used on two sets of pins, but SPI3 is only routed to one set on Port A. Only the pin groups for SPI0 on PortC and SPI1 on PortI are added here, because those seem to be the only one exposed on the Bananapi boards. Tested by connecting a SPI flash to a Bananapi M2 Berry SPI0 and SPI1 header pins. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-06Merge branch 'mmp/hsic' into arm/dtOlof Johansson
* mmp/hsic: ARM: dts: mmp3: Fix typos
2020-01-06ARM: dts: mmp3: Fix typosOlof Johansson
Fixes build failures due to syntax errors. Fixes: 3240d5b872f2 ("ARM: dts: mmp3: Add HSIC controllers") Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06arm64: dts: qcom: msm8996: Fix venus iommu nodename errorStanimir Varbanov
Fix the following error/warn seen with make dtbs_check arm,smmu-venus@d40000: $nodename:0: 'arm,smmu-venus@d40000' does not match '^iommu@[0-9a-f]*' arm,smmu-venus@d40000: clock-names:0: 'bus' was expected arm,smmu-venus@d40000: clock-names:1: 'iface' was expected by rename nodename to "iommu". Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Link: https://lore.kernel.org/r/20200106102305.27059-1-stanimir.varbanov@linaro.org [bjorn: Added padding of address to 8 digits] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-06Merge tag 'arc-5.5-rc6' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull ARC fixes from Vineet Gupta: "Kconfig warning, stale define, duplicate asm-offset entry ..." * tag 'arc-5.5-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARC: pt_regs: remove hardcoded registers offset ARC: asm-offsets: remove duplicate entry ARC: mm: drop stale define of __ARCH_USE_5LEVEL_HACK arc: eznps: fix allmodconfig kconfig warning
2020-01-06arm64: Revert support for execute-only user mappingsCatalin Marinas
The ARMv8 64-bit architecture supports execute-only user permissions by clearing the PTE_USER and PTE_UXN bits, practically making it a mostly privileged mapping but from which user running at EL0 can still execute. The downside, however, is that the kernel at EL1 inadvertently reading such mapping would not trip over the PAN (privileged access never) protection. Revert the relevant bits from commit cab15ce604e5 ("arm64: Introduce execute-only page access permissions") so that PROT_EXEC implies PROT_READ (and therefore PTE_USER) until the architecture gains proper support for execute-only user mappings. Fixes: cab15ce604e5 ("arm64: Introduce execute-only page access permissions") Cc: <stable@vger.kernel.org> # 4.9.x- Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-01-06x86/fpu/xstate: Make xfeature_is_supervisor()/xfeature_is_user() return boolYu-cheng Yu
Have both xfeature_is_supervisor()/xfeature_is_user() return bool because they are used only in boolean context. Suggested-by: Borislav Petkov <bp@suse.de> Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: Andy Lutomirski <luto@kernel.org> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: "Ravi V. Shankar" <ravi.v.shankar@intel.com> Cc: Rik van Riel <riel@surriel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tony Luck <tony.luck@intel.com> Cc: x86-ml <x86@kernel.org> Link: https://lkml.kernel.org/r/20191212210855.19260-3-yu-cheng.yu@intel.com
2020-01-06Merge branch 'mmp/hsic' into arm/dtOlof Johansson
* mmp/hsic: ARM: dts: mmp3-dell-ariel: Enable the HSIC ARM: dts: mmp3: Add HSIC controllers dt-bindings: phy: Add binding for marvell,mmp3-hsic-phy clk: mmp2: Add HSIC clocks dt-bindings: marvell,mmp2: Add clock ids for the HSIC clocks + Linux 5.5-rc2
2020-01-06ARM: dts: mmp3-dell-ariel: Enable the HSICLubomir Rintel
There's a SMSC USB2640 (USB hub & SD controller) connected to it, but the SD card slot footprint is unpopulated. Also connected to the hub is a SMSC LAN7500 gigabit ethernet adapter. Link: https://lore.kernel.org/r/20191220065314.237624-6-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06ARM: dts: mmp3: Add HSIC controllersLubomir Rintel
There are two on MMP3, along with the PHYs. The PHYs are made compatible with the NOP transceiver, since there's no driver for the time being and they're likely configured by the firmware. Link: https://lore.kernel.org/r/20191220065314.237624-5-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06Merge tag 'renesas-arm64-dt-for-v5.6-tag1' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM64 DT updates for v5.6 - Remove now unused ARCH_R8A7796 config symbol, - Rename R-Car H3 and M3-W SoC, and ULCB board DTS files to increase naming consistency, - Miscellaneous fixes for issues detected by "make dtbs_check", - Enhance support for R-Car M3-W+, - Display support for the EK874 board, - Prepare for split of R-Car H3 ES1.x and ES2.0+ config symbols, - Minor fixes and improvements. * tag 'renesas-arm64-dt-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: Prepare for split of ARCH_R8A7795 into ARCH_R8A7795[01] arm64: dts: renesas: Sort DTBs in Makefile arm64: dts: renesas: Drop redundant SoC prefixes from ULCB DTS file names arm64: dts: renesas: Rename r8a7795{-es1,}* to r8a7795[01]* arm64: dts: renesas: Add EK874 board with idk-2121wr display support arm64: dts: renesas: r8a77961: Add SDHI nodes arm64: dts: renesas: r8a77961: Add I2C nodes arm64: dts: renesas: r8a77961: Add SYS-DMAC nodes arm64: dts: renesas: r8a77961: Add RAVB node arm64: dts: renesas: r8a77961: Add GPIO nodes arm64: dts: renesas: r8a77961: Add RWDT node arm64: dts: renesas: r8a77990: ebisu: Remove clkout-lr-synchronous from sound arm64: dts: renesas: r8a77970: Group tuples in thermal reg property arm64: dts: renesas: Group tuples in pci ranges and dma-ranges properties arm64: dts: renesas: Group tuples in interrupt properties arm64: dts: renesas: Group tuples in regulator-gpio states properties arm64: dts: renesas: Rename r8a7796* to r8a77960* arm64: dts: renesas: Remove use of ARCH_R8A7796 Link: https://lore.kernel.org/r/20200106104857.8361-4-geert+renesas@glider.be Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06Merge tag 'renesas-arm-dt-for-v5.6-tag1' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.6 - Touch screen support for the iwg20d board, - ARM global timer support on Cortex-A9 MPCore SoCs, - Miscellaneous fixes for issues detected by "make dtbs_check". * tag 'renesas-arm-dt-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: ARM: dts: sh73a0: Add missing clock-frequency for fixed clocks ARM: dts: r8a7778: Add missing clock-frequency for fixed clocks ARM: dts: rcar-gen2: Add missing mmio-sram bus properties ARM: dts: rcar-gen2: Fix PCI high address in interrupt-map-mask ARM: dts: renesas: Group tuples in pci ranges and dma-ranges properties ARM: dts: renesas: Group tuples in interrupt properties ARM: dts: renesas: Group tuples in regulator-gpio states properties ARM: dts: r8a7779: Add device node for ARM global timer ARM: dts: sh73a0: Add device node for ARM global timer ARM: dts: sh73a0: Rename twd clock to periph clock ARM: dts: iwg20d-q7-common: Add LCD support Link: https://lore.kernel.org/r/20200106104857.8361-3-geert+renesas@glider.be Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06Merge tag 'renesas-arm-defconfig-for-v5.6-tag1' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/defconfig Renesas ARM defconfig updates for v5.6 - Enable support for the display panel on the iwg20d board. * tag 'renesas-arm-defconfig-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: ARM: shmobile: defconfig: Enable support for panels from EDT ARM: shmobile: defconfig: Restore debugfs support Link: https://lore.kernel.org/r/20200106104857.8361-2-geert+renesas@glider.be Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06ARM: defconfig: gemini: Update defconfigLinus Walleij
This updates the gemini defconfig with Kconfig shuffling and some of the features activated in new upstream drivers and newly supported devices: - Move some symbols around due to Kconfig alterations, this affects CONFIG_PREEMPT, CONFIG_PCI, CONFIG_CMA, CONFIG_BINFMT_MISC, CONFIG_PARTITION_ADVANCED. - Add RedBoot partition parsing, as all the Gemini devices use some RedBoot derivative and store their flash partition tables in this format. - Enable bridge and VLAN filtering: a majority of the Gemini devices have some kind of DSA chip for ethernet bridging/routing. - Enable CONFIG_NET_DSA_REALTEK_SMI as this DSA router chip is found in the Gemini-based products. This makes explicit selection of CONFIG_REALTEK_PHY unnecessary so that goes away. - Enable CONFIG_TUN since Gemini userspace often make use of the TUN interface for network services. - Enable MARVELL_PHY as Marvell PHY connectors are often found in Gemini systems. - Enable basic 802.11 libraries as many Gemini systems have wireless PCI cards. Link: https://lore.kernel.org/r/20200101143520.14218-1-linus.walleij@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06Merge tag 'ux500-armsoc-v5.6-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt Support the Samsung GT-I8190/Golden phone: - Proper include file for the AB8505 PMIC variant. - Add a DTS file for the GT-I8190/Golden - Extend the IMU, touch screen, WiFi and Bluetooth as separate patches. * tag 'ux500-armsoc-v5.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: dts: ux500: samsung-golden: Add Bluetooth ARM: dts: ux500: samsung-golden: Add WiFi ARM: dts: ux500: samsung-golden: Add touch screen ARM: dts: ux500: samsung-golden: Add IMU (accelerometer + gyroscope) ARM: dts: ux500: Add device tree for Samsung Galaxy S III mini (GT-I8190) dt-bindings: arm: ux500: Document samsung,golden compatible ARM: dts: ux500: Add device tree include for AB8505 ARM: dts: ux500: Remove unused ste-href-ab8505.dtsi Link: https://lore.kernel.org/r/CACRpkdaN2Lv_rBEYNiyAarA81yea6Eky8w_htqZqdRng8S-DcA@mail.gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06arm64: dts: Add Unisoc's SC9863A SoC supportChunyan Zhang
Add basic DT to support Unisoc's SC9863A, with this patch, the board sp9863a-1h10 can run into console. Link: https://lore.kernel.org/r/20191223092948.24824-4-zhang.lyra@gmail.com Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06ARM: dts: mmp3: Fix the TWSI rangesLubomir Rintel
The register blocks don't occupy 4K. In fact, some blocks are packed close to others and assuming they're 4K causes overlaps: pxa2xx-i2c d4033800.i2c: can't request region for resource [mem 0xd4033800-0xd40347ff] Link: https://lore.kernel.org/r/20191220071443.247183-1-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06ARM: mmp: do not divide the clock rateLubomir Rintel
This was done because the clock driver returned the wrong rate, which is fixed in "clk: mmp2: Fix the order of timer mux parents" patch. Link: https://lore.kernel.org/r/20191218190454.420358-2-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06x86/fpu/xstate: Fix small issuesYu-cheng Yu
In response to earlier comments, fix small issues before introducing XSAVES supervisor states: - Fix comments of xfeature_is_supervisor(). - Replace ((u64)1 << 63) with XCOMP_BV_COMPACTED_FORMAT. No functional changes. Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: Andy Lutomirski <luto@kernel.org> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: "Ravi V. Shankar" <ravi.v.shankar@intel.com> Cc: Rik van Riel <riel@surriel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: x86-ml <x86@kernel.org> Link: https://lkml.kernel.org/r/20191212210855.19260-2-yu-cheng.yu@intel.com
2020-01-06arm64: dts: rockchip: Add PX30 LVDSMiquel Raynal
Describe LVDS IP. Add the CRTC and LVDS relevant endpoints so they can be linked together. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191224143900.23567-12-miquel.raynal@bootlin.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-01-06arm64: dts: rockchip: add dsi controller for px30Heiko Stuebner
This adds the dw-mipi-dsi controller and hooks it into the display-subsystem on px30. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20200106112005.795834-1-heiko@sntech.de
2020-01-06arm64: dts: rockchip: Fix IR on Beelink A1Robin Murphy
Apparently I wasn't paying enough attention... And nor is the lazy test of `cat /dev/lirc0` sufficiently blunder-proof. Oh well, with the correct polarity, let's also hook up a keymap now that one for the standard Beelink remote has handily appeared. Fixes: 79702ded8c2f ("arm64: dts: rockchip: Add Beelink A1") Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/44269c08e2a5d75b03ded87d2eb11621762d8249.1577636223.git.robin.murphy@arm.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-01-06arm64: dts: rockchip: Add PX30 DSI DPHYMiquel Raynal
Add the PHY which outputs MIPI DSI and LVDS. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191224143900.23567-11-miquel.raynal@bootlin.com [added dsi power-domain, following vendor-kernel] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-01-06arm64: dts: allwinner: a64: pinebook: Fix lid wakeupSamuel Holland
By default, gpio-keys configures the pin to trigger wakeup IRQs on either edge. The lid switch should only trigger wakeup when opening the lid, not when closing it. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-06ARM: dts: sun8i: r40: Add device node for CSI0Chen-Yu Tsai
The CSI0 and CSI1 blocks are the same as found on the A20. However only CSI0 is supported upstream right now. Add a device node for CSI0 using the A20 compatible as a fallback, and the standard pinctrl options. Also add the MBUS interconnect. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-06ARM: dts: sun7i: Add CSI1 controller and pinmux optionsChen-Yu Tsai
The CSI controller driver now supports the second CSI controller, CSI1. Add a device node for it. Pinmuxing options for the MCLK output, the standard 8-bit interface, and a secondary 24-bit interface are included. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-06ARM: dts: sun4i: Add CSI1 controller and pinmux optionsChen-Yu Tsai
The CSI controller driver now supports the second CSI controller, CSI1. Add a device node for it. Pinmuxing options for the MCLK output, the standard 8-bit interface, and a secondary 24-bit interface are included. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-06remove ioremap_nocache and devm_ioremap_nocacheChristoph Hellwig
ioremap has provided non-cached semantics by default since the Linux 2.6 days, so remove the additional ioremap_nocache interface. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Arnd Bergmann <arnd@arndb.de>
2020-01-06MIPS: define ioremap_nocache to ioremapChristoph Hellwig
They are both defined the same way, but this makes it easier to validate the scripted ioremap_nocache removal following soon. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Paul Burton <paulburton@kernel.org>
2020-01-05arm64: dts: qcom: sdm845: add the ufs resetVinod Koul
Add the core UFS reset for sdm845 Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200106070826.147064-4-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-05arm64: dts: qcom: sm8150: Fix UFS phy register sizeVinod Koul
UFS phy register space size is 0x1c0. so update it Reported-by: Can Guo <cang@codeaurora.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200106070826.147064-3-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-05arm64: dts: qcom: sm8150-mtp: Add UFS gpio resetVinod Koul
Add the reset-gpio for UFS for sm8150-mtp. Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200106070826.147064-2-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-06powerpc/85xx: Get twr_p102x to compile againSebastian Andrzej Siewior
With CONFIG_QUICC_ENGINE enabled and CONFIG_UCC_GETH + CONFIG_SERIAL_QE disabled we have an unused variable (np). The code won't compile with -Werror. Move the np variable to the block where it is actually used. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Acked-by: Scott Wood <oss@buserror.net> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20191219151602.1908411-1-bigeasy@linutronix.de
2020-01-06powerpc/pseries/svm: Allow IOMMU to work in SVMAlexey Kardashevskiy
H_PUT_TCE_INDIRECT uses a shared page to send up to 512 TCE to a hypervisor in a single hypercall. This does not work for secure VMs as the page needs to be shared or the VM should use H_PUT_TCE instead. This disables H_PUT_TCE_INDIRECT by clearing the FW_FEATURE_PUT_TCE_IND feature bit so SVMs will map TCEs using H_PUT_TCE. This is not a part of init_svm() as it is called too late after FW patching is done and may result in a warning like this: [ 3.727716] Firmware features changed after feature patching! [ 3.727965] WARNING: CPU: 0 PID: 1 at (...)arch/powerpc/lib/feature-fixups.c:466 check_features+0xa4/0xc0 Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Thiago Jung Bauermann <bauerman@linux.ibm.com> Tested-by: Thiago Jung Bauermann <bauerman@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20191216041924.42318-5-aik@ozlabs.ru
2020-01-06powerpc/pseries/iommu: Separate FW_FEATURE_MULTITCE to put/stuff featuresAlexey Kardashevskiy
H_PUT_TCE_INDIRECT allows packing up to 512 TCE updates into a single hypercall; H_STUFF_TCE can clear lots in a single hypercall too. However, unlike H_STUFF_TCE (which writes the same TCE to all entries), H_PUT_TCE_INDIRECT uses a 4K page with new TCEs. In a secure VM environment this means sharing a secure VM page with a hypervisor which we would rather avoid. This splits the FW_FEATURE_MULTITCE feature into FW_FEATURE_PUT_TCE_IND and FW_FEATURE_STUFF_TCE. "hcall-multi-tce" in the "/rtas/ibm,hypertas-functions" device tree property sets both; the "multitce=off" kernel command line parameter disables both. This should not cause behavioural change. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Thiago Jung Bauermann <bauerman@linux.ibm.com> Tested-by: Thiago Jung Bauermann <bauerman@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20191216041924.42318-4-aik@ozlabs.ru
2020-01-06powerpc/pseries: Allow not having ibm, hypertas-functions::hcall-multi-tce ↵Alexey Kardashevskiy
for DDW By default a pseries guest supports a H_PUT_TCE hypercall which maps a single IOMMU page in a DMA window. Additionally the hypervisor may support H_PUT_TCE_INDIRECT/H_STUFF_TCE which update multiple TCEs at once; this is advertised via the device tree /rtas/ibm,hypertas-functions property which Linux converts to FW_FEATURE_MULTITCE. FW_FEATURE_MULTITCE is checked when dma_iommu_ops is used; however the code managing the huge DMA window (DDW) ignores it and calls H_PUT_TCE_INDIRECT even if it is explicitly disabled via the "multitce=off" kernel command line parameter. This adds FW_FEATURE_MULTITCE checking to the DDW code path. This changes tce_build_pSeriesLP to take liobn and page size as the huge window does not have iommu_table descriptor which usually the place to store these numbers. Fixes: 4e8b0cf46b25 ("powerpc/pseries: Add support for dynamic dma windows") Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Thiago Jung Bauermann <bauerman@linux.ibm.com> Tested-by: Thiago Jung Bauermann <bauerman@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20191216041924.42318-3-aik@ozlabs.ru
2020-01-06Revert "powerpc/pseries/iommu: Don't use dma_iommu_ops on secure guests"Ram Pai
This reverts commit edea902c1c1efb855f77e041f9daf1abe7a9768a. At the time the change allowed direct DMA ops for secure VMs; however since then we switched on using SWIOTLB backed with IOMMU (direct mapping) and to make this work, we need dma_iommu_ops which handles all cases including TCE mapping I/O pages in the presence of an IOMMU. Fixes: edea902c1c1e ("powerpc/pseries/iommu: Don't use dma_iommu_ops on secure guests") Signed-off-by: Ram Pai <linuxram@us.ibm.com> [aik: added "revert" and "fixes:"] Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Thiago Jung Bauermann <bauerman@linux.ibm.com> Tested-by: Thiago Jung Bauermann <bauerman@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20191216041924.42318-2-aik@ozlabs.ru
2020-01-06powerpc/pseries: Remove redundant select of PPC_DOORBELLMichael Ellerman
Commit d4e58e5928f8 ("powerpc/powernv: Enable POWER8 doorbell IPIs") added a select of PPC_DOORBELL to PPC_PSERIES, but it already had a select of PPC_DOORBELL. One is enough. Reported-by: Jason A. Donenfeld <Jason@zx2c4.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20191219125840.32592-1-mpe@ellerman.id.au
2020-01-06powerpc/512x: Use dma_request_chan() instead dma_request_slave_channel()Peter Ujfalusi
dma_request_slave_channel() is a wrapper on top of dma_request_chan() eating up the error code. By using dma_request_chan() directly the driver can support deferred probing against DMA. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20191217073730.21249-1-peter.ujfalusi@ti.com
generated by cgit (git 2.34.1) at 2025-09-23 07:31:19 +0000