summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)Author
2019-12-31ARM: dts: rcar-gen2: Add missing mmio-sram bus propertiesGeert Uytterhoeven
"#address-cells", "#size-cells", and "ranges" are required properties for devices nodes compatible with "mmio-sram", leading to warnings when running "make dtbs_check": $ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/sram/sram.yaml arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: '#address-cells' is a required property arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: '#size-cells' is a required property arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: 'ranges' is a required property ... Fix this by adding the missing properties to the mmio-sram device nodes in the DTS files for all affected R-Car Gen2 and RZ/G1 SoCs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191213162604.1890-1-geert+renesas@glider.be
2019-12-31ARM: dts: rcar-gen2: Fix PCI high address in interrupt-map-maskGeert Uytterhoeven
"make dtbs_check" emits warnings like: pci@ee090000: interrupt-map-mask:0:0: 65280 is greater than the maximum of 63488 pci@ee0b0000: interrupt-map-mask:0:0: 65280 is greater than the maximum of 63488 pci@ee0d0000: interrupt-map-mask:0:0: 65280 is greater than the maximum of 63488 According to dt-schemas/schemas/pci/pci-bus.yaml, the PCI high address cell value in the "interrupt-map-mask" property must lie in the range 0..0xf800. Fix this by correcting the values from 0xff00 to 0xf800 in all affected R-Car Gen2 and RZ/G1 DTS files. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191213162459.1731-1-geert+renesas@glider.be
2019-12-31arm64: dts: renesas: Prepare for split of ARCH_R8A7795 into ARCH_R8A7795[01]Geert Uytterhoeven
As R-Car H3 ES1.x (R8A77950) and R-Car H3 ES2.0+ (R8A77951) are really different SoCs, CONFIG_ARCH_R8A7795 will be split in CONFIG_ARCH_R8A77950 and CONFIG_ARCH_R8A77951. Relax dependencies by handling both the old and the new symbols. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191217183841.432-5-geert+renesas@glider.be
2019-12-31arm64: dts: renesas: Sort DTBs in MakefileGeert Uytterhoeven
Sort the entries for the various DTBs in the Makefile by SoC and board type. Keep Salvator-X(S) together, and do the same for ULCB with and without Kingfisher extension. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191217183841.432-4-geert+renesas@glider.be
2019-12-31arm64: dts: renesas: Drop redundant SoC prefixes from ULCB DTS file namesGeert Uytterhoeven
Unlike the V3MSK and V3HSK boards, the various "ULCB" boards are really the same boards, with different SiPs fitted, just like the Salvator-X(S) boards. Furthermore, the "H3", "M3", and "M3N" prefixes of the "ULCB" parts in the DTS file names are redundant, as they are implied by the SoC part numbers, which are also part of the file names. Hence drop the redundant prefixes, to make the DTS file names consistent with the file names for the various "Salvator-X(S)" boards. Suggested-by: Eugeniu Rosca <erosca@de.adit-jv.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191217183841.432-3-geert+renesas@glider.be
2019-12-31arm64: dts: renesas: Rename r8a7795{-es1,}* to r8a7795[01]*Geert Uytterhoeven
Despite using the same compatible values ("r8a7795"-based) because of historical reasons, R-Car H3 ES1.x (R8A77950) and R-Car H3 ES2.0+ (R8A77951) are really different SoCs, with different part numbers. Reflect this in the DTS files by changing their base names from "r8a7795-es1" and "r8a7795" to "r8a77950" resp. "r8a77951". Drop all "ES" references next to part numbers, as they are implied by the part numbers, and thus redundant. Note that DT binding headers, definitions, and compatible values are not renamed, to preserve backward compatibility. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191217183841.432-2-geert+renesas@glider.be
2019-12-31sh: sh7269: Remove bogus SSU GPIO function definitionsGeert Uytterhoeven
SH7269 has no Synchronous Serial Communication Unit (SSU). Remove the bogus enum IDs, which caused holes in pinmux_func_gpios[]. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191218194812.12741-7-geert+renesas@glider.be
2019-12-31sh: sh7264: Remove bogus SSU GPIO function definitionsGeert Uytterhoeven
SH7264 has no Synchronous Serial Communication Unit (SSU). Remove the bogus enum IDs, which caused holes in pinmux_func_gpios[]. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191218194812.12741-6-geert+renesas@glider.be
2019-12-31pinctrl: sh-pfc: sh7269: Fix CAN function GPIOsGeert Uytterhoeven
pinmux_func_gpios[] contains a hole due to the missing function GPIO definition for the "CTX0&CTX1" signal, which is the logical "AND" of the first two CAN outputs. A closer look reveals other issues: - Some functionality is available on alternative pins, but the PINMUX_DATA() entries is using the wrong marks, - Several configurations are missing. Fix this by: - Renaming CTX0CTX1CTX2_MARK, CRX0CRX1_PJ22_MARK, and CRX0CRX1CRX2_PJ20_MARK to CTX0_CTX1_CTX2_MARK, CRX0_CRX1_PJ22_MARK, resp. CRX0_CRX1_CRX2_PJ20_MARK for consistency with the corresponding enum IDs, - Adding all missing enum IDs and marks, - Use the right (*_PJ2x) variants for alternative pins, - Adding all missing configurations to pinmux_data[], - Adding all missing function GPIO definitions to pinmux_func_gpios[]. See SH7268 Group, SH7269 Group User’s Manual: Hardware, Rev. 2.00: [1] Table 1.4 List of Pins [2] Figure 23.29 Connection Example when Using Channels 0 and 1 as One Channel (64 Mailboxes × 1 Channel) and Channel 2 as One Channel (32 Mailboxes × 1 Channel), [3] Figure 23.30 Connection Example when Using Channels 0, 1, and 2 as One Channel (96 Mailboxes × 1 Channel), [4] Table 48.3 Multiplexed Pins (Port B), [5] Table 48.4 Multiplexed Pins (Port C), [6] Table 48.10 Multiplexed Pins (Port J), [7] Section 48.2.4 Port B Control Registers 0 to 5 (PBCR0 to PBCR5). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191218194812.12741-5-geert+renesas@glider.be
2019-12-30ARM: dts: qcom: Correct USB3503 GPIOs polarityMarek Szyprowski
Current USB3503 driver ignores GPIO polarity and always operates as if the GPIO lines were flagged as ACTIVE_HIGH. Fix the polarity for the existing USB3503 chip applications to match the chip specification and common convention for naming the pins. The only pin, which has to be ACTIVE_LOW is the reset pin. The remaining are ACTIVE_HIGH. This change allows later to fix the USB3503 driver to properly use generic GPIO bindings and read polarity from DT. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20191211145208.24976-1-m.szyprowski@samsung.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-12-30x86/insn-eval: Add support for 64-bit kernel modeJann Horn
To support evaluating 64-bit kernel mode instructions: * Replace existing checks for user_64bit_mode() with a new helper that checks whether code is being executed in either 64-bit kernel mode or 64-bit user mode. * Select the GS base depending on whether the instruction is being evaluated in kernel mode. Signed-off-by: Jann Horn <jannh@google.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Alexander Potapenko <glider@google.com> Cc: Andrey Konovalov <andreyknvl@google.com> Cc: Andrey Ryabinin <aryabinin@virtuozzo.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Dmitry Vyukov <dvyukov@google.com> Cc: "Gustavo A. R. Silva" <gustavo@embeddedor.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: kasan-dev@googlegroups.com Cc: Oleg Nesterov <oleg@redhat.com> Cc: Sean Christopherson <sean.j.christopherson@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: x86-ml <x86@kernel.org> Link: https://lkml.kernel.org/r/20191218231150.12139-1-jannh@google.com
2019-12-30x86/resctrl: Fix an imbalance in domain_remove_cpu()Qian Cai
A system that supports resource monitoring may have multiple resources while not all of these resources are capable of monitoring. Monitoring related state is initialized only for resources that are capable of monitoring and correspondingly this state should subsequently only be removed from these resources that are capable of monitoring. domain_add_cpu() calls domain_setup_mon_state() only when r->mon_capable is true where it will initialize d->mbm_over. However, domain_remove_cpu() calls cancel_delayed_work(&d->mbm_over) without checking r->mon_capable resulting in an attempt to cancel d->mbm_over on all resources, even those that never initialized d->mbm_over because they are not capable of monitoring. Hence, it triggers a debugobjects warning when offlining CPUs because those timer debugobjects are never initialized: ODEBUG: assert_init not available (active state 0) object type: timer_list hint: 0x0 WARNING: CPU: 143 PID: 789 at lib/debugobjects.c:484 debug_print_object Hardware name: HP Synergy 680 Gen9/Synergy 680 Gen9 Compute Module, BIOS I40 05/23/2018 RIP: 0010:debug_print_object Call Trace: debug_object_assert_init del_timer try_to_grab_pending cancel_delayed_work resctrl_offline_cpu cpuhp_invoke_callback cpuhp_thread_fun smpboot_thread_fn kthread ret_from_fork Fixes: e33026831bdb ("x86/intel_rdt/mbm: Handle counter overflow") Signed-off-by: Qian Cai <cai@lca.pw> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Reinette Chatre <reinette.chatre@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: john.stultz@linaro.org Cc: sboyd@kernel.org Cc: <stable@vger.kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: tj@kernel.org Cc: Tony Luck <tony.luck@intel.com> Cc: Vikas Shivappa <vikas.shivappa@linux.intel.com> Cc: x86-ml <x86@kernel.org> Link: https://lkml.kernel.org/r/20191211033042.2188-1-cai@lca.pw
2019-12-30Merge branch 'omap-for-v5.6/sdma' into omap-for-v5.6/ti-sysc-drop-pdataTony Lindgren
2019-12-30Merge tag 'sdma-dts' into omap-for-v5.6/ti-sysc-dtTony Lindgren
2019-12-30ARM: OMAP2+: Drop legacy platform data for sdmaTony Lindgren
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Vinod Koul <vkoul@kernel.org> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-30ARM: OMAP2+: Drop legacy init for sdmaTony Lindgren
We can now drop legacy init for sdma as we pass the quirks in auxdata to the dmaengine driver. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Vinod Koul <vkoul@kernel.org> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-30dmaengine: ti: omap-dma: Use cpu notifier to block idle for omap2Tony Lindgren
For omap2, we need to block idle if SDMA is busy. Let's do this with a cpu notifier and remove the custom call. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Vinod Koul <vkoul@kernel.org> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-30dmaengine: ti: omap-dma: Pass sdma auxdata to driver and use itTony Lindgren
We can now start passing sdma auxdata to the dmaengine driver to start removing the platform based sdma init. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Vinod Koul <vkoul@kernel.org> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-30dmaengine: ti: omap-dma: Configure global priority register directlyTony Lindgren
We can move the global priority register configuration to the dmaengine driver and configure it based on the of_device_id match data. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Vinod Koul <vkoul@kernel.org> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-30Merge branch 'ib-pinctrl-unreg-mappings' into develLinus Walleij
2019-12-30pinctrl: Allow modules to use pinctrl_[un]register_mappingsHans de Goede
Currently only the drivers/pinctrl/devicetree.c code allows registering pinctrl-mappings which may later be unregistered, all other mappings are assumed to be permanent. Non-dt platforms may also want to register pinctrl mappings from code which is build as a module, which requires being able to unregister the mapping when the module is unloaded to avoid dangling pointers. To allow unregistering the mappings the devicetree code uses 2 internal functions: pinctrl_register_map and pinctrl_unregister_map. pinctrl_register_map allows the devicetree code to tell the core to not memdup the mappings as it retains ownership of them and pinctrl_unregister_map does the unregistering, note this only works when the mappings where not memdupped. The only code relying on the memdup/shallow-copy done by pinctrl_register_mappings is arch/arm/mach-u300/core.c this commit replaces the __initdata with const, so that the shallow-copy is no longer necessary. After that we can get rid of the internal pinctrl_unregister_map function and just use pinctrl_register_mappings directly everywhere. This commit also renames pinctrl_unregister_map to pinctrl_unregister_mappings so that its naming matches its pinctrl_register_mappings counter-part and exports it. Together these 2 changes will allow non-dt platform code to register pinctrl-mappings from modules without breaking things on module unload (as they can now unregister the mapping on unload). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20191216205122.1850923-2-hdegoede@redhat.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-30powerpc/spinlocks: Include correct header for static keyJason A. Donenfeld
Recently, the spinlock implementation grew a static key optimization, but the jump_label.h header include was left out, leading to build errors: linux/arch/powerpc/include/asm/spinlock.h:44:7: error: implicit declaration of function ‘static_branch_unlikely’ 44 | if (!static_branch_unlikely(&shared_processor)) This commit adds the missing header. mpe: The build break is only seen with CONFIG_JUMP_LABEL=n. Fixes: 656c21d6af5d ("powerpc/shared: Use static key to detect shared processor") Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Reviewed-by: Srikar Dronamraju <srikar@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20191223133147.129983-1-Jason@zx2c4.com
2019-12-30nds32: fix build failure caused by page table folding updatesMike Rapoport
The commit 7c2763c42326 ("nds32: use pgtable-nopmd instead of 4level-fixup") missed the pmd_off_k() macro which caused the following build error: CC arch/nds32/mm/highmem.o In file included from arch/nds32/include/asm/page.h:57, from include/linux/mm_types_task.h:16, from include/linux/mm_types.h:5, from include/linux/mmzone.h:21, from include/linux/gfp.h:6, from include/linux/xarray.h:14, from include/linux/radix-tree.h:18, from include/linux/fs.h:15, from include/linux/highmem.h:5, from arch/nds32/mm/highmem.c:5: arch/nds32/mm/highmem.c: In function 'kmap_atomic': arch/nds32/include/asm/pgtable.h:360:44: error: passing argument 1 of 'pmd_offset' from incompatible pointer type [-Werror=incompatible-pointer-types] #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~ arch/nds32/include/asm/memory.h:33:29: note: in definition of macro '__phys_to_virt' #define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET) ^ arch/nds32/include/asm/pgtable.h:193:55: note: in expansion of macro '__va' #define pmd_page_kernel(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) ^~~~ include/asm-generic/pgtable-nop4d.h:41:24: note: in expansion of macro 'pgd_val' #define p4d_val(x) (pgd_val((x).pgd)) ^~~~~~~ include/asm-generic/pgtable-nopud.h:50:24: note: in expansion of macro 'p4d_val' #define pud_val(x) (p4d_val((x).p4d)) ^~~~~~~ include/asm-generic/pgtable-nopmd.h:49:24: note: in expansion of macro 'pud_val' #define pmd_val(x) (pud_val((x).pud)) ^~~~~~~ arch/nds32/include/asm/pgtable.h:193:60: note: in expansion of macro 'pmd_val' #define pmd_page_kernel(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) ^~~~~~~ arch/nds32/include/asm/pgtable.h:190:56: note: in expansion of macro 'pmd_page_kernel' #define pte_offset_kernel(dir, address) ((pte_t *)pmd_page_kernel(*(dir)) + pte_index(address)) ^~~~~~~~~~~~~~~ arch/nds32/mm/highmem.c:52:9: note: in expansion of macro 'pte_offset_kernel' ptep = pte_offset_kernel(pmd_off_k(vaddr), vaddr); ^~~~~~~~~~~~~~~~~ arch/nds32/include/asm/pgtable.h:362:33: note: in expansion of macro 'pgd_offset' #define pgd_offset_k(addr) pgd_offset(&init_mm, addr) ^~~~~~~~~~ arch/nds32/include/asm/pgtable.h:198:39: note: in expansion of macro 'pgd_offset_k' #define pmd_off_k(address) pmd_offset(pgd_offset_k(address), address) ^~~~~~~~~~~~ arch/nds32/mm/highmem.c:52:27: note: in expansion of macro 'pmd_off_k' ptep = pte_offset_kernel(pmd_off_k(vaddr), vaddr); ^~~~~~~~~ In file included from arch/nds32/include/asm/pgtable.h:7, from include/linux/mm.h:99, from include/linux/highmem.h:8, from arch/nds32/mm/highmem.c:5: include/asm-generic/pgtable-nopmd.h:44:42: note: expected 'pud_t *' {aka 'struct <anonymous> *'} but argument is of type 'pgd_t *' {aka 'long unsigned int *'} static inline pmd_t * pmd_offset(pud_t * pud, unsigned long address) ~~~~~~~~^~~ In file included from arch/nds32/include/asm/page.h:57, from include/linux/mm_types_task.h:16, from include/linux/mm_types.h:5, from include/linux/mmzone.h:21, from include/linux/gfp.h:6, from include/linux/xarray.h:14, from include/linux/radix-tree.h:18, from include/linux/fs.h:15, from include/linux/highmem.h:5, from arch/nds32/mm/highmem.c:5: Updating the pmd_off_k() macro to use the correct page table unfolding fixes the issue. Fixes: 7c2763c42326 ("nds32: use pgtable-nopmd instead of 4level-fixup") Link: https://lore.kernel.org/lkml/201912212139.yptX8CsV%25lkp@intel.com/ Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Mike Rapoport <rppt@linux.ibm.com> Reviewed-by: Greentime Hu <green.hu@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-12-30asm-generic/nds32: don't redefine cacheflush primitivesMike Rapoport
The commit c296d4dc13ae ("asm-generic: fix a compilation warning") changed asm-generic/cachflush.h to use static inlines instead of macros and as a result the nds32 build with CONFIG_CPU_CACHE_ALIASING=n fails: CC init/main.o In file included from arch/nds32/include/asm/cacheflush.h:43, from include/linux/highmem.h:12, from include/linux/pagemap.h:11, from include/linux/blkdev.h:16, from include/linux/blk-cgroup.h:23, from include/linux/writeback.h:14, from init/main.c:44: include/asm-generic/cacheflush.h:50:20: error: static declaration of 'flush_icache_range' follows non-static declaration static inline void flush_icache_range(unsigned long start, unsigned long end) ^~~~~~~~~~~~~~~~~~ In file included from include/linux/highmem.h:12, from include/linux/pagemap.h:11, from include/linux/blkdev.h:16, from include/linux/blk-cgroup.h:23, from include/linux/writeback.h:14, from init/main.c:44: arch/nds32/include/asm/cacheflush.h:11:6: note: previous declaration of 'flush_icache_range' was here void flush_icache_range(unsigned long start, unsigned long end); ^~~~~~~~~~~~~~~~~~ Surround the inline functions in asm-generic/cacheflush.h by ifdef's so that architectures could override them and add the required overrides to nds32. Fixes: c296d4dc13ae ("asm-generic: fix a compilation warning") Link: https://lore.kernel.org/lkml/201912212139.yptX8CsV%25lkp@intel.com/ Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Mike Rapoport <rppt@linux.ibm.com> Reviewed-by: Greentime Hu <green.hu@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-12-29x86/vdso: Provide missing include fileValdis Klētnieks
When building with C=1, sparse issues a warning: CHECK arch/x86/entry/vdso/vdso32-setup.c arch/x86/entry/vdso/vdso32-setup.c:28:28: warning: symbol 'vdso32_enabled' was not declared. Should it be static? Provide the missing header file. Signed-off-by: Valdis Kletnieks <valdis.kletnieks@vt.edu> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: x86-ml <x86@kernel.org> Link: https://lkml.kernel.org/r/36224.1575599767@turing-police
2019-12-28arm64: dts: msm8998: thermal: Add critical interrupt supportAmit Kucheria
Register critical interrupts for each of the two tsens controllers Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Link: https://lore.kernel.org/r/3ef309a98ca6445c1982ec3ff1a70db39b18f415.1575349416.git.amit.kucheria@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-28arm64: dts: msm8996: thermal: Add critical interrupt supportAmit Kucheria
Register critical interrupts for each of the two tsens controllers Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Link: https://lore.kernel.org/r/53d8f7b922ec889ed11380896c2a367ae0998db2.1575349416.git.amit.kucheria@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-28ARM: dts: qcom: Add nodes for SMP boot in IPQ40xxDamir Franusic
Add missing nodes and properties to enable SMP support on IPQ40xx devices. Booting without "saw_l2" node: [ 0.001400] CPU: Testing write buffer coherency: ok [ 0.001856] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.060163] Setting up static identity map for 0x80300000 - 0x80300060 [ 0.080140] rcu: Hierarchical SRCU implementation. [ 0.120258] smp: Bringing up secondary CPUs ... [ 0.200540] CPU1: failed to boot: -19 [ 0.280689] CPU2: failed to boot: -19 [ 0.360874] CPU3: failed to boot: -19 [ 0.360966] smp: Brought up 1 node, 1 CPU [ 0.360979] SMP: Total of 1 processors activated (96.00 BogoMIPS). [ 0.360988] CPU: All CPU(s) started in SVC mode. Then, booting with "saw_l2" node present (this patch applied): [ 0.001450] CPU: Testing write buffer coherency: ok [ 0.001904] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.060161] Setting up static identity map for 0x80300000 - 0x80300060 [ 0.080137] rcu: Hierarchical SRCU implementation. [ 0.120252] smp: Bringing up secondary CPUs ... [ 0.200958] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.281091] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002 [ 0.361264] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003 [ 0.361430] smp: Brought up 1 node, 4 CPUs [ 0.361460] SMP: Total of 4 processors activated (384.00 BogoMIPS). [ 0.361469] CPU: All CPU(s) started in SVC mode. Signed-off-by: Damir Franusic <damir.franusic@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Robert Marko <robert.marko@sartura.hr> Cc: Andy Gross <agross@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-arm-msm@vger.kernel.org Link: https://lore.kernel.org/r/20191121152902.21394-1-damir.franusic@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-28ARM: dts: qcom: apq8084: Remove all instances of IRQ_TYPE_NONEVicthor Foster
This patch removes all instances of IRQ_TYPE_NONE, which fixes warning messages during boot. It also changes interrupt types to their corresponding macros, as defined in arm-gic.h. Signed-off by: Victhor Foster <victhor.foster@ufpe.br> Link: https://lore.kernel.org/r/1238987932.9511963.1577060836760.JavaMail.zimbra@ufpe.br Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-28ARM: dts: qcom: apq8084: Change tsens definition to new styleVicthor Foster
This patch changes the tsens peripheral definition to the new style, which fixes a kernel panic caused by a change in the tsens driver, introduced by commit 37624b58542fb9f2d9a70e6ea006ef8a5f66c30b. There was a patch submitted recently to this list that should fix this problem with old device trees and the new driver, so it may be redundant at this point, in terms of fixing the kernel panic, but this should align the APQ8084 device tree with the others. Signed-off by: Victhor Foster <victhor.foster@ufpe.br> Link: https://lore.kernel.org/r/108381142.9510389.1577057823350.JavaMail.zimbra@ufpe.br Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-28ARC: pt_regs: remove hardcoded registers offsetEugeniy Paltsev
Replace hardcoded registers offset numbers by calculated via offsetof. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2019-12-27riscv: export flush_icache_all to modulesOlof Johansson
This is needed by LKDTM (crash dump test module), it calls flush_icache_range(), which on RISC-V turns into flush_icache_all(). On other architectures, the actual implementation is exported, so follow that precedence and export it here too. Fixes build of CONFIG_LKDTM that fails with: ERROR: "flush_icache_all" [drivers/misc/lkdtm/lkdtm.ko] undefined! Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-12-27riscv: reject invalid syscalls below -1David Abdurachmanov
Running "stress-ng --enosys 4 -t 20 -v" showed a large number of kernel oops with "Unable to handle kernel paging request at virtual address" message. This happens when enosys stressor starts testing random non-valid syscalls. I forgot to redirect any syscall below -1 to sys_ni_syscall. With the patch kernel oops messages are gone while running stress-ng enosys stressor. Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com> Fixes: 5340627e3fe0 ("riscv: add support for SECCOMP and SECCOMP_FILTER") Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-12-27riscv: fix compile failure with EXPORT_SYMBOL() & !MMULuc Van Oostenryck
When support for !MMU was added, the declaration of __asm_copy_to_user() & __asm_copy_from_user() were #ifdefed out hence their EXPORT_SYMBOL() give an error message like: .../riscv_ksyms.c:13:15: error: '__asm_copy_to_user' undeclared here .../riscv_ksyms.c:14:15: error: '__asm_copy_from_user' undeclared here Since these symbols are not defined with !MMU it's wrong to export them. Same for __clear_user() (even though this one is also declared in include/asm-generic/uaccess.h and thus doesn't give an error message). Fix this by doing the EXPORT_SYMBOL() directly where these symbols are defined: inside lib/uaccess.S itself. Fixes: 6bd33e1ece52 ("riscv: fix compile failure with EXPORT_SYMBOL() & !MMU") Reported-by: kbuild test robot <lkp@intel.com> Cc: Christoph Hellwig <hch@lst.de> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-12-27Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-nextDavid S. Miller
Daniel Borkmann says: ==================== pull-request: bpf-next 2019-12-27 The following pull-request contains BPF updates for your *net-next* tree. We've added 127 non-merge commits during the last 17 day(s) which contain a total of 110 files changed, 6901 insertions(+), 2721 deletions(-). There are three merge conflicts. Conflicts and resolution looks as follows: 1) Merge conflict in net/bpf/test_run.c: There was a tree-wide cleanup c593642c8be0 ("treewide: Use sizeof_field() macro") which gets in the way with b590cb5f802d ("bpf: Switch to offsetofend in BPF_PROG_TEST_RUN"): <<<<<<< HEAD if (!range_is_zero(__skb, offsetof(struct __sk_buff, priority) + sizeof_field(struct __sk_buff, priority), ======= if (!range_is_zero(__skb, offsetofend(struct __sk_buff, priority), >>>>>>> 7c8dce4b166113743adad131b5a24c4acc12f92c There are a few occasions that look similar to this. Always take the chunk with offsetofend(). Note that there is one where the fields differ in here: <<<<<<< HEAD if (!range_is_zero(__skb, offsetof(struct __sk_buff, tstamp) + sizeof_field(struct __sk_buff, tstamp), ======= if (!range_is_zero(__skb, offsetofend(struct __sk_buff, gso_segs), >>>>>>> 7c8dce4b166113743adad131b5a24c4acc12f92c Just take the one with offsetofend() /and/ gso_segs. Latter is correct due to 850a88cc4096 ("bpf: Expose __sk_buff wire_len/gso_segs to BPF_PROG_TEST_RUN"). 2) Merge conflict in arch/riscv/net/bpf_jit_comp.c: (I'm keeping Bjorn in Cc here for a double-check in case I got it wrong.) <<<<<<< HEAD if (is_13b_check(off, insn)) return -1; emit(rv_blt(tcc, RV_REG_ZERO, off >> 1), ctx); ======= emit_branch(BPF_JSLT, RV_REG_T1, RV_REG_ZERO, off, ctx); >>>>>>> 7c8dce4b166113743adad131b5a24c4acc12f92c Result should look like: emit_branch(BPF_JSLT, tcc, RV_REG_ZERO, off, ctx); 3) Merge conflict in arch/riscv/include/asm/pgtable.h: <<<<<<< HEAD ======= #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1) #define VMALLOC_END (PAGE_OFFSET - 1) #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE) #define BPF_JIT_REGION_SIZE (SZ_128M) #define BPF_JIT_REGION_START (PAGE_OFFSET - BPF_JIT_REGION_SIZE) #define BPF_JIT_REGION_END (VMALLOC_END) /* * Roughly size the vmemmap space to be large enough to fit enough * struct pages to map half the virtual address space. Then * position vmemmap directly below the VMALLOC region. */ #define VMEMMAP_SHIFT \ (CONFIG_VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT) #define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT) #define VMEMMAP_END (VMALLOC_START - 1) #define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE) #define vmemmap ((struct page *)VMEMMAP_START) >>>>>>> 7c8dce4b166113743adad131b5a24c4acc12f92c Only take the BPF_* defines from there and move them higher up in the same file. Remove the rest from the chunk. The VMALLOC_* etc defines got moved via 01f52e16b868 ("riscv: define vmemmap before pfn_to_page calls"). Result: [...] #define __S101 PAGE_READ_EXEC #define __S110 PAGE_SHARED_EXEC #define __S111 PAGE_SHARED_EXEC #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1) #define VMALLOC_END (PAGE_OFFSET - 1) #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE) #define BPF_JIT_REGION_SIZE (SZ_128M) #define BPF_JIT_REGION_START (PAGE_OFFSET - BPF_JIT_REGION_SIZE) #define BPF_JIT_REGION_END (VMALLOC_END) /* * Roughly size the vmemmap space to be large enough to fit enough * struct pages to map half the virtual address space. Then * position vmemmap directly below the VMALLOC region. */ #define VMEMMAP_SHIFT \ (CONFIG_VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT) #define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT) #define VMEMMAP_END (VMALLOC_START - 1) #define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE) [...] Let me know if there are any other issues. Anyway, the main changes are: 1) Extend bpftool to produce a struct (aka "skeleton") tailored and specific to a provided BPF object file. This provides an alternative, simplified API compared to standard libbpf interaction. Also, add libbpf extern variable resolution for .kconfig section to import Kconfig data, from Andrii Nakryiko. 2) Add BPF dispatcher for XDP which is a mechanism to avoid indirect calls by generating a branch funnel as discussed back in bpfconf'19 at LSF/MM. Also, add various BPF riscv JIT improvements, from Björn Töpel. 3) Extend bpftool to allow matching BPF programs and maps by name, from Paul Chaignon. 4) Support for replacing cgroup BPF programs attached with BPF_F_ALLOW_MULTI flag for allowing updates without service interruption, from Andrey Ignatov. 5) Cleanup and simplification of ring access functions for AF_XDP with a bonus of 0-5% performance improvement, from Magnus Karlsson. 6) Enable BPF JITs for x86-64 and arm64 by default. Also, final version of audit support for BPF, from Daniel Borkmann and latter with Jiri Olsa. 7) Move and extend test_select_reuseport into BPF program tests under BPF selftests, from Jakub Sitnicki. 8) Various BPF sample improvements for xdpsock for customizing parameters to set up and benchmark AF_XDP, from Jay Jayatheerthan. 9) Improve libbpf to provide a ulimit hint on permission denied errors. Also change XDP sample programs to attach in driver mode by default, from Toke Høiland-Jørgensen. 10) Extend BPF test infrastructure to allow changing skb mark from tc BPF programs, from Nikita V. Shirokov. 11) Optimize prologue code sequence in BPF arm32 JIT, from Russell King. 12) Fix xdp_redirect_cpu BPF sample to manually attach to tracepoints after libbpf conversion, from Jesper Dangaard Brouer. 13) Minor misc improvements from various others. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2019-12-27arm64: dts: allwinner: h6: Add thermal sensor and thermal zonesOndrej Jirman
There are two sensors, one for CPU, one for GPU. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-26arm64: dts: qcom: db845c: Move remoteproc firmware to sdm845Bjorn Andersson
The redistributable firmware should work on any engineering device, so lets push this to qcom/sdm845, rather than qcom/db845c. Also specify the path for the modem firmware. Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20191113203951.3704428-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26ARM: bcm: Select ARM_AMBA for ARCH_BRCMSTBFlorian Fainelli
BCM7211 uses a PL011 UART and is supported using ARCH_BRCMSTB, make sure that we can enable that driver by selecting ARM_AMBA. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-12-26arm64: dts: qcom: msm8996: Introduce IFC6640Bjorn Andersson
Introduce a base dts for the Inforce 6640 Single Board Computer. This initial commit boots to console on the uart and provides UFS and SD card storage support. Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26arm64: dts: qcom: db820c: Use regulator names from schematicsBjorn Andersson
Update the regulator names in db820c.dtsi to use the names from the schematics, instead of the made up genric names. Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26arm64: dts: qcom: msm8996: Sort all nodes in msm8996.dtsiBjorn Andersson
Sort all the nodes by unit address, then name. Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26arm64: dts: qcom: msm8996: Pad addressesBjorn Andersson
Pad all addresses in msm8996.dtsi to 8 digits, in order to make it easier to ensure ordering when adding new nodes. Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26arm64: dts: qcom: db820c: Remove pin specific filesBjorn Andersson
Rather than scattering pinctrl definitions in various files, merge the nodes into db820c.dtsi to make it easier to navigate. Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26arm64: dts: qcom: db820c: Sort all nodesBjorn Andersson
Sort all nodes in db820c.dtsi based on address, then name. Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26arm64: dts: qcom: db820c: Group root nodesBjorn Andersson
Prior refactoring have left a few root nodes scattered throughout db820c.dtsi, group these at the top of the file. Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26arm64: dts: qcom: msm8996: Move regulators to db820cBjorn Andersson
As the definition of available PMICs and the names of their outputs are board specifc move this to db820c.dtsi Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26arm64: dts: qcom: msm8996: Move regulator consumers to db820cBjorn Andersson
Supplies for the various components in the SoC depends on board layout, so move the supply definitions to db820c.dtsi instead of carrying them in the platform dtsi. Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26arm64: dts: qcom: msm8996: Use node references in db820cBjorn Andersson
Instead of mimicing the structure of the platform, reference nodes by their label in apq8096-db820c.dtsi. Add labels in msm8996.dtsi where necessary. Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26arm64: dts: qcom: db820c: Move non-soc entries out of /socBjorn Andersson
The USB id pins and wlan regulator are not platform devices, so move them out of /soc Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-26ARM: dts: sunxi: Add Libre Computer ALL-H3-IT H5 boardChen-Yu Tsai
The Libre Computer ALL-H3-IT board is a small single board computer that is roughly the same size as the Raspberry Pi Zero, or around 20% smaller than a credit card. The board features: - H2, H3, or H5 SoC from Allwinner - 2 DDR3 DRAM chips - Realtek RTL8821CU based WiFi module - 128 Mbit SPI-NOR flash - micro-SD card slot - micro HDMI video output - FPC connector for camera sensor module - generic Raspberri-Pi style 40 pin GPIO header - additional pin headers for extra USB host ports, ananlog audio and IR receiver Only H5 variant test samples were made available, but the vendor does have plans to include at least an H3 variant. Thus the device tree is split much like the ALL-H3-CC, with a common dtsi file for the board design, and separate dts files including the common board file and the SoC dtsi file. The other variants will be added as they are made available. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>