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2020-05-22mips: Add udelay lpj numbers adjustmentSerge Semin
Loops-per-jiffies is a special number which represents a number of noop-loop cycles per CPU-scheduler quantum - jiffies. As you understand aside from CPU-specific implementation it depends on the CPU frequency. So when a platform has the CPU frequency fixed, we have no problem and the current udelay interface will work just fine. But as soon as CPU-freq driver is enabled and the cores frequency changes, we'll end up with distorted udelay's. In order to fix this we have to accordinly adjust the per-CPU udelay_val (the same as the global loops_per_jiffy) number. This can be done in the CPU-freq transition event handler. We subscribe to that event in the MIPS arch time-inititalization method. Co-developed-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-22mips: Add CPS_NS16550_WIDTH configSerge Semin
On some platforms IO-memory might require to use a proper load/store instructions (like Baikal-T1 IO-memory). To fix the cps-vec UART debug printout let's add the CONFIG_CPS_NS16550_WIDTH config to determine which instructions lb/sb, lh/sh or lw/sw are required for MMIO operations. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-22mips: Add CONFIG/CONFIG6/Cause reg fields macroSerge Semin
There are bit fields which persist in the MIPS CONFIG and CONFIG6 registers, but haven't been described in the generic mipsregs.h header so far. In particular, the generic CONFIG bitfields are BE - endian mode, BM - burst mode, SB - SimpleBE, OCP interface mode indicator, UDI - user-defined "CorExtend" instructions, DSP - data scratch pad RAM present, ISP - instruction scratch pad RAM present, etc. The core-specific CONFIG6 bitfields are JRCD - jump register cache prediction disable, R6 - MIPSr6 extensions enable, IFUPerfCtl - IFU performance control, SPCD - sleep state performance counter, DLSB - disable load/store bonding. A new exception code reported in the ExcCode field of the Cause register: 30 - Parity/ECC error exception happened on either fetch, load or cache refill. Lets add them to the mipsregs.h header to be used in future platform code, which have them utilized. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-22mips: Add CP0 Write Merge config supportSerge Semin
CP0 config register may indicate whether write-through merging is allowed. Currently there are two types of the merging available: SysAD Valid and Full modes. Whether each of them are supported by the core is implementation dependent. Moreover whether the ability to change the mode also depends on the chip family instance. Taking into account all of this we created a dedicated mm_config() method to detect and enable merging if it's supported. It is called for MIPS-type processors at CPU-probe stage and attempts to detect whether the write merging is available. If it's known to be supported and switchable, then switch on the full mode. Otherwise just perform the CP0.Config.MM field analysis. In addition there are platforms like InterAptiv/ProAptiv, which do have the MM bit field set by default, but having write-through cacheing unsupported makes write-merging also unsupported. In this case we just ignore the MM field value. Co-developed-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-22mips: Fix cpu_has_mips64r1/2 activation for MIPS32 CPUsSerge Semin
Commit 1aeba347b3a9 ("MIPS: Hardcode cpu_has_mips* where target ISA allows") updated the cpu_has_mips* macro to be replaced with a constant expression where it's possible. By mistake it wasn't done correctly for cpu_has_mips64r1/cpu_has_mips64r2 macro. They are defined to be replaced with conditional expression __isa_range_or_flag(), which means either ISA revision being within the range or the corresponding CPU options flag was set at the probe stage or both being true at the same time. But the ISA level value doesn't indicate whether the ISA is MIPS32 or MIPS64. Due to this if we select MIPS32r1 - MIPS32r5 architectures the __isa_range() macro will activate the cpu_has_mips64rX flags, which is incorrect. In order to fix the problem we make sure the 64bits CPU support is enabled by means of checking the flag cpu_has_64bits aside with proper ISA range and specific Revision flag being set. Fixes: 1aeba347b3a9 ("MIPS: Hardcode cpu_has_mips* where target ISA allows") Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-22mips: Add MIPS Warrior P5600 supportSerge Semin
This is a MIPS32 Release 5 based IP core with XPA, EVA, dual/quad issue exec pipes, MMU with two-levels TLB, UCA, MSA, MDU core level features and system level features like up to six P5600 calculation cores, CM2 with L2 cache, IOCU/IOMMU (though might be unused depending on the system-specific IP core configuration), GIC, CPC, virtualisation module, eJTAG and PDtrace. As being MIPS32 Release 5 based core it provides all the features available by the CPU_MIPS32_R5 config, while adding a few more like UCA attribute support, availability of CPU-freq (by means of L2/CM clock ratio setting), EI/VI GIC modes detection at runtime. In addition to this if P5600 architecture is enabled modern GNU GCC provides a specific tuning for P5600 processors with respect to the classic MIPS32 Release 5. First of all branch-likely avoidance is activated only when the code is compiled with the speed optimization (avoidance is always enabled for the pure MIPS32 Release 5 architecture). Secondly the madd/msub avoidance is enabled since madd/msub utilization isn't profitable due to overhead of getting the result out of the HI/LO registers. Multiply-accumulate instructions are activated and utilized together with the necessary code reorder when multiply-add/multiply-subtract statements are met. Finally load/store bonding is activated by default. All of these optimizations may make the code relatively faster than if just MIP32 release 5 architecture was requested. Co-developed-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-22mips: Add MIPS Release 5 supportSerge Semin
There are five MIPS32/64 architecture releases currently available: from 1 to 6 except fourth one, which was intentionally skipped. Three of them can be called as major: 1st, 2nd and 6th, that not only have some system level alterations, but also introduced significant core/ISA level updates. The rest of the MIPS architecture releases are minor. Even though they don't have as much ISA/system/core level changes as the major ones with respect to the previous releases, they still provide a set of updates (I'd say they were intended to be the intermediate releases before a major one) that might be useful for the kernel and user-level code, when activated by the kernel or compiler. In particular the following features were introduced or ended up being available at/after MIPS32/64 Release 5 architecture: + the last release of the misaligned memory access instructions, + virtualisation - VZ ASE - is optional component of the arch, + SIMD - MSA ASE - is optional component of the arch, + DSP ASE is optional component of the arch, + CP0.Status.FR=1 for CP1.FIR.F64=1 (pure 64-bit FPU general registers) must be available if FPU is implemented, + CP1.FIR.Has2008 support is required so CP1.FCSR.{ABS2008,NAN2008} bits are available. + UFR/UNFR aliases to access CP0.Status.FR from user-space by means of ctc1/cfc1 instructions (enabled by CP0.Config5.UFR), + CP0.COnfig5.LLB=1 and eretnc instruction are implemented to without accidentally clearing LL-bit when returning from an interrupt, exception, or error trap, + XPA feature together with extended versions of CPx registers is introduced, which needs to have mfhc0/mthc0 instructions available. So due to these changes GNU GCC provides an extended instructions set support for MIPS32/64 Release 5 by default like eretnc/mfhc0/mthc0. Even though the architecture alteration isn't that big, it still worth to be taken into account by the kernel software. Finally we can't deny that some optimization/limitations might be found in future and implemented on some level in kernel or compiler. In this case having even intermediate MIPS architecture releases support would be more than useful. So the most of the changes provided by this commit can be split into either compile- or runtime configs related. The compile-time related changes are caused by adding the new CONFIG_CPU_MIPS32_R5/CONFIG_CPU_MIPSR5 configs and concern the code activating MIPSR2 or MIPSR6 already implemented features (like eretnc/LLbit, mthc0/mfhc0). In addition CPU_HAS_MSA can be now freely enabled for MIPS32/64 release 5 based platforms as this is done for CPU_MIPS32_R6 CPUs. The runtime changes concerns the features which are handled with respect to the MIPS ISA revision detected at run-time by means of CP0.Config.{AT,AR} bits. Alas these fields can be used to detect either r1 or r2 or r6 releases. But since we know which CPUs in fact support the R5 arch, we can manually set MIPS_CPU_ISA_M32R5/MIPS_CPU_ISA_M64R5 bit of c->isa_level and then use cpu_has_mips32r5/cpu_has_mips64r5 where it's appropriate. Since XPA/EVA provide too complex alterationss and to have them used with MIPS32 Release 2 charged kernels (for compatibility with current platform configs) they are left to be setup as a separate kernel configs. Co-developed-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-22Merge branch 'v5.7-fixes' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/fixes * 'v5.7-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: soc: mediatek: cmdq: return send msg error code arm64: dts: mt8173: fix vcodec-enc clock Link: https://lore.kernel.org/r/33a0556a-e2a3-7f0b-b09b-4516642a4bfe@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-22Merge tag 'imx-fixes-5.7-2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 5.7, round 2: One imx6q-bx50v3 device tree change to fix an issue, attempting atomic modeset while using HDMI and display port at the same time causes LDB clock programming to destroy the programming of HDMI. * tag 'imx-fixes-5.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts/imx6q-bx50v3: Set display interface clock parents Link: https://lore.kernel.org/r/20200521150719.GB24084@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'hisi-arm64-defconfig-for-5.8' of ↵Arnd Bergmann
git://github.com/hisilicon/linux-hisi into arm/defconfig ARM64: hisilicon: defconfig updates for 5.8 - Enable PCI PASID as built-in module and UACCE/SEC2/HPRE as loadable modules to support UACCE use case for the D06CS board * tag 'hisi-arm64-defconfig-for-5.8' of git://github.com/hisilicon/linux-hisi: arm64: defconfig: Enable UACCE/PCI PASID/SEC2/HPRE configs Link: https://lore.kernel.org/r/5EBE4217.6000900@hisilicon.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'amlogic-defconfig' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/defconfig arm64: defconfig: Amlogic updates for v5.8 - enable meson gx audio as module * tag 'amlogic-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: defconfig: enable meson gx audio as module Link: https://lore.kernel.org/r/5ec6f4f6.1c69fb81.3fe34.b693@mx.google.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'qcom-arm64-defconfig-for-5.8' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/defconfig Qualcomm ARM64 defconfig updates for v5.8 This enables SM8250 GCC clock driver, SC7180 GCC clock driver and SC7180 TLMM pinctrl driver, the IPA and RMNET drivers, CCI, camera subsystem and camera clock drivers and removes the now depricated GLINK_SSR entry. * tag 'qcom-arm64-defconfig-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: defconfig: enable Qualcomm IPA and RMNet modules arm64: defconfig: Enable Qualcomm SC7180 pinctrl and gcc arm64: defconfig: Remove QCOM_GLINK_SSR arm64: defconfig: Enable SM8250 GCC driver arm64: defconfig: Enable Qualcomm CAMCC, CAMSS and CCI drivers Link: https://lore.kernel.org/r/20200519052502.1249888-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'at91-5.8-defconfig' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/defconfig AT91 defconfig for 5.8 - Add PIOBU and MCP16502 regulator to sama5 defconfig * tag 'at91-5.8-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: configs: at91: sama5: enable MCP16502 regulator ARM: configs: at91: sama5: enable SAMA5D2_PIOBU Link: https://lore.kernel.org/r/20200518213254.GA26598@piout.net Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'sunxi-config-for-5.8-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/defconfig Two patches to enable the new cpufreq support on the H6 for the arm64 defconfig to enable the audio codec in sunxi_defconfig. * tag 'sunxi-config-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: configs: Enable sun50i cpufreq nvmem ARM: configs: sunxi: Add sun8i analog codec Link: https://lore.kernel.org/r/9fd4d403-f6c8-420d-8b03-62e8485a0b3d.lettre@localhost Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'renesas-arm-defconfig-for-v5.8-tag2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/defconfig Renesas ARM defconfig updates for v5.8 (take two) - Enable support for the new RZ/G1H SoC in the shmobile and multi_v7 defconfigs. * tag 'renesas-arm-defconfig-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: ARM: multi_v7_defconfig: Enable r8a7742 SoC ARM: shmobile: defconfig: Enable r8a7742 SoC Link: https://lore.kernel.org/r/20200515100547.14671-2-geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'samsung-defconfig-5.8' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/defconfig Samsung defconfig changes for v5.8 1. Enable drivers for Exynos3250 Rinato Bluetooth, 2. Build WiFi mac80211 framework as module so it will get loaded the same time as regulatory data. * tag 'samsung-defconfig-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: exynos_defconfig: Compile MAC80211/CFG80211 as modules ARM: exynos_defconfig: Enable serial bus and BCM HCIUART drivers Link: https://lore.kernel.org/r/20200512122922.5700-1-krzk@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'arm-soc/for-5.8/defconfig' of ↵Arnd Bergmann
https://github.com/Broadcom/stblinux into arm/defconfig This pull request contains Broadcom ARM-based SoCs defconfig file updates for v5.8, please pull the following: - Nicolas enables the fixed-regulator in bcm2835_defconfig which is need to control the Raspberry Pi 4 SD car power supply * tag 'arm-soc/for-5.8/defconfig' of https://github.com/Broadcom/stblinux: ARM: bcm2835_defconfig: Enable fixed-regulator Link: https://lore.kernel.org/r/20200511210522.28243-1-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'renesas-arm-defconfig-for-v5.8-tag1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/defconfig Renesas ARM defconfig updates for v5.8 - Refresh shmobile_defconfig for v5.7-rc1. * tag 'renesas-arm-defconfig-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: ARM: shmobile: defconfig: Refresh for v5.7-rc1 Link: https://lore.kernel.org/r/20200430084849.1457-2-geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'ux500-defconfig-v5.7' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/defconfig Ux500 defconfig changes for functionality merged in the v5.7 merge window: - Enable drivers for the Golden and Skomer mobile phones. - Enable drivers for the HREF520 reference design. * tag 'ux500-defconfig-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: defconfig: u8500: Enable new drivers for ux500 ARM: defconfig: u8500: Enable new drivers for samsung-golden Link: https://lore.kernel.org/r/CACRpkdaxT8dc=mhAd51+KtQ0K4Uj5tttt36bYJLqP_hNfWXP8w@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge branch 'mmp/fixes' into arm/dtArnd Bergmann
These were queued for v5.7 as bugfixes, merge them here as well to resolve the conflicts. * mmp/fixes: ARM: dts: mmp3: Drop usb-nop-xceiv from HSIC phy ARM: dts: mmp3-dell-ariel: Fix the SPI devices ARM: dts: mmp3: Use the MMP3 compatible string for /clocks Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge branch 'mmp/fixes' into arm/fixesArnd Bergmann
These three fixes should make it into linux-5.7 and also into the branch for other mmp dt changes for v5.8, so I created a branch for them. * mmp/fixes: ARM: dts: mmp3: Drop usb-nop-xceiv from HSIC phy ARM: dts: mmp3-dell-ariel: Fix the SPI devices ARM: dts: mmp3: Use the MMP3 compatible string for /clocks Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21ARM: dts: mmp3: Drop usb-nop-xceiv from HSIC phyLubomir Rintel
"usb-nop-xceiv" is good enough if we don't lose the configuration done by the firmware, but we'd really prefer a real driver. Unfortunately, the PHY core is odd in that when the node is compatible with "usb-nop-xceiv", it ignores the other compatible strings. Let's just remove it. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Cc: <stable@vger.kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21ARM: dts: mmp3-dell-ariel: Fix the SPI devicesLubomir Rintel
I've managed to get about everything wrong while digging these out of OEM's board file. Correct the bus numbers, the exact model of the NOR flash, polarity of the chip selects and align the SPI frequency with the data sheet. Tested that it works now, with a slight fix to the PXA SSP driver. Link: https://lore.kernel.org/r/20200419171157.672999-16-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Cc: <stable@vger.kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21ARM: dts: mmp3: Use the MMP3 compatible string for /clocksLubomir Rintel
Clocks are in fact slightly different on MMP3. In particular, PLL2 is fixed to a different frequency, there's an extra PLL3, and the GPU clocks are configured differently. Link: https://lore.kernel.org/r/20200419171157.672999-15-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Cc: <stable@vger.kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21ARM: dts: mmp3: Add the fifth SD HCILubomir Rintel
There's one extra SDHCI on MMP3, used by the internal SD card on OLPC XO-4. Add it to the device tree. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21ARM: dts: berlin*: Fix up the SDHCI node namesLubomir Rintel
The node name preferred by mmc-controller.yaml binding spec is "mmc": berlin2-sony-nsz-gs7.dt.yaml: sdhci@ab0000: $nodename:0: 'sdhci@ab0000' does not match '^mmc(@.*)?$' berlin2-sony-nsz-gs7.dt.yaml: sdhci@ab0800: $nodename:0: 'sdhci@ab0800' does not match '^mmc(@.*)?$' berlin2-sony-nsz-gs7.dt.yaml: sdhci@ab1000: $nodename:0: 'sdhci@ab1000' does not match '^mmc(@.*)?$' berlin2cd-google-chromecast.dt.yaml: sdhci@ab0000: $nodename:0: 'sdhci@ab0000' does not match '^mmc(@.*)?$' berlin2cd-valve-steamlink.dt.yaml: sdhci@ab0000: $nodename:0: 'sdhci@ab0000' does not match '^mmc(@.*)?$' berlin2q-marvell-dmp.dt.yaml: sdhci@ab0000: $nodename:0: 'sdhci@ab0000' does not match '^mmc(@.*)?$' berlin2q-marvell-dmp.dt.yaml: sdhci@ab0800: $nodename:0: 'sdhci@ab0800' does not match '^mmc(@.*)?$' berlin2q-marvell-dmp.dt.yaml: sdhci@ab1000: $nodename:0: 'sdhci@ab1000' does not match '^mmc(@.*)?$' Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21ARM: dts: mmp3: Fix USB & USB PHY node namesLubomir Rintel
There are better generic ones and the validation is going to complain: mmp3-dell-ariel.dt.yaml: hsic@f0001000: $nodename:0: 'hsic@f0001000' does not match '^usb(@.*)?' mmp3-dell-ariel.dt.yaml: hsic@f0002000: $nodename:0: 'hsic@f0002000' does not match '^usb(@.*)?' ... Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21ARM: dts: mmp3: Fix L2 cache controller node nameLubomir Rintel
The current one makes validation unhappy: mmp3-dell-ariel.dt.yaml: l2-cache-controller@d0020000: $nodename:0: 'l2-cache-controller@d0020000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21ARM: dts: mmp*: Fix up encoding of the /rtc interrupts propertyLubomir Rintel
This way the device tree validator learns that each cell of the property constitutes a separate item. Otherwise it gets unnecessairly upset: mmp3-dell-ariel.dt.yaml: rtc@d4010000: interrupts: [[1, 0]] is too short Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21ARM: dts: pxa*: Fix up encoding of the /rtc interrupts propertyLubomir Rintel
This way the device tree validator learns that each cell of the property constitutes a separate item. Otherwise it gets unnecessairly upset: pxa168-aspenite.dt.yaml: rtc@d4010000: interrupts: [[5, 6]] is too short pxa910-dkb.dt.yaml: rtc@d4010000: interrupts: [[5, 6]] is too short Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21ARM: dts: pxa910: Fix the gpio interrupt cell numberLubomir Rintel
gpio-pxa uses two cell to encode the interrupt source: the pin number and the trigger type. Adjust the device node accordingly. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21ARM: dts: pxa3xx: Fix up encoding of the /gpio interrupts propertyLubomir Rintel
This way the device tree validator learns that each cell of the property constitutes a separate item. Otherwise it gets unnecessairly upset: pxa300-raumfeld-speaker-s.dt.yaml: gpio@40e00000: interrupts: [[8, 9, 10]] is too short Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Robert Jarzmik <robert.jarzmik@free.fr.> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21ARM: dts: pxa168: Fix the gpio interrupt cell numberLubomir Rintel
gpio-pxa uses two cell to encode the interrupt source: the pin number and the trigger type. Adjust the device node accordingly. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21ARM: dts: pxa168: Add missing address/size cells to i2c nodesLubomir Rintel
This makes the nodes compatible with the generic i2c binding without the board DTS files having to supply the necessary properties themselves. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21ARM: dts: dove: Fix interrupt controller node nameLubomir Rintel
The current ones makes validation unhappy: dove-d3plug.dt.yaml: main-interrupt-ctrl@20200: $nodename:0: 'main-interrupt-ctrl@20200' does not match '^interrupt-controller(@[0-9a-f,]+)*$' Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21ARM: dts: kirkwood: Fix interrupt controller node nameLubomir Rintel
The current ones makes validation unhappy: kirkwood-lsxhl.dt.yaml: main-interrupt-ctrl@20200: $nodename:0: 'main-interrupt-ctrl@20200' does not match '^interrupt-controller(@[0-9a-f,]+)*$' Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'v5.8-rockchip-dts32-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt RGA node for rk322x, wifi node for rk3229-xms6 and some cleanups. * tag 'v5.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: add rga node for rk322x ARM: dts: remove disable-wp from rk3229-xms6 emmc ARM: dts: enable WLAN for Mecer Xtreme Mini S6 ARM: dts: rockchip: remove identical #include from rk3288.dtsi ARM: dts: rockchip: rename and label gpio-led subnodes Link: https://lore.kernel.org/r/3735080.6Cexqc3t0Y@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'v5.8-rockchip-dts64-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt New soc variant the rk3326 which is essentially a px30 with only one display controller and a new board using it, the Odroid Advance Go. sdcard regulator for the rockpro64 and a lot of devicetree fixes making the dt-binding check a lot happier. * tag 'v5.8-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (22 commits) arm64: dts: rockchip: fix pinctrl-names for gpio-leds node on rk3326-odroid-go2 arm64: dts: rockchip: fix pd_tcpc0 and pd_tcpc1 node position on rk3399 arm64: dts: rockchip: add bus-width properties to mmc nodes for px30 arm64: dts: rockchip: remove disable-wp from rk3308-roc-cc emmc node arm64: dts: rockchip: rename and label gpio-led subnodes arm64: dts: rockchip: fix defines in pd_vio node for rk3399 arm64: dts: rockchip: fix &pinctrl phy sub nodename for rk3399-orangepi arm64: dts: rockchip: fix rtl8211e nodename for rk3399-orangepi arm64: dts: rockchip: fix &pinctrl phy sub nodename for rk3399-nanopi4 arm64: dts: rockchip: fix rtl8211e nodename for rk3399-nanopi4 arm64: dts: rockchip: fix rtl8211f nodename for rk3328 Beelink A1 arm64: dts: rockchip: fix phy nodename for rk3328 include: dt-bindings: rockchip: remove unused defines arm64: dts: rockchip: replace RK_FUNC defines in rk3326-odroid-go2 arm64: dts: rockchip: Define the rockchip Video Decoder node on rk3399 arm64: dts: rockchip: remove #sound-dai-cells from &spdif node of rk3399-hugsun-x99.dts arm64: dts: rockchip: remove #sound-dai-cells from &i2s1 node of rk3399-pinebook-pro.dts arm64: dts: rockchip: add Odroid Advance Go dt-bindings: Add binding for Hardkernel Odroid Go Advance arm64: dts: rockchip: add core devicetree for rk3326 ... Link: https://lore.kernel.org/r/1970481.V9vR1fIhX2@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'mvebu-dt64-5.8-1' of git://git.infradead.org/linux-mvebu into arm/dtArnd Bergmann
mvebu dt64 for 5.8 (part 1) Armada 3720 based SoC: + Fix PCIe support allowing to use Compex wifi cards + Turris MOX board: - fix SFP binding - forbid SDR104 on SDIO to pass electromagnetic interference certifications + uDPU board: add i2c recovery support Armada 8040 based SoC: SolidRun 8040: update phy interface * tag 'mvebu-dt64-5.8-1' of git://git.infradead.org/linux-mvebu: arm64: dts: armada-3720-turris-mox: fix SFP binding arm64: dts: armada-3720-turris-mox: forbid SDR104 on SDIO for FCC purposes arm64: dts: add uDPU i2c bus recovery arm64: dts: marvell: drop i2c timeout-ms property arm64: dts: marvell: armada-37xx: Move PCIe max-link-speed property arm64: dts: marvell: armada-37xx: Move PCIe comphy handle property arm64: dts: marvell: armada-37xx: Set pcie_reset_pin to gpio function arm64: dts: update SolidRun Armada 8040 phy interface types Link: https://lore.kernel.org/r/878shmeffd.fsf@FE-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'mvebu-dt-5.8-1' of git://git.infradead.org/linux-mvebu into arm/dtArnd Bergmann
mvebu dt for 5.8 (part 1) Add LCP panel support on ReadyNAS NV+v2 Add new board: Check Point L-50, kirkwood based SoC router Remove unused property 'timeout-ms' in i2c nodes * tag 'mvebu-dt-5.8-1' of git://git.infradead.org/linux-mvebu: ARM: dts: kirkwood: ReadyNAS NV+v2: Add LCD panel ARM: dts: kirkwood: Add Check Point L-50 board ARM: dts: marvell: drop i2c timeout-ms property Link: https://lore.kernel.org/r/87blmiefgw.fsf@FE-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'juno-updates-5.8' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt ARMv8 Juno/Vexpress/Fast Models updates for v5.8 Various miscellaneous device tree source fixes to make them fully binding compliant. It includes fixing various device node names, order of interrupt properties, compatible names, address and size cell fields and their aligment with children nodes as well as moving some fixed devices out of bus node. * tag 'juno-updates-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: Fix SCPI shared mem node name arm64: dts: vexpress: Fix VExpress LED names arm64: dts: juno: Fix GPU interrupt order arm64: dts: fvp/juno: Fix bus node names arm64: dts: fvp: Fix SMMU DT node arm64: dts: fvp/juno: Fix serial node names arm64: dts: juno: Use proper DT node name for USB arm64: dts: fvp: Fix ITS node names and #msi-cells arm64: dts: fvp: Fix GIC child nodes arm64: dts: juno: Fix GIC child nodes arm64: dts: fvp: Fix GIC compatible names arm64: dts: juno: Fix mem-timer arm64: dts: juno: Move fixed devices out of bus node arm64: dts: fvp: Move fixed clocks out of bus node arm64: dts: vexpress: Move fixed devices out of bus node arm64: dts: fvp: Move fixed devices out of bus node arm64: dts: fvp/juno: Fix node address fields Link: https://lore.kernel.org/r/20200519094702.GA32975@bogus Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21x86/tsc: Add tsc_early_khz command line parameterKrzysztof Piecuch
Changing base clock frequency directly impacts TSC Hz but not CPUID.16h value. An overclocked CPU supporting CPUID.16h and with partial CPUID.15h support will set TSC KHZ according to "best guess" given by CPUID.16h relying on tsc_refine_calibration_work to give better numbers later. tsc_refine_calibration_work will refuse to do its work when the outcome is off the early TSC KHZ value by more than 1% which is certain to happen on an overclocked system. Fix this by adding a tsc_early_khz command line parameter that makes the kernel skip early TSC calibration and use the given value instead. This allows the user to provide the expected TSC frequency that is closer to reality than the one reported by the hardware, enabling tsc_refine_calibration_work to do meaningful error checking. [ tglx: Made the variable __initdata as it's only used on init and removed the error checking in the argument parser because kstrto*() only stores to the variable if the string is valid ] Signed-off-by: Krzysztof Piecuch <piecuch@protonmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/O2CpIOrqLZHgNRkfjRpz_LGqnc1ix_seNIiOCvHY4RHoulOVRo6kMXKuLOfBVTi0SMMevg6Go1uZ_cL9fLYtYdTRNH78ChaFaZyG3VAyYz8=@protonmail.com
2020-05-21Merge tag 'qcom-dts-for-5.8' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM dts updates for v5.8 This adds SCM firmware node for IPQ806x and fixes the high resolution timer for IPQ4019. Samsung Galaxy S5 gains regulators, eMMC and USB support. * tag 'qcom-dts-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: msm8974-klte: Add max77826 pmic node ARM: dts: qcom: msm8974-klte: Add USB node ARM: dts: qcom: msm8974-klte: Add sdhci1 node ARM: dts: qcom: msm8974-klte: Add gpio-keys nodes ARM: dts: qcom: msm8974-klte: Remove inherited vreg_boost node ARM: dts: qcom: msm8974-klte: Add pma8084 regulator nodes ARM: dts: qcom: ipq4019: fix high resolution timer ARM: dts: qcom: add scm definition to ipq806x Link: https://lore.kernel.org/r/20200519052538.1250076-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'qcom-arm64-for-5.8' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM64 DT updates for v5.8 For SDM845 this defines the IPA network accelerator and the CCI camera control bus, it defines the required UFS reset and adds WiFi for the Lenovo Yoga C630 and defines GPIO pin names and adds OV8856 and OC7251 camera nodes for DB845c. For SC7180 it adds GPU support, defines the modem remoteproc, adds the IPA network accelerator, Coresight and ETM support, adds cpuidle low power states and updates the CPUs' compatible. For SM8250 it adds regulators from the PM8150, PM8150L and PM8009 and adds voltage corners, it defines the nodes for UFS PHY and controller and finally corrects a typo in the PDC node to make SPMI functional. For MSM8916 I2C1 and I2C5 are defined, a node for the CCI camera control interface bus is added and Coresight is disabled by default to match some product configurations. The Samsung A3U gained display support and Samsung A5U gained touchscreen support. MSM8996 now property describes the power supply chain for the GPU, the CCI camera control interface bus is added and the DB820c has the regulators of the secondary PMIC defined. For QCS404 USB PHYs and controllers are defined and wired up for the EVB. SDM630/SDM660 platform support is added and the Xiaomi Redmi Note 7 defined. It also contains a number of changes throughout to improve DT binding compliance. * tag 'qcom-arm64-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (68 commits) arm64: dts: qcom: sc7180: Correct the pdc interrupt ranges arm64: dts: qcom: sc7180: add IPA information arm64: dts: qcom: sc7180: Fix ETMv4 power management patch arm64: dts: qcom: sc7180: Add A618 gpu dt blob dt-bindings: arm-smmu: Add sc7180 compatible string arm64: dts: qcom: msm8996: Make GPU node control GPU_GX GDSC arm64: dts: qcom: db820c: Add vdd_gfx and tie it into mmcc arm64: dts: qcom: apq8016-sbc: merge -pins.dtsi into main .dtsi arm64: dts: qcom: msm8916: move gpu opp table to gpu node arm64: dts: qcom: msm8916: avoid using _ in node names arm64: dts: qcom: c630: Specify UFS device reset arm64: dts: qcom: c630: Add WiFi node arm64: dts: qcom: msm8916-samsung-a3u: add nodes for display panel arm64: dts: qcom: db820c: Fix invalid pm8994 supplies arm64: dts: qcom: db820c: Add pmi8994 RPM regulators arm64: dts: qcom: msm8916: Disable coresight by default arm64: dts: qcom: sc7180: Add "no-map" to cmd_db reserved area arm64: dts: qcom: msm8916-samsung-a5u: Add touchscreen arm64: dts: qcom: msm8916-samsung-a2015: Add touchscreen regulator arm64: dts: qcom: msm8916: Add blsp_i2c5 ... Link: https://lore.kernel.org/r/20200519052528.1249950-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'at91-5.8-dt' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt AT91 DT for 5.8 - New board: Microchip SAMA5D2 Industrial Connectivity Platform - All SoCs are now converted to the new PMC device tree binding - sama5d2 flexcom nodes are now fully described in sama5d2.dtsi * tag 'at91-5.8-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: (35 commits) ARM: dts: at91: sama5d2_xplained: Add aliases for the dedicated I2C IPs ARM: dts: at91: Configure I2C SCL gpio as open drain ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C function ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe the aliases ARM: dts: at91: sama5d2_xplained: Add alias for DBGU ARM: dts: at91: sama5d2: Add missing flexcom definitions ARM: dts: at91: sama5d2: Remove i2s and tcb aliases from SoC dtsi ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0 functions ARM: dts: at91: sama5d2: Add DMA bindings for the flx1 I2C function ARM: dts: at91: sama5d2: Add DMA bindings for the flx3 SPI function ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4 functions ARM: dts: at91: sama5d2: Specify the FIFO size for the Flexcom UART ARM: dts: at91: sama5d2: Move flx0 definitions in the SoC dtsi ARM: dts: at91: sama5d2: Move flx1 definitions in the SoC dtsi ARM: dts: at91: sama5d2: Move flx2 definitions in the SoC dtsi ARM: dts: at91: sama5d2: Move flx3 definitions in the SoC dtsi ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsi ARM: dts: at91: sama5d2: Fix the label numbering for flexcom functions ARM: dts: at91: sama5d27_wlsom1: Add alias for i2c0 ARM: dts: at91: sama5d2-icp: add SAMA5D2-ICP ... Link: https://lore.kernel.org/r/20200518212844.GA26356@piout.net Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'uniphier-dt64-v5.8' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt UniPhier ARM64 SoC DT updates for v5.8 - add DMA controller nodes - add Akebi96 board support * tag 'uniphier-dt64-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: arm64: dts: uniphier: Add support for Akebi96 dt-bindings: arm: Add Akebi96 board support arm64: dts: uniphier: add #address-cells and #size-cells to SPI nodes arm64: dts: uniphier: Stabilize Ethernet RGMII mode of PXs3 ref board arm64: dts: uniphier: Add ethernet aliases arm64: dts: uniphier: Add XDMAC node Link: https://lore.kernel.org/r/CAK7LNARUL52pBhg8AD9XeScVqhD8qr2eVEfu4+1v8D+KPyOwNw@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'uniphier-dt-v5.8' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt UniPhier ARM SoC DT updates for v5.8 - add DMA controller nodes * tag 'uniphier-dt-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: ARM: dts: uniphier: add #address-cells and #size-cells to SPI nodes ARM: dts: uniphier: Add ethernet aliases ARM: dts: uniphier: Add XDMAC node Link: https://lore.kernel.org/r/CAK7LNAQXSpg4s0e0d-tp9j85Sj01t13zAa5+rqsOWu4ZvkpYhg@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'v5.7-next-dts64' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt MT2712: - replace deprecated compatible for the usb PHY MT6797: - switch to SPDX identifier - add and enable I2C device for x20 development board - add I2C compatible to the binding description MT7622: - add Wi-Fi device and enable it for the Bananpi-R64 MT8173: - add CPU capacities based on Dhryston benchmark - fix DT build warnings - set throtteling range to limitless - add Elm and Hana devices on which several chromebooks are based - add Global Command Queue entries to the users MT8183: - split cpuidle states in two as the clusters have different target residencies * tag 'v5.7-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: arm64: dts: mt8173: Add capacity-dmips-mhz attributes arm64: dts: mt2712: use non-empty ranges for usb-phy arm64: dts: mt8173: fix mdp aliases property name arm64: dts: mediatek: Switch to SPDX license identifier for MT6797 SoC arm64: dts: mediatek: Enable I2C support for 96Boards X20 Development board arm64: dts: mediatek: Add I2C support for MT6797 SoC dt-bindings: i2c: Document I2C controller binding for MT6797 SoC arm64: dts: mt8173: fix cooling device range arm64: dts: mediatek: add mt8173 elm and hana board arm64: dts: mt8173: fix unit name warnings arm64: dts: mt8173: add uart aliases dt-bindings: arm64: dts: mediatek: Add mt8173 elm and hana arm64: dts: mt8183: adjust cpuidle target residency arm64: dts: mt8173: Add gce setting in mmsys and display node arm64: dts: mt7622: add built-in Wi-Fi device nodes Link: https://lore.kernel.org/r/2794a8db-c14f-ac34-9e28-9f3700db6c4c@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'ux500-dts-v5.8' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt Ux500 DTS updates for the v5.8 kernel series: - Add proximity sensor and magnetometer to the Samsung Golden devicetree. - Add magnetometer and touchscreen to the Samsung Skomer devicetree. * tag 'ux500-dts-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: dts: ux500: Add touchscreen to the Skomer ARM: dts: ux500: samsung-skomer: Add magnetometer ARM: dts: ux500: samsung-golden: Add magnetometer ARM: dts: ux500: samsung-golden: Add proximity sensor Link: https://lore.kernel.org/r/CACRpkdbukO33SxAZ_yn-1N8=hq3hF5OBOtP_V0fbjRT-fAa87A@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21Merge tag 'v5.7-next-dts32' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt MT2701: - add MUSB device to the SoC and the EVB MT7623: - add Mali-450 device node and bindings - add phy to gmac2 * tag 'v5.7-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: arm: dts: mt2701: Add usb2 device nodes dt-bindings: gpu: mali-utgard: add mediatek, mt7623-mali compatible arm: dts: mt7623: add Mali-450 device node arm: dts: mt7623: add phy-mode property for gmac2 Link: https://lore.kernel.org/r/ec17cf62-5463-9537-6618-2db9b2b5036e@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
generated by cgit (git 2.34.1) at 2025-09-19 02:24:16 +0000