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Let the non boot cpus call into idle with the corresponding hotplug state, so
the hotplug core can handle the further bringup. That's a first step to
convert the boot side of the hotplugged cpus to do all the synchronization
with the other side through the state machine. For now it'll only start the
hotplug thread and kick the full bringup of the cpu.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arch@vger.kernel.org
Cc: Rik van Riel <riel@redhat.com>
Cc: Rafael Wysocki <rafael.j.wysocki@intel.com>
Cc: "Srivatsa S. Bhat" <srivatsa@mit.edu>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Sebastian Siewior <bigeasy@linutronix.de>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Paul McKenney <paulmck@linux.vnet.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul Turner <pjt@google.com>
Link: http://lkml.kernel.org/r/20160226182341.614102639@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.6/soc
ARM: OMAP2+: second set of hwmod changes for v4.6
These patches add RTC support for the AM43xx, and add support for
the DRA7xx eDMA controller's TPCC, TPTC0, and TPTC1 IP blocks.
Also included is a workaround for PRCM hardreset control of the DRA7xx
PCIe subsystem.
Note that I do not have a DRA7xx board, and therefore cannot
test any patches for that SoC family.
Basic build, boot, and PM test logs can be found here:
http://www.pwsan.com/omap/testlogs/omap-hwmod-b-for-v4.6/20160301021258/
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The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].
[1] dm814x TRM: SPRUGZ8F: 11.2.4.12.2 NAND Device-Ready Pin
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Pull sparc fixes from David Miller:
1) System call tracing doesn't handle register contents properly across
the trace. From Mike Frysinger.
2) Hook up copy_file_range
3) Build fix for 32-bit with newer tools.
4) New sun4v watchdog driver, from Wim Coekaerts.
5) Set context system call has to allow for servicable faults when we
flush the register windows to memory
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
sparc64: Fix sparc64_set_context stack handling.
sparc32: Add -Wa,-Av8 to KBUILD_CFLAGS.
Add sun4v_wdt watchdog driver
sparc: Fix system call tracing register handling.
sparc: Hook up copy_file_range syscall.
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Add Ethernet support (Synopsys MAC IP 3.50a) on stm32f429 SOC.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@gmail.com>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
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In order to reduce the risk of a bad merge, let's move the new
kvm_call_hyp back to its original location in the file. This has
zero impact from a code point of view.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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The polarity of the gpio buttons is defined to '0' which is
active high. The buttons are active low though which has been verified by
testing it and by looking into the schematics. While at it use
defines rathers than numbers for the key codes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Signed-off-by: Alexandre TORGUE <alexandre.torgue@gmail.com>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
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This makes it possible to automatically boot-test this defconfig with
kernelci.org.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Regenerate imx_v4_v5_defconfig by running:
make imx_v4_v5_defconfig
- Manually disable EXT2_FS and EXT3_FS
make savedefconfig
mv defconfig arch/arm/configs/imx_v4_v5_defconfig
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Both nodes are required to access NAND Flash memory. Additional
settings will be necessary at the board level to use it.
Tested-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Romain Izard <romain.izard.pro@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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The dmas/dma-names properties are added to the UART nodes. Note that additional
properties are needed to enable them at the board level: check bindings for
details.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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This makes a number of cleanups to handling of mapping failures during
memory hotplug on Power:
For errors creating the linear mapping for the hot-added region:
* This is now reported with EFAULT which is more appropriate than the
previous EINVAL (the failure is unlikely to be related to the
function's parameters)
* An error in this path now prints a warning message, rather than just
silently failing to add the extra memory.
* Previously a failure here could result in the region being partially
mapped. We now clean up any partial mapping before failing.
For errors creating the vmemmap for the hot-added region:
* This is now reported with EFAULT instead of causing a BUG() - this
could happen for external reason (e.g. full hash table) so it's better
to handle this non-fatally
* An error message is also printed, so the failure won't be silent
* As above a failure could cause a partially mapped region, we now
clean this up. [mpe: move htab_remove_mapping() out of #ifdef
CONFIG_MEMORY_HOTPLUG to enable this]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Paul Mackerras <paulus@samba.org>
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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At the moment the hpte_removebolted callback in ppc_md returns void and
will BUG_ON() if the hpte it's asked to remove doesn't exist in the first
place. This is awkward for the case of cleaning up a mapping which was
partially made before failing.
So, we add a return value to hpte_removebolted, and have it return ENOENT
in the case that the HPTE to remove didn't exist in the first place.
In the (sole) caller, we propagate errors in hpte_removebolted to its
caller to handle. However, we handle ENOENT specially, continuing to
complete the unmapping over the specified range before returning the error
to the caller.
This means that htab_remove_mapping() will work sanely on a partially
present mapping, removing any HPTEs which are present, while also returning
ENOENT to its caller in case it's important there.
There are two callers of htab_remove_mapping():
- In remove_section_mapping() we already WARN_ON() any error return,
which is reasonable - in this case the mapping should be fully
present
- In vmemmap_remove_mapping() we BUG_ON() any error. We change that to
just a WARN_ON() in the case of ENOENT, since failing to remove a
mapping that wasn't there in the first place probably shouldn't be
fatal.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Currently, the only error that htab_remove_mapping() can report is -EINVAL,
if removal of bolted HPTEs isn't implemeted for this platform. We make
a few clean ups to the handling of this:
* EINVAL isn't really the right code - there's nothing wrong with the
function's arguments - use ENODEV instead
* We were also printing a warning message, but that's a decision better
left up to the callers, so remove it
* One caller is vmemmap_remove_mapping(), which will just BUG_ON() on
error, making the warning message redundant, so no change is needed
there.
* The other caller is remove_section_mapping(). This is called in the
memory hot remove path at a point after vmemmap_remove_mapping() so
if hpte_removebolted isn't implemented, we'd expect to have already
BUG()ed anyway. Put a WARN_ON() here, in lieu of a printk() since this
really shouldn't be happening.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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All pinctrl nodes for the Atmel pinctrl controller need to have their
bias configuration explicitly defined. Otherwise, the pinctrl mapping
is not valid.
It works for now as the pinctrl driver proceeds even with invalid
mappings, but this can become an issue, if the pinctrl driver starts
to require valid mappings. Additionally, the pin is not protected from
being remapped later by an other driver.
There is an external 1kOhms pull-up to 3.3V, so no bias is required on
the Ethernet PHY's interrupt line.
Signed-off-by: Romain Izard <romain.izard.pro@gmail.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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After adding cpufreq-dt support to Exynos542x, the Odroid XU3-Lite can
be easily overheated when launching eight CPU-intensive tasks:
thermal thermal_zone3: critical temperature reached(121 C),shutting down
This seems to be specific to Odroid XU3-Lite board which officially
supports lower frequencies than regular XU3 or XU4. When working at
maximum CPU speed (1800 MHz big and 1300 MHz LITTLE) in warmer place for
longer time, the fan fails to cool down the board and it reaches
critical temperature.
Add CPU cooling to Exynos5422/5800 to fix this issue. When reaching last
interrupt-driven trip-point (70 degrees of Celsius) start passive
cooling in polling mode (slowing CPU by 2 steps). When reaching 85
degrees of Celsius, start slowing even more, down to 600 MHz.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
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On Exynos5422 and Exynos5800 we support 12 cpufreq steps (200-1300 MHz) for LITTLE
and 18 steps for big core (200-1700 MHz). Add respective cooling cells.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
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On Exynos5420 we support 8 cpufreq steps (600-1300 MHz) for LITTLE and
12 steps for big core (700-1800 MHz). Add respective cooling cells.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
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Add hwmod data for the eDMA blocks:
- TPCC: Third-party channel controller
- TPTC0: Third-party transfer controller 0
- TPTC1: Third-party transfer controller 1
The TPCC's clock gating status follows the status of its clock and
power domain. This means that the hwmod code can not directly control
the TPCC enable/disable status.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
[paul@pwsan.com: rephrased last two sentences of the patch description]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Exynos7 based espresso board uses S2MPS15, a multifunction device.
This patch enables S2MPS1X regulator, pmic-clk and rtc drivers utilized by
the same.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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Signed-off-by: Adam Buchbinder <adam.buchbinder@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Instead of defining a local version of struct udphdr use the standard
definition from <linux/udp.h>.
The 'src' field is named 'source' in the <linux/udp.h> definition.
Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Instead of defining a local version of struct iphdr use the standard
definition from <linux/ip.h>.
Several fields in the <linux/ip.h> definition have different names:
- proto -> protocol
- src -> saddr
- dest -> daddr
- total_length -> tot_len
- checksum -> check
Also, 'ver_len' is composed by 'version' and 'ihl' in <linux/ip.h>.
Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Instead of defining the local struct vlantag use the standard definition
of vlan_hdr from <linux/if_vlan.h>.
The fields in the <linux/if_vlan.h> definition have different names:
- vlan -> h_vlan_TCI
- subtype -> h_vlan_encapsulated_proto
While there, use also the ETH_P_IP macro instead of an hard-coded 0x0800
value.
Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Instead of defining a local version of struct ethhdr use the standard
definition from <linux/if_ether.h>.
The fields in the <linux/if_ether.h> definition have different names:
- dest -> h_dest
- src -> h_source
- type -> h_proto
While there, use a few other standard functions/macros:
- eth_broadcast_addr (instead of a memset)
- ETH_ALEN
- ETH_P_8021Q
Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Like a signal return, we should use synchronize_user_stack() rather
than flush_user_windows().
Reported-by: Ilya Malakhov <ilmalakhovthefirst@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Binutils used to be (erroneously) extremely permissive about
instruction usage. But that got fixed and if you don't properly tell
it to accept classes of instructions it will fail.
This uncovered a specs bug on sparc in gcc where it wouldn't pass the
proper options to binutils options.
Deal with this in the kernel build by adding -Wa,-Av8 to KBUILD_CFLAGS.
Reported-by: Al Viro <viro@ZenIV.linux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
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https://github.com/AppliedMicro/xgene-next into next/dt64
Merge "Second part of X-Gene DT changes queued for v4.6" from Duc Dang:
This patch set includes:
+ X-Gene v2 Mailbox DT node
+ X-Gene v1 and X-Gene v2 SLIMpro Mailbox
I2C driver DT nodes
* tag 'xgene-dts-for-v4.6-part2' of https://github.com/AppliedMicro/xgene-next:
arm64: dts: apm: Add DT node for X-Gene v2 SLIMpro Mailbox I2C Driver
arm64: dts: apm: Mailbox device tree node for APM X-Gene v2 platform.
arm64: dts: apm: Add DT node for X-Gene v1 SLIMpro Mailbox I2C Driver
arm64: dts: apm: mailbox device tree node for APM X-Gene platform.
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https://github.com/AppliedMicro/xgene-next into next/dt64
Merge "First part of X-Gene DT changes queued for v4.6" from Duc Dang:
This patch set includes:
+ A change in compatible string of X-Gene v2 SoC
PLL DT node to reflect the v2 hardware
+ Update DT fields for X-Gene v1 and v2 standby
GPIO controllers
+ Update declaration of power button GPIO for
X-Gene v1 and X-Gene v2 platforms
* tag 'xgene-dts-for-v4.6-part1' of https://github.com/AppliedMicro/xgene-next:
arm64: dts: apm: Update GPIO to control power-off on X-Gene v2 platforms
arm64: dts: apm: Update GPIO standby controller DT node for X-Gene v2 platforms
arm64: dts: apm: Update GPIO to control power-off on X-Gene v1 platforms
arm64: dts: apm: Update X-Gene standby GPIO controller DTS entries
arm64: dts: apm: Update Merlin DT PCP PLL clock node for v2 hardware
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into next/arm64
ARM64: Hip05: configure updates for 4.6
- Enable DesignWare APB GPIO controller
* tag 'hip05-config-for-4.6' of git://github.com/hisilicon/linux-hisi:
arm64: defconfig: Enable DesignWare APB GPIO controller
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Merge "pxa changes for v4.6 cycle" from Robert Jarzmik:
This is a minor cycle with :
- cleanup fixes from Arnd, mainly build oriented and sparse type ones
- dma fixes for requestors above 32 (impacting mainly camera driver)
- some minor cleanup on pxa3xx device-tree side
* tag 'pxa-for-4.6' of https://github.com/rjarzmik/linux:
dmaengine: pxa_dma: fix the maximum requestor line
ARM: pxa: add the number of DMA requestor lines
dmaengine: mmp-pdma: add number of requestors
dma: mmp_pdma: Add the #dma-requests DT property documentation
ARM: pxa: pxa3xx device-tree support cleanup
ARM: pxa: don't select RFKILL if CONFIG_NET is disabled
ARM: pxa: fix building without IWMMXT
ARM: pxa: move extern declarations to pm.h
ARM: pxa: always select one of the two CPU types
ARM: pxa: don't select GPIO_SYSFS for MIOA701
ARM: pxa: mark unused eseries code as __maybe_unused
ARM: pxa: mark spitz_card_pwr_ctrl as __maybe_unused
ARM: pxa: define clock registers as __iomem
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Commit 7175f0591eb9 ("arm64: perf: Enable PMCR long cycle counter bit")
added initial support for a 64-bit cycle counter enabled using PMCR.LC.
Unfortunately, that patch doesn't extend ARMV8_EVTYPE_MASK, so any
attempts to set the enable bit are ignored by armv8pmu_pmcr_write.
This patch extends the mask to include the new bit.
Signed-off-by: Will Deacon <will.deacon@arm.com>
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next/dt64
Merge "ARM64: DT: Hisilicon Hip05 soc and D02 board updates for 4.6" from Wei Xu:
- Add L2 cache topology
- Use Cortex specific device node for pmu
- Append all gicv3 ITS entries
- Append gpio nodes
- Append power button node for D02 board
* tag 'hip05-dt-for-4.6' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hip05: Append power button node for D02 board
arm64: dts: hip05: Append gpio nodes
arm64: dts: hip05: Append all gicv3 ITS entries
arm64: dts: hip05: Use Cortex specific device node for pmu
arm64: dts: hip05: Add L2 cache topology
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Add PWMSS device tree nodes for DRA7 SoC family and add documentation
for dt bindings.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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tbclk is used by ehrpwm to generate PWM waveform on DRA7 SoC. Add Linux
clock to control ehrpwm tbclk.
The TRM says, tbclk is derived from SYSCLKOUT. SYSCLKOUT is nothing but
ehrpwm functional clock derived from the gateable interface and
functional clock of PWMSS(l4_root_clk_div).
Refer AM57x TRM SPRUHZ6[1], October 2014, Table 29-4 and Section 29.2.2.1,
Table 29-19 and the NOTE at the end of the table.
[1] www.ti.com/lit/ug/spruhz6/spruhz6.pdf
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Merge pxa dt for v4.6 from Robert Jarzmik:
This device-tree pxa update brings :
- a single fix for nand dmaengine node
* tag 'pxa-dt-4.6' of https://github.com/rjarzmik/linux:
ARM: dts: pxa: fix dma engine node to pxa3xx-nand
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https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Merge "Allwinner DT Additions for 4.6" from Maxime Ripard:
Quite a few changes, among which:
- Support for the A83t
- Support for the eMMC DDR on a few boards
- Support for the OTG controller on a few boards
- New boards: Itead Ibox, Cubietruck plus, Homlet v2, Lamobo R1
* tag 'sunxi-dt-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (34 commits)
ARM: dts: sun8i: Add leds and switch on Orangepi Plus boards
ARM: dts: sun8i: Add ir receiver nodes to H3 dtsi
ARM: dts: sun8i-h3: Add R_PIO controller node to the dtsi
dts: sun8i-h3: Add APB0 related clocks and resets
ARM: dts: sun7i: Add dts file for the lamobo-r1 board
ARM: dts: sun4i: Enable USB DRC on Hyundai-a7hd
ARM: dts: sun4i: Enable USB DRC on the MK802
ARM: dts: sun8i: q8-common: Add AXP223 PMIC device and regulator nodes
ARM: dts: sun8i: sinlinx-sina33: Add AXP223 PMIC device and regulator nodes
ARM: dts: sun7i: Enable USB DRC on Olimex A20 EVB
ARM: dts: sun7i: Enable USB DRC on MK808C
ARM: dts: sunxi: Fix #interrupt-cells for PIO in H3
ARM: dts: sun8i-a83t: Correct low speed oscillator clocks
ARM: dts: sun9i: a80-optimus: Remove i2c3 and uart4
ARM: dts: sun4i: Itead Iteaduino to use common code
ARM: dts: sun7i: Add Itead Ibox support
ARM: dts: sunxi: Add sunxi-itead-core-common.dtsi
ARM: dts: sun9i: cubieboard4: Enable hardware reset and HS-DDR for eMMC
ARM: dts: sun9i: a80-optimus: Enable hardware reset and HS-DDR for eMMC
ARM: dts: sun9i: Include SDC2_RST pin in mmc2_8bit_pins
...
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https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/defconfig
Merge "Allwinner defconfig changes for 4.6" from Maxime Ripard:
A bunch of changes to add new drivers to the sunxi and multi_v7 defconfigs,
most notably the USB OTG that is finally enabled.
* tag 'sunxi-defconfig-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sunxi_defconfig: Enable MUSB HDRC driver with Allwinner glue
ARM: multi_v7_defconfig: Enable A10 audio codec driver as module
ARM: multi_v7_defconfig: Enable MUSB HDRC driver with Allwinner glue
ARM: sunxi_defconfig: Enable INPUT_EVDEV so axp20x-pek can be used
ARM: sunxi_defconfig: Enable A10 audio codec driver
ARM: sunxi_defconfig: Enable sunxi IR driver
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https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/soc
Merge "Allwinner core changes for 4.6" from Maxime Ripard:
Just introduce the A83T support.
* tag 'sunxi-core-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sunxi: Introduce Allwinner for A83T support
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https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/arm64
Merge "Allwinner configuration changes for ARM64, 4.6 edition" from Maxime Ripard:
Not a lot of changes for this kernel release, just a new Kconfig option and
some changes to the arm64 defconfig to add Allwinner drivers
* tag 'sunxi-config64-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
arm64: add defconfig options for Allwinner SoCs
arm64: Introduce Allwinner SoC config option
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DRA7 SoC has the capability to support DDR memory upto 4GB. In order to
represent this in memory dt node, the address-cells and size cells
should be 2. So, changing the address-cells and size-cells to 2 and
updating the memory nodes accordingly.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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next/arm64
Merge "mvebu arm64 for 4.6 (part 2)" from Gregory CLEMENT:
Add initial support for Armada 7K/8K
Update Marvell documentation
* tag 'mvebu-arm64-4.6-2' of git://git.infradead.org/linux-mvebu:
arm64: update ARCH_MVEBU for Marvell Armada 7K/8K support
Documentation: arm: add Marvell Armada 7K and 8K families
Documentation: arm: add link to Armada 38x Functional Spec
Documentation: arm: improve Armada 37xx description
Documentation: arm: update Marvell product listing
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into next/defconfig
Merge "mvebu defconfig for 4.6 (part 2)" from Gregory CLEMENT:
enable SRAM support in mvebu_v7_defconfig
* tag 'mvebu-defconfig-4.6-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: enable SRAM support in mvebu_v7_defconfig
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The LP872x regulator is used in the LG Optimus Black codename sniper to supply
the external mmc card.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Merge "mvebu dt for 4.6 (part 2)" from Gregory CLEMENT:
- Reorder Ethernet node on Armada 38x SoCs
- Add device tree for buffalo linkstation ls-gl
- Use the more accurate armada-370-sata string for SATA on Armada 375
- Add NAND description to Armada 370 DB and Armada XP DB
* tag 'mvebu-dt-4.6-2' of git://git.infradead.org/linux-mvebu:
ARM: dts: mvebu: add NAND description to Armada 370 DB and Armada XP DB
ARM: dts: armada-375: use armada-370-sata for SATA
ARM: dts: orion5x: add device tree for buffalo linkstation ls-gl
ARM: dts: orion5x: split linkstation lswtgl into common and device parts
ARM: dts: armada-38x: add reference to ETH connectors for A385-AP
ARM: dts: armada-38x: change order of ethernet DT nodes on Armada 38x
ARM: dts: orion5x: fix the missing mtd flash on linkstation lswtgl
ARM: dts: kirkwood: use unique machine name for ds112
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next/fixes-non-critical
Merge "mvebu soc for 4.6 (part 1)" from Gregory CLEMENT:
randconfig warning fixes for mvebu SoCs
* tag 'mvebu-soc-4.6-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: mark mvebu_hwcc_pci_nb as __maybe_unused
ARM: mv78xx0: avoid unused function warning
ARM: orion: only select I2C_BOARDINFO when using I2C
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next/cleanup
Merge "mvebu cleanup for 4.6 (part 2)" from Gregory CLEMENT:
Add a missing call to of_node_put() armada_xp_smp_prepare_cpus()
* tag 'mvebu-cleanup-4.6-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add missing of_node_put()
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The qcom-spmi-mpp driver is now using string "digital" to denote
old "normal" functionality. Update DTS file.
Also update the powersource.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
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