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2022-03-19arm64: dts: n5x: drop invalid property and fix edac node nameKrzysztof Kozlowski
The intel,sysmgr-syscon in EDAC/memory controller node is not a recognized and documented property, so drop it to fix error: sdr_edac@f87f8000: 'intel,sysmgr-syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Align also the node name with Devicetree specification (generic, not specific, and EDAC is purely Linux term). Fixes: ef82c9be844f ("arm64: dts: n5x: add sdr edac support") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220318121044.108750-1-krzysztof.kozlowski@canonical.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-19ARM: spear: fix typos in commentsJulia Lawall
Various spelling mistakes in comments. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Link: https://lore.kernel.org/r/20220318103729.157574-21-Julia.Lawall@inria.fr' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-19xtensa: enable plugin supportMax Filippov
Compiler plugins can be built starting with xtensa gcc 12. Enable plugin support for xtensa when gcc-12 or newer is used. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-03-19xtensa: clean up kernel exit assembly codeMax Filippov
Don't use numeric labels for complex branching logic. Mark each branch with named local label and use them. Rearrange exit back to kernel mode to avoid conditional label definition. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-03-19xtensa: rearrange NMI exit pathMax Filippov
NMI exit path to userspace should neither check TIF_DB_DISABLED nor call check_tlb_sanity because NMI shouldn't touch anything related to userspace. Drop kernel/userspace check in NMI exit path. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-03-19xtensa: merge stack alignment definitionsMax Filippov
xtensa currently has two different definitions for stack alignment. Replace it with single definition usable in both C and assembly. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-03-18parisc: Avoid flushing cache on cache-less machinesHelge Deller
Avoid flushing caches in __flush_cache_page() and __purge_cache_page() if the machine hasn't data or instruction caches - as e.g. in qemu. Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-18Merge branch 'thermal-hfi'Rafael J. Wysocki
Merge Intel Hardware Feedback Interface (HFI) thermal driver for 5.18-rc1 and update the intel-speed-select utility to support that driver. * thermal-hfi: tools/power/x86/intel-speed-select: v1.12 release tools/power/x86/intel-speed-select: HFI support tools/power/x86/intel-speed-select: OOB daemon mode thermal: intel: hfi: INTEL_HFI_THERMAL depends on NET thermal: netlink: Fix parameter type of thermal_genl_cpu_capability_event() stub thermal: intel: hfi: Notify user space for HFI events thermal: netlink: Add a new event to notify CPU capabilities change thermal: intel: hfi: Enable notification interrupt thermal: intel: hfi: Handle CPU hotplug events thermal: intel: hfi: Minimally initialize the Hardware Feedback Interface x86/cpu: Add definitions for the Intel Hardware Feedback Interface x86/Documentation: Describe the Intel Hardware Feedback Interface
2022-03-18Merge branches 'pm-sleep', 'pm-domains' and 'pm-docs'Rafael J. Wysocki
Merge changes related to system sleep, PM domains changes and power management documentation changes for 5.18-rc1: - Fix load_image_and_restore() error path (Ye Bin). - Fix typos in comments in the system wakeup hadling code (Tom Rix). - Clean up non-kernel-doc comments in hibernation code (Jiapeng Chong). - Fix __setup handler error handling in system-wide suspend and hibernation core code (Randy Dunlap). - Add device name to suspend_report_result() (Youngjin Jang). - Make virtual guests honour ACPI S4 hardware signature by default (David Woodhouse). - Block power off of a parent PM domain unless child is in deepest state (Ulf Hansson). - Use dev_err_probe() to simplify error handling for generic PM domains (Ahmad Fatoum). - Fix sleep-in-atomic bug caused by genpd_debug_remove() (Shawn Guo). - Document Intel uncore frequency scaling (Srinivas Pandruvada). * pm-sleep: PM: hibernate: Honour ACPI hardware signature by default for virtual guests PM: sleep: Add device name to suspend_report_result() PM: suspend: fix return value of __setup handler PM: hibernate: fix __setup handler error handling PM: hibernate: Clean up non-kernel-doc comments PM: sleep: wakeup: Fix typos in comments PM: hibernate: fix load_image_and_restore() error path * pm-domains: PM: domains: Fix sleep-in-atomic bug caused by genpd_debug_remove() PM: domains: use dev_err_probe() to simplify error handling PM: domains: Prevent power off for parent unless child is in deepest state * pm-docs: Documentation: admin-guide: pm: Document uncore frequency scaling
2022-03-18Merge tag 'kvmarm-5.18' of ↵Paolo Bonzini
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD KVM/arm64 updates for 5.18 - Proper emulation of the OSLock feature of the debug architecture - Scalibility improvements for the MMU lock when dirty logging is on - New VMID allocator, which will eventually help with SVA in VMs - Better support for PMUs in heterogenous systems - PSCI 1.1 support, enabling support for SYSTEM_RESET2 - Implement CONFIG_DEBUG_LIST at EL2 - Make CONFIG_ARM64_ERRATUM_2077057 default y - Reduce the overhead of VM exit when no interrupt is pending - Remove traces of 32bit ARM host support from the documentation - Updated vgic selftests - Various cleanups, doc updates and spelling fixes
2022-03-18Merge branches 'acpi-ec', 'acpi-cppc', 'acpi-fan' and 'acpi-battery'Rafael J. Wysocki
Merge ACPI EC driver changes, CPPC-related changes, ACPI fan driver changes and ACPI battery driver changes for 5.18-rc1: - Make wakeup events checks in the ACPI EC driver more straightforward and clean up acpi_ec_submit_event() (Rafael Wysocki). - Make it possible to obtain the CPU capacity with the help of CPPC information (Ionela Voinescu). - Improve fine grained fan control in the ACPI fan driver and document it (Srinivas Pandruvada). - Add device HID and quirk for Microsoft Surface Go 3 to the ACPI battery driver (Maximilian Luz). * acpi-ec: ACPI: EC: Rearrange code in acpi_ec_submit_event() ACPI: EC: Reduce indentation level in acpi_ec_submit_event() ACPI: EC: Do not return result from advance_transaction() * acpi-cppc: arm64, topology: enable use of init_cpu_capacity_cppc() arch_topology: obtain cpu capacity using information from CPPC x86, ACPI: rename init_freq_invariance_cppc() to arch_init_invariance_cppc() * acpi-fan: Documentation/admin-guide/acpi: Add documentation for fine grain control ACPI: fan: Add additional attributes for fine grain control ACPI: fan: Properly handle fine grain control ACPI: fan: Optimize struct acpi_fan_fif ACPI: fan: Separate file for attributes creation ACPI: fan: Fix error reporting to user space * acpi-battery: ACPI: battery: Add device HID and quirk for Microsoft Surface Go 3
2022-03-18Merge branches 'acpi-pm', 'acpi-properties', 'acpi-misc' and 'acpi-x86'Rafael J. Wysocki
Merge ACPI power management changes, ACPI device properties handling changes, x86-specific ACPI changes and miscellaneous ACPI changes for 5.18-rc1: - Add power management debug messages related to suspend-to-idle in two places (Rafael Wysocki). - Fix __acpi_node_get_property_reference() return value and clean up that function (Andy Shevchenko, Sakari Ailus). - Fix return value of the __setup handler in the ACPI PM timer clock source driver (Randy Dunlap). - Clean up double words in two comments (Tom Rix). - Add "skip i2c clients" quirks for Lenovo Yoga Tablet 1050F/L and Nextbook Ares 8 (Hans de Goede). - Clean up frequency invariance handling on x86 in the ACPI CPPC library (Huang Rui). - Work around broken XSDT on the Advantech DAC-BJ01 board (Mark Cilissen). * acpi-pm: ACPI: EC / PM: Print additional debug message in acpi_ec_dispatch_gpe() ACPI: PM: Print additional debug message in acpi_s2idle_wake() * acpi-properties: ACPI: property: Get rid of redundant 'else' ACPI: properties: Consistently return -ENOENT if there are no more references * acpi-misc: clocksource: acpi_pm: fix return value of __setup handler ACPI: clean up double words in two comments * acpi-x86: ACPI / x86: Work around broken XSDT on Advantech DAC-BJ01 board x86/ACPI: CPPC: Move init_freq_invariance_cppc() into x86 CPPC x86: Expose init_freq_invariance() to topology header x86/ACPI: CPPC: Move AMD maximum frequency ratio setting function into x86 CPPC x86/ACPI: CPPC: Rename cppc_msr.c to cppc.c ACPI / x86: Add skip i2c clients quirk for Lenovo Yoga Tablet 1050F/L ACPI / x86: Add skip i2c clients quirk for Nextbook Ares 8
2022-03-18arm64: errata: avoid duplicate field initializerArnd Bergmann
The '.type' field is initialized both in place and in the macro as reported by this W=1 warning: arch/arm64/include/asm/cpufeature.h:281:9: error: initialized field overwritten [-Werror=override-init] 281 | (ARM64_CPUCAP_SCOPE_LOCAL_CPU | ARM64_CPUCAP_OPTIONAL_FOR_LATE_CPU) | ^ arch/arm64/kernel/cpu_errata.c:136:17: note: in expansion of macro 'ARM64_CPUCAP_LOCAL_CPU_ERRATUM' 136 | .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, \ | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/kernel/cpu_errata.c:145:9: note: in expansion of macro 'ERRATA_MIDR_RANGE' 145 | ERRATA_MIDR_RANGE(m, var, r_min, var, r_max) | ^~~~~~~~~~~~~~~~~ arch/arm64/kernel/cpu_errata.c:613:17: note: in expansion of macro 'ERRATA_MIDR_REV_RANGE' 613 | ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 2), | ^~~~~~~~~~~~~~~~~~~~~ arch/arm64/include/asm/cpufeature.h:281:9: note: (near initialization for 'arm64_errata[18].type') 281 | (ARM64_CPUCAP_SCOPE_LOCAL_CPU | ARM64_CPUCAP_OPTIONAL_FOR_LATE_CPU) | ^ Remove the extranous initializer. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: 1dd498e5e26a ("KVM: arm64: Workaround Cortex-A510's single-step and PAC trap errata") Link: https://lore.kernel.org/r/20220316183800.1546731-1-arnd@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2022-03-18KVM: arm64: fix typos in commentsJulia Lawall
Various spelling mistakes in comments. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220318103729.157574-24-Julia.Lawall@inria.fr
2022-03-18KVM: arm64: Generalise VM features into a set of flagsMarc Zyngier
We currently deal with a set of booleans for VM features, while they could be better represented as set of flags contained in an unsigned long, similarily to what we are doing on the CPU side. Signed-off-by: Marc Zyngier <maz@kernel.org> [Oliver: Flag-ify the 'ran_once' boolean] Signed-off-by: Oliver Upton <oupton@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220311174001.605719-2-oupton@google.com
2022-03-18arm64: fix clang warning about TRAMP_VALIASArnd Bergmann
The newly introduced TRAMP_VALIAS definition causes a build warning with clang-14: arch/arm64/include/asm/vectors.h:66:31: error: arithmetic on a null pointer treated as a cast from integer to pointer is a GNU extension [-Werror,-Wnull-pointer-arithmetic] return (char *)TRAMP_VALIAS + SZ_2K * slot; Change the addition to something clang does not complain about. Fixes: bd09128d16fa ("arm64: Add percpu vectors for EL1") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: James Morse <james.morse@arm.com> Link: https://lore.kernel.org/r/20220316183833.1563139-1-arnd@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2022-03-18MIPS: ingenic: correct unit node addressKrzysztof Kozlowski
Unit node addresses should not have leading 0x: Warning (unit_address_format): /nemc@13410000/efuse@d0/eth-mac-addr@0x22: unit name should not have leading "0x" Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-03-18parisc: Avoid using hardware single-step in kprobesHelge Deller
This patch changes the kprobe and kretprobe feature to use another break instruction instead of relying on the hardware single-step feature. That way those kprobes now work in qemu as well, because in qemu we don't emulate yet single-stepping. Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-17ARM: rethook: Add rethook arm implementationMasami Hiramatsu
Add rethook arm implementation. Most of the code has been copied from kretprobes on arm. Since the arm's ftrace implementation is a bit special, this needs a special care using from fprobe. Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org> Tested-by: Steven Rostedt (Google) <rostedt@goodmis.org> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Link: https://lore.kernel.org/bpf/164735289643.1084943.15184590256680485720.stgit@devnote2
2022-03-17powerpc: Add rethook supportMasami Hiramatsu
Add rethook powerpc64 implementation. Most of the code has been copied from kretprobes on powerpc64. Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org> Tested-by: Steven Rostedt (Google) <rostedt@goodmis.org> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Link: https://lore.kernel.org/bpf/164735288495.1084943.539630613772422267.stgit@devnote2
2022-03-17arm64: rethook: Add arm64 rethook implementationMasami Hiramatsu
Add rethook arm64 implementation. Most of the code has been copied from kretprobes on arm64. Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org> Tested-by: Steven Rostedt (Google) <rostedt@goodmis.org> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Link: https://lore.kernel.org/bpf/164735287344.1084943.9787335632585653418.stgit@devnote2
2022-03-17rethook: x86: Add rethook x86 implementationMasami Hiramatsu
Add rethook for x86 implementation. Most of the code has been copied from kretprobes on x86. Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org> Tested-by: Steven Rostedt (Google) <rostedt@goodmis.org> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Link: https://lore.kernel.org/bpf/164735286243.1084943.7477055110527046644.stgit@devnote2
2022-03-17parisc: Improve CPU socket and core bootup info textHelge Deller
Improve CPU bootup info text from: CPU1: thread -1, cpu 0, socket 1 to CPU1: cpu core 0 of socket 1 Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-17parisc: Enable ARCH_HAS_DEBUG_VM_PGTABLEHelge Deller
Allow to enable page table boot-up checks. Suggested-by: Rolf Eike Beer <eike-kernel@sf-tec.de> Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-17Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski
No conflicts. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-03-17xtensa: fix DTC warning unit_address_formatMax Filippov
DTC issues the following warnings when building xtfpga device trees: /soc/flash@00000000/partition@0x0: unit name should not have leading "0x" /soc/flash@00000000/partition@0x6000000: unit name should not have leading "0x" /soc/flash@00000000/partition@0x6800000: unit name should not have leading "0x" /soc/flash@00000000/partition@0x7fe0000: unit name should not have leading "0x" Drop leading 0x from flash partition unit names. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-03-17ARM: remove support for NOMMU ARMv4/v5Arnd Bergmann
It is possible to build MMU-less kernels for Cortex-M base microcrontrollers as well as a couple of older platforms that have not been converted to CONFIG_ARCH_MULTIPLATFORM, specifically ep93xx, footbridge, dove, sa1100 and s3c24xx. It seems unlikely that anybody has tested those configurations in recent years, as even building them is frequently broken. A patch I submitted caused another build time regression in this configuration. I sent a patch for that, but it seems better to also remove the option entirely, leaving ARMv7-M as the only supported Arm NOMMU target for simplicity. A couple of platforms have dependencies on CONFIG_MMU, those can all be removed now. Notably, mach-integrator tries to support MMU-less CPU cores, but those have not actually been selectable for a long time. This addresses several build failures in randconfig builds that have accumulated over the years. Cc: Vladimir Murzin <vladimir.murzin@arm.com> Cc: Russell King <linux@armlinux.org.uk> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-16bpf, x86: Fall back to interpreter mode when extra pass failsHou Tao
Extra pass for subprog jit may fail (e.g. due to bpf_jit_harden race), but bpf_func is not cleared for the subprog and jit_subprogs will succeed. The running of the bpf program may lead to oops because the memory for the jited subprog image has already been freed. So fall back to interpreter mode by clearing bpf_func/jited/jited_len when extra pass fails. Signed-off-by: Hou Tao <houtao1@huawei.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Link: https://lore.kernel.org/bpf/20220309123321.2400262-2-houtao1@huawei.com
2022-03-16parisc: Avoid calling SMP cache flush functions on cache-less machinesHelge Deller
At least the qemu virtual machine does not provide D- and I-caches, so skip triggering SMP irqs to flush caches on such machines. Further optimize the caching code by using static branches and making some functions static. Signed-off-by: Helge Deller <deller@gmx.de>
2022-03-16ARM: defconfig: add SMB347 charger driver for p4noteMartin Jücker
The Summit SMB347 charger is part of the P4Note family of devices (e.g. Samsung Galaxy Note 10.1 (GT-N8010/N8013), enable the driver in exynos and multi_v7 defconfigs. Signed-off-by: Martin Jücker <martin.juecker@gmail.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/4f1f6a4f8200855d07f3faed80ec5cc320e40941.1643919230.git.martin.juecker@gmail.com Link: https://lore.kernel.org/r/20220316154309.436028-3-krzysztof.kozlowski@canonical.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-16arm64: dts: fsd: Add the MCT supportAlim Akhtar
Add node relevant to support MCT, which is used as one of the system timer on this SoC. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220223171858.11384-1-alim.akhtar@samsung.com Link: https://lore.kernel.org/r/20220316154309.436028-2-krzysztof.kozlowski@canonical.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-16Revert "arm64: dts: freescale: Fix 'interrupt-map' parent address cells"Vladimir Oltean
This reverts commit 869f0ec048dc8fd88c0b2003373bd985795179fb. That updated the expected device tree binding format for the ls-extirq driver, without also updating the parsing code (ls_extirq_parse_map) to the new format. The context is that the ls-extirq driver uses the standard "interrupt-map" OF property in a non-standard way, as suggested by Rob Herring during review: https://lore.kernel.org/lkml/20190927161118.GA19333@bogus/ This has turned out to be problematic, as Marc Zyngier discovered through commit 041284181226 ("of/irq: Allow matching of an interrupt-map local to an interrupt controller"), later fixed through commit de4adddcbcc2 ("of/irq: Add a quirk for controllers with their own definition of interrupt-map"). Marc's position, expressed on multiple opportunities, is that: (a) [ making private use of the reserved "interrupt-map" name in a driver ] "is wrong, by the very letter of what an interrupt-map means. If the interrupt map points to an interrupt controller, that's the target for the interrupt." https://lore.kernel.org/lkml/87k0g8jlmg.wl-maz@kernel.org/ (b) [ updating the driver's bindings to accept a non-reserved name for this property, as an alternative, is ] "is totally pointless. These machines have been in the wild for years, and existing DTs will be there *forever*." https://lore.kernel.org/lkml/87ilvrk1r0.wl-maz@kernel.org/ Considering the above, the Linux kernel has quirks in place to deal with the ls-extirq's non-standard use of the "interrupt-map". These quirks may be needed in other operating systems that consume this device tree, yet this is seen as the only viable solution. Therefore, the premise of the patch being reverted here is invalid. It doesn't matter whether the driver, in its non-standard use of the property, complies to the standard format or not, since this property isn't expected to be used for interrupt translation by the core. This change restores LS1088A, LS2088A/LS2085A and LX2160A to their previous bindings, which allows these systems to continue to use external interrupt lines with the correct polarity. Fixes: 869f0ec048dc ("arm64: dts: freescale: Fix 'interrupt-map' parent address cells") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-16PM: hibernate: Honour ACPI hardware signature by default for virtual guestsDavid Woodhouse
The ACPI specification says that OSPM should refuse to restore from hibernate if the hardware signature changes, and should boot from scratch. However, real BIOSes often vary the hardware signature in cases where we *do* want to resume from hibernate, so Linux doesn't follow the spec by default. However, in a virtual environment there's no reason for the VMM to vary the hardware signature *unless* it wants to trigger a clean reboot as defined by the ACPI spec. So enable the check by default if a hypervisor is detected. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-03-16arm64: dts: mt2712: update ethernet device nodeBiao Huang
Since there are some changes in ethernet driver: update ethernet device node in dts to accommodate to it. 1. stmmac_probe_config_dt() in stmmac_platform.c will initialize specified parameters according to compatible string "snps,dwmac-4.20a", then, dwmac-mediatek.c can skip the initialization if add compatible string "snps,dwmac-4.20a" in eth device node. 2. commit 882007ed7832 ("net-next: dt-binding: dwmac-mediatek: add more description for RMII") added rmii internal support, we should add corresponding clocks/clocks-names in eth device node. 3. add "snps,reset-delays-us = <0 10000 10000>;" to ensure reset delay can meet PHY requirement. Signed-off-by: Biao Huang <biao.huang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-03-16x86/nmi: Remove the 'strange power saving mode' hint from unknown NMI handlerJiri Kosina
The Do you have a strange power saving mode enabled? hint when unknown NMI happens dates back to i386 stone age, and isn't currently really helpful. Unknown NMIs are coming for many different reasons (broken firmware, faulty hardware, ...) and rarely have anything to do with 'strange power saving mode' (whatever that even is). Just remove it as it's largerly misleading. Signed-off-by: Jiri Kosina <jkosina@suse.cz> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/nycvar.YFH.7.76.2203140924120.24795@cbobk.fhfr.pm
2022-03-16xtensa: fix stop_machine_cpuslocked call in patch_textMax Filippov
patch_text must invoke patch_text_stop_machine on all online CPUs, but it calls stop_machine_cpuslocked with NULL cpumask. As a result only one CPU runs patch_text_stop_machine potentially leaving stale icache entries on other CPUs. Fix that by calling stop_machine_cpuslocked with cpu_online_mask as the last argument. Cc: stable@vger.kernel.org Fixes: 64711f9a47d4 ("xtensa: implement jump_label support") Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-03-16powerpc/time: improve decrementer clockevent processingNicholas Piggin
The stop/shutdown op should not use decrementer_set_next_event because that sets decrementers_next_tb to now + decrementer_max, which means a decrementer interrupt that occurs after that time will call the clockevent event handler unexpectedly. Set next_tb to ~0 here to prevent any clock event call. Init all clockevents to stopped. Then the decrementer clockevent device always has event_handler set and applicable because we know the clock event device was not stopped. So make this call unconditional to show that it is always called. next_tb need not be set to ~0 before the event handler is called because it will stop the clockevent device if there is no other timer. Finally, the timer broadcast interrupt should not modify next_tb because it is not involved with the local decrementer clockevent on this CPU. This doesn't fix a known bug, just tidies the code. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220124143930.3923442-3-npiggin@gmail.com
2022-03-16powerpc/time: Fix KVM host re-arming a timer beyond decrementer rangeNicholas Piggin
If the next host timer is beyond decrementer range, timer_rearm_host_dec will leave decrementer not programmed. This will not cause a problem for the host it will just set the decrementer correctly when the decrementer interrupt hits, it seems safer not to leave the next host decrementer interrupt timing able to be influenced by a guest. This code is only used in the P9 KVM paths so it's unlikely to be hit practically unless large decrementer is force disabled in the host. Fixes: 25aa145856cd ("powerpc/time: add API for KVM to re-arm the host timer/decrementer") Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220124143930.3923442-2-npiggin@gmail.com
2022-03-16powerpc/tm: Fix more userspace r13 corruptionNicholas Piggin
Commit cf13435b730a ("powerpc/tm: Fix userspace r13 corruption") fixes a problem in treclaim where a SLB miss can occur on the thread_struct->ckpt_regs while SCRATCH0 is live with the saved user r13 value, clobbering it with the kernel r13 and ultimately resulting in kernel r13 being stored in ckpt_regs. There is an equivalent problem in trechkpt where the user r13 value is loaded into r13 from chkpt_regs to be recheckpointed, but a SLB miss could occur on ckpt_regs accesses after that, which will result in r13 being clobbered with a kernel value and that will get recheckpointed and then restored to user registers. The same memory page is accessed right before this critical window where a SLB miss could cause corruption, so hitting the bug requires the SLB entry be removed within a small window of instructions, which is possible if a SLB related MCE hits there. PAPR also permits the hypervisor to discard this SLB entry (because slb_shadow->persistent is only set to SLB_NUM_BOLTED) although it's not known whether any implementations would do this (KVM does not). So this is an extremely unlikely bug, only found by inspection. Fix this by also storing user r13 in a temporary location on the kernel stack and don't change the r13 register from kernel r13 until the RI=0 critical section that does not fault. The SCRATCH0 change is not strictly part of the fix, it's only used in the RI=0 section so it does not have the same problem as the previous SCRATCH0 bug. Fixes: 98ae22e15b43 ("powerpc: Add helper functions for transactional memory context switching") Cc: stable@vger.kernel.org # v3.9+ Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Acked-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220311024733.48926-1-npiggin@gmail.com
2022-03-16powerpc/xive: fix return value of __setup handlerRandy Dunlap
__setup() handlers should return 1 to obsolete_checksetup() in init/main.c to indicate that the boot option has been handled. A return of 0 causes the boot option/value to be listed as an Unknown kernel parameter and added to init's (limited) argument or environment strings. Also, error return codes don't mean anything to obsolete_checksetup() -- only non-zero (usually 1) or zero. So return 1 from xive_off() and xive_store_eoi_cmdline(). Fixes: 243e25112d06 ("powerpc/xive: Native exploitation of the XIVE interrupt controller") Fixes: c21ee04f11ae ("powerpc/xive: Add a kernel parameter for StoreEOI") [lore.kernel.org/r/64644a2f-4a20-bab3-1e15-3b2cdd0defe3@omprussia.ru] Reported-by: Igor Zhbanov <i.zhbanov@omprussia.ru>: Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220313065936.4363-1-rdunlap@infradead.org
2022-03-15Merge tag 'kvm-riscv-5.18-1' of https://github.com/kvm-riscv/linux into HEADPaolo Bonzini
KVM/riscv changes for 5.18 - Prevent KVM_COMPAT from being selected - Refine __kvm_riscv_switch_to() implementation - RISC-V SBI v0.3 support
2022-03-15Merge tag 'kvm-s390-next-5.18-2' of ↵Paolo Bonzini
https://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into HEAD KVM: s390: Fix, test and feature for 5.18 part 2 - memop selftest - fix SCK locking - adapter interruptions virtualization for secure guests
2022-03-15Merge tag 'v5.17-rc8' into sched/core, to pick up fixesIngo Molnar
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2022-03-14Merge branch 'for-next/spectre-bhb' into for-next/coreWill Deacon
Merge in the latest Spectre mess to fix up conflicts with what was already queued for 5.18 when the embargo finally lifted. * for-next/spectre-bhb: (21 commits) arm64: Do not include __READ_ONCE() block in assembly files arm64: proton-pack: Include unprivileged eBPF status in Spectre v2 mitigation reporting arm64: Use the clearbhb instruction in mitigations KVM: arm64: Allow SMCCC_ARCH_WORKAROUND_3 to be discovered and migrated arm64: Mitigate spectre style branch history side channels arm64: proton-pack: Report Spectre-BHB vulnerabilities as part of Spectre-v2 arm64: Add percpu vectors for EL1 arm64: entry: Add macro for reading symbol addresses from the trampoline arm64: entry: Add vectors that have the bhb mitigation sequences arm64: entry: Add non-kpti __bp_harden_el1_vectors for mitigations arm64: entry: Allow the trampoline text to occupy multiple pages arm64: entry: Make the kpti trampoline's kpti sequence optional arm64: entry: Move trampoline macros out of ifdef'd section arm64: entry: Don't assume tramp_vectors is the start of the vectors arm64: entry: Allow tramp_alias to access symbols after the 4K boundary arm64: entry: Move the trampoline data page before the text page arm64: entry: Free up another register on kpti's tramp_exit path arm64: entry: Make the trampoline cleanup optional KVM: arm64: Allow indirect vectors to be used without SPECTRE_V3A arm64: spectre: Rename spectre_v4_patch_fw_mitigation_conduit ...
2022-03-14Merge branch 'for-next/fpsimd' into for-next/coreWill Deacon
* for-next/fpsimd: arm64: cpufeature: Warn if we attempt to read a zero width field arm64: cpufeature: Add missing .field_width for GIC system registers arm64: signal: nofpsimd: Do not allocate fp/simd context when not available arm64: cpufeature: Always specify and use a field width for capabilities arm64: Always use individual bits in CPACR floating point enables arm64: Define CPACR_EL1_FPEN similarly to other floating point controls
2022-03-14Merge branch 'for-next/strings' into for-next/coreWill Deacon
* for-next/strings: Revert "arm64: Mitigate MTE issues with str{n}cmp()" arm64: lib: Import latest version of Arm Optimized Routines' strncmp arm64: lib: Import latest version of Arm Optimized Routines' strcmp
2022-03-14Merge branch 'for-next/rng' into for-next/coreWill Deacon
* for-next/rng: arm64: random: implement arch_get_random_int/_long based on RNDR
2022-03-14Merge branch 'for-next/perf' into for-next/coreWill Deacon
* for-next/perf: (25 commits) perf/marvell: Fix !CONFIG_OF build for CN10K DDR PMU driver drivers/perf: Add Apple icestorm/firestorm CPU PMU driver drivers/perf: arm_pmu: Handle 47 bit counters arm64: perf: Consistently make all event numbers as 16-bits arm64: perf: Expose some Armv9 common events under sysfs perf/marvell: cn10k DDR perf event core ownership perf/marvell: cn10k DDR perfmon event overflow handling perf/marvell: CN10k DDR performance monitor support dt-bindings: perf: marvell: cn10k ddr performance monitor perf/arm-cmn: Update watchpoint format perf/arm-cmn: Hide XP PUB events for CMN-600 perf: replace bitmap_weight with bitmap_empty where appropriate perf: Replace acpi_bus_get_device() perf/marvell_cn10k: Fix unused variable warning when W=1 and CONFIG_OF=n perf/arm-cmn: Make arm_cmn_debugfs static perf: MARVELL_CN10K_TAD_PMU should depend on ARCH_THUNDER perf/arm-ccn: Use platform_get_irq() to get the interrupt irqchip/apple-aic: Move PMU-specific registers to their own include file arm64: dts: apple: Add t8303 PMU nodes arm64: dts: apple: Add t8103 PMU interrupt affinities ...
2022-03-14Merge branch 'for-next/pauth' into for-next/coreWill Deacon
* for-next/pauth: arm64: Add support of PAuth QARMA3 architected algorithm arm64: cpufeature: Mark existing PAuth architected algorithm as QARMA5 arm64: cpufeature: Account min_field_value when cheking secondaries for PAuth
2022-03-14Merge branch 'for-next/mte' into for-next/coreWill Deacon
* for-next/mte: docs: sysfs-devices-system-cpu: document "asymm" value for mte_tcf_preferred arm64/mte: Remove asymmetric mode from the prctl() interface kasan: fix a missing header include of static_keys.h arm64/mte: Add userspace interface for enabling asymmetric mode arm64/mte: Add hwcap for asymmetric mode arm64/mte: Add a little bit of documentation for mte_update_sctlr_user() arm64/mte: Document ABI for asymmetric mode arm64: mte: avoid clearing PSTATE.TCO on entry unless necessary kasan: split kasan_*enabled() functions into a separate header
generated by cgit (git 2.34.1) at 2025-09-29 02:12:26 +0000