linux-arm.git - Russell King's ARM Linux kernel tree

Age	Commit message (Expand)	Author
2024-01-04	cxl/port: Fix decoder initialization when nr_targets > interleave_ways	Huang Ying
2024-01-03	cxl/region: fix x9 interleave typo	Jim Harris
2024-01-03	cxl/trace: Pass UUID explicitly to event traces	Ira Weiny
2024-01-02	Merge branch 'for-6.8/cxl-cdat' into for-6.8/cxl	Dan Williams
2024-01-02	cxl/region: use %pap format to print resource_size_t	Randy Dunlap
2023-12-24	cxl/region: Add dev_dbg() detail on failure to allocate HPA space	Alison Schofield
2023-12-22	cxl: Check qos_class validity on memdev probe	Dave Jiang
2023-12-22	cxl: Export sysfs attributes for memory device QoS class	Dave Jiang
2023-12-22	cxl: Store QTG IDs and related info to the CXL memory device context	Dave Jiang
2023-12-22	cxl: Compute the entire CXL path latency and bandwidth data	Dave Jiang
2023-12-22	cxl: Add helper function that calculate performance data for downstream ports	Dave Jiang
2023-12-22	cxl: Store the access coordinates for the generic ports	Dave Jiang
2023-12-22	cxl: Calculate and store PCI link latency for the downstream ports	Dave Jiang
2023-12-22	cxl: Add support for _DSM Function for retrieving QTG ID	Dave Jiang
2023-12-22	cxl: Add callback to parse the SSLBIS subtable from CDAT	Dave Jiang
2023-12-22	cxl: Add callback to parse the DSLBIS subtable from CDAT	Dave Jiang
2023-12-22	cxl: Add callback to parse the DSMAS subtables from CDAT	Dave Jiang
2023-12-18	cxl: Fix unregister_region() callback parameter assignment	Dave Jiang
2023-12-14	cxl/pmu: Ensure put_device on pmu devices	Ira Weiny
2023-12-08	cxl/cdat: Free correct buffer on checksum error	Ira Weiny
2023-12-07	cxl/hdm: Fix dpa translation locking	Dan Williams
2023-12-07	cxl: Add Support for Get Timestamp	Davidlohr Bueso
2023-11-29	cxl/memdev: Hold region_rwsem during inject and clear poison ops	Alison Schofield
2023-11-29	cxl/core: Always hold region_rwsem while reading poison lists	Alison Schofield
2023-11-22	cxl/hdm: Fix a benign lockdep splat	Dave Jiang
2023-11-02	cxl/pci: Change CXL AER support check to use native AER	Terry Bowman
2023-10-31	cxl/hdm: Remove broken error path	Dan Williams
2023-10-31	cxl/hdm: Fix && vs \|\| bug	Dan Carpenter
2023-10-31	Merge branch 'for-6.7/cxl-commited' into cxl/next	Dan Williams
2023-10-31	Merge branch 'for-6.7/cxl' into cxl/next	Dan Williams
2023-10-31	Merge branch 'for-6.7/cxl-qtg' into cxl/next	Dan Williams
2023-10-31	Merge branch 'for-6.7/cxl-rch-eh' into cxl/next	Dan Williams
2023-10-27	cxl: Add support for reading CXL switch CDAT table	Dave Jiang
2023-10-27	cxl: Add checksum verification to CDAT from CXL	Dave Jiang
2023-10-27	cxl: Export QTG ids from CFMWS to sysfs as qos_class attribute	Dave Jiang
2023-10-27	cxl: Add decoders_committed sysfs attribute to cxl_port	Dave Jiang
2023-10-27	cxl: Add cxl_decoders_committed() helper	Dave Jiang
2023-10-27	cxl/core/regs: Rework cxl_map_pmu_regs() to use map->dev for devm	Robert Richter
2023-10-27	cxl/core/regs: Rename phys_addr in cxl_map_component_regs()	Robert Richter
2023-10-27	cxl/pci: Disable root port interrupts in RCH mode	Terry Bowman
2023-10-27	cxl/pci: Add RCH downstream port error logging	Terry Bowman
2023-10-27	cxl/pci: Map RCH downstream AER registers for logging protocol errors	Terry Bowman
2023-10-27	cxl/pci: Update CXL error logging to use RAS register address	Terry Bowman
2023-10-27	PCI/AER: Refactor cper_print_aer() for use by CXL driver module	Terry Bowman
2023-10-27	cxl/pci: Add RCH downstream port AER register discovery	Robert Richter
2023-10-27	cxl/port: Remove Component Register base address from struct cxl_port	Robert Richter
2023-10-27	cxl/pci: Remove Component Register base address from struct cxl_dev_state	Robert Richter
2023-10-27	cxl/hdm: Use stored Component Register mappings to map HDM decoder capability	Robert Richter
2023-10-27	cxl/pci: Store the endpoint's Component Register mappings in struct cxl_dev_s...	Robert Richter
2023-10-27	cxl/port: Pre-initialize component register mappings	Robert Richter