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2018-07-05drm/amd/display: rename dce_disp_clk to dccgDmytro Laktyushkin
No functional change. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/display: clean up dccg divider calc and dcn constructorDmytro Laktyushkin
No functional change. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/display: move dcn1 dispclk programming to dccgDmytro Laktyushkin
No functional change. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/display: get rid of cur_clks from dcn_bw_outputDmytro Laktyushkin
Cleans up dcn_bw_output to only contain calculated info, actual programmed values will now be stored in respective blocks. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/display: Add clock types to applying clk for voltageMikita Lipski
Add DCF and FCLK clock case statements for changing raven's clocks for voltage request. Also maintain DCEF clock for DCE120 calls. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/display: Use local structs instead of struct pointersMikita Lipski
Change struct pointers to creating structs on a stack. Thats fixing a mistake in a previous patch introducing dm_pplib functions Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/display: Use tg count for opp init.Yongqiang Sun
In case of tg count not equal to FE pipe count, if use pipe count to iterate the tgs, it will cause BSOD. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/display: remove invalid assert when no max_pixel_clk is foundDmytro Laktyushkin
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/display: Introduce pp-smu raven functionsMikita Lipski
DM powerplay calls for DCN10 allowing to bypass PPLib and call directly to the SMU functions. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/display: dal 3.1.48Tony Cheng
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/display: Adding Get static clocks for dm_pp interfaceMikita Lipski
Adding a call to powerplay to get system clocks and translate to dm structure Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/display: Apply clock for voltage requestMikita Lipski
Translate dm_pp tructure to pp type Call PP lib to apply clock voltage request for display Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/display: Adding dm-pp clocks getting by voltageMikita Lipski
Function to get clock levels by voltage from PPLib Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/display: move clock programming from set_bandwidth to dccgDmytro Laktyushkin
This change moves dcn clock programming(with exception of dispclk) into dccg. This should have no functional effect. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/display: rename display clock block to dccgDmytro Laktyushkin
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/display: redesign dce/dcn clock voltage update requestDmytro Laktyushkin
The goal of this change is to move clock programming and voltage requests to a single function. As of this change only dce is affected. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/display: replace clocks_value struct with dc_clocksDmytro Laktyushkin
This will avoid structs with duplicate information. Also removes pixel clock voltage request. This has no effect since pixel clock does not affect dcn voltage and this function only matters for dcn. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05Revert "drm/amdgpu: avoid sleep while executing atombios table (V2)"Alex Deucher
This reverts commit 8f4805a265fd710a2827b2c0e10c08ef2b526870. This change was mistakenly committed and should have been dropped with the rest of the series. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amdgpu: Add parsing SQ_EDC_INFO to SQ IH v3.Andrey Grodzovsky
Access to SQ_EDC_INFO requires selecting register instance and hence mutex lock when accessing GRBM_GFX_INDEX for which a work is schedueled from IH. But SQ interrupt can be raised on many instances at once which means queuing work will usually succeed for the first one but fail for the rest since the work takes time to process. To avoid losing info about other interrupt instances call the parsing function directly from high IRQ when current work hasn't finished and avoid accessing SQ_EDC_INFO in that case. v2: Simplify high IRQ and BH handlers synchronization using work_pending. Remove {READ,WRITE}_ONCE notations since smp_{r,w}mb are implicit compiler barriers. v3: Remove exlicit memory barriers as scedule_work has r/w barriers. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amdgpu: Polish SQ IH.Andrey Grodzovsky
Switch to using reg fields defines istead of magic values. Add SH_ID and PRIV fields reading for instr. and err cases. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/amdgpu: Add a GPU_LOAD entry to sysfs (v3)Tom St Denis
This adds what should be a stable interface to read GPU load from userspace. (v2): Fix comments and name of file per recommendations. (v3): Add chapter to amdgpu.rst as well. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Acked-by: Slava Abramov <slava.abramov@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amdgpu: band aid validating VM PTsChristian König
Always validating the VM PTs takes to much time. Only always validate the per VM BOs for now. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-06Merge tag 'omapdrm-4.19' of ↵Dave Airlie
git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux into drm-next omapdrm changes for 4.19 * Workaround for DRA7 errata i932 * Fix mm_list locking * Cleanups Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/88b2e77f-9646-d15f-645b-ba45af2a1966@ti.com
2018-07-05drm/i915/selftests: Detect unknown swizzling correctlyChris Wilson
i915_gem_detect_bit_6_swizzle() tries to hide unknown swizzling from userspace (and ourselves) leaving us with the only clue inside i915->quirks & QUIRK_PIN_SWIZZLED_PAGES. If we see this bit set, it means that we really have no clue as to what the swizzle pattern is being used in any one page and so cannot compute what the reference value should be in our tiling selftests. We have to skip the test. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107133 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180705171523.18462-1-chris@chris-wilson.co.uk
2018-07-05drm/atomic-helper: Use bitwise or for filling a bitmaskVille Syrjälä
Using += to set the bits in a mask looks funny. It works in this case because we never set the same bit twice. But let's switch to |= to make this look more regular. Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180615170734.2774-1-ville.syrjala@linux.intel.com Reviewed-by: Eric Anholt <eric@anholt.net>
2018-07-05drm/i915: Remove pointless if-else from sdvo codeVille Syrjälä
The return value is a bool so we can just return the result of the biwise AND. The compiler will take care of the rest. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180621174658.18823-1-ville.syrjala@linux.intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2018-07-05drm/v3d: Fix a grammar nit in the scheduler docs.Eric Anholt
Signed-off-by: Eric Anholt <eric@anholt.net> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20180703170515.6298-4-eric@anholt.net Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Daniel Vetter <daniel@ffwll.ch>
2018-07-05drm/v3d: Remove unnecessary dma_fence_ops.Eric Anholt
The dma-fence core as of commit 418cc6ca0607 ("dma-fence: Make ->wait callback optional") provides appropriate defaults for these methods. Signed-off-by: Eric Anholt <eric@anholt.net> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20180703170515.6298-2-eric@anholt.net Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Daniel Vetter <daniel@ffwll.ch>
2018-07-05drm/v3d: Delay the scheduler timeout if we're still making progress.Eric Anholt
GTF-GLES2.gtf.GL.acos.acos_float_vert_xvary submits jobs that take 4 seconds at maximum resolution, but we still want to reset quickly if a job is really hung. Sample the CL's current address and the return address (since we call into tile lists repeatedly) and if either has changed then assume we've made progress. Signed-off-by: Eric Anholt <eric@anholt.net> Cc: Lucas Stach <l.stach@pengutronix.de> Link: https://patchwork.freedesktop.org/patch/msgid/20180703170515.6298-1-eric@anholt.net Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Daniel Vetter <daniel@ffwll.ch>
2018-07-05drm/v3d: use new return type vm_fault_t in v3d_gem_faultSouptick Joarder
Instead of converting an errno into a vm_fault_t ourselves, use vmf_insert_mixed() which returns a vm_fault_t directly. Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20180704145556.GA11036@jordon-HP-15-Notebook-PC Reviewed-by: Matthew Wilcox <willy@infradead.org>
2018-07-05drm/i915/selftests: Fixup recursive MI_BB_START for gen3Chris Wilson
There's no magic bit0 in MI_BB_START for gen3, it's the same dword length parameter as elsewhere and needs to be zero. v2: Same bug in both live_requests and live_hanghcheck. References: https://bugs.freedesktop.org/show_bug.cgi?id=107132 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20180705154756.5533-1-chris@chris-wilson.co.uk Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2018-07-05drm/amd/display: add a check for display depth validityMikita Lipski
[why] HDMI 2.0 fails to validate 4K@60 timing with 10 bpc [how] Adding a helper function that would verify if the display depth assigned would pass a bandwidth validation. Drop the display depth by one level till calculated pixel clk is lower than maximum TMDS clk. Bugzilla: https://bugs.freedesktop.org/106959 Tested-by: Mike Lothian <mike@fireburn.co.uk> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/amd/display: adding ycbcr420 pixel encoding for hdmiMikita Lipski
[why] HDMI EDID's VSDB contains spectial timings for specifically YCbCr 4:2:0 colour space. In those cases we need to verify if the mode provided is one of the special ones has to use YCbCr 4:2:0 pixel encoding for display info. [how] Verify if the mode is using specific ycbcr420 colour space with the help of DRM helper function and assign the mode to use ycbcr420 pixel encoding. Tested-by: Mike Lothian <mike@fireburn.co.uk> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/arm/malidp: Added the late system pm functionsAyan Kumar Halder
malidp_pm_suspend_late checks if the runtime status is not suspended and if so, invokes malidp_runtime_pm_suspend which disables the display engine/core interrupts and the clocks. It sets the runtime status as suspended. The difference between suspend() and suspend_late() is as follows:- 1. suspend() makes the device quiescent. In our case, we invoke the DRM helper which disables the CRTC. This would have invoked runtime pm suspend but the system suspend process disables runtime pm. 2. suspend_late() It continues the suspend operations of the drm device which was started by suspend(). In our case, it performs the same functionality as runtime_suspend(). The complimentary functions are resume() and resume_early(). In the case of resume_early(), we invoke malidp_runtime_pm_resume() which enables the clocks and the interrupts. It sets the runtime status as active. If the device was in runtime suspend mode before system suspend was called, pm_runtime_work() will put the device back in runtime suspended mode( after the complete system has been resumed). Signed-off-by: Ayan Kumar Halder <ayan.halder@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2018-07-05drm/arm/malidp: Set the output_depth register in modesetAyan Kumar Halder
One needs to store the value of the OUTPUT_DEPTH that one has parsed from device tree, so that it can be restored on system resume. This value is set in the modeset function as this gets reset when the system suspends. Signed-off-by: Ayan Kumar Halder <ayan.halder@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2018-07-05drm/arm/malidp: Enable/disable interrupts in runtime pmAyan Kumar Halder
Display and scaling engine interrupts need to be disabled when the runtime pm invokes malidp_runtime_pm_suspend(). Conversely, they need to be enabled in malidp_runtime_pm_resume(). This patch depends on: https://lkml.org/lkml/2017/5/15/695 Reported-by: Alexandru-Cosmin Gheorghe <Alexandru-Cosmin.Gheorghe@arm.com> Signed-off-by: Alexandru-Cosmin Gheorghe <Alexandru-Cosmin.Gheorghe@arm.com> Signed-off-by: Ayan Kumar Halder <ayan.halder@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2018-07-05drm/arm/malidp: Split malidp interrupt initialization functions.Ayan Kumar Halder
Malidp uses two interrupts ie 1. se_irq - used for memory writeback. and 2. de_irq - used for display output. Extract the hardware initialization part from malidp interrupt registration ie (malidp_de_irq_init()/ malidp_se_irq_init()) into a separate function (ie malidp_de_irq_hw_init()/malidp_se_irq_hw_init()) which will be later invoked from runtime_pm_resume function when it needs to re-enable the interrupts. Signed-off-by: Ayan Kumar Halder <ayan.halder@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2018-07-05drm/arm/malidp: Modified the prototype of malidp irq de-initializersAyan Kumar Halder
Malidp uses two interrupts ie 1. se_irq - used for memory writeback. and 2. de_irq - used for display output. 'struct drm_device' is being replaced with 'struct malidp_hw_device' as the function argument. The reason being the dependency of malidp_de_irq_fini on 'struct drm_device' needs to be removed so as to enable it to call from functions which receives 'struct malidp_hw_device' as argument. Furthermore, there is no way to retrieve 'struct drm_device' from 'struct malidp_hw_device'. Signed-off-by: Ayan Kumar Halder <ayan.halder@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2018-07-05drm: mali-dp: Add debugfs file for reporting internal errorsAlexandru Gheorghe
Status register contains a lot of bits for reporting internal errors inside Mali DP. Currently, we just silently ignore all of the errors, that doesn't help when we are investigating different bugs, especially on the FPGA models which have a lot of constraints, so we could easily end up in AXI or underrun errors. Add a new file called debug that contains an aggregate of the errors reported by the Mali DP hardware. E.g: [root@alarm ~]# cat /sys/kernel/debug/dri/1/debug [DE] num_errors : 167 [DE] last_error_status : 0x00000001 [DE] last_error_vblank : 385 [SE] num_errors : 3 [SE] last_error_status : 0x00e23001 [SE] last_error_vblank : 201 Changes since v2: - Add lock to protect the errors stats. - Add possibility to reset the error stats by writing anything to the debug file. Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2018-07-05drm/mali-dp: Improve writeback handling for DP500.Liviu Dudau
Mali DP500 operates in continuous writeback mode (writes frame content until stopped) and it needs special handling in order to behave like a one-shot writeback engine. The original state machine added for DP500 was a bit fragile, as it did not handle correctly cases where a new atomic commit was in progress when the SE IRQ happens and it would commit some partial updates. Improve the handling by adding a parameter to the set_config_valid() function to clear the config valid bit in hardware before starting a new commit and by introducing a MW_RESTART state in the writeback state machine to cater for the case where a new writeback commit gets submitted while the last one is still being active. Reported-by: Brian Starkey <brian.starkey@arm.com> Reviewed-by: Brian Starkey <brian.starkey@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2018-07-05drm: mali-dp: Add writeback connectorBrian Starkey
Mali-DP has a memory writeback engine which can be used to write the composition result to a memory buffer. Expose this functionality as a DRM writeback connector on supported hardware. Changes since v1: Daniel Vetter: - Don't require a modeset when writeback routing changes - Make writeback connector always disconnected Changes since v2: - Rebase onto new drm_writeback_connector - Add reset callback, allocating subclassed state Daniel Vetter: - Squash out-fence support into this commit Gustavo Padovan: - Don't signal fence directly from driver (and drop malidp_mw_job) Changes since v3: - Modifications to fit with Mali-DP commit tail changes Signed-off-by: Brian Starkey <brian.starkey@arm.com> [rebased and fixed conflicts] Signed-off-by: Mihail Atanassov <mihail.atanassov@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2018-07-05drm/mali-dp: Add RGB writeback formats for DP500.Liviu Dudau
Annotate the pixel format matrix for DP500 with the memory-write flag for formats that are supported by the SE memwrite engine. Reviewed-by: Brian Starkey <brian.starkey@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2018-07-05drm/mali-dp: Add writeback support for DP500.Liviu Dudau
Mali DP500 behaves differently from the rest of the Mali DP IP, in that it does not have a one-shot mode and keeps writing the content of the current frame to the provided memory area until stopped. As a way of emulating the one-shot behaviour, we are going to use the CVAL interrupt that is being raised at the start of each frame, during prefetch phase, to act as End-of-Write signal, but with a twist: we are going to disable the memory write engine right after we're notified that it has been enabled, using the knowledge that the bit controlling the enabling will only be acted upon on the next vblank/prefetch. CVAL interrupt will fire durint the next prefetch phase every time the global CVAL bit gets set, so we need a state byte to track the memory write enabling. We also need to pay attention during the disabling of the memory write engine as that requires the CVAL bit to be set in the control register, but we don't want to do that during an atomic commit, as it will write into the hardware a partial state. Reviewed-by: Brian Starkey <brian.starkey@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2018-07-05drm: mali-dp: Add RGB writeback formats for DP550/DP650Brian Starkey
Add a layer bit for the SE memory-write, and add it to the pixel format matrix for DP550/DP650. Signed-off-by: Brian Starkey <brian.starkey@arm.com> [rebased and fixed conflicts] Signed-off-by: Mihail Atanassov <mihail.atanassov@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2018-07-05drm: mali-dp: Add support for writeback on DP550/DP650Liviu Dudau
Mali-DP display processors are able to write the composition result to a memory buffer via the SE. Add entry points in the HAL for enabling/disabling this feature, and implement support for it on DP650 and DP550. DP500 acts differently and so is omitted from this change. Changes since v3: - Fix missing vsync interrupt for DP550 Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Brian Starkey <brian.starkey@arm.com> [rebased and fixed conflicts] Signed-off-by: Mihail Atanassov <mihail.atanassov@arm.com>
2018-07-05drm/tilcdc: Use drm_connector_has_possible_encoder()Ville Syrjälä
Use drm_connector_has_possible_encoder() for checking whether the encoder has an associated connector. v2: Replace the drm_for_each_connector_encoder_ids() loop with a simple drm_connector_has_possible_encoder() call Cc: Jyri Sarha <jsarha@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180628131315.14156-10-ville.syrjala@linux.intel.com Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Jyri Sarha <jsarha@ti.com>
2018-07-05drm/msm: Use drm_connector_has_possible_encoder()Ville Syrjälä
Use drm_connector_has_possible_encoder() for checking whether the encoder has an associated connector. v2: Replace the drm_for_each_connector_encoder_ids() loop with a simple drm_connector_has_possible_encoder() call Cc: Rob Clark <robdclark@gmail.com> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180628131315.14156-9-ville.syrjala@linux.intel.com Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm: Add drm_connector_has_possible_encoder()Ville Syrjälä
Add a small helper for checking whether a connector and encoder are associated with each other. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180628131315.14156-8-ville.syrjala@linux.intel.com Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05drm/radeon: Use drm_connector_for_each_possible_encoder()Ville Syrjälä
Use drm_connector_for_each_possible_encoder() for iterating connector->encoder_ids[]. A bit more convenient not having to deal with the implementation details. v2: Replace drm_for_each_connector_encoder_ids() with drm_connector_for_each_possible_encoder() (Daniel) Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: amd-gfx@lists.freedesktop.org Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180628131315.14156-7-ville.syrjala@linux.intel.com
2018-07-05drm/nouveau: Use drm_connector_for_each_possible_encoder()Ville Syrjälä
Use drm_connector_for_each_possible_encoder() for iterating connector->encoder_ids[]. A bit more convenient not having to deal with the implementation details. v2: Replace drm_for_each_connector_encoder_ids() with drm_connector_for_each_possible_encoder() (Daniel) v3: Initialize nv_encoder to NULL to shut up gcc/smatch Cc: Dan Carpenter <dan.carpenter@oracle.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: nouveau@lists.freedesktop.org Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180702152927.13351-1-ville.syrjala@linux.intel.com
generated by cgit (git 2.34.1) at 2025-09-19 11:42:53 +0000