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2022-09-13drm/i915: Fix TV encoder clock computationVille Syrjälä
The TV encoder has its own special clocking strategy, which means we can't just use intel_crtc_dotclock() to figure out what the resulting dotclock will be given the actual DPLL port_clock. Additionally the DPLL can't always generate exactly the frequency we initially asked for. This results in us computing a bogus dotclock/etc., and it won't match the readout which is handled by the encoder itself properly. Naturally the state checker becomes unhappy with the mismatch. To do this sanely we'll need to move the DPLL computation into encoder->compute_config() so that all the derived state gets correctly computed based on the actual DPLL output frequency. Start doing that just for the TV encoder initally as intel_crtc_dotclock() should be able to handle other encoder types well enough. Though eventually this should be done for all encoder types rather than doing it from intel_crtc_compute_config(). With this we actually do some of the DPLL state computation twice, but we can skip the second actual .find_dpll() search by flagging .clock_set=true after we've done it once. We also still need to avoid clobbering the correct adjusted_mode.crtc_clock set up by encoder->compute_config() when called a second time from intel_crtc_compute_config(). Fixes: 665a7b04092c ("drm/i915: Feed the DPLL output freq back into crtc_state") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220909205932.32537-1-ville.syrjala@linux.intel.com Acked-by: Jani Nikula <jani.nikula@intel.com>
2022-09-13drm/i915/bios: Add the "Disable compression for the Display Port/HDMI ↵Ville Syrjälä
external display" bit The child device block has gained a new bit for disabling compression for external displays. Seems stupid, but there it is. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907093534.29004-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-09-13drm/i915/bios: Fix VBT ACPI DPMS bit polarityVille Syrjälä
We have the ACPI vs. not ACPI DPMS bit polarity the wrong way around. Fix it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907093534.29004-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-09-13drm/i915/dp: use drm_dp_phy_name() for loggingJani Nikula
Drop the local intel_dp_phy_name() function, and replace with drm_dp_phy_name(). This lets us drop a number of local buffers. v2: Rebase Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220912132313.2774603-1-jani.nikula@intel.com
2022-09-13drm/mediatek: Fix wrong dither settingsAllen-KH Cheng
The width and height arguments in the cmdq packet for mtk_dither_config() are inverted. We fix the incorrect width and height for dither settings in mtk_dither_config(). Fixes: 73d3724745db ("drm/mediatek: Adjust to the alphabetic order for mediatek-drm") Co-developed-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220908141205.18256-1-allen-kh.cheng@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2022-09-12Merge tag 'hyperv-fixes-signed-20220912' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux Pull hyperv fixes from Wei Liu: - Fix an error handling issue in DRM driver (Christophe JAILLET) - Fix some issues in framebuffer driver (Vitaly Kuznetsov) - Two typo fixes (Jason Wang, Shaomin Deng) - Drop unnecessary casting in kvp tool (Zhou Jie) * tag 'hyperv-fixes-signed-20220912' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux: Drivers: hv: Never allocate anything besides framebuffer from framebuffer memory region Drivers: hv: Always reserve framebuffer region for Gen1 VMs PCI: Move PCI_VENDOR_ID_MICROSOFT/PCI_DEVICE_ID_HYPERV_VIDEO definitions to pci_ids.h tools: hv: kvp: remove unnecessary (void*) conversions Drivers: hv: remove duplicate word in a comment tools: hv: Remove an extraneous "the" drm/hyperv: Fix an error handling path in hyperv_vmbus_probe()
2022-09-12drm/i915/mtl: Obtain SAGV values from MMIO instead of GT pcode mailboxRadhakrishna Sripada
From Meteorlake, Latency Level, SAGV bloack time are read from LATENCY_SAGV register instead of the GT driver pcode mailbox. DDR type and QGV information are also to be read from Mem SS registers. v2: - Simplify MTL_MEM_SS_INFO_QGV_POINT macro(MattR) - Nit: Rearrange the bit def's from higher to lower(MattR) - Restore platform definition for ADL-P(MattR) - Move back intel_qgv_point def to intel_bw.c(Jani) v3: - Rebase Bspec: 64636, 64608 Cc: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Original Author: Caz Yokoyama Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220902060342.151824-9-radhakrishna.sripada@intel.com
2022-09-12drm/i915/mtl: Add DP AUX support on TypeC portsImre Deak
On MTL TypeC ports the AUX_CH_CTL and AUX_CH_DATA addresses have changed wrt. previous platforms, adjust the code accordingly. Signed-off-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220902060342.151824-8-radhakrishna.sripada@intel.com
2022-09-12drm/i915/mtl: Add display power wellsImre Deak
Add support for display power wells on MTL. The differences from XE_LPD: - The AUX HW block is moved to the PICA block, where the registers are on an always-on power well and the functionality needs to be powered on/off via the AUX_CH_CTL register: [1], [2] - The DDI IO power on/off programming sequence is moved to the PHY PLL enable/disable sequence. [3], [4], [5] Bspec: [1] 49233, [2] 65247, [3] 64568, [4] 65451, [5] 65450 v2: - Update the comment in aux power well enable - Reuse the noop sync fn for aux sync. - Use REG_BIT for new register bit definitions Signed-off-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220902060342.151824-7-radhakrishna.sripada@intel.com
2022-09-12drm/i915/mtl: Add gmbus and gpio supportRadhakrishna Sripada
Add tables to map the GMBUS pin pairs to GPIO registers and port to DDC. From spec we have registers GPIO_CTL[1-5] mapped to native display phys and GPIO_CTL[9-12] are mapped to TC ports. v2: - Drop unused GPIO pins(MattR) BSpec: 49306 Cc: Matt Roper <matthew.d.roper@intel.com> Original Author: Brian J Lovin Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220902060342.151824-6-radhakrishna.sripada@intel.com
2022-09-12drm/i915: Move display and media IP version to runtime infoRadhakrishna Sripada
Future platforms can read the IP version from a register and the IP version numbers need not be hard coded in device info. Move the ip version for media and display to runtime info. On platforms where hard coding of IP version is required, update the IP version in __runtime under device_info. v2: - Avoid name collision for ip versions(Jani) v4.1: - Fix build error in mock_gem_device.c v4.2: - Use ip instead of version for ip_vesion member.(MattR) Suggested-by: Jani Nikula <jani.nikula@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220902221054.173524-1-radhakrishna.sripada@intel.com
2022-09-12drm/i915/gt: Extract function to apply media fusesLucas De Marchi
Just like is done for compute and copy engines, extract a function to handle media engines. While at it, be consistent on using or not the uncore/gt/info variable aliases. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220909-media-v2-2-6f20f322b4ef@intel.com
2022-09-12drm/i915/gt: Use MEDIA_VER() when handling media fusesLucas De Marchi
Check for media IP version instead of graphics since this is figuring out the media engines' configuration. Currently the only platform with non-matching graphics/media version is Meteor Lake: update the check in gen11_vdbox_has_sfc() so it considers not only version 12, but also any later version which then includes that platform. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220909-media-v2-1-6f20f322b4ef@intel.com
2022-09-12Revert "drm/i915/display: Re-add check for low voltage sku for max dp source ↵Ville Syrjälä
rate" This reverts commit d5929835080a60f9119d024fa42f315913942f76. With the Parade PS8461E MUX workaround (WaEdpLinkRateDataReload) implemented we can get finally rid of the is_low_voltage_sku() check that incorrectly prevents many machines from using the 8.1Gpbs link rate. Cc: Jason A. Donenfeld <Jason@zx2c4.com> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5272 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6323 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6205 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220902070319.15395-2-ville.syrjala@linux.intel.com Tested-by: Aaron Ma <aaron.ma@canonical.com> Tested-by: Jason A. Donenfeld <Jason@zx2c4.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> (cherry picked from commit 483e3d87a37e804588ac8224aadd20a84593cafd) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2022-09-12drm/i915/gt: Fix perf limit reasons bit positionsAshutosh Dixit
Perf limit reasons bit positions were off by one. Fixes: fa68bff7cf27 ("drm/i915/gt: Add sysfs throttle frequency interfaces") Cc: stable@vger.kernel.org # v5.18+ Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Acked-by: Andi Shyti <andi.shyti@linux.intel.com> Reviewed-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220908155821.1662110-1-ashutosh.dixit@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (cherry picked from commit 60017f34fc334d1bb25476b0b0996b4073e76c90) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2022-09-12drm/i915/guc: Cancel GuC engine busyness worker synchronouslyUmesh Nerlige Ramappa
The worker is canceled in gt_park path, but earlier it was assumed that gt_park path cannot sleep and the cancel is asynchronous. This caused a race with suspend flow where the worker runs after suspend and causes an unclaimed register access warning. Cancel the worker synchronously since the gt_park is indeed allowed to sleep. v2: Fix author name and sign-off mismatch Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4419 Fixes: 77cdd054dd2c ("drm/i915/pmu: Connect engine busyness stats from GuC to pmu") Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220827002135.139349-1-umesh.nerlige.ramappa@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (cherry picked from commit 31335aa8e08be3fe10c50aecd2f11aba77544a78) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2022-09-12drm/i915: Set correct domains values at _i915_vma_move_to_activeNirmoy Das
Fix regression introduced by commit: "drm/i915: Individualize fences before adding to dma_resv obj" which sets obj->read_domains to 0 for both read and write paths. Also set obj->write_domain to 0 on read path which was removed by the commit. References: https://gitlab.freedesktop.org/drm/intel/-/issues/6639 Fixes: 420a07b841d0 ("drm/i915: Individualize fences before adding to dma_resv obj") Signed-off-by: Nirmoy Das <nirmoy.das@intel.com> Cc: <stable@vger.kernel.org> # v5.16+ Cc: Matthew Auld <matthew.auld@intel.com> Cc: Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907172641.12555-1-nirmoy.das@intel.com (cherry picked from commit 04f7eb3d4582a0a4da67c86e55fda7de2df86d91) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2022-09-12drm/i915/vdsc: Set VDSC PIC_HEIGHT before using for DP DSCAnkit Nautiyal
Currently, pic_height of vdsc_cfg structure is being used to calculate slice_height, before it is set for DP. So taking out the lines to set pic_height from the helper intel_dp_dsc_compute_params() to individual encoders, and setting pic_height, before it is used to calculate slice_height for DP. Fixes: 5a6d866f8e1b ("drm/i915: Get slice height before computing rc params") Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220902103219.1168781-1-ankit.k.nautiyal@intel.com (cherry picked from commit e72df53dcb01ec58e0410da353551adf94c8d0f1) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2022-09-12Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector operations for DP"Robert Foss
As reported by Laurent in response to this commit[1], this functionality should not be implemented using the devicetree, because of this let's revert this series for now. This reverts commit c312b0df3b13e4c533743bb2c37fd1bc237368e5. [1] https://lore.kernel.org/all/20220902153906.31000-2-macroalpha82@gmail.com/ Signed-off-by: Robert Foss <robert.foss@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220912113856.817188-3-robert.foss@linaro.org
2022-09-12drm/i915/mtl: Hook up interrupts for standalone mediaMatt Roper
Top-level handling of standalone media interrupts will be processed as part of the primary GT's interrupt handler (since primary and media GTs share an MMIO space, unlike remote tile setups). When we get down to the point of handling engine interrupts, we need to take care to lookup VCS and VECS engines in the media GT rather than the primary. There are also a couple of additional "other" instance bits that correspond to the media GT's GuC and media GT's power management interrupts; we need to direct those to the media GT instance as well. Bspec: 45605 Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220906234934.3655440-15-matthew.d.roper@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915/mtl: Use primary GT's irq lock for media GTMatt Roper
When we hook up interrupts (in the next patch), interrupts for the media GT are still processed as part of the primary GT's interrupt flow. As such, we should share the same IRQ lock with the primary GT. Let's convert gt->irq_lock into a pointer and just point the media GT's instance at the same lock the primary GT is using. v2: - Point media's gt->irq_lock at the primary GT lock properly. (Daniele) - Fix jump target for intel_root_gt_init_early errors. (Daniele) Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220906234934.3655440-14-matthew.d.roper@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915/xelpmp: Expose media as another GTMatt Roper
Xe_LPM+ platforms have "standalone media." I.e., the media unit is designed as an additional GT with its own engine list, GuC, forcewake, etc. Let's allow platforms to include media GTs in their device info. v2: - Simplify GSI register handling and split it out to a separate patch for ease of review. (Daniele) Cc: Aravind Iddamsetty <aravind.iddamsetty@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Aravind Iddamsetty <aravind.iddamsetty@intel.com> Acked-by: Aravind Iddamsetty <aravind.iddamsetty@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220906234934.3655440-13-matthew.d.roper@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915/mtl: Add gsi_offset when emitting aux table invalidationMatt Roper
The aux table invalidation registers are a bit unique --- they're engine-centric registers that reside in the GSI register space rather than within the engines' regular MMIO ranges. That means that when issuing invalidation on engines in the standalone media GT, the GSI offset must be added to the regular MMIO offset for the invalidation registers. Cc: Aravind Iddamsetty <aravind.iddamsetty@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Aravind Iddamsetty <aravind.iddamsetty@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220906234934.3655440-12-matthew.d.roper@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915/uncore: Add GSI offset to uncoreMatt Roper
GT non-engine registers (referred to as "GSI" registers by the spec) have the same relative offsets on standalone media as they do on the primary GT, just with an additional "GSI offset" added to their MMIO address. If we store this GSI offset in the standalone media's intel_uncore structure, it can be automatically applied to all GSI reg reads/writes that happen on that GT, allowing us to re-use our existing GT code with minimal changes. Forcewake and shadowed register tables for the media GT (which will be added in a future patch) are listed as final addresses that already include the GSI offset, so we also need to add the GSI offset before doing lookups of registers in one of those tables. v2: - Add comment on raw_reg_*() macros explaining why we don't bother with GSI offsets in them. (Daniele) Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220908224550.821257-1-matthew.d.roper@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915: Handle each GT on init/release and suspend/resumeMatt Roper
In preparation for enabling a second GT, there are a number of GT/uncore operations that happen during initialization or suspend flows that need to be performed on each GT, not just the primary, Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220906234934.3655440-10-matthew.d.roper@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915: Initialize MMIO access for each GTMatt Roper
In a multi-GT system we need to initialize MMIO access for each GT, not just the primary GT. Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220906234934.3655440-9-matthew.d.roper@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915: Use a DRM-managed action to release the PCI bridge deviceMatt Roper
As we start supporting multiple uncore structures in future patches, the MMIO cleanup (which may also get called mid-init if there's a failure) will become more complicated. Moving to DRM-managed actions will help keep things simple. Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220906234934.3655440-8-matthew.d.roper@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915: Rename and expose common GT early init routineMatt Roper
The common early GT init is needed for initialization of all GT types (root/primary, remote tile, standalone media). Since standalone media (coming in a future patch) will be implemented in a separate file, rename and expose the function for use. Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220906234934.3655440-7-matthew.d.roper@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915: Prepare more multi-GT initializationMatt Roper
We're going to introduce an additional intel_gt for MTL's media unit soon. Let's provide a bit more multi-GT initialization framework in preparation for that. The initialization will pull the list of GTs for a platform from the device info structure. Although necessary for the immediate MTL media enabling, this same framework will also be used farther down the road when we enable remote tiles on xehpsdv and pvc. v2: - Re-add missing test for !HAS_EXTRA_GT_LIST in intel_gt_probe_all(). v3: - Move intel_gt_definition struct to intel_gt_types.h. (Jani) - Drop gtdef->setup(). For now we'll just use a switch() based on GT type since we don't have too many different handlers for the foreseeable future. (Jani) Cc: Aravind Iddamsetty <aravind.iddamsetty@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Aravind Iddamsetty <aravind.iddamsetty@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220906234934.3655440-6-matthew.d.roper@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915: Drop intel_gt_tile_cleanup()Matt Roper
Unmapping of the MMIO range can be done as a DRM-managed action, which will take care of the unmapping on device teardown and error paths. This will also ensure proper ordering with respect to other DRM-managed actions that we'll be using to clean up non-primary GTs in upcoming patches. We have not yet enabled any non-root GTs in the driver yet, so the kfree() of the GT structure is effectively dead code. When we do start enabling non-root GTs in upcoming patches, those are going to be using DRM-managed allocations tied to the device lifetime, so we don't need to explicitly free them (and kfree would be incorrect anyway). Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220906234934.3655440-5-matthew.d.roper@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915: Use managed allocations for extra uncore objectsMatt Roper
We're slowly transitioning the init-time kzalloc's of the driver over to DRM-managed allocations; let's make sure the uncore objects allocated for non-root GTs are thus allocated. Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220906234934.3655440-4-matthew.d.roper@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915: Only hook up uncore->debug for primary uncoreMatt Roper
The original intent of intel_uncore_mmio_debug as described in commit 0a9b26306d6a ("drm/i915: split out uncore_mmio_debug") was to be a singleton structure that could be shared between multiple GTs' uncore objects in a multi-tile system. Somehow we went off track and started allocating separate instances of this structure for each GT, which defeats that original goal. But in reality, there isn't even a need to share the mmio_debug between multiple GTs; on all modern platforms (i.e., everything after gen7) unclaimed register accesses are something that can only be detected for display registers. There's no point in grabbing the debug spinlock and checking for unclaimed accesses on an uncore used by an xehpsdv or pvc remote tile GT, or the uncore used by a mtl standalone media GT since all of the display accesses go through the primary intel_uncore. The simplest solution is to simply leave uncore->debug NULL on all intel_uncore instances except for the primary one. This will allow us to avoid the pointless debug spinlock acquisition we've been doing on MMIO accesses coming in through these intel_uncores. Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220906234934.3655440-3-matthew.d.roper@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915: Move locking and unclaimed check into mmio_debug_{suspend, resume}Matt Roper
Moving the locking for MMIO debug (and the final check for unclaimed accesses when resuming debug after a userspace-initiated forcewake) will make it simpler to completely skip MMIO debug handling on uncores that don't support it in future patches. Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220906234934.3655440-2-matthew.d.roper@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915/gt: Fix perf limit reasons bit positionsAshutosh Dixit
Perf limit reasons bit positions were off by one. Fixes: fa68bff7cf27 ("drm/i915/gt: Add sysfs throttle frequency interfaces") Cc: stable@vger.kernel.org # v5.18+ Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Acked-by: Andi Shyti <andi.shyti@linux.intel.com> Reviewed-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220908155821.1662110-1-ashutosh.dixit@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12Revert "drm/i915/dg2: extend Wa_1409120013 to DG2"Lucas De Marchi
This reverts commit 487970e8bb776c989013bb59d6cbb22e45b9afc6. Updated bspec and workaround database note Wa_1409120013 is not needed for DG2 (or any Xe_LPD) platform. Simply check by display version 12. v2: Simplify condition check to display version (Matt Roper) Cc: Matt Atwood <matthew.s.atwood@intel.com> Cc: Clint Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907232541.1720966-1-lucas.demarchi@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915/guc: Cancel GuC engine busyness worker synchronouslyUmesh Nerlige Ramappa
The worker is canceled in gt_park path, but earlier it was assumed that gt_park path cannot sleep and the cancel is asynchronous. This caused a race with suspend flow where the worker runs after suspend and causes an unclaimed register access warning. Cancel the worker synchronously since the gt_park is indeed allowed to sleep. v2: Fix author name and sign-off mismatch Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4419 Fixes: 77cdd054dd2c ("drm/i915/pmu: Connect engine busyness stats from GuC to pmu") Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220827002135.139349-1-umesh.nerlige.ramappa@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915/gsc: allocate extended operational memory in LMEMTomas Winkler
GSC requires more operational memory than available on chip. Reserve 4M of LMEM for GSC operation. The memory is provided to the GSC as struct resource to the auxiliary data of the child device. Cc: Alan Previn <alan.previn.teres.alexis@intel.com> Cc: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907215113.1596567-16-tomas.winkler@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915/gsc: add GSC XeHP SDV platform definitionAlexander Usyskin
Define GSC on XeHP SDV (Intel(R) dGPU without display) XeHP SDV uses the same hardware settings as DG1, but uses polling instead of interrupts and runs the firmware in slow pace due to hardware limitations. Signed-off-by: Vitaly Lubart <vitaly.lubart@intel.com> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907215113.1596567-6-tomas.winkler@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915/gsc: add slow_firmware flag to the gsc device definitionAlexander Usyskin
Add slow_firmware flag to the gsc device definition and pass it to mei auxiliary device, this instructs the driver to use longer operation timeouts. Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907215113.1596567-5-tomas.winkler@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/i915/gsc: skip irq initialization if using pollingVitaly Lubart
Some platforms require the host to poll on the GSC registers instead of relaying on the interrupts. For those platforms, irq initialization should be skipped Signed-off-by: Vitaly Lubart <vitaly.lubart@intel.com> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907215113.1596567-2-tomas.winkler@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12drm/bridge: it6505: use drm_debug_enabled() in it6505_debug_print()Hamza Mahfooz
As made mention of in commit 9f0ac028410f ("drm/print: rename drm_debug to __drm_debug to discourage use"), we shouldn't explicitly refer to __drm_debug in this context. So, use drm_debug_enabled() instead. Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver") Signed-off-by: Hamza Mahfooz <someguy@effective-light.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Robert Foss <robert.foss@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220910224816.15058-1-someguy@effective-light.com
2022-09-12Merge tag 'drm-intel-gt-next-2022-09-09' of ↵Dave Airlie
git://anongit.freedesktop.org/drm/drm-intel into drm-next UAPI Changes: - Revert "drm/i915/dg2: Add preemption changes for Wa_14015141709" The intent of Wa_14015141709 was to inform us that userspace can no longer control object-level preemption as it has on past platforms (i.e., by twiddling register bit CS_CHICKEN1[0]). The description of the workaround in the spec wasn't terribly well-written, and when we requested clarification from the hardware teams we were told that on the kernel side we should also probably stop setting FF_SLICE_CS_CHICKEN1[14], which is the register bit that directs the hardware to honor the settings in per-context register CS_CHICKEN1. It turns out that this guidance about FF_SLICE_CS_CHICKEN1[14] was a mistake; even though CS_CHICKEN1[0] is non-operational and useless to userspace, there are other bits in the register that do still work and might need to be adjusted by userspace in the future (e.g., to implement other workarounds that show up). If we don't set FF_SLICE_CS_CHICKEN1[14] in i915, then those future workarounds would not take effect. Even more details at: https://lists.freedesktop.org/archives/intel-gfx/2022-September/305478.html Driver Changes: - Align GuC/HuC firmware versioning scheme to kernel practices (John) - Fix #6639: h264 hardware video decoding broken in 5.19 on Intel(R) Celeron(R) N3060 (Nirmoy) - Meteorlake (MTL) enabling (Matt R) - GuC SLPC improvements (Vinay, Rodrigo) - Add thread execution tuning setting for ATS-M (Matt R) - Don't start PXP without mei_pxp bind (Juston) - Remove leftover verbose debug logging from GuC error capture (John) - Abort suspend on low system memory conditions (Nirmoy, Matt A, Chris) - Add DG2 Wa_16014892111 (Matt R) - Rename ggtt_view as gtt_view (Niranjana) - Consider HAS_FLAT_CCS() in needs_ccs_pages (Matt A) - Don't try to disable host RPS when this was never enabled. (Rodrigo) - Clear stalled GuC CT request after a reset (Daniele) - Remove runtime info printing from GuC time stamp logging (Jani) - Skip Bit12 fw domain reset for gen12+ (Sushma, Radhakrishna) - Make GuC log sizes runtime configurable (John) - Selftest improvements (Daniele, Matt B, Andrzej) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/YxshfqUN+vDe92Zn@jlahtine-mobl.ger.corp.intel.com
2022-09-12Merge tag 'amd-drm-next-6.1-2022-09-08' of ↵Dave Airlie
https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-6.1-2022-09-08: amdgpu: - Mode2 reset for RDNA2 - Lots of new DC documentation - Add documentation about different asic families - DSC improvements - Aldebaran fixes - Misc spelling and grammar fixes - GFXOFF stats support for vangogh - DC frame size fixes - NBIO 7.7 updates - DCN 3.2 updates - DCN 3.1.4 Updates - SMU 13.x updates - Misc bug fixes - Rework DC register offset handling - GC 11.x updates - PSP 13.x updates - SDMA 6.x updates - GMC 11.x updates - SR-IOV updates - PSP fixes for TA unloading - DSC passthrough support - Misc code cleanups amdkfd: - ISA fixes for some GC 10.3 IPs - Misc code cleanups radeon: - Delayed work flush fix - Use time_after for some jiffies calculations drm: - DSC passthrough aux support Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220908155202.57862-1-alexander.deucher@amd.com
2022-09-12Merge drm/drm-next into drm-intel-nextJani Nikula
Backmerge to sync the DP MST atomic changes to drm-intel-next. Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2022-09-12drm/aperture: Fix some kerneldoc commentsThierry Reding
Reword some kerneldoc comments for the DRM aperture handling code. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220905162241.391226-1-thierry.reding@gmail.com
2022-09-12drm/format-helper: Add drm_fb_build_fourcc_list() helperThomas Zimmermann
Add drm_fb_build_fourcc_list() function that builds a list of supported formats from native and emulated ones. Helpful for all drivers that do format conversion as part of their plane updates. Update current caller. v3: * improve warnings on ignored formats (Sam) v2: * use u32 instead of uint32_t (Sam) * print a warning if output array is too small (Sam) * comment fixes (Sam) Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220905141648.22013-5-tzimmermann@suse.de
2022-09-12drm/modes: Add initializer macro DRM_MODE_INIT()Thomas Zimmermann
The macro DRM_MODE_INIT() initializes an instance of struct drm_display_mode with typical parameters. Convert simpledrm and also update the macro DRM_SIMPLE_MODE(). v3: * fix DRM_MODE_INIT() docs (kernel test robot) Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220905141648.22013-4-tzimmermann@suse.de
2022-09-12drm/probe-helper: Add drm_crtc_helper_mode_valid_fixed()Thomas Zimmermann
Add drm_crtc_helper_mode_valid_fixed(), which validates a given mode against a display hardware's mode. Convert simpledrm and use it in a few other drivers with static modes. v4: * remove empty line after opening brace v2: * rename 'static' and 'hw' to 'fixed' everywhere Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220905141648.22013-3-tzimmermann@suse.de
2022-09-12drm/probe-helper: Add drm_connector_helper_get_modes_fixed()Thomas Zimmermann
Add drm_connector_helper_get_modes_fixed(), which duplicates a single display mode for a connector. Convert drivers. v2: * rename 'static' and 'hw' to 'fixed' everywhere * fix typo 'there' to 'their' (Sam) Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220905141648.22013-2-tzimmermann@suse.de
2022-09-11drm/vkms: fix 32bit compilation error by replacing macrosMelissa Wen
Replace vkms_formats macro for fixed-point operations with functions from drm/drm_fixed.h to do the same job and fix 32-bit compilation errors. v2: - don't cast results to s32 (Igor) - add missing drm_fixp2int conversion (Igor) Fixes: a19c2ac9858 ("drm: vkms: Add support to the RGB565 format") Tested-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com> (v1) Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1) Reported-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220910190303.682897-1-mwen@igalia.com
generated by cgit (git 2.34.1) at 2025-09-16 06:52:30 +0000