summaryrefslogtreecommitdiff
path: root/drivers/iio/adc
AgeCommit message (Collapse)Author
2025-04-22iio: adc: ti-adc128s052: Simplify using be16_to_cpu()Matti Vaittinen
The register data is 12-bit big-endian data. Use be16_to_cpu() to do the conversion, and simple bitwise AND for masking to make it more obvious. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Link: https://patch.msgid.link/8202060d90221beb9b8cf467606641349ad47fe9.1744022065.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad4130: use new GPIO line value setter callbacksBartosz Golaszewski
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250409-gpiochip-set-rv-iio-v2-5-4b36428f39cb@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ti-ads7950: use new GPIO line value setter callbacksBartosz Golaszewski
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250409-gpiochip-set-rv-iio-v2-4-4b36428f39cb@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: bd79124: Use set_rv and set_multiple_rvMatti Vaittinen
The new GPIO callbacks 'set_rv' and 'set_multiple_rv' allow returning a success code to indicate failures when setting GPIO status. Use them to allow callers to know when things go south. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Link: https://patch.msgid.link/Z_N_J52IZ2IaWawl@mva-rohm Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad7606: add SPI offload supportAngelo Dureghello
Add SPI offload support for this family. Signed-off-by: Angelo Dureghello <adureghello@baylibre.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250403-wip-bl-spi-offload-ad7606-v1-3-1b00cb638b12@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad7380: add ad7389-4David Lechner
Add chip info for AD7389-4 to the ad7380 driver. This is essentially the same as ad7380-4 except that it is internal- reference-only instead of external-reference-only. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250401-iio-ad7380-add-ad7389-4-v1-4-23d2568aa24f@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad7380: move internal reference voltage to chip_infoDavid Lechner
Move the internal reference voltage value to the chip_info structure. Before this change, only ADAQ chips could be internal_ref_only and only non-ADAQ chips could be external_ref_only. Now, this restriction is removed. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250401-iio-ad7380-add-ad7389-4-v1-3-23d2568aa24f@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad7380: rename internal_ref_onlyDavid Lechner
Rename adaq_internal_ref_only to internal_ref_only_adaq. There are non- ADAQ chips in the family that are also internal reference only, so the adaq_ prefix is misleading. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250401-iio-ad7380-add-ad7389-4-v1-2-23d2568aa24f@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad7124: Make register naming consistentUwe Kleine-König
Cleanup definition of register related constants: - Use the register and field names exactly as documented in the data sheet. - Consistently use <regname>_<bitfield> to name a register's bitfield. - Drop _MSK definitions and implicit FIELD_PREP calls. - Consistent indentation. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/20250317115247.3735016-8-u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad7124: Remove ability to write filter_low_pass_3db_frequencyUwe Kleine-König
There are several issues with the function that implements writing to the filter_low_pass_3db_frequency property: - The sinc3 factor should be 0.272 not 0.262 (this is fixed for the reading side in the previous patch). - For freq > 1 the if condition is always true so the sinc4 filter is hardly ever chosen. - In the nearly always taken if branch the filter is set to sinc3, but the frequency is set for sinc4. (And vice versa in the else branch.) This is broken enough to justify the claim that there isn't any serious user. Also it it counter-intuitive that setting the 3db frequency modifies the sample frequency and the filter type. So drop the ability to write that property. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Reviewed-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/20250317115247.3735016-7-u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad7124: Fix 3dB filter frequency readingUwe Kleine-König
The sinc4 filter has a factor 0.23 between Output Data Rate and f_{3dB} and for sinc3 the factor is 0.272 according to the data sheets for ad7124-4 (Rev. E.) and ad7124-8 (Rev. F). Fixes: cef2760954cf ("iio: adc: ad7124: add 3db filter") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Reviewed-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/20250317115247.3735016-6-u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad4000: Add support for SPI offloadMarcelo Schmitt
FPGA HDL projects can include a PWM generator in addition to SPI-Engine. The PWM IP is used to trigger SPI-Engine offload modules that in turn set SPI-Engine to execute transfers to poll data from the ADC. That allows data to be read at the maximum sample rates. Also, it is possible to set a specific sample rate by setting the proper PWM duty cycle and related state parameters, thus allowing an adjustable ADC sample rate when a PWM (offload trigger) is used in combination with SPI-Engine. Add support for SPI offload. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/386ce043a0e3fc9e8ff71f17aef8de128ce5869e.1743110188.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad7944: drop bits_per_word hackDavid Lechner
Remove setting bits_per_word in SPI xfers without data. The shortcoming that this was working around was fixed in the SPI controller driver, so it is no longer necessary. And we don't need this to be cargo-culted to new drivers. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250331-iio-adc-ad7944-drop-bits_per_word-hack-v1-1-2b952e033340@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: rcar: Switch to sparse friendly iio_device_claim/release_direct()Jonathan Cameron
These new functions allow sparse to find failures to release direct mode reducing chances of bugs over the claim_direct_mode() functions that are deprecated. Cc: Marek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250309165819.1346684-9-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: mxs-lradc: Switch to sparse friendly iio_device_claim/release_direct()Jonathan Cameron
These new functions allow sparse to find failures to release direct mode reducing chances of bugs over the claim_direct_mode() functions that are deprecated. Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250309165819.1346684-8-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ti-ads1015: Switch to sparse friendly ↵Jonathan Cameron
iio_device_claim/release_direct() These new functions allow sparse to find failures to release direct mode reducing chances of bugs over the claim_direct_mode() functions that are deprecated. Cc: Marek Vasut <marex@denx.de> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250309165819.1346684-7-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ti-ads1015: Use guard(mutex) and factor out code for INFO_RAWJonathan Cameron
By use of automatic lock release and introducing a new utility function to handle the core activity of reading the ADC channel, many more complex code flows can be replaced by direct returns. Cc: Marek Vasut <marex@denx.de> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250309165819.1346684-6-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ti-ads1100: Switch to sparse friendly ↵Jonathan Cameron
iio_device_claim/release_direct() These new functions allow sparse to find failures to release direct mode reducing chances of bugs over the claim_direct_mode() functions that are deprecated. Cc: Mike Looijmans <mike.looijmans@topic.nl> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250309165819.1346684-5-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ti-ads1100: Use guard(mutex) to allow direct returnsJonathan Cameron
Use of automated lock release simplifies the code. Cc: Mike Looijmans <mike.looijmans@topic.nl> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250309165819.1346684-4-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: vf610: Switch to sparse friendly iio_device_claim/release_direct()Jonathan Cameron
These new functions allow sparse to find failures to release direct mode reducing chances of bugs over the claim_direct_mode() functions that are deprecated. Cc: Frank Li <Frank.Li@nxp.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250309165819.1346684-3-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: vf610: Move claim of direct mode to caller of vf610_read_sample ↵Jonathan Cameron
and use guard(mutex) These two changes allow direct returns in all paths, improving code readablity. Cc: Frank Li <Frank.Li@nxp.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250309165819.1346684-2-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad7606_par: add ad7606c chipsDavid Lechner
Add lookup table entries for ad7606c-16 and ad7606c-18 chips. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250318-iio-adc-ad7606-improvements-v2-10-4b605427774c@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad7606: dynamically allocate channel infoDavid Lechner
Refactor the ad7606 drivers to dynamically allocate the channel info. The channel info was getting a bit unwieldy. In some cases, the indio_dev->channels field was getting assigned up to 3 different times, each in a different function, making it difficult to see where the info was coming from. This problem stems from the number of permutations of the channel array needed to support various modes of operation and data buses. We already have 4 per chip (hardware mode, software mode, AXI ADC backend and AXI ADC backend with software mode) and we intend to add two more per chip when adding SPI offload support. To make it easier to read and maintain, move all of the channel setup to a single function that dynamically allocates and fills in the channel info. Additionally, this lets us remove some hacks where we had to compute an offset due to the fact that sometimes there was a soft timestamp channel at the start of the array. Now the timestamp channel is always at the end of the array as is typical in other drivers. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250318-iio-adc-ad7606-improvements-v2-9-4b605427774c@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad7606: drop ch param from ad7606_scale_setup_cb_tDavid Lechner
Drop the ch parameter from the ad7606_scale_setup_cb_t functions. The same info is already available from the chan param via chan->scan_type and chan->channel, so the parameter is redundant. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250318-iio-adc-ad7606-improvements-v2-8-4b605427774c@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad7606: don't use address fieldDavid Lechner
Drop use of the address field in the ad7606 driver. This field was duplicating the same info that was already in the channel and scan_index fields. This is one less thing to have to hold in your mind when reading the code. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250318-iio-adc-ad7606-improvements-v2-7-4b605427774c@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad7606: use kernel identifier name styleDavid Lechner
Use lower_snake_case for the identifier names as that is the usual kernel code style. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250318-iio-adc-ad7606-improvements-v2-6-4b605427774c@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad7606: fix kernel-doc commentsDavid Lechner
Fix several issues with kernel-doc comments in ad7606.h: * Add missing ":" to @param names. * Fix order of @param names. * Add some missing parameters. * Remove some non-existent parameters. * Fix alignment and wrapping. * Fix some spelling. `./scripts/kernel-doc -v -none drivers/iio/adc/ad7606*` is happy now. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250318-iio-adc-ad7606-improvements-v2-5-4b605427774c@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad7606: use devm_mutex_init()David Lechner
Use devm_mutex_init() in ad7606_probe(). Mutexes should be cleaned up on driver removal. Also add missing include while we are touching this. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250318-iio-adc-ad7606-improvements-v2-4-4b605427774c@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad7606: add missing max sample ratesDavid Lechner
Add max sample rates for all of the chips. Previously, only one chip had this field populated. The fallback value for the initial sampling frequency can be removed now that all chips have a max sample rate defined. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250318-iio-adc-ad7606-improvements-v2-3-4b605427774c@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: ad7606_spi: check error in ad7606B_sw_mode_config()David Lechner
Add missing error check in ad7606B_sw_mode_config(). Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250318-iio-adc-ad7606-improvements-v2-2-4b605427774c@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: Support ROHM BD79124 ADCMatti Vaittinen
The ROHM BD79124 is a 12-bit, 8-channel, SAR ADC. The ADC supports an automatic measurement mode, with an alarm interrupt for out-of-window measurements. The window is configurable for each channel. The I2C protocol for manual start of the measurement and data reading is somewhat peculiar. It requires the master to do clock stretching after sending the I2C slave-address until the slave has captured the data. Needless to say this is not well suopported by the I2C controllers. Thus do not support the BD79124's manual measurement mode but implement the measurements using automatic measurement mode, relying on the BD79124's ability of storing latest measurements into register. Support also configuring the threshold events for detecting the out-of-window events. The BD79124 keeps asserting IRQ for as long as the measured voltage is out of the configured window. Thus, prevent the user-space from choking on the events and mask the received event for a fixed duration (1 second) when an event is handled. The ADC input pins can be also configured as general purpose outputs. Make those pins which don't have corresponding ADC channel node in the device-tree controllable as GPO. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Link: https://patch.msgid.link/ca3886c9abcb268ca976e62cd7da28bf5d6e6382.1742560649.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: sun20i-gpadc: Use adc-helpersMatti Vaittinen
The new devm_iio_adc_device_alloc_chaninfo_se() -helper is intended to help drivers avoid open-coding the for_each_node -loop for getting the channel IDs. The helper provides standard way to detect the ADC channel nodes (by the node name), and a standard way to convert the "reg" -properties to channel identification numbers, used in the struct iio_chan_spec. Furthermore, the helper can optionally check the found channel IDs are smaller than given maximum. This is useful for callers which later use the IDs for example for indexing a channel data array. The original driver treated all found child nodes as channel nodes. The new helper requires channel nodes to be named channel[@N]. This should help avoid problems with devices which may contain also other but ADC child nodes. Quick grep from arch/* with the sun20i-gpadc's compatible string didn't reveal any in-tree .dts with channel nodes named otherwise. Also, same grep shows all the in-tree .dts seem to have channel IDs between 0..num of channels. Use the new helper. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/e367a803c0d625e60c9fca16c55a25eee06b5a89.1742560649.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: rzg2l_adc: Use adc-helpersMatti Vaittinen
The new devm_iio_adc_device_alloc_chaninfo_se() -helper is intended to help drivers avoid open-coding the for_each_node -loop for getting the channel IDs. The helper provides standard way to detect the ADC channel nodes (by the node name), and a standard way to convert the "reg" -properties to channel identification numbers, used in the struct iio_chan_spec. Furthermore, the helper can optionally check the found channel IDs are smaller than given maximum. This is useful for callers which later use the IDs for example for indexing a channel data array. The original driver treated all found child nodes as channel nodes. The new helper requires channel nodes to be named channel[@N]. This should help avoid problems with devices which may contain also other but ADC child nodes. Quick grep from arch/* with the rzg2l_adc's compatible string didn't reveal any in-tree .dts with channel nodes named otherwise. Also, same grep shows all the .dts seem to have channel IDs between 0..num of channels. Use the new helper. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://patch.msgid.link/e84ccff01070eaee3dd1ae2d7e109f963168f586.1742560649.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: add helpers for parsing ADC nodesMatti Vaittinen
There are ADC ICs which may have some of the AIN pins usable for other functions. These ICs may have some of the AIN pins wired so that they should not be used for ADC. A common way of marking pins that can be used as ADC inputs is to add corresponding channel@N nodes in the device tree as described in the ADC binding yaml. Add couple of helper functions which can be used to retrieve the channel information from the device node. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com> Link: https://patch.msgid.link/f1d8b3e15237947738912c0d297b3e1e21d8b03e.1742560649.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: meson: add support for the GXLX SoCMartin Blumenstingl
The SARADC IP on the GXLX SoC itself is identical to the one found on GXL SoCs. However, GXLX SoCs require poking the first three bits in the MESON_SAR_ADC_REG12 register to get the three MPLL clocks (used as clock generators for the audio frequencies) to work. The reason why there are MPLL clock bits in the ADC register space is entirely unknown and it seems that nobody is able to comment on this. So clearly mark this as a workaround and add a warning so users are notified that this workaround can change (once we know what these bits actually do). Tested-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://patch.msgid.link/20250330101922.1942169-3-martin.blumenstingl@googlemail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22iio: adc: sort TI drivers alphanumericalTobias Sperling
Sort TI drivers again in an alphanumerical manner. Signed-off-by: Tobias Sperling <tobias.sperling@softing.com> Link: https://patch.msgid.link/20250312-sort_ti_drivers-v1-1-4e8813e662d2@softing.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-21iio: adc: ad7606: fix serial register accessAngelo Dureghello
Fix register read/write routine as per datasheet. When reading multiple consecutive registers, only the first one is read properly. This is due to missing chip select deassert and assert again between first and second 16bit transfer, as shown in the datasheet AD7606C-16, rev 0, figure 110. Fixes: f2a22e1e172f ("iio: adc: ad7606: Add support for software mode for ad7616") Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Angelo Dureghello <adureghello@baylibre.com> Link: https://patch.msgid.link/20250418-wip-bl-ad7606-fix-reg-access-v3-1-d5eeb440c738@baylibre.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-18iio: adc: ad7266: Fix potential timestamp alignment issue.Jonathan Cameron
On architectures where an s64 is only 32-bit aligned insufficient padding would be left between the earlier elements and the timestamp. Use aligned_s64 to enforce the correct placement and ensure the storage is large enough. Fixes: 54e018da3141 ("iio:ad7266: Mark transfer buffer as __be16") # aligned_s64 is much newer. Reported-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250413103443.2420727-2-jic23@kernel.org Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-18iio: adc: ad7768-1: Fix insufficient alignment of timestamp.Jonathan Cameron
On architectures where an s64 is not 64-bit aligned, this may result insufficient alignment of the timestamp and the structure being too small. Use aligned_s64 to force the alignment. Fixes: a1caeebab07e ("iio: adc: ad7768-1: Fix too small buffer passed to iio_push_to_buffers_with_timestamp()") # aligned_s64 newer Reported-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250413103443.2420727-3-jic23@kernel.org Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-18iio: adc: dln2: Use aligned_s64 for timestampJonathan Cameron
Here the lack of marking allows the overall structure to not be sufficiently aligned resulting in misplacement of the timestamp in iio_push_to_buffers_with_timestamp(). Use aligned_s64 to force the alignment on all architectures. Fixes: 7c0299e879dd ("iio: adc: Add support for DLN2 ADC") Reported-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250413103443.2420727-4-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-12iio: adc: qcom-spmi-iadc: Fix wakeup source leaks on device unbindKrzysztof Kozlowski
Device can be unbound, so driver must also release memory for the wakeup source. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250406-b4-device-wakeup-leak-iio-v1-2-2d7d322a4a93@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-07iio: adc: ad4030: explain rearranging raw sample dataDavid Lechner
Add a comment explaining why the raw sample data is rearranged in the in the ad4030_conversion() function. It is not so obvious from the code why this is done. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250310-iio-adc-ad4030-check-scan-type-err-v1-5-589e4ebd9711@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-07iio: adc: ad4030: don't store scan_type in stateDavid Lechner
Move getting the scan_type to ad4030_conversion(). Previously, we were getting the scan_type in two other places, then storing it in the state struct before using it in ad4030_conversion(). This was a bit fragile against potential future changes since it isn't obvious that anything that could potentially change the scan_type would need to also update the state struct. Also, the non-obviousness of this led to a redundant call to iio_get_current_scan_type() in ad4030_single_conversion() since it also calls ad4030_set_mode() which in turn calls ad4030_conversion(). To simplify things, just call iio_get_current_scan_type() in ad4030_conversion() where the returned struct is actually used and don't bother storing it in the state struct. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250310-iio-adc-ad4030-check-scan-type-err-v1-4-589e4ebd9711@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-07iio: adc: ad4030: move setting mode to update_scan_modeDavid Lechner
Move calling ad4030_set_mode() from the buffer preenable callback to the update_scan_mode callback. This doesn't change any functionality but is more logical since setting the mode is a function of the scan mask and doesn't require an "undo" operation when the buffer is disabled. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250310-iio-adc-ad4030-check-scan-type-err-v1-3-589e4ebd9711@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-07iio: adc: ad4030: remove some duplicate codeDavid Lechner
Remove some duplicate code in the ad4030_get_chan_scale() function by simplifying the if statement. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250310-iio-adc-ad4030-check-scan-type-err-v1-2-589e4ebd9711@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-07iio: adc: ad4030: check scan_type for errorDavid Lechner
Check scan_type for error ad4030_get_chan_scale(). Currently, this should never fail, but it is good practice to always check for errors in case of future changes. Calling iio_get_current_scan_type() is moved out of the if statement also to avoid potential issues with future changes instead of assuming that the non-differential case does not use extended scan_type. Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/r/202503040954.n6MhjSsV-lkp@intel.com/ Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250310-iio-adc-ad4030-check-scan-type-err-v1-1-589e4ebd9711@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-07iio: adc: ad7380: fix event threshold shiftDavid Lechner
Add required bit shift to the event threshold read function to get correct scaling. When alert support was added, the write function correctly included the required shift needed to convert the threshold register value to the same scale as the raw ADC value. However, the shift got missed in the read function. Fixes: 27d1a4dbe1e1 ("iio: adc: ad7380: add alert support") Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Julien Stephan <jstephan@baylibre.com> Link: https://patch.msgid.link/20250402-iio-adc-ad7380-fix-event-threshold-shift-v1-1-ad4975c296b2@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-07iio: adc: ad7606: check for NULL before calling sw_mode_config()David Lechner
Check that the sw_mode_config function pointer is not NULL before calling it. Not all buses define this callback, which resulted in a NULL pointer dereference. Fixes: e571c1902116 ("iio: adc: ad7606: move scale_setup as function pointer on chip-info") Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250318-iio-adc-ad7606-improvements-v2-1-4b605427774c@baylibre.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-07iio: adc: ad7380: disable offload before using SPI busDavid Lechner
Move disabling of the SPI offload before attempting to use the SPI bus to write a register in ad7380_offload_buffer_predisable(). This caused a crash in the spi_engine_irq() interrupt handler due to being in an invalid state. Fixes: bbeaec81a03e ("iio: ad7380: add support for SPI offload") Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Reviewed-by: Angelo Dureghello <adureghello@baylibre.com> Link: https://patch.msgid.link/20250320-iio-adc-ad7380-fix-spi-offload-buffer-predisable-v1-1-6912ac8c0ae0@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-07iio: adc: rockchip: Fix clock initialization sequenceSimon Xue
clock_set_rate should be executed after devm_clk_get_enabled. Fixes: 97ad10bb2901 ("iio: adc: rockchip_saradc: Make use of devm_clk_get_enabled") Signed-off-by: Simon Xue <xxm@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20250312062016.137821-1-xxm@rock-chips.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
generated by cgit (git 2.34.1) at 2025-07-28 17:40:22 +0000