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path: root/drivers/spi
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2019-11-11spi: omap2-mcspi: Remove redundant checksVignesh Raghavendra
Both omap2_mcspi_tx_dma() and omap2_mcspi_rx_dma() are only called from omap2_mcspi_txrx_dma() and omap2_mcspi_txrx_dma() is always called after making sure that mcspi_dma->dma_rx and mcspi_dma->dma_tx are not NULL (see omap2_mcspi_transfer_one()). Therefore remove redundant NULL checks for omap2_mcspi->dma_tx and omap2_mcspi->dma_rx pointers in omap2_mcspi_tx_dma() and omap2_mcspi_rx_dma() respectively. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20191109041827.26934-1-vigneshr@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-08spi: zynq-qspi: Support two chip selectsMiquel Raynal
The Zynq QSPI controller features 2 CS. When the num-cs DT property is set to 2, the hardware will be initialized to support having two devices connected over each CS. In this case, both CS lines are driven by the state of the U_PAGE (upper page) bit. When unset, the lower page (CS0) is selected, otherwise it is the upper page (CS1). Change tested on a custom design featuring two SPI-NORs with different CS on the Zynq-7000 QSPI bus. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191108140744.1734-8-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-08spi: zynq-qspi: Do the actual hardware initialization later in the probeMiquel Raynal
Supporting more than one CS will need some tweaking of the linear configuration register which is (rightfully) initialized in the hardware initialization helper. The extra initialization needs the knowledge of the actual number of CS, which is retrieved by reading the value of the num-cs DT property. As the initialization helper is called pretty early and might be called much later in the probe without side effect, let's delay it a bit so that the number of CS will be available when running this helper. This way, adding support for multiple CS lines in a next patch will be eased. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191108140744.1734-7-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-08spi: zynq-qspi: Clarify the select chip functionMiquel Raynal
The code used to assert and de-assert a chip select line is very complicated for no reason. Simplify the logic by either setting or resetting the concerned bit, which actually only changes an electrical state. Update the comment to reflect that there is no possibility to actually choose a CS as the default (CS0) will be driven in any case. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191108140744.1734-6-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-08spi: zynq-qspi: Enhance the Linear CFG bit definitionsMiquel Raynal
Using masks makes sense when manipulating fields of several bits. When only one bit is involved, it is usual to just use the BIT() macro but in this case using the term mask is abusive. Fix the #define macros and their comments. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191108140744.1734-5-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-08spi: zynq-qspi: Keep the bitfields naming consistentMiquel Raynal
Most of the bits/bitfields #define'd in this driver are composed with: 1/ the driver prefix 2/ the name of the register they apply to Keep the naming consistent by applying this rule to the CONFIG register internals. These definitions will be used in a following change set. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191108140744.1734-4-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-08spi: zynq-qspi: Anything else than CS0 is not supported yetMiquel Raynal
Unlike what the driver is currently advertizing, CS0 only can be used, CS1 is not supported at all. Prevent people to use CS1. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191108140744.1734-2-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-08spi: zynq-qspi: Keep the naming consistent across the driverMiquel Raynal
In this driver (and also in a lot of other drivers in drivers/spi/), the spi_controller structure is sometimes referred as 'ctlr' and sometimes as 'ctrl'. Grepping there shows that 'ctlr' seems to be more common so keep the naming consistent in this driver and s/ctrl/ctlr/. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191108105920.19014-3-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-07spi: spi-mem: fallback to using transfers when CS gpios are usedChris Packham
Devices with chip selects driven via GPIO are not compatible with the spi-mem operations. Fallback to using standard spi transfers when the device is connected with a gpio CS. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Link: https://lore.kernel.org/r/20191107044235.4864-3-chris.packham@alliedtelesis.co.nz Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-07spi: bcm-qspi: Convert to use CS GPIO descriptorsChris Packham
Set use_gpio_descriptors to true and avoid asserting the native chip select if the spi core has done it for us. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Link: https://lore.kernel.org/r/20191107044235.4864-2-chris.packham@alliedtelesis.co.nz Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-06spi: img-spfi: fix potential double releasePan Bian
The channels spfi->tx_ch and spfi->rx_ch are not set to NULL after they are released. As a result, they will be released again, either on the error handling branch in the same function or in the corresponding remove function, i.e. img_spfi_remove(). This patch fixes the bug by setting the two members to NULL. Signed-off-by: Pan Bian <bianpan2016@163.com> Link: https://lore.kernel.org/r/1573007769-20131-1-git-send-email-bianpan2016@163.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-05spi: bcm2835: fix typo in commentChris Packham
GPIOS_OUT_LOW should be GPIOD_OUT_LOW. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Link: https://lore.kernel.org/r/20191105214134.25142-1-chris.packham@alliedtelesis.co.nz Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-05spi: dw: Fix Designware SPI loopbackThor Thayer
The SPI_LOOP is set in spi->mode but not propagated to the register. A previous patch removed the bit during a cleanup. Fixes: e1bc204894ea ("spi: dw: fix potential variable assignment error") Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Link: https://lore.kernel.org/r/1572985330-5525-1-git-send-email-thor.thayer@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-04spi: sifive: disable clk when probe fails and removeChuhong Yuan
The driver forgets to disable and unprepare clk when probe fails and remove. Add the calls to fix the problem. Signed-off-by: Chuhong Yuan <hslester96@gmail.com> Reviewed-by: Palmer Dabbelt <palmer@dabbelt.com> Link: https://lore.kernel.org/r/20191101121745.13413-1-hslester96@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-31spi: add power control when set_csLuhua Xu
As to set_cs takes effect immediately, power spi is needed when setup spi. Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Luhua Xu <luhua.xu@mediatek.com> Link: https://lore.kernel.org/r/1572426234-30019-1-git-send-email-luhua.xu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-30spi: zynq-qspi: Drop GPIO headerLinus Walleij
This driver does not use any symbols from the legacy GPIO header so drop the include. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20191030073624.23974-1-linus.walleij@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-30spi: dw: Drop GPIO headerLinus Walleij
The DW driver does not use the legacy GPIO header so drop it from the spi-dw.h include. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20191030073418.23717-1-linus.walleij@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-30spi: txx9: Convert to use GPIO descriptorsLinus Walleij
This converts the TXX9 SPI driver to use GPIO descriptors to control the GPIO chip selects. As the driver was clearly (ab)using the device tree "reg" property to offset into the global GPIO chip we have to add a hack to counter the hack: add a 1-to-1 chip select to GPIO offset mapping for all 16 lines on the TXX9 GPIO chip. The details are described in a largeish comment in the patch. We do not need to set up the GPIO as output any more since the core will take care of this, as well as it will handle the polarity inversion semantics. Cc: Atsushi Nemoto <atsushi.nemoto@sord.co.jp> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20191030073832.24038-1-linus.walleij@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-30spi: dw: Remove runtime PM enable/disable from common part of the driverJarkko Nikula
Committed version of the commit b9fc2d207e54 ("spi: dw: Move runtime PM enable/disable from common to platform driver part") does not include by some reason changes to drivers/spi/spi-dw.c that were part of the original patch sent to the mailing list. Complete the code move by doing those changes now. Fixes: b9fc2d207e54 ("spi: dw: Move runtime PM enable/disable from common to platform driver part") Cc: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20191030113137.15459-1-jarkko.nikula@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-29spi: pxa2xx: Add support for Intel Comet Lake-HJarkko Nikula
Add Intel Comet Lake-H LPSS SPI PCI IDs. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20191029115802.6779-1-jarkko.nikula@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-28spi: sprd: adi: Set BIT_WDG_NEW bit when rebootingLingling Xu
When rebooting system, the PMIC watchdog time loading may not be loaded correctly when another system is feeding the PMIC watchdog, since we did not check the watchdog busy status before loading time values. Thus we should set the BIT_WDG_NEW bit before loading time values, that can support multiple loads without checking busy status to make sure the time values can be loaded successfully to avoid this potential issue. Signed-off-by: Lingling Xu <ling_ling.xu@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Link: https://lore.kernel.org/r/5655318a7252c9ea518c2f7950a61228ab8f42bf.1572257085.git.baolin.wang@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-28spi: sprd: adi: Add missing lock protection when rebootingLingling Xu
When rebooting the system, we should lock the watchdog after configuration to make sure the watchdog can reboot the system successfully. Signed-off-by: Lingling Xu <ling_ling.xu@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Link: https://lore.kernel.org/r/7b04711127434555e3a1a86bc6be99860cd86668.1572257085.git.baolin.wang@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-25spi: Fix NULL pointer when setting SPI_CS_HIGH for GPIO CSGregory CLEMENT
Even if the flag use_gpio_descriptors is set, it is possible that cs_gpiods was not allocated, which leads to a kernel crash. Reported-by: "kernelci.org bot" <bot@kernelci.org> Fixes: 3e5ec1db8bfe ("spi: Fix SPI_CS_HIGH setting when using native and GPIO CS") Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191024141309.22434-1-gregory.clement@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org> Cc: <stable@vger.kernel.org>
2019-10-25spi: pxa2xx: Introduce temporary variables to increase readabilityAndy Shevchenko
The current conditional for PCI ID matching is hard to read. Introduce couple of temporary variables to increase readability of the code. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191021103625.4250-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-24spi: xilinx: Add DT support for selecting transfer word widthAlvaro Gamez Machado
This core supports either 8, 16 or 32 bits as word width. This value is only settable on instantiation, and thus we need to support any of them by means of the device tree. Signed-off-by: Alvaro Gamez Machado <alvaro.gamez@hazent.com> Link: https://lore.kernel.org/r/20191024110757.25820-3-alvaro.gamez@hazent.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-23spi: pxa2xx: Drop extra check of platform_get_resource() returned valueAndy Shevchenko
The devm_ioremap_resource() has already a check for resource pointer being NULL. No need to double check this. Drop extra check of platform_get_resource() returned value. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191021103625.4250-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-23spi: Fix spelling in the commentsAndy Shevchenko
Two spelling mistakes are being fixed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191023121643.25237-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-22spi: dw-pci: Fix Chip Select amount on Intel Elkhart Lake PSE SPIJarkko Nikula
Intel(R) Programmable Services Engine (Intel(R) PSE) SPI controllers in Intel Elkhart Lake have two Chip Select signals instead of one. Reported-by: Raymond Tan <raymond.tan@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20191018132131.31608-3-jarkko.nikula@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-22spi: dw-pci: Add runtime power management supportRaymond Tan
Implement pm_runtime hooks at pci driver. Signed-off-by: Raymond Tan <raymond.tan@intel.com> [jarkko.nikula@linux.intel.com: Forward ported on top of commit 1e6959832510 ("spi: dw: Add basic runtime PM support")] Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20191018132131.31608-2-jarkko.nikula@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-22spi: dw: Move runtime PM enable/disable from common to platform driver partJarkko Nikula
After commit 1e6959832510 ("spi: dw: Add basic runtime PM support") there is following warning from PCI enumerated DesignWare SPI controller during probe: dw_spi_pci 0000:00:13.0: Unbalanced pm_runtime_enable! Runtime PM is already enabled for PCI devices by the PCI core and doing it again in common DW SPI code leads to unbalanced enable calls. Fix this by moving the runtime PM enable/disable calls to the platform driver part of the driver. Cc: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20191018132131.31608-1-jarkko.nikula@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: atmel: fix handling of cs_change set on non-last xferMans Rullgard
The driver does the wrong thing when cs_change is set on a non-last xfer in a message. When cs_change is set, the driver deactivates the CS and leaves it off until a later xfer again has cs_change set whereas it should be briefly toggling CS off and on again. This patch brings the behaviour of the driver back in line with the documentation and common sense. The delay of 10 us is the same as is used by the default spi_transfer_one_message() function in spi.c. [gregory: rebased on for-5.5 from spi tree] Fixes: 8090d6d1a415 ("spi: atmel: Refactor spi-atmel to use SPI framework queue") Signed-off-by: Mans Rullgard <mans@mansr.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191018153504.4249-1-gregory.clement@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: atmel: Improve CS0 case support on AT91RM9200Gregory CLEMENT
Thanks to the recent change in this driver, it is now possible to prevent using the CS0 with GPIO during setup. It then allows to remove the special handling of this case in the cs_activate() and cs_deactivate() functions. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-8-gregory.clement@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: atmel: Improve and fix GPIO CS usageGregory CLEMENT
In the previous implementation of this driver, the index of the GPIO used as CS was linked to the offset of the CS register used to configure the transfer. With this new implementation the first CS register not used by internal CS is associated to all the GPIO CS. It allows to not be anymore limited to have only 4 CS managed, now it is possible to have in the same time until 3 internal CS and no more limit for the CS GPIO. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-7-gregory.clement@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: atmel: Remove platform data supportGregory CLEMENT
This driver is now only used through the device tree. Simplify code by explicitly depend on device tree. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-6-gregory.clement@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: atmel: Remove useless private fieldGregory CLEMENT
Since the conversion to GPIO descriptor, the GPIO used as chip select, can be directly access from the spi_device struct. So there is no need to keep the field npcs_pin. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-5-gregory.clement@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: rspi: Use platform_get_irq_byname_optional() for optional irqsGeert Uytterhoeven
As platform_get_irq_byname() now prints an error when the interrupt does not exist, scary warnings may be printed for optional interrupts: renesas_spi e6b10000.spi: IRQ rx not found renesas_spi e6b10000.spi: IRQ mux not found Fix this by calling platform_get_irq_byname_optional() instead. Remove the no longer needed printing of platform_get_irq errors, as the remaining calls to platform_get_irq() and platform_get_irq_byname() take care of that. Fixes: 7723f4c5ecdb8d83 ("driver core: platform: Add an error message to platform_get_irq*()") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20191016143101.28738-1-geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18Merge tag 'v5.4-rc3' into spi-5.4Mark Brown
Linux 5.4-rc3
2019-10-18spi: atmel: Configure GPIO per CS instead of by controllerGregory CLEMENT
Instead of setting up the GPIO configuration for the whole controller, do it at CS level. It will allow to mix internal CS and GPIO CS, which is not possible with the current implementation. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-4-gregory.clement@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: atmel: Fix CS high supportGregory CLEMENT
Until a few years ago, this driver was only used with CS GPIO. The only exception is CS0 on AT91RM9200 which has to use internal CS. A limitation of the internal CS is that they don't support CS High. So by using the CS GPIO the CS high configuration was available except for the particular case CS0 on RM9200. When the support for the internal chip-select was added, the check of the CS high support was not updated. Due to this the driver accepts this configuration for all the SPI controller v2 (used by all SoCs excepting the AT91RM9200) whereas the hardware doesn't support it for infernal CS. This patch fixes the test to match the hardware capabilities. Fixes: 4820303480a1 ("spi: atmel: add support for the internal chip-select of the spi controller") Cc: <stable@vger.kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-3-gregory.clement@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: atmel: Remove and fix erroneous commentsGregory CLEMENT
Since CSAAT functionality support has been added. Some comments become wrong. Fix them to match the current driver behavior. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-2-gregory.clement@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: pxa2xx: Replace of_device.h with mod_devicetable.h and of.hAndy Shevchenko
There is nothing in use from of_device.h. The definitions and macros are available thru mod_devicetable.h and of.h. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191018105429.82782-5-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: pxa2xx: Convert to use device_get_match_data()Andy Shevchenko
Convert to use device_get_match_data() instead of open coded variant. While here, switch of_property_read_bool() to device_property_read_bool(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191018105429.82782-4-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: pxa2xx: Convert pxa2xx_spi_get_port_id() to take struct deviceAndy Shevchenko
This is preparatory patch before converting to use device_get_match_data() API. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191018105429.82782-3-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: pxa2xx: Sort headersAndy Shevchenko
Sort the headers in alphabetic order in order to ease the maintenance for this part. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191018105429.82782-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: pxa2xx: No need to keep pointer to platform deviceAndy Shevchenko
There is no need to keep a pointer to the platform device. Currently there are no users of it directly, and if there will be in the future we may restore it from pointer to the struct device. Convert all users at the same time. Cc: Russell King <linux@armlinux.org.uk> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Takashi Iwai <tiwai@suse.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191018105429.82782-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: Fix SPI_CS_HIGH setting when using native and GPIO CSGregory CLEMENT
When improving the CS GPIO support at core level, the SPI_CS_HIGH has been enabled for all the CS lines used for a given SPI controller. However, the SPI framework allows to have on the same controller native CS and GPIO CS. The native CS may not support the SPI_CS_HIGH, so they should not be setup automatically. With this patch the setting is done only for the CS that will use a GPIO as CS Fixes: f3186dd87669 ("spi: Optionally use GPIO descriptors for CS GPIOs") Cc: <stable@vger.kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191018152929.3287-1-gregory.clement@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: pxa2xx: Set controller->max_transfer_size in dma modeDaniel Vetter
In DMA mode we have a maximum transfer size, past that the driver falls back to PIO (see the check at the top of pxa2xx_spi_transfer_one). Falling back to PIO for big transfers defeats the point of a dma engine, hence set the max transfer size to inform spi clients that they need to do something smarter. This was uncovered by the drm_mipi_dbi spi panel code, which does large spi transfers, but stopped splitting them after: commit e143364b4c1774f68e923a5a0bb0fca28ac25888 Author: Noralf Trønnes <noralf@tronnes.org> Date: Fri Jul 19 17:59:10 2019 +0200 drm/tinydrm: Remove tinydrm_spi_max_transfer_size() After this commit the code relied on the spi core to split transfers into max dma-able blocks, which also papered over the PIO fallback issue. Fix this by setting the overall max transfer size to the DMA limit, but only when the controller runs in DMA mode. Fixes: e143364b4c17 ("drm/tinydrm: Remove tinydrm_spi_max_transfer_size()") Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Noralf Trønnes <noralf@tronnes.org> Cc: Andy Shevchenko <andriy.shevchenko@intel.com> Reported-and-tested-by: Andy Shevchenko <andriy.shevchenko@intel.com> Cc: Daniel Mack <daniel@zonque.org> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: Robert Jarzmik <robert.jarzmik@free.fr> Cc: Mark Brown <broonie@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-spi@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://lore.kernel.org/r/20191017064426.30814-1-daniel.vetter@ffwll.ch Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-15spi: use new `spi_transfer_delay_exec` helper where straightforwardAlexandru Ardelean
For many places in the spi drivers, using the new `spi_transfer_delay` helper is straightforward. It's just replacing: ``` if (t->delay_usecs) udelay(t->delay_usecs); ``` with `spi_transfer_delay(t)` which handles both `delay_usecs` and the new `delay` field. This change replaces in all places (in the spi drivers) where this change is simple. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Link: https://lore.kernel.org/r/20190926105147.7839-10-alexandru.ardelean@analog.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-15spi: spi-axi: extend support for the `delay` fieldAlexandru Ardelean
The AXI SPI engine driver uses the `delay_usecs` field from `spi_transfer` to configure delays, which the controller will execute. This change extends the logic to also include the `delay` value, in case it is used (instead if `delay_usecs`). Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Link: https://lore.kernel.org/r/20190926105147.7839-20-alexandru.ardelean@analog.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-15spi: bcm63xx: extend error condition to `delay` as wellAlexandru Ardelean
The driver errors out if `delay_usecs` is non-zero. This error condition should be extended to the new `delay` field, to account for when it will be used. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Link: https://lore.kernel.org/r/20190926105147.7839-19-alexandru.ardelean@analog.com Signed-off-by: Mark Brown <broonie@kernel.org>
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