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path: root/drivers/spi
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2014-02-27spi: sh-msiof: Improve bindingsGeert Uytterhoeven
Documentation: - Add missing "interrupt-parent", "#address-cells", "#size-cells", and "clocks" properties, - Add missing default values for "num-cs", "renesas,tx-fifo-size" and "renesas,rx-fifo-size", - Add a reference to the pinctrl documentation. Implementation: - As "num-cs" is marked optional, provide a sensible default. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27Merge branch 'topic/dma' of ↵Mark Brown
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into HEAD
2014-02-27spi: spidev: Add support for Dual/Quad SPI TransfersGeert Uytterhoeven
Add support for Dual/Quad SPI Transfers to the spidev API. As this uses SPI mode bits that don't fit in a single byte, two new ioctls (SPI_IOC_RD_MODE32 and SPI_IOC_WR_MODE32) are introduced. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27spi: spidev: Restore all SPI mode flags on ioctl failureGeert Uytterhoeven
In commit f477b7fb13df2b843997559ff34e87d054ba6538 ("spi: DUAL and QUAD support"), spi_device.mode was enlarged from 8 to 16 bits. However, the spidev code still only saved 8 bits of data. If a spidev SPI_IOC_WR_MODE or SPI_IOC_WR_LSB_FIRST request failed, only the lower 8 bits of the SPI mode were restored, inadvertently clearing the upper 8 bits, possibly disabling Quad or Dual SPI transfers for the device. Save up to 32 bits to fix this. For SPI_IOC_WR_MODE this is probably not so important, as it doesn't allow setting Quad or Dual mode anyway, but SPI_IOC_WR_LSB_FIRST is used to just set or clear a single bit. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27spi: sirf: Use SIMPLE_DEV_PM_OPS macroJingoo Han
Use SIMPLE_DEV_PM_OPS macro in order to make the code simpler. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27spi: xilinx: remove unnecessary spacesJingoo Han
Remove unnecessary space in order to fix the following checkpatch issues. WARNING: Unnecessary space after function pointer name Signed-off-by: Jingoo Han <jg1.han@samsung.com> Reviewed-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-27spi-topcliff-pch: Fix probing when DMA mode is usedAlexander Stein
If during registering SPI master due to SPI device probing a SPI transfer is issued the DMA buffers are not allocated yet. This fixes the following oops: pch_spi 0000:02:0c.1: enabling device (0000 -> 0002) pch_spi 0000:02:0c.1: master is unqueued, this is deprecated BUG: unable to handle kernel NULL pointer dereference at (null) IP: [<c125aa05>] pch_spi_handle_dma+0x15c/0x6f4 [...] Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-26spi: qup: Get rid of using struct spi_qup_deviceAxel Lin
Current code uses struct spi_qup_device to store spi->mode and spi->chip_select settings. We can get these settings in spi_qup_transfer_one and spi_qup_set_cs without using struct spi_qup_device. Refactor the code a bit to remove spi_qup_setup(), spi_qup_cleanup(), and struct spi_qup_device. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-25spi: s3c64xx: Let spi core handle validating transfer lengthAxel Lin
spi core will handle validating transfer length since commit 4d94bd21b333 "spi: core: Validate length of the transfers in message". So remove the same checking in this driver. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-24spi: qup: Remove module versionAxel Lin
The module version is unlikely to be updated, use kernel version should be enough. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-24spi: qup: Depend on ARM && COMPILE_TEST to avoid build errorAxel Lin
This driver uses writel_relaxed() which does not exist in x86, ppc, etc. Make it depend on ARM && COMPILE_TEST to avoid below build error: CC [M] drivers/spi/spi-qup.o drivers/spi/spi-qup.c: In function 'spi_qup_set_state': drivers/spi/spi-qup.c:180:3: error: implicit declaration of function 'writel_relaxed' [-Werror=implicit-function-declaration] cc1: some warnings being treated as errors make[2]: *** [drivers/spi/spi-qup.o] Error 1 make[1]: *** [drivers/spi] Error 2 make: *** [drivers] Error 2 Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-24spi: sirf: use SET_SYSTEM_SLEEP_PM_OPS to initialize PM entriesQipan Li
use SET_SYSTEM_SLEEP_PM_OPS to initialize PM entries, this makes the codes clean and also enable the ability of hibernation support for sirf SPI. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-24spi: sirf: move to use generic dma dt-bindingBarry Song
sirf-dma driver enabled generic dt binding for dma channels. see here we remove self-defined dma channel prop and move to use generic dma_request_slave_channel. related changes in dts is something like: dmas = <&dmac1 9>, <&dmac1 4>; dma-names = "rx", "tx"; Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: qup: Enable driver compilation with COMPILE_TESTAxel Lin
This helps increasing build testing coverage. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: qup: Fix build error due to a typoAxel Lin
Fix below build error when CONFIG_PM_RUNTIME=y: C [M] drivers/spi/spi-qup.o drivers/spi/spi-qup.c: In function 'spi_qup_pm_suspend_runtime': drivers/spi/spi-qup.c:712:12: error: 'QUP_CLOCK_AUTO_GATE' undeclared (first use in this function) drivers/spi/spi-qup.c:712:12: note: each undeclared identifier is reported only once for each function it appears in drivers/spi/spi-qup.c: In function 'spi_qup_pm_resume_runtime': drivers/spi/spi-qup.c:725:13: error: 'QUP_CLOCK_AUTO_GATE' undeclared (first use in this function) make[2]: *** [drivers/spi/spi-qup.o] Error 1 make[1]: *** [drivers/spi] Error 2 make: *** [drivers] Error 2 Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: core: Replace msleep with usleep_range to get more accurate sleep timeAxel Lin
Fixes below checkpatch warning: WARNING: msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.txt + msleep(10); Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: fsl-spi: Convert to let spi core validate xfer->bits_per_wordAxel Lin
Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. fsl_spi_grlib_probe() may update mpc8xxx_spi->max_bits_per_word setting. So set master->bits_per_word_mask after fsl_spi_grlib_probe(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: xilinx: Convert to let spi core validate bits_per_wordAxel Lin
Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. spi_bitbang requires custom setup_transfer() to be defined if there is a custom txrx_bufs(). Thus keep the empty xilinx_spi_setup_transfer() function in the code. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: Use list_last_entry at appropriate placesAxel Lin
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: sh-hspi: Convert to let spi core validate bits_per_wordAxel Lin
Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: qup: Convert ot let spi core handle checking transfer speedAxel Lin
Set master->max_speed_hz then spi core will handle checking transfer speed. So we can remove the same checking in this driver. Also remove checking spi->chip_select in spi_qup_setup(), the checking is done by spi core. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: qup: Remove spi_master_put in spi_qup_removeAxel Lin
This driver uses devm_spi_register_master() so don't explicitly call spi_master_put() in spi_qup_remove(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: rspi: Fix loopback mode for Dual/Quad SPI TransfersGeert Uytterhoeven
While normal Dual and Quad SPI Transfers are unidirectional, we must do a bidirectional transfer if loopback mode is enabled, else rx_buf is not filled. With spidev it seemed to work, as spidev uses the same buffer for tranmission and reception. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: rspi: Remove empty rspi_cleanup()Geert Uytterhoeven
If spi_master.cleanup() is not needed, it can be left unimplemented. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi: sunxi: Add Allwinner A10 SPI controller driverMaxime Ripard
The older Allwinner SoCs (A10, A13, A10s and A20) all have the same SPI controller. Unfortunately, this SPI controller, even though quite similar, is significantly different from the recently supported A31 SPI controller (different registers offset, split/merged registers, etc.). Supporting both controllers in a single driver would be unreasonable, hence the addition of a new driver. Like its more recent counterpart, it supports DMA, but the driver only does PIO until we have a dmaengine driver for this platform. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi/imx: Use dev_name() for request_irq() to distinguish SPIsAlexander Shiyan
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-23spi/imx: Drop default setting for SPI_IMXFabio Estevam
SPI_IMX is selected by imx_v6_v7_defconfig/imx_v4_v5_defconfig and we don't need to have a default setting which depends on the IMX_HAVE_PLATFORM_SPI_IMX symbol. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-22spi: sh-msiof: Use the core cs_gpio field, and make it optionalGeert Uytterhoeven
In current implementation, CS is controlled by GPIO, which is passed through spi->controller_data. However, the MSIOF HW module has a function to output CS by itself, which is already enabled and actual switch will be done by pinmux. Store the GPIO number in the core cs_gpio field, and ignore it if it is an invalid (negative) GPIO number. Loosely based on a patch from Takashi Yoshii <takasi-y@ops.dti.ne.jp>. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-22spi: sh-msiof: Add more register documentationGeert Uytterhoeven
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-22spi: sh-msiof: Change hz from unsigned long to u32Geert Uytterhoeven
Both spi_transfer.speed_hz and spi_master.max_speed_hz are u32 Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-22spi: sh-msiof: Typo in comment s/tx/rx/Geert Uytterhoeven
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-22spi: sh-msiof: Fix SPI bus population from DTGeert Uytterhoeven
DT doesn't instantiate SPI children if spi_master.dev.of_node is not set up properly. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-22spi: core: Validate length of the transfers in messageIvan T. Ivanov
SPI transfer length should be multiple of SPI word size, where SPI word size should be power-of-two multiple Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-20spi: clps711x: Refactor to use core message parsingAxel Lin
Convert to use default implementation of transfer_one_message() which provides standard handling of delays and chip select management. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-20spi: Add Qualcomm QUP SPI controller supportIvan T. Ivanov
Qualcomm Universal Peripheral (QUP) core is an AHB slave that provides a common data path (an output FIFO and an input FIFO) for serial peripheral interface (SPI) mini-core. SPI in master mode supports up to 50MHz, up to four chip selects, programmable data path from 4 bits to 32 bits and numerous protocol variants. Cc: Alok Chauhan <alokc@codeaurora.org> Cc: Gilad Avidov <gavidov@codeaurora.org> Cc: Kiran Gunda <kgunda@codeaurora.org> Cc: Sagar Dharia <sdharia@codeaurora.org> Cc: dsneddon@codeaurora.org Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-19spi/topcliff-pch: Fix DMA channelAlexander Stein
bus_num might be asigned dynamically to e.g. 32766. In this case the calculated DMA channel based on SPI bus number is bogus. Use SPI channel number instead for calculation. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-19spi/topcliff-pch: Fix debug messageAlexander Stein
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-19spi: omap2-mcspi: Convert to let spi core validate transfer speedAxel Lin
Set master->max_speed_hz and master->min_speed_hz then spi core will handle checking transfer speed. So we can remove the same checking in this driver. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-19spi: omap2-mcspi: Remove list_empty checking in omap2_mcspi_transfer_one_messageAxel Lin
This checking is done in __spi_validate(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-18spi: mpc512x-psc: Remove redundant code to get bus_num from DTAxel Lin
For DT case, spi core will call of_alias_get_id() and set master->bus_num if it was not set. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Gerhard Sittig <gsi@denx.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-16spi: Remove explictly set bus_num and num_chipselect to default settingAxel Lin
The purpose of commit 1e8a52e18cfb "spi: By default setup spi_masters with 1 chipselect and dynamics bus number" is to avoid setting default value for bus_num and num_chipselect in spi master drivers. So let's remove the duplicate code. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-By: David Daney <david.daney@cavium.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-16spi/fsl-dspi: Remove some coding sytle not in standardChao Fu
Remove some coding sytle not in standard in former code. Signed-off-by: Chao Fu <b44548@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-16spi/fsl-dspi: Convert to use regmap and add big-endian supportChao Fu
Freescale DSPI module will have two endianess in different platform, but ARM is little endian. So when DSPI in big endian, core in little endian, readl and writel can not adjust R/W register in this condition. This patch will remove general readl/writel, and import regmap mechanism. Data endian will be transfered in regmap APIs. Documents: dspi add bool "big-endian" in dts node if DSPI module work in big endian. Signed-off-by: Chao Fu <b44548@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-16spi: sun6i: Fix define for SUN6I_TFR_CTL_CS_MASKAxel Lin
Current code in sun6i_spi_set_cs() actually clears CPHA and CPOL bits which is obvious wrong. The define for SUN6I_TFR_CTL_CS_MASK is wrong. Fix it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: spi-imx: Propagate the real error code on platform_get_irq() failureFabio Estevam
No need to return a 'fake' return value on platform_get_irq() failure. Just return the error code itself instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: spi-mxs: Propagate the real error code on platform_get_irq() failureFabio Estevam
No need to return a 'fake' return value on platform_get_irq() failure. Just return the error code itself instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: au1550: Convert to let spi core handle checking transfer speedAxel Lin
By setting master->max_speed_hz and master->min_speed_hz, spi core will handle checking transfer speed. So we can remove the same checking in this driver. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: topcliff-pch: Convert to use master->max_speed_hzAxel Lin
Set "master->max_speed_hz = PCH_MAX_BAUDRATE" then we can remove pch_spi_setup. In additional, pspi->max_speed_hz will never be 0 because it's default value will be set to master->max_speed_hz. Also remove list_empty checking in pch_spi_transfer() because the checking is done by spi core. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: bfin5xx: Remove unused last_transfer pointer in bfin_spi_giveback()Axel Lin
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: ep93xx: Convert to let spi core handle checking transfer speedAxel Lin
By setting master->max_speed_hz and master->min_speed_hz, spi core will handle checking transfer speed. So we can remove the same checking in this driver. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Mika Westerberg <mika.westerberg@iki.fi> Signed-off-by: Mark Brown <broonie@linaro.org>
generated by cgit (git 2.34.1) at 2025-09-24 09:55:37 +0000