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path: root/drivers/spi
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2014-02-14spi: nuc900: Remove unused fields from struct nuc900_spiAxel Lin
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: bfin5xx: Remove duplicate code to check spi->modeAxel Lin
This checking is already done in the implementation of spi_setup(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: s3c24xx: Convert to let spi core validate bits_per_wordAxel Lin
Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-14spi: Clean up probe and remove functionsJean Delvare
While backporting 33cf00e5 ("spi: attach/detach SPI device to the ACPI power domain"), I noticed that the code changes were suboptimal: * Why use &spi->dev when we have dev at hand? * After fixing the above, spi is used only once, so we don't really need a local variable for it. This results in the following clean-up. Signed-off-by: Jean Delvare <jdelvare@suse.de> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-12spi: Make max_tx and max_rx the same typeMark Brown
Prevents spurious compiler warnings. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-12spi: Remove duplicate code to check chip_selectAxel Lin
In spi_add_device(), we have the code to validate spi->chip_select. So remove the duplicate code in various drivers. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-11spi: octeon: Remove unused bits_per_word from struct octeon_spi_setupAxel Lin
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-11spi: orion: Convert to let spi core validate xfer->bits_per_wordAxel Lin
Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-11spi: sc18is602: Move checking chip_select for SC18IS602 to sc18is602_setupAxel Lin
So it will be checked when spi device is added onto the spi bus. spi_add_device() calls spi_setup() which then calls spi->master->setup(). No need to check it every time sc18is602_transfer_one() is called. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-11Merge remote-tracking branches 'spi/fix/doc', 'spi/fix/nuc900' and ↵Mark Brown
'spi/fix/rspi' into spi-linus
2014-02-11Merge remote-tracking branch 'spi/fix/core' into spi-linusMark Brown
2014-02-11spi: tegra20-slink: Convert to use master->max_speed_hzAxel Lin
Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will handle checking transfer speed. In additional, since commit 052eb2d49006 'spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controller', spi core will also set default spi->max_speed_hz if it is not set. So remove the duplicate code in tegra_slink_setup. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-11spi: tegra20-sflash: Convert to use master->max_speed_hzAxel Lin
Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will handle checking transfer speed. In additional, since commit 052eb2d49006 'spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controller', spi core will also set default spi->max_speed_hz if it is not set. So remove tegra_sflash_setup(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-11spi: tegra114: Convert to use master->max_speed_hzAxel Lin
Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will handle checking transfer speed. In additional, since commit 052eb2d49006 'spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controller', spi core will also set default spi->max_speed_hz if it is not set. So remove the duplicate code in tegra_spi_setup. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-10spi: txx9: Convert to let spi core handle checking transfer speedAxel Lin
By setting master->max_speed_hz and master->min_speed_hz, spi core will handle checking transfer speed. Then we can remove the same checking in this driver. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-10spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controllerAxel Lin
In __spi_validate(), xfer->speed_hz is set to be spi->max_speed_hz if it is not set for this transfer. However, if spi->max_speed_hz is also not set, xfer->speed_hz is 0. Some drivers (e.g. au1550, tegra114, tegra20-sflash, tegra20-slink, etc.) then use below code to avoid setting xfer->speed_hz to 0. /* Set speed to the spi max fequency if spi device has not set */ spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency; Let's handle it in spi core. If spi->max_speed_hz is not set, make it default to spi->master->max_speed_hz. So In __spi_validate() if both xfer->speed_hz and spi->max_speed_hz are not set, xfer->speed_hz will be set to spi->master->max_speed_hz. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-10spi: omap2: use SUPERH, not SHPaul Bolle
Commit 0079aae0f1e6 ("spi: omap2: Add build dependencies for writel_relaxed()") added an optional Kconfig dependency on SH. That Kconfig symbol doesn't exist. Apparently SUPERH was intended. Use that. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-10spi: Use reinit_completion at appropriate placesAxel Lin
Calling init_completion() once is enough. For the rest of the iterations, call reinit_completion() instead. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-10spi: omap-100k: Remove unused fields from struct omap1_spi100kAxel Lin
Both *master and state are not really used, remove them. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-10spi: omap-100k: Remove unused pointer in omap1_spi100k_txrx_pio()Christian Engelmayer
Remove unused devdata pointer 'spi100k' in function omap1_spi100k_txrx_pio(). Detected by Coverity: CID 1077869. Signed-off-by: Christian Engelmayer <cengelma@gmx.at> Reviewed-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Michal Nazarewicz <mina86@mina86.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-10spi: omap-100k: Remove unused MOD_REG_BIT macroAxel Lin
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-07spi/s3c64xx: Remove code no longer needed as a result of S3C_DMA removalMark Brown
Remove functions that only had an effect when using S3C_DMA and inline dmaengine_terminate_all() since it's pointless to have a function which expands to a single function call. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-07spi/s3c64xx: Remove S3C_DMA supportMark Brown
All the platforms which use the old S3C_DMA API have now been converted to dmaengine so we can remove the legacy code from the driver, simplifying maintenance. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-07spi/s3c64xx: Use core DMA mapping code with dmaengineMark Brown
When using dmaengine allow the core to do the DMA mapping. We still need local mapping code for the non-dmaengine case so this doesn't save us anything for now. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-07spi: Use SPI_BPW_MASK macro at appropriate placesAxel Lin
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-07spi: mxs: Use list_for_each_entry to iterate over transfer listAxel Lin
We don't modify the list entry while iterating the transfer list. So use list_for_each_entry instead of list_for_each_entry_safe. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-07spi: orion: Let spi core handle checking transfer speedAxel Lin
Since commit a2fd4f9fa3b9 'spi: Support transfer speed checking in the core', the SPI core validates the desired speed of a given transfer against the minimum and maximum speeds supported by the controller. So we can remove the same code in this driver and let spi core handle checking the desired speed of a given transfer. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-06spi/sunxi: Add missing dependency on RESET_CONTROLLERMark Brown
Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-06spi: orion: Remove unused pointer in orion_spi_write_read()Christian Engelmayer
Remove unused devdata pointer 'orion_spi' in function orion_spi_write_read(). Detected by Coverity: CID 1077860. Signed-off-by: Christian Engelmayer <cengelma@gmx.at> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-06spi: davinci: Use of_match_ptr at appropriate placeAxel Lin
It's pointless to use of_match_ptr within CONFIG_OF guard. Use of_match_ptr around davinci_spi_of_match when setting .of_match_table. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-06spi: davinci: Remove unneeded NULL checking for dspi and dspi->bitbang.masterAxel Lin
spi_master_get_devdata() never returns NULL when spi_alloc_master() success, so remove NULL test for dspi. We have ensured master is not NULL before assigning it to dspi->bitbang.master. So also remove NULL test for dspi->bitbang.master. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-05spi: sunxi: Add Allwinner A31 SPI controller driverMaxime Ripard
The Allwinner A31 has a new SPI controller IP compared to the older Allwinner SoCs. It supports DMA, but the driver only does PIO for now, and DMA will be supported eventually. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi: nuc900: Set SPI_LSB_FIRST for master->mode_bits if hw->pdata->lsb is trueAxel Lin
Otherwise, spi_setup() fails with unsupported mode bits message. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org> Cc: stable@vger.kernel.org
2014-02-04spi: Make core DMA mapping functions generate scatterlistsMark Brown
We cannot unconditionally use dma_map_single() to map data for use with SPI since transfers may exceed a page and virtual addresses may not be provided with physically contiguous pages. Further, addresses allocated using vmalloc() need to be mapped differently to other addresses. Currently only the MXS driver handles all this, a few drivers do handle the possibility that buffers may not be physically contiguous which is the main potential problem but many don't even do that. Factoring this out into the core will make it easier for drivers to do a good job so if the driver is using the core DMA code then generate a scatterlist instead of mapping to a single address so do that. This code is mainly based on a combination of the existing code in the MXS and PXA2xx drivers. In future we should be able to extend it to allow the core to concatenate adjacent transfers if they are compatible, improving performance. Currently for simplicity clients are not allowed to use the scatterlist when they do DMA mapping, in the future the existing single address mappings will be replaced with use of the scatterlist most likely as part of pre-verifying transfers. This change makes it mandatory to use scatterlists when using the core DMA mapping so update the s3c64xx driver to do this when used with dmaengine. Doing so makes the code more ugly but it is expected that the old s3c-dma code can be removed very soon. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi: Provide core support for full duplex devicesMark Brown
It is fairly common for SPI devices to require that one or both transfer directions is always active. Currently drivers open code this in various ways with varying degrees of efficiency. Start factoring this out by providing flags SPI_MASTER_MUST_TX and SPI_MASTER_MUST_RX. These will cause the core to provide buffers for the requested direction if none are specified in the underlying transfer. Currently this is fairly inefficient since we actually allocate a data buffer which may get large, support for mapping transfers using a scatterlist will allow us to avoid this for DMA based transfers. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi: rspi: Document support for Renesas QSPI in KconfigGeert Uytterhoeven
As of commit 5ce0ba88650f2606244a761d92e2b725f4ab3583 ("spi: rcar: add Renesas QSPI support on RSPI") the rspi driver handles Renesas QSPI, too, but this was not reflected in the Kconfig help text. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi: pl022: Remove redundant pinctrl to default state in probeUlf Hansson
The driver core is now taking care of putting our pins into default state at probe. Thus we can remove the redundant call for it in probe. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi: pl022: Simplify clock handlingUlf Hansson
Make use of clk_prepare_enable and clk_disable_unprepare to simplify code. No functional change. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi/s3c64xx: Split wait_for_xfer() into PIO and DMA versionsMark Brown
There is no meaningful code sharing between the PIO and DMA variants (just the timeout calculation) so in order to make the code easier to work with split the two cases. Looking at the code it is not clear how the PIO version works for large transmits, greater than FIFO size is only handled for RX. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi/s3c64xx: Remove unused /CS GPIO managementMark Brown
The GPIO enable and disable is done in the core so does not need to be replicated in the driver, delete the unneeded code. enable_cs() was not referenced at all. Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi: fsl: Fix problem with multi message transfersStefan Roese
When used via spidev with more than one messages to tranfer via SPI_IOC_MESSAGE the current implementation would return with -EINVAL, since bits_per_word and speed_hz are set in all transfer structs. And in the 2nd loop status will stay at -EINVAL as its not overwritten again via fsl_spi_setup_transfer(). This patch changes this behavious by first checking if one of the messages uses different settings. If this is the case the function will return with -EINVAL. If not, the messages are transferred correctly. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi: fix pointer-integer size mismatch warningSeongJae Park
Fix the pointer-integer size mismatch warning below: drivers/spi/spi-gpio.c: In function ‘spi_gpio_setup’: drivers/spi/spi-gpio.c:252:8: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] cs = (unsigned int) spi->controller_data; ^ Signed-off-by: SeongJae Park <sj38.park@gmail.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-04spi: rspi: Only enable interrupts when there's a need to waitGeert Uytterhoeven
rspi_wait_for_interrupt() unconditionally enables interrupts, even when the wait condition is already satisfied. This causes a high interrupt load (2 interrupts/byte for full-duplex Single SPI transfers, 1 interrupt/byte for RSPI with TX Only mode, or QSPI in unidirectional Dual or Quad Transfer mode). Change this to return immediately when the wait condition is satisfied. This dramatically reduces the interrupt load, especially in high-speed Quad Transfer mode, and increases transfer speed, as no interrupts need to be handled when there's space available in the output FIFO, or data available in the input FIFO. Benchmark results for QSPI on r8a7791 while reading 1 MiB from 30 MHz SPI FLASH on the Koelsch development board: Before: Single SPI Dual SPI Quad SPI Interrupts: 2096856 1048592 1048594 Mbps: 0.9 1.6 1.6 After: Single SPI Dual SPI Quad SPI Interrupts: 1048569 21295 8 Mbps: 0.7 10.8 12.9 I don't know why Single SPI slowed down a bit. I've also verified functionality for RSPI-RZ on r7s72100, but don't have benchmark results as there's no SPI FLASH connected to RSPI on the Genmai development board. Unlike RSPI and QSPI, RSPI-RZ has separate interrupts for RX and TX, which shows that Single SPI transfers now generate (mostly) RX interrupts, as expected. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: omap2-mcspi: Support divide-by-n clock dividersStefan Sørensen
Currently a divide-by-2^n clock is used, causing a very coarse clock selection, i.e. a 10MHz device will need to use a 6MHz clock. The McSPI can also use a divide-by-n clock, this patch adds support for selecting that when possible. Signed-off-by: Stefan Sørensen <stefan.sorensen@spectralink.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: omap2-mcspi: Do not configure the controller on each transfer unless neededStefan Sørensen
spi_transfer->speed_hz and spi_transfer->bits_per_word used to only be set when not using the default settings but are not set on every transfer, causing omap2_mcspi_setup_transfer to be called on each transfer. This patch changes the check to only call omap2_mcspi_setup_transfer if the settings needs to be changed. Signed-off-by: Stefan Sørensen <stefan.sorensen@spectralink.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: clps711x: Use SPI-core "cs_gpios" property for storing GPIOsAlexander Shiyan
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: clps711x: Add support for 1-8 BPW transfersAlexander Shiyan
This patch adds support for 1 to 8 BPW to driver and removes excess BPW validation since this is already checked by SPI core. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: clps711x: Simplify handling of RX & TX buffersAlexander Shiyan
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: rspi: fix build error when CONFIG_OF is not setShimoda, Yoshihiro
This patch fixes an issue that the following build error happens when the CONFIG_OF is not set: drivers/spi/spi-rspi.c: In function 'rspi_probe': drivers/spi/spi-rspi.c:1203:26: error: 'rspi_of_match' undeclared (first use in this function) Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-03spi: Provide core support for DMA mapping transfersMark Brown
The process of DMA mapping buffers for SPI transfers does not vary between devices so in order to save duplication of code in drivers this can be factored out into the core, allowing it to be integrated with the work that is being done on factoring out the common elements from the data path including more sharing of dmaengine code. In order to use this masters need to provide a can_dma() operation and while the hardware is prepared they should ensure that DMA channels are provided in tx_dma and rx_dma. The core will then ensure that the buffers are mapped for DMA prior to calling transfer_one_message(). Currently the cleanup on error is not complete, this needs to be improved. Signed-off-by: Mark Brown <broonie@linaro.org>
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