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2024-11-13ice: rework of dump serdes equalizer values featureMateusz Polchlopek
Refactor function ice_get_tx_rx_equa() to iterate over new table of params instead of multiple calls to ice_aq_get_phy_equalization(). Subsequent commit will extend that function by add more serdes equalizer values to dump. Shorten the fields of struct ice_serdes_equalization_to_ethtool for readability purposes. Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com> Signed-off-by: Mateusz Polchlopek <mateusz.polchlopek@intel.com> Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel) Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2024-11-13Merge tag 'nvme-6.13-2024-11-13' of git://git.infradead.org/nvme into ↵Jens Axboe
for-6.13/block Pull NVMe updates from Keith: "nvme updates for Linux 6.13 - Use uring_cmd helper (Pavel) - Host Memory Buffer allocation enhancements (Christoph) - Target persistent reservation support (Guixin) - Persistent reservation tracing (Guixen) - NVMe 2.1 specification support (Keith) - Rotational Meta Support (Matias, Wang, Keith) - Volatile cache detection enhancment (Guixen)" * tag 'nvme-6.13-2024-11-13' of git://git.infradead.org/nvme: (22 commits) nvmet: add tracing of reservation commands nvme: parse reservation commands's action and rtype to string nvmet: report ns's vwc not present nvme: check ns's volatile write cache not present nvme: add rotational support nvme: use command set independent id ns if available nvmet: support for csi identify ns nvmet: implement rotational media information log nvmet: implement endurance groups nvmet: declare 2.1 version compliance nvmet: implement crto property nvmet: implement supported features log nvmet: implement supported log pages nvmet: implement active command set ns list nvmet: implement id ns for nvm command set nvmet: support reservation feature nvme: add reservation command's defines nvme-core: remove repeated wq flags nvmet: make nvmet_wq visible in sysfs nvme-pci: use dma_alloc_noncontigous if possible ...
2024-11-13Merge tag 'qcom-drivers-for-6.13-2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers A few more Qualcomm driver updates for v6.13 Make the Adreno driver invoke the SMMU aperture setup firmware function, which is required to allow the GPU to manage per-process page tables in some firmware versions - as an example Rb3Gen2 has no GPU without this. Add X1E Devkit to the list of devices that has functional EFI variable access through the uefisecapp. Flip the "manual slice configuration quirk" in the Qualcomm LLCC driver, as this only applies to a single platform, and introduce support for QCS8300, QCS615, SAR2130P, and SAR1130P. Lastly, add IPQ5424 and IPQ5404 to the Qualcomm socinfo driver. * tag 'qcom-drivers-for-6.13-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: soc: qcom: ice: Remove the device_link field in qcom_ice drm/msm/adreno: Setup SMMU aparture for per-process page table firmware: qcom: scm: Introduce CP_SMMU_APERTURE_ID soc: qcom: socinfo: add IPQ5424/IPQ5404 SoC ID dt-bindings: arm: qcom,ids: add SoC ID for IPQ5424/IPQ5404 soc: qcom: llcc: Flip the manual slice configuration condition dt-bindings: firmware: qcom,scm: Document sm8750 SCM firmware: qcom: uefisecapp: Allow X1E Devkit devices soc: qcom: llcc: Add LLCC configuration for the QCS8300 platform dt-bindings: cache: qcom,llcc: Document the QCS8300 LLCC soc: qcom: llcc: Add configuration data for QCS615 dt-bindings: cache: qcom,llcc: Document the QCS615 LLCC soc: qcom: llcc: add support for SAR2130P and SAR1130P soc: qcom: llcc: use deciman integers for bit shift values dt-bindings: cache: qcom,llcc: document SAR2130P and SAR1130P Link: https://lore.kernel.org/r/20241113032425.356306-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-11-13thermal/drivers/k3_j72xx_bandgap: Simplify code in k3_bgp_read_temp()Rex Nie
The return value of vtm_get_best_value() always >= 0, remove always false expression 'dtemp < 0' in if statement. Signed-off-by: Rex Nie <rex.nie@jaguarmicro.com> Link: https://lore.kernel.org/r/20241113005412.2254-1-rex.nie@jaguarmicro.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2024-11-13nvmet: add tracing of reservation commandsGuixin Liu
Add tracing of reservation commands, including register, acquire, release and report, and also parse the action and rtype to string to make the trace log more human-readable. Signed-off-by: Guixin Liu <kanie@linux.alibaba.com> Reviewed-by: Sagi Grimberg <sagi@grimberg.me> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Signed-off-by: Keith Busch <kbusch@kernel.org>
2024-11-13nvme: parse reservation commands's action and rtype to stringGuixin Liu
Parse reservation commands's action(including rrega, racqa and rrela) and rtype to string to make the trace log more human-readable. Signed-off-by: Guixin Liu <kanie@linux.alibaba.com> Reviewed-by: Sagi Grimberg <sagi@grimberg.me> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Signed-off-by: Keith Busch <kbusch@kernel.org>
2024-11-13nvmet: report ns's vwc not presentGuixin Liu
Currently, we report that controller has vwc even though the ns may not have vwc. Report ns's vwc not present when not buffered_io or backdev doesn't have vwc. Signed-off-by: Guixin Liu <kanie@linux.alibaba.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Signed-off-by: Keith Busch <kbusch@kernel.org>
2024-11-13drm/xe: handle flat ccs during hibernation on igpuMatthew Auld
Starting from LNL, CCS has moved over to flat CCS model where there is now dedicated memory reserved for storing compression state. On platforms like LNL this reserved memory lives inside graphics stolen memory, which is not treated like normal RAM and is therefore skipped by the core kernel when creating the hibernation image. Currently if something was compressed and we enter hibernation all the corresponding CCS state is lost on such HW, resulting in corrupted memory. To fix this evict user buffers from TT -> SYSTEM to ensure we take a snapshot of the raw CCS state when entering hibernation, where upon resuming we can restore the raw CCS state back when next validating the buffer. This has been confirmed to fix display corruption on LNL when coming back from hibernation. Fixes: cbdc52c11c9b ("drm/xe/xe2: Support flat ccs") Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/3409 Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Cc: <stable@vger.kernel.org> # v6.8+ Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241112162827.116523-2-matthew.auld@intel.com (cherry picked from commit c8b3c6db941299d7cc31bd9befed3518fdebaf68) Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2024-11-13drm/xe: improve hibernation on igpuMatthew Auld
The GGTT looks to be stored inside stolen memory on igpu which is not treated as normal RAM. The core kernel skips this memory range when creating the hibernation image, therefore when coming back from hibernation the GGTT programming is lost. This seems to cause issues with broken resume where GuC FW fails to load: [drm] *ERROR* GT0: load failed: status = 0x400000A0, time = 10ms, freq = 1250MHz (req 1300MHz), done = -1 [drm] *ERROR* GT0: load failed: status: Reset = 0, BootROM = 0x50, UKernel = 0x00, MIA = 0x00, Auth = 0x01 [drm] *ERROR* GT0: firmware signature verification failed [drm] *ERROR* CRITICAL: Xe has declared device 0000:00:02.0 as wedged. Current GGTT users are kernel internal and tracked as pinned, so it should be possible to hook into the existing save/restore logic that we use for dgpu, where the actual evict is skipped but on restore we importantly restore the GGTT programming. This has been confirmed to fix hibernation on at least ADL and MTL, though likely all igpu platforms are affected. This also means we have a hole in our testing, where the existing s4 tests only really test the driver hooks, and don't go as far as actually rebooting and restoring from the hibernation image and in turn powering down RAM (and therefore losing the contents of stolen). v2 (Brost) - Remove extra newline and drop unnecessary parentheses. Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs") Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/3275 Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Cc: <stable@vger.kernel.org> # v6.8+ Reviewed-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241101170156.213490-2-matthew.auld@intel.com (cherry picked from commit f2a6b8e396666d97ada8e8759dfb6a69d8df6380) Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2024-11-13drm/xe: Restore system memory GGTT mappingsMatthew Brost
GGTT mappings reside on the device and this state is lost during suspend / d3cold thus this state must be restored resume regardless if the BO is in system memory or VRAM. v2: - Unnecessary parentheses around bo->placements[0] (Checkpatch) Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241031182257.2949579-1-matthew.brost@intel.com (cherry picked from commit a19d1db9a3fa89fabd7c83544b84f393ee9b851f) Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2024-11-13drm/xe: Ensure all locks released in exec IOCTLMatthew Brost
In couple of places the wrong error handling goto was used to release locks. Fix these to ensure all locks dropped on exec IOCTL errors. Cc: Francois Dugast <francois.dugast@intel.com> Fixes: d16ef1a18e39 ("drm/xe/exec: Switch hw engine group execution mode upon job submission") Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Francois Dugast <francois.dugast@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241106224944.30130-1-matthew.brost@intel.com (cherry picked from commit 9e7aacd8402b88394e6a83cb242901fde77a1773) Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2024-11-13spi: imx: support word delayJonas Rebmann
Implement support for the word delay feature of i.MX51 (and onwards) via the ECSPI interface. Convert the requested delay to SPI cycles and account for an extra inter-word delay inserted by the controller in addition to the requested number of cycles, which was observed when testing this patch. Disable dynamic burst when word delay is set. As the configurable delay period in the controller is inserted after bursts, the burst length must equal the word length. Account for word delay in the transfer time estimation for polling_limit_us. Signed-off-by: Jonas Rebmann <jre@pengutronix.de> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20241113-imx-spi-word-delay-v2-2-2b65b737bf29@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-11-13spi: imx: pass struct spi_transfer to prepare_transfer()Jonas Rebmann
In an upcoming patch, mx51_ecspi_prepare_transfer() needs access to the word_delay parameter. To enable controller-specific handling of such per-transfer parameters, extend the prepare_transfer() function of the spi_imx_devtype_data interface to take a struct spi_transfer argument, update all controller-specific implementations accordingly. Signed-off-by: Jonas Rebmann <jre@pengutronix.de> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20241113-imx-spi-word-delay-v2-1-2b65b737bf29@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-11-13gpio: mpfs: add CoreGPIO supportConor Dooley
coreGPIO, which the "hard" core in PolarFire SoC is based on, has different offsets for inp/outp. Add some match_data handling to account for the differences. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241113-jovial-atlantic-cd07f05eb2e5@spud Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2024-11-13thermal/drivers/qcom/tsens-v1: Add support for MSM8937 tsensBarnabás Czémán
Add support for tsens v1.4 block what can be found in MSM8937 and MSM8917. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20241113-msm8917-v6-5-c348fb599fef@mainlining.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2024-11-13thermal: Switch back to struct platform_driver::remove()Uwe Kleine-König
After commit 0edb555a65d1 ("platform: Make platform_driver::remove() return void") .remove() is (again) the right callback to implement for platform drivers. Convert all platform drivers below drivers/thermal to use .remove(), with the eventual goal to drop struct platform_driver::remove_new(). As .remove() and .remove_new() have the same prototypes, conversion is done by just changing the structure member name in the driver initializer. On the way make a few whitespace changes to make indention consistent. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://lore.kernel.org/r/20241019163412.304422-2-u.kleine-koenig@baylibre.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2024-11-13thermal/drivers/mediatek/lvts_thermal: Make read-only arrays static constColin Ian King
Don't populate the read-only arrays on the stack at run time, instead make them static const. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Reviewed-by: Nicolas Pitre <npitre@baylibre.com> Link: https://lore.kernel.org/r/20241022184622.1296044-1-colin.i.king@gmail.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2024-11-13platform/x86/amd/hsmp: Change the error typeSuma Hegde
When file is opened in WRITE only mode, then GET messages are not allowed and when file is opened in READ only mode, SET messages are not allowed. In these scenerios, return error EPERM to userspace instead of EINVAL. Signed-off-by: Suma Hegde <suma.hegde@amd.com> Reviewed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com> Link: https://lore.kernel.org/r/20241112120450.2407125-2-suma.hegde@amd.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-11-13platform/x86/amd/hsmp: Add new error code and error logsSuma Hegde
Firmware is updated to send HSMP_ERR_PREREQ_NOT_SATISFIED(0xFD) and HSMP_ERR_SMU_BUSY(0xFC) error codes. Add them here. Add error logs to make it easy to understand the failure reason for different error conditions. Replace pr_err() with dev_err() to identify the driver printing the error. Signed-off-by: Suma Hegde <suma.hegde@amd.com> Reviewed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com> Link: https://lore.kernel.org/r/20241112120450.2407125-1-suma.hegde@amd.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-11-13platform/x86/amd: amd_3d_vcache: Add AMD 3D V-Cache optimizer driverBasavaraj Natikar
AMD X3D processors, also known as AMD 3D V-Cache, feature dual Core Complex Dies (CCDs) and enlarged L3 cache, enabling dynamic mode switching between Frequency and Cache modes. To optimize performance, implement the AMD 3D V-Cache Optimizer, which allows selecting either: Frequency mode: cores within the faster CCD are prioritized before those in the slower CCD. Cache mode: cores within the larger L3 CCD are prioritized before those in the smaller L3 CCD. Co-developed-by: Perry Yuan <perry.yuan@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Co-developed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Reviewed-by: Armin Wolf <W_Armin@gmx.de> Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> Link: https://lore.kernel.org/r/20241112170307.3745777-2-Basavaraj.Natikar@amd.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-11-13s390/cio/ioasm: Convert to use flag output macrosHeiko Carstens
Use flag output macros in inline asm to allow for better code generation if the compiler has support for the flag output constraint. Reviewed-by: Juergen Christ <jchrist@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2024-11-13s390/cio/qdio: Convert to use flag output macrosHeiko Carstens
Use flag output macros in inline asm to allow for better code generation if the compiler has support for the flag output constraint. Reviewed-by: Juergen Christ <jchrist@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2024-11-13s390/sclp: Convert to use flag output macrosHeiko Carstens
Use flag output macros in inline asm to allow for better code generation if the compiler has support for the flag output constraint. Reviewed-by: Juergen Christ <jchrist@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2024-11-13s390/dasd: Convert to use flag output macrosHeiko Carstens
Use flag output macros in inline asm to allow for better code generation if the compiler has support for the flag output constraint. Reviewed-by: Juergen Christ <jchrist@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2024-11-13s390/cio: Externalize full CMG characteristicsPeter Oberparleiter
The current "measurement_chars" CHPID sysfs attribute exposes only a limited, validity-filtered portion of data from the associated Channel- Measurements Characteristics Block (CMCB). New machine models add data that is relevant for userspace tooling to the "header"-portion of the CMCB. This data that is not currently accessible to userspace. To prevent having to add new sysfs attributes whenever a new bit of data is added to the CMCB "header", add a new sysfs attribute named "measurement_chars_full" that exposes the full, unfiltered CMCB. Signed-off-by: Peter Oberparleiter <oberpar@linux.ibm.com> Reviewed-by: Vineeth Vijayan <vneethv@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2024-11-13spi: cs42l43: Add GPIO speaker id support to the bridge configurationSimon Trimmer
OEMs can use the spk-id-gpios ACPI property to indicate the type of speakers fitted to a device. Attempt to read a spk-id value using the GPIO method when a usable spk-id value is not obtained from the 01fa-spk-id-val ACPI property. Obtaining the spk-id value has been moved earlier in the function to the other sidecar block, so that an -EPROBE_DEFER from a GPIO driver is handled more efficiently. Signed-off-by: Simon Trimmer <simont@opensource.cirrus.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://patch.msgid.link/20241112131434.678882-1-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-11-13net: phy: mediatek: add MT7530 & MT7531's PHY ID macrosSkyLake.Huang
This patch adds MT7530 & MT7531's PHY ID macros in mtk-ge.c so that it follows the same rule of mtk-ge-soc.c. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13net: phy: mediatek: Integrate read/write page helper functionsSkyLake.Huang
This patch integrates read/write page helper functions as MTK phy lib. They are basically the same in mtk-ge.c & mtk-ge-soc.c. Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13net: phy: mediatek: Improve readability of mtk-phy-lib.c's ↵SkyLake.Huang
mtk_phy_led_hw_ctrl_set() This patch removes parens around TRIGGER_NETDEV_RX/TRIGGER_NETDEV_TX in mtk_phy_led_hw_ctrl_set(), which improves readability. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13net: phy: mediatek: Move LED helper functions into mtk phy libSkyLake.Huang
This patch creates mtk-phy-lib.c & mtk-phy.h and integrates mtk-ge-soc.c's LED helper functions so that we can use those helper functions in other MTK's ethernet phy driver. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13net: phy: mediatek: Re-organize MediaTek ethernet phy driversSkyLake.Huang
Re-organize MediaTek ethernet phy driver files and get ready to integrate some common functions and add new 2.5G phy driver. mtk-ge.c: MT7530 Gphy on MT7621 & MT7531 Gphy mtk-ge-soc.c: Built-in Gphy on MT7981 & Built-in switch Gphy on MT7988 mtk-2p5ge.c: Planned for built-in 2.5G phy on MT7988 Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13clocksource/drivers/arm_arch_timer: Use of_property_present() for ↵Rob Herring (Arm)
non-boolean properties The use of of_property_read_bool() for non-boolean properties is deprecated in favor of of_property_present() when testing for property presence. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20241104190505.272805-2-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2024-11-13clocksource/drivers/gpx: Remove redundant castsTang Bin
In the function gxp_timer_init, the 'int' type cast in front of the PTR_ERR() macro is redundant, thus remove it. Signed-off-by: Tang Bin <tangbin@cmss.chinamobile.com> Link: https://lore.kernel.org/r/20241107074619.2714-1-tangbin@cmss.chinamobile.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2024-11-13clocksource/drivers/timer-ti-dm: Fix child node refcount handlingJavier Carrasco
of_find_compatible_node() increments the node's refcount, and it must be decremented again with a call to of_node_put() when the pointer is no longer required to avoid leaking the resource. Instead of adding the missing calls to of_node_put() in all execution paths, use the cleanup attribute for 'arm_timer' by means of the __free() macro, which automatically calls of_node_put() when the variable goes out of scope. Fixes: 25de4ce5ed02 ("clocksource/drivers/timer-ti-dm: Handle dra7 timer wrap errata i940") Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Link: https://lore.kernel.org/r/20241031-timer-ti-dm-systimer-of_node_put-v3-1-063ee822b73a@gmail.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2024-11-13clocksource/drivers/ralink: Add Ralink System Tick Counter driverSergio Paracuellos
System Tick Counter is present on Ralink SoCs RT3352 and MT7620. This driver has been in 'arch/mips/ralink' directory since the beggining of Ralink architecture support. However, it can be moved into a more proper place in 'drivers/clocksource'. Hence add it here adding also support for compile test targets and reducing LOC in architecture code folder. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20241028203643.191268-2-sergio.paracuellos@gmail.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2024-11-13clocksource/drivers/mips-gic-timer: Always use cluster 0 counter as clocksourcePaul Burton
In a multi-cluster MIPS system, there are multiple GICs - one in each cluster - each of which has its independent counter. The counters in each GIC are not synchronized in any way, so they can drift relative to one another through the lifetime of the system. This is problematic for a clock source which ought to be global. Avoid problems by always accessing cluster 0's counter, using cross-cluster register access. This adds overhead so it is applied only on multi-cluster systems. Signed-off-by: Paul Burton <paulburton@kernel.org> Signed-off-by: Chao-ying Fu <cfu@wavecomp.com> Signed-off-by: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com> Signed-off-by: Aleksandar Rikalo <arikalo@gmail.com> Tested-by: Serge Semin <fancer.lancer@gmail.com> Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20241019071037.145314-6-arikalo@gmail.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2024-11-13clocksource/drivers/timer-ti-dm: Don't fail probe if int not foundJudith Mendez
Some timers may not have an interrupt routed to the A53 GIC, but the timer PWM functionality can still be used by Linux Kernel. Therefore, do not fail probe if interrupt is not found and ti,timer-pwm exists. Signed-off-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20241011175203.1040568-1-jm@ti.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2024-11-13clocksource/drivers:sp804: Make user selectableMark Brown
The sp804 is currently only user selectable if COMPILE_TEST, this was done by commit dfc82faad725 ("clocksource/drivers/sp804: Add COMPILE_TEST to CONFIG_ARM_TIMER_SP804") in order to avoid it being spuriously offered on platforms that won't have the hardware since it's generally only seen on Arm based platforms. This config is overly restrictive, while platforms that rely on the SP804 do select it in their Kconfig there are others such as the Arm fast models which have a SP804 available but currently unused by Linux. Relax the dependency to allow it to be user selectable on arm and arm64 to avoid surprises and in case someone comes up with a use for extra timer hardware. Fixes: dfc82faad725 ("clocksource/drivers/sp804: Add COMPILE_TEST to CONFIG_ARM_TIMER_SP804") Reported-by: Ross Burton <ross.burton@arm.com> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20241001-arm64-vexpress-sp804-v3-1-0a2d3f7883e4@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2024-11-13clocksource/drivers/dw_apb: Remove unused dw_apb_clockevent functionsDr. David Alan Gilbert
dw_apb_clockevent_pause(), dw_apb_clockevent_resume() and dw_apb_clockevent_stop() have been unused since 2021's commit 1b79fc4f2bfd ("x86/apb_timer: Remove driver for deprecated platform") Remove them. (Some of the other clockevent functions are still called by dw_apb_timer_of.c so I guess it is still in use?) Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org> Link: https://lore.kernel.org/r/20241025203101.241709-1-linux@treblig.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2024-11-13cpufreq: intel_pstate: Update Balance-performance EPP for Granite RapidsSrinivas Pandruvada
Update EPP default for balance_performance to 32. This will give better performance out of the box using Intel P-State powersave governor while still offering power savings compared to performance governor. This is in line with what has already been done for Emerald Rapids and Sapphire Rapids. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://patch.msgid.link/20241112235946.368082-1-srinivas.pandruvada@linux.intel.com [ rjw: Subject and changelog edits ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-11-13octeontx2-pf: Adds TC offload supportGeetha sowjanya
Implements tc offload support for rvu representors. Usage example: - Add tc rule to drop packets with vlan id 3 using port representor(Rpf1vf0). # tc filter add dev Rpf1vf0 protocol 802.1Q parent ffff: flower vlan_id 3 vlan_ethtype ipv4 skip_sw action drop - Redirect packets with vlan id 5 and IPv4 packets to eth1, after stripping vlan header. # tc filter add dev Rpf1vf0 ingress protocol 802.1Q flower vlan_id 5 vlan_ethtype ipv4 skip_sw action vlan pop action mirred ingress redirect dev eth1 Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13octeontx2-pf: Implement offload stats ndo for representorsGeetha sowjanya
Implement the offload stat ndo by fetching the HW stats of rx/tx queues attached to the representor. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13octeontx2-pf: Add devlink port supportGeetha sowjanya
Register devlink port for the rvu representors. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13octeontx2-pf: Add representors for sdp MACGeetha sowjanya
Hardware supports different types of MACs eg RPM, SDP, LBK. LBK is for internal Tx->Rx HW loopback path. RPM and SDP MACs support ingress/egress pkt IO on interfaces with different set of capabilities like interface modes. At the time of netdev driver registration PF will seek MAC related information from Admin function driver 'drivers/net/ethernet/marvell/octeontx2/af' and sets up ingress/egress queues etc such that pkt IO on the channels of these different MACs is possible. This patch add representors for SDP MAC. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13octeontx2-pf: Configure VF mtu via representorGeetha sowjanya
Adds support to manage the mtu configuration for VF through representor. On update of representor mtu a mbox notification is send to VF to update its mtu. This feature is implemented based on the "Network Function Representors" kernel documentation. " Setting an MTU on the representor should cause that same MTU to be reported to the representee. " Signed-off-by: Sai Krishna <saikrishnag@marvell.com> Signed-off-by: Geetha sowjanya <gakula@marvell.com> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13octeontx2-pf: Add support to sync link state between representor and VFsGeetha sowjanya
Implements the below requirement mentioned in the representors documentation. " The representee's link state is controlled through the representor. Setting the representor administratively UP or DOWN should cause carrier ON or OFF at the representee. " This patch enables - Reflecting the link state of representor based on the VF state and link state of VF based on representor. - On VF interface up/down a notification is sent via mbox to representor to update the link state. eg: ip link set eth0 up/down will disable carrier on/off of the corresponding representor(r0p1) interface. - On representor interface up/down will cause the link state update of VF. eg: ip link set r0p1 up/down will disable carrier on/off of the corresponding representee(eth0) interface. Signed-off-by: Harman Kalra <hkalra@marvell.com> Signed-off-by: Geetha sowjanya <gakula@marvell.com> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13octeontx2-pf: Get VF stats via representorGeetha sowjanya
Adds support to export VF port statistics via representor netdev. Defines new mbox "NIX_LF_STATS" to fetch VF hw stats. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13octeontx2-af: Add packet path between representor and VFGeetha sowjanya
Current HW, do not support in-built switch which will forward pkts between representee and representor. When representor is put under a bridge and pkts needs to be sent to representee, then pkts from representor are sent on a HW internal loopback channel, which again will be punted to ingress pkt parser. Now the rules that this patch installs are the MCAM filters/rules which will match against these pkts and forward them to representee. The rules that this patch installs are for basic representor <=> representee path similar to Tun/TAP between VM and Host. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13octeontx2-pf: Add basic net_device_opsGeetha sowjanya
Implements basic set of net_device_ops. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-11-13octeontx2-pf: Create representor netdevGeetha sowjanya
Adds initial devlink support to set/get the switchdev mode. Representor netdevs are created for each rvu devices when the switch mode is set to 'switchdev'. These netdevs are be used to control and configure VFs. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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