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2022-09-27drm/amd/pm: enable gfxoff feature for SMU 13.0.0Evan Quan
The feature is ready with latest 78.58.0 PMFW. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-27drm/amdgpu: avoid gfx register accessing during gfxoffEvan Quan
Make sure gfxoff is disabled before gfx register accessing. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-28Merge tag 'mediatek-drm-next-6.1' of ↵Dave Airlie
https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next Mediatek DRM Next for Linux 6.1 1. Drop of_gpio header 2. Remove the unneeded result Signed-off-by: Dave Airlie <airlied@redhat.com> From: Chun-Kuang Hu <chunkuang.hu@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220922234804.18557-1-chunkuang.hu@kernel.org
2022-09-27drm/amdgpu/gfx9: switch to amdgpu_gfx_rlc_init_microcodeHawking Zhang
switch to common helper to initialize rlc firmware for gfx9 Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-27drm/amdgpu: add helper to init rlc firmwareHawking Zhang
To initialzie rlc firmware according to rlc firmware header version v2: squash in backwards compat fix Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-27i2c: mlxbf: remove device tree supportAsmaa Mnebhi
BlueField customers have to use the BlueField firmware with UEFI ACPI tables so there is no need to have device tree support in the i2c-mlxbf.c driver. Remove the device tree binding documentation as well. Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com> Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-09-27i2c: mlxbf: support BlueField-3 SoCAsmaa Mnebhi
BlueField-3 SoC has the same I2C IP logic as previous BlueField-1 and 2 SoCs but it has different registers' addresses. This is an effort to keep this driver generic across all BlueField generations. This patch breaks down the "smbus" resource into 3 separate resources to enable us to use common registers' offsets for all BlueField SoCs: struct mlxbf_i2c_resource *timer; struct mlxbf_i2c_resource *mst; struct mlxbf_i2c_resource *slv; Of course, all offsets had to be adjusted accordingly, and we took this chance to reorganize the macros depending on the register block they target. There are only 2 registers' offsets that do not fit within this schema so their offsets are passed as SoC-specific parameters: smbus_master_rs_bytes_off smbus_master_fsm_off Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com> Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-09-27i2c: cadence: Add standard bus recovery supportShubhrajyoti Datta
Hook up the standard GPIO/pinctrl-based recovery support. We are doing the recovery at the beginning on a timeout. Multiple people have contributed to the series. Original patch from Cirag and another one from Robert. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Acked-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-09-27net/mlx5: Remove unused structsGal Pressman
Remove structs which are no longer used in the driver: mlx5dr_cmd_qp_create_attr mlx5_fs_dr_ns mlx5_pas Signed-off-by: Gal Pressman <gal@nvidia.com> Reviewed-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-09-27net/mlx5: Remove unused functionsGal Pressman
Remove functions which are no longer used in the driver: mlx5e_ipsec_is_tx_flow mlx5_health_flush get_cqe_enhanced_num_mini_cqes get_cqe_l3_hdr_type mlx5_health_flush mlx5_fs_is_ipsec_flow _mlx5_fs_is_outer_ipproto_flow mlx5_fs_is_outer_tcp_flow mlx5_fs_is_outer_udp_flow mlx5_fs_is_vxlan_flow mlx5_fs_is_outer_ipsec_flow Signed-off-by: Gal Pressman <gal@nvidia.com> Reviewed-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-09-27net/mlx5: detect and enable bypass port select flow tableLiu, Changcheng
Use port selection capability port_select_flow_table_bypass bit to detect and enable explicit port affinity even when in lag hash mode. Signed-off-by: Liu, Changcheng <jerrliu@nvidia.com> Reviewed-by: Mark Bloch <mbloch@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-09-27net/mlx5: Lag, enable hash mode by default for all NICsLiu, Changcheng
The firmware supports adding a steering rule to catch egress traffic of the QPs/TISs which are set port affinity explicitly in hash mode. Enable that mode for NICS with 2 ports as well. Signed-off-by: Liu, Changcheng <jerrliu@nvidia.com> Reviewed-by: Mark Bloch <mbloch@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-09-27net/mlx5: Lag, set active ports if support bypass port select flow tableLiu, Changcheng
active_port bit mask indicates the current active ports. Set bit indicates the port is active. Update active ports info to FW to redirect the QP/TIS from inactive ports to other ports. Signed-off-by: Liu, Changcheng <jerrliu@nvidia.com> Reviewed-by: Mark Bloch <mbloch@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-09-27RDMA/mlx5: Don't set tx affinity when lag is in hash modeLiu, Changcheng
In hash mode, without setting tx affinity explicitly, the port select flow table decides which port is used for the traffic. If port_select_flow_table_bypass capability is supported and tx affinity is set explicitly for QP/TIS, they will be added into the explicit affinity table in FW to check which port is used for the traffic. 1. The overloaded explicit affinity table may affect performance. To avoid this, do not set tx affinity explicitly by default. 2. The packets of the same flow need to be transmitted on the same port. Because the packets of the same flow use different QPs in slow & fast path, it shouldn't set tx affinity explicitly for these QPs. Signed-off-by: Liu, Changcheng <jerrliu@nvidia.com> Reviewed-by: Mark Bloch <mbloch@nvidia.com> Reviewed-by: Vlad Buslov <vladbu@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-09-27net/mlx5: Add support for NPPS with real time modeAya Levin
Add support for setting NPPS. NPPS is currently available in REAL_TIME_CLOCK mode only. In addition allow the user to set the pulse duration. When NPPS pulse duration is not set explicitly by the user, driver set it to 50% of the NPPS period. Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Eran Ben Elisha <eranbe@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-09-27i2c: mlxbf: add multi slave functionalityAsmaa Mnebhi
Support the multi slave functionality which enables the BlueField to be registered at up to 16 i2c slave addresses. Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com> Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-09-27i2c: mlxbf: support lock mechanismAsmaa Mnebhi
Linux is not the only entity using the BlueField I2C busses so support a lock mechanism provided by hardware to avoid issues when multiple entities are trying to access the same bus. The lock is acquired whenever written explicitely or the lock register is read. So make sure it is always released at the end of a successful or failed transaction. Fixes: b5b5b32081cd206b (i2c: mlxbf: I2C SMBus driver for Mellanox BlueField SoC) Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com> Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2022-09-27Merge branch 'master' into i2c/for-mergewindowWolfram Sang
2022-09-27drm/format-helper: Add KUnit tests for drm_fb_xrgb8888_to_gray8()José Expósito
Extend the existing test cases to test the conversion from XRGB8888 to grayscale. Tested-by: Maíra Canal <mairacanal@riseup.net> Reviewed-by: David Gow <davidgow@google.com> Acked-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: José Expósito <jose.exposito89@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220926080837.65734-4-jose.exposito89@gmail.com
2022-09-27drm/format-helper: Add KUnit tests for drm_fb_xrgb8888_to_xrgb2101010()José Expósito
Extend the existing test cases to test the conversion from XRGB8888 to XRGB2101010. In order to be able to call drm_fb_xrgb8888_to_xrgb2101010() when compiling CONFIG_DRM_KMS_HELPER as a module export the symbol. Tested-by: Maíra Canal <mairacanal@riseup.net> Reviewed-by: David Gow <davidgow@google.com> Acked-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: José Expósito <jose.exposito89@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220926080837.65734-3-jose.exposito89@gmail.com
2022-09-27drm/format-helper: Add KUnit tests for drm_fb_xrgb8888_to_rgb888()José Expósito
Extend the existing test cases to test the conversion from XRGB8888 to RGB888. Tested-by: Maíra Canal <mairacanal@riseup.net> Reviewed-by: David Gow <davidgow@google.com> Acked-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: José Expósito <jose.exposito89@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220926080837.65734-2-jose.exposito89@gmail.com
2022-09-27clk: qcom: Add SC8280XP GPU clock controllerBjorn Andersson
Add driver for the GPU clock controller in the Qualcomm SC8280XP platform. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> [bjorn: Included kernel.h and lower-cased hex numbers] Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220926173025.4747-3-quic_bjorande@quicinc.com
2022-09-27clk: qcom: smd: Add SM6375 clocksKonrad Dybcio
Add support for controlling SMD RPM clocks on SM6375. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220921004458.151842-3-konrad.dybcio@somainline.org
2022-09-27nvmet: don't look at the request_queue in nvmet_bdev_set_limitsChristoph Hellwig
nvmet is a consumer of the block layer and should not directly look at the request_queue. Use the bdev_ helpers to retrieve the device limits instead. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Keith Busch <kbusch@kernel.org>
2022-09-27nvmet: don't look at the request_queue in nvmet_bdev_zone_mgmt_emulate_allChristoph Hellwig
nvmet is a consumer of the block layer and should not directly look at the request_queue. Just use the NUMA node ID from the gendisk instead of the request_queue. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Keith Busch <kbusch@kernel.org>
2022-09-27clk: qcom: rpmhcc: add sdm670 clocksRichard Acayan
The Snapdragon 670 uses the RPMh mailbox for most of the clocks used in SDM845 but omits two. Add clock data for SDM670 so the driver doesn't fail to resolve a clock. Link: https://android.googlesource.com/kernel/msm/+/443bd8d6e2cf54698234c752e6de97b4b8a528bd%5E%21/#F7 Signed-off-by: Richard Acayan <mailingradian@gmail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220920223734.151135-3-mailingradian@gmail.com
2022-09-27ice: xsk: drop power of 2 ring size restriction for AF_XDPMaciej Fijalkowski
We had multiple customers in the past months that reported commit 296f13ff3854 ("ice: xsk: Force rings to be sized to power of 2") makes them unable to use ring size of 8160 in conjunction with AF_XDP. Remove this restriction. Fixes: 296f13ff3854 ("ice: xsk: Force rings to be sized to power of 2") CC: Alasdair McWilliam <alasdair.mcwilliam@outlook.com> Signed-off-by: Maciej Fijalkowski <maciej.fijalkowski@intel.com> Tested-by: George Kuruvinakunnel <george.kuruvinakunnel@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2022-09-27block: replace blk_queue_nowait with bdev_nowaitChristoph Hellwig
Replace blk_queue_nowait with a bdev_nowait helpers that takes the block_device given that the I/O submission path should not have to look into the request_queue. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Pankaj Raghav <p.raghav@samsung.com> Link: https://lore.kernel.org/r/20220927075815.269694-1-hch@lst.de Signed-off-by: Jens Axboe <axboe@kernel.dk>
2022-09-27drm/panel-edp: Add BOE NT116WHM-N4C (HW: V8.1)Sean Hong
Add support for the BOE - NT116WHM-N4C (HW: V8.1) panel. Signed-off-by: Sean Hong <sean.hong@quanta.corp-partner.google.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220927063524.493591-1-sean.hong@quanta.corp-partner.google.com
2022-09-27ice: xsk: change batched Tx descriptor cleaningMaciej Fijalkowski
AF_XDP Tx descriptor cleaning in ice driver currently works in a "lazy" way - descriptors are not cleaned immediately after send. We rather hold on with cleaning until we see that free space in ring drops below particular threshold. This was supposed to reduce the amount of unnecessary work related to cleaning and instead of keeping the ring empty, ring was rather saturated. In AF_XDP realm cleaning Tx descriptors implies producing them to CQ. This is a way of letting know user space that particular descriptor has been sent, as John points out in [0]. We tried to implement serial descriptor cleaning which would be used in conjunction with batched cleaning but it made code base more convoluted and probably harder to maintain in future. Therefore we step away from batched cleaning in a current form in favor of an approach where we set RS bit on every last descriptor from a batch and clean always at the beginning of ice_xmit_zc(). This means that we give up a bit of Tx performance, but this doesn't hurt l2fwd scenario which is way more meaningful than txonly as this can be treaten as AF_XDP based packet generator. l2fwd is not hurt due to the fact that Tx side is much faster than Rx and Rx is the one that has to catch Tx up. FWIW Tx descriptors are still produced in a batched way. [0]: https://lore.kernel.org/bpf/62b0a20232920_3573208ab@john.notmuch/ Fixes: 126cdfe1007a ("ice: xsk: Improve AF_XDP ZC Tx and use batching API") Signed-off-by: Maciej Fijalkowski <maciej.fijalkowski@intel.com> Tested-by: George Kuruvinakunnel <george.kuruvinakunnel@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2022-09-27drm/panel-edp: Fix delays for INX N116BCA-EA2 (HW: C1)Sean Hong
This panel has the same delay timing as N116BCA-EA1. So, fix the delay timing from delay_200_500_p2e80 to delay_200_500_e80_d50. Fixes: c7bcc1056cff ("drm/panel-edp: Add INX N116BCA-EA2") Signed-off-by: Sean Hong <sean.hong@quanta.corp-partner.google.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220927021835.488803-1-sean.hong@quanta.corp-partner.google.com
2022-09-27drm/panel-edp: Fix delays for INX N116BCN-EA1 (HW: C4)Sean Hong
This panel has the same delay timing as N116BCA-EA1. So, fix the delay timing from delay_200_500_p2e80 to delay_200_500_e80_d50. Fixes: 9f4a57148120 ("drm/panel-edp: Add INX N116BCN-EA1") Signed-off-by: Sean Hong <sean.hong@quanta.corp-partner.google.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220927021021.488295-1-sean.hong@quanta.corp-partner.google.com
2022-09-27ionic: change order of devlink port register and netdev registerJiri Pirko
Make sure that devlink port is registered first and register netdev after. Unregister netdev before devlnk port unregister. Signed-off-by: Jiri Pirko <jiri@nvidia.com> Acked-by: Shannon Nelson <snelson@pensando.io> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27ice: reorder PF/representor devlink port register/unregister flowsJiri Pirko
Make sure that netdevice is registered/unregistered while devlink port is registered. Signed-off-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27funeth: unregister devlink port after netdevice unregisterJiri Pirko
Fix the order of destroy_netdev() flow and unregister the devlink port after calling unregister_netdev(). Signed-off-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ethernet: mtk_eth_soc: fix usage of foe_entry_sizeDaniel Golle
As sizeof(hwe->data) can now longer be used as the actual size depends on foe_entry_size, in commit 9d8cb4c096ab02 ("net: ethernet: mtk_eth_soc: add foe_entry_size to mtk_eth_soc") the use of sizeof(hwe->data) is hence replaced. However, replacing it with ppe->eth->soc->foe_entry_size is wrong as foe_entry_size represents the size of the whole descriptor and not just the 'data' field. Fix this by subtracing the size of the only other field in the struct 'ib1', so we actually end up with the correct size to be copied to the data field. Reported-by: Chen Minqiang <ptpt52@gmail.com> Fixes: 9d8cb4c096ab02 ("net: ethernet: mtk_eth_soc: add foe_entry_size to mtk_eth_soc") Signed-off-by: Daniel Golle <daniel@makrotopia.org> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/r/YzBqPIgQR2gLrPoK@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: ethernet: mtk_eth_soc: fix wrong use of new helper functionDaniel Golle
In function mtk_foe_entry_set_vlan() the call to field accessor macro FIELD_GET(MTK_FOE_IB1_BIND_VLAN_LAYER, entry->ib1) has been wrongly replaced by mtk_prep_ib1_vlan_layer(eth, entry->ib1) Use correct helper function mtk_get_ib1_vlan_layer instead. Reported-by: Chen Minqiang <ptpt52@gmail.com> Fixes: 03a3180e5c09e1 ("net: ethernet: mtk_eth_soc: introduce flow offloading support for mt7986") Signed-off-by: Daniel Golle <daniel@makrotopia.org> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/r/YzBp+Kk04CFDys4L@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27net: usb: qmi_wwan: Add new usb-id for Dell branded EM7455Frank Wunderlich
Add support for Dell 5811e (EM7455) with USB-id 0x413c:0x81c2. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Cc: stable@vger.kernel.org Acked-by: Bjørn Mork <bjorn@mork.no> Link: https://lore.kernel.org/r/20220926150740.6684-3-linux@fw-web.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-27Input: snvs_pwrkey - fix SNVS_HPVIDR1 register addressSebastian Krzyszkowiak
Both i.MX6 and i.MX8 reference manuals list 0xBF8 as SNVS_HPVIDR1 (chapters 57.9 and 6.4.5 respectively). Without this, trying to read the revision number results in 0 on all revisions, causing the i.MX6 quirk to apply on all platforms, which in turn causes the driver to synthesise power button release events instead of passing the real one as they happen even on platforms like i.MX8 where that's not wanted. Fixes: 1a26c920717a ("Input: snvs_pwrkey - send key events for i.MX6 S, DL and Q") Tested-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Cc: <stable@vger.kernel.org> Link: https://lore.kernel.org/r/4599101.ElGaqSPkdT@pliszka Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2022-09-27platform/x86/intel/wmi: thunderbolt: Use dev_groups callbackShyam Sundar S K
Use .dev_groups callback instead of manual sysfs registration. Remove .probe and .remove callbacks as they become dummy after using .dev_groups. Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Link: https://lore.kernel.org/r/20220927135612.1602491-1-Shyam-sundar.S-k@amd.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2022-09-27IB/hfi1: Use skb_put_data() instead of skb_put/memcpy pairShang XiaoJing
Use skb_put_data() instead of skb_put() and memcpy(), which is shorter and clear. Drop the tmp variable that is not needed any more. Link: https://lore.kernel.org/r/20220927022919.16902-1-shangxiaojing@huawei.com Signed-off-by: Shang XiaoJing <shangxiaojing@huawei.com> Reviewed-by: Dennis Dalessandro <dennis.dalessandro@cornelisnetworks.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2022-09-27platform/x86/amd: pmc: remove CONFIG_DEBUG_FS checksShyam Sundar S K
Since linux/debugfs.h already has the stubs for the used debugfs functions when debugfs is not enabled, remove the #ifdef CONFIG_DEBUG_FS checks. Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Link: https://lore.kernel.org/r/20220922175608.630046-1-Shyam-sundar.S-k@amd.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2022-09-27RDMA/hns: Unified Log Printing StyleGuofeng Yue
The first letter of the log information is changed to lowercase to keep the same style. Link: https://lore.kernel.org/r/20220922123315.3732205-13-xuhaoyue1@hisilicon.com Signed-off-by: Guofeng Yue <yueguofeng@hisilicon.com> Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2022-09-27RDMA/hns: Replacing magic number with macros in apply_func_caps()Yixing Liu
Replacing magic number with macros in function apply_func_caps(). Link: https://lore.kernel.org/r/20220922123315.3732205-12-xuhaoyue1@hisilicon.com Signed-off-by: Yixing Liu <liuyixing1@huawei.com> Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2022-09-27RDMA/hns: Repacing 'dseg_len' by macros in fill_ext_sge_inl_data()Luoyouming
The sge size is known to be constant, so it's unnecessary to use sizeof to calculate. Link: https://lore.kernel.org/r/20220922123315.3732205-11-xuhaoyue1@hisilicon.com Signed-off-by: Luoyouming <luoyouming@huawei.com> Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2022-09-27RDMA/hns: Remove redundant 'max_srq_desc_sz' in capsYangyang Li
The max_srq_desc_sz is defined in the code, but never used, so delete this redundant variable. Link: https://lore.kernel.org/r/20220922123315.3732205-10-xuhaoyue1@hisilicon.com Signed-off-by: Yangyang Li <liyangyang20@huawei.com> Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2022-09-27RDMA/hns: Remove redundant 'num_mtt_segs' and 'max_extend_sg'Yangyang Li
The num_mtt_segs and max_extend_sg used to be used for HIP06, remove them since the HIP06 code has been removed. Link: https://lore.kernel.org/r/20220922123315.3732205-9-xuhaoyue1@hisilicon.com Signed-off-by: Yangyang Li <liyangyang20@huawei.com> Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2022-09-27RDMA/hns: Remove redundant 'phy_addr' in hns_roce_hem_list_find_mtt()Chengchang Tang
This parameter has never been used. Remove it to simplify the function. Link: https://lore.kernel.org/r/20220922123315.3732205-8-xuhaoyue1@hisilicon.com Signed-off-by: Chengchang Tang <tangchengchang@huawei.com> Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2022-09-27RDMA/hns: Remove redundant 'use_lowmem' argument from hns_roce_init_hem_table()Yunsheng Lin
As hns_roce_init_hem_table() is always called with use_lowmem being '1', and table->lowmem is set according to that argument, so remove table->lowmem too. Also, as the table->lowmem is used to indicate a dma buffer is allocated with GFP_HIGHUSER or GFP_KERNEL, and calling dma_alloc_coherent() with GFP_KERNEL seems like a common pattern. Link: https://lore.kernel.org/r/20220922123315.3732205-7-xuhaoyue1@hisilicon.com Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2022-09-27RDMA/hns: Remove redundant 'bt_level' for hem_list_alloc_item()Yunsheng Lin
The 'bt_level' parameter is not used in hem_list_alloc_item(), so remove it. Link: https://lore.kernel.org/r/20220922123315.3732205-6-xuhaoyue1@hisilicon.com Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
generated by cgit (git 2.34.1) at 2025-09-24 05:19:20 +0000