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path: root/sound/soc/intel/skylake/skl-topology.h
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2016-11-03ASoC: Intel: Skylake: Add support for LPModeVinod Koul
For D0i3, we need to tell DSP to run the pipelines in LP mode. This information is kept in topology and passed to driver as an attribute for pipe. So add a new tuple for lpmode and program the pipe based on value set. Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-09-24ASoC: Intel: Skylake: Update to use instance ids generatedDharageswari R
Post bind parameters of KPB module contains the instance id's of neighbouring modules in the sink path Now that module instance ids are generated dynamically we need to update these parameters as well, so use the table created and update the ids Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-09-24ASoC: Intel: Skylake: Add module instance id generation APIsDharageswari R
Driver needs to send unique module instance id to firmware while creating the module and uses this id to communicate with DSP for setting parameters while audio use case is ongoing. But, we have upper bound of instance ID. The current IDs are coming from topology but it doesn't know the upper bound and can't assign unique id's subject to upper bounds as we can create a big graph but not all parts running at same time. This patch adds a 128bit unique id management routines which are built on top of ffz() for faster implementation. Unfortunately ffz() works on 32bits values, so additional code is added on top of ffz() to create a 128bit unique id. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-09-01ASoC: Intel: Skylake: Fix DMA control config sizeJeeja KP
DMA control IPC structure wrong config array length, So corrected the size Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-08-08ASoC: Intel: Skylake: Move modules query to runtimeVinod Koul
Since we are moving DSP init to later, at the topology load the module info is not available. So set the module id to -1 at init and query at first module initialization. Signed-off-by: Senthilnathan Veppur <senthilnathanx.veppur@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-07-24Merge remote-tracking branch 'asoc/topic/intel' into asoc-nextMark Brown
2016-07-08ASoC: Intel: Skylake: Fix to use the actual size for TLV controlDharageswari R
DSP expects the actual length of parameters that is set through TLV to be passed in large config set, so pass the actual size received in tlv_control_set() instead of max size. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-07ASoC: Intel: Skylake: Set the DSP pipe typeJeeja KP
DSP pipe type can be a pass through or it can be processing pipe. In case of pass through pipe, it is a single pipeline with both host and link copier in the same pipeline. Identify the DSP pipe type if it pass through or not. Pass through pipe is identified by checking if it has both host and link copier in the same pipeline. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-07ASoC: Intel: Skylake: Reset DSP pipe when host/link DMA is resetJeeja KP
In case of XRUN recovery PCM prepare will be called. In this case Host/Link DMAs are reset and reconfigured, hence the corresponding FE/BE pipe needs to be reset in order to get to a clean state. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-05-02Merge tag 'asoc-fix-v4.6-rc5' into asoc-intelMark Brown
ASoC: Fixes for v4.6 This is a fairly large collection of fixes but almost all driver specific ones, especially to the new Intel drivers which have had a lot of recent development. The one core fix is a change to the debugfs code to avoid crashes in some relatively unusual configurations.
2016-04-21ASoC: Intel: Skylake: Use UUID in binary formatShreyas NC
To avoid complex string manipulations with UUID in canonical form, use UUID in binary format. Signed-off-by: Shreyas NC <shreyas.nc@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-28ASoC: Intel: Skylake: Fix for unloading module only when it is loadedJeeja KP
Module needs to be unloaded only when it is loaded successfully. To fix this, first correct the module state sequence and set module state to LOADED if module is loaded successfully. When unloading the module check if module state is not in UNINIT, then unload it. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-02-08ASoC: Intel: Skylake: Add MCLK configurationDharageswari.R
The SoC has MCLK output which is typically required by codecs. The MCLK is controlled by DSP FW, so driver can configure that by sending DMA_CONTROL IPC. The configuration for MCLK is present in the endpoint blob. So if block has this configuration, send IPC to DSP for MCLK configuration. This is done by new function skl_dsp_set_dma_control() which is invoked by BE prepare. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-02-08ASoC: Intel: Skylake: Add skl_tplg_be_get_cpr_module() helperDharageswari.R
An I2S port can be connected to multiple BE pipes, get module config only for the active BE pipe. This helpers helps to do that and is used in subsequent patches Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-12-08ASoC: Intel: Skylake: read params from DSP if module is onOmair M Abdullah
If a module is ON then we should read the module parameters from DSP rather than driver cached values Signed-off-by: Omair M Abdullah <omair.m.abdullah@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-12-08ASoC: Intel: Skylake: Fix module init data correctlyJeeja KP
Module initialization parameter data can be set by - INIT_INSTANCE IPC by using the default value - SET_PARAMS immediately after INIT_INSTANCE - SET_PARAMS data from kcontrol values set this patch add param type to identify the parameters has to be sent to DSP. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-12-08ASoC: Intel: Skylake: Add support for Mic Select moduleDharageswari R
Mic select is a DSP module which is used to select one or many inputs to form an output. This is useful to select data selectively from PDM input and hence the name. This module is of generic module type. This patch adds support to add and configure Mic select module in firmware topology. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-12-08ASoC: Intel: Skylake: Add memory pages to widget data.Jeeja KP
A module can require extra memory for processing, like audio algorithms. The memory for these modules needs to be represented in base module configuration and passed to DSP on init, so add the memory pages as a field in widget data Signed-off-by: Dharageswari.R <dharageswari.r@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-12-01ASoC: Intel: Skylake: Add support to configure module paramsJeeja KP
This adds support to configure module parameter during module initialization or after module init using set module param required by the DSP firmware sequence. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-12-01ASoC: Intel: Skylake: Add helper routine to handle Algo parameterJeeja KP
Some DSP modules has user configurable parameters, which are required by some modules at module initialization. To configure the module algorithm parameter during initialization we add helpers here Signed-off-by: Divya Prakash <divya1.prakash@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-12-01ASoC: Intel: Skylake: Add helper routines to handle module paramsJeeja KP
Some DSP modules have user configurable parameters. These parameters are required by modules in the following scenario - during initialization - after initialization using set parameter This patch adds helper routine to set module parameters using large config set IPC message and removes params to be passed as init module routine. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-16ASoC: Intel: Skylake: Add support for module GUIDsHardik T Shah
The DSP FW specifies loadable modules using GUIDs so add support to specify the GUIDs from topology Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com> Signed-off-by: Omair M Abdullah <omair.m.abdullah@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-16ASoC: Intel: Skylake: Update the topology interface structureHardik T Shah
This patch updates the topology interface structure alignment and also updates the Sample interleaving defines Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com> Signed-off-by: Omair M Abdullah <omair.m.abdullah@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-16ASoC: Intel: Skylake: Add multiple pin formatsHardik T Shah
The module pin formats are considered homogeneous, but some modules can have different pcm formats on different pins, like reference signal for a module. This patch add support for configuration of each pin of module and allows us to specify if pins and homogeneous or heterogeneous Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com> Signed-off-by: Omair M Abdullah <omair.m.abdullah@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-16ASoC: Intel: Skylake: use module_pin info for unbindJeeja KP
in_pin and out_pin list for a module has the information about the module that are bound together. So we can directly look at pin information of module for binding and unbind. As a result the preinitialized dapm_path_last we had is removed and code and memory optimzed. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-16ASoC: Intel: Skylake: Fix support for multiple pins in a moduleJeeja KP
For supporting multiple dynamic pins, module state check is incorrect. In case of unbind, module state need to be changed to uninit if all pins in the module is is unbind state. To handle module state correctly add pin state and use pin state check to set module state correctly. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-24ASoC: Intel: Skylake: Add support to disable module notificationsJeeja KP
Each FW modules can report underrun/overrun notification from all modules. This patch disables underrun/overrun notification after firmware is loaded. This will be supportted for debug mode only thru debugfs Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-24ASoC: Intel: Skylake: Update for ssp node index in copier cfgJeeja KP
DSP firmware has interface change for SSP node index structure. New FW interface removes the dual_mono field and adds 4 bits for TDM slot group index. This patch updates the ssp dma to align with the DSP firmware structure. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07ASoC: Intel: Skylake: Add topology core init and handlersVinod Koul
The SKL driver does not code DSP topology in driver. It uses the newly added ASoC topology core to parse the topology information (controls, widgets and map) from topology binary. Each topology element passed private data which contains information that driver used to identify the module instance within firmware and send IPCs for that module to DSP firmware along with parameters. This patch adds init routine to invoke topology load and callback for topology creation. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07ASoC: Intel: Skylake: Add FE and BE hw_params handlingVinod Koul
For FE and BE, the PCM parameters come from FE and BE hw_params values passed. For a FE we convert the FE params to DSP expected module format and pass to DSP. For a BE we need to find the gateway settings (i2s/PDM) to be applied. These are queried from NHLT table and applied. Further for BE based on direction the settings are applied as either source or destination parameters. These helpers here allow the format to be calculated and queried as per firmware format. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07ASoC: Intel: Skylake: add DSP platform widget event handlersVinod Koul
The Skylake driver topology model tries to model the firmware rule for pipeline and module creation. The creation rule is: - Create Pipe - Add modules to Pipe - Connect the modules (bind) - Start the pipes Similarly destroy rule is: - Stop the pipe - Disconnect it (unbind) - Delete the pipe In driver we use Mixer, as there will always be ONE mixer in a pipeline to model a pipe. The modules in pipe are modelled as PGA widgets. The DAPM sequencing rules (mixer and then PGA) are used to create the sequence DSP expects as depicted above, and then widget handlers for PMU and PMD events help in that. This patch adds widget event handlers for PRE/POST PMU and PRE/POST PMD event for mixer and pga modules. These event handlers invoke pipeline creation, destroy, module creation, module bind, unbind and pipeline bind unbind Event handler sequencing is implement to target the DSP FW sequence expectations to enable path from source to sink pipe for Playback/Capture. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-07ASoC: Intel: Skylake: Add pipe and modules handlersJeeja KP
SKL driver needs to instantiate pipelines and modules in the DSP. The topology in the DSP is modelled as DAPM graph with a PGA representing a module instance and mixer representing a pipeline for a group of modules along with the mixer itself. Here we start adding building block for handling these. We add resource checks (memory/compute) for pipelines, find the modules in a pipeline, init modules in a pipe and lastly bind/unbind modules in a pipe These will be used by pipe event handlers in subsequent patches Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-07ASoC: Intel: Skylake: Add pipe management helpersJeeja KP
To manage DSP we need to create processing pipeline and on cleanup destroy them. So we add create and destroy routines for pipelines The pipelines need to to be executed so we add pipeline run and stop routines All these send required IPCs to DSP using IPC routines added earlier Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-07ASoC: Intel: Skylake: Add DSP module init and binding routinesJeeja KP
A module needs to be instantiated and then connected with other modules. On cleanup we need to disconnect the module. This is achieved by helpers module init, bind and unbind which are added here Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-07ASoC: Intel: Skylake: Add helpers for SRC and converter modulesHardik T Shah
SRC and converter modules are required to do frequency and channel conversion in DSP. Both take base module configuration and additional SRC and converter parameters. The helpers here are added to calculate the values for these modules Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-07ASoC: Intel: Skylake: Add helpers for DSP module configurationJeeja KP
This adds helper functions to calculate parameters required for base module format and copier module. A generic module is modelled by base module. Copier module is responsible for getting/sending data to FE (host DMAs) and BE (link HDA DMA, SSP, PDM) This also ads module pin management helpers which help in finding pins to use or freeing them up Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>