From 7988714237c6a548011dcd7dcce84e9f16dda427 Mon Sep 17 00:00:00 2001 From: Christian König Date: Wed, 5 Oct 2016 16:09:32 +0200 Subject: drm/amdgpu: move align_mask and nop into ring funcs as well (v2) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit They are constant as well. v2: update uvd and vce phys ring structures as well Signed-off-by: Christian König Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h index 6cf89c97ef8e..1ee1b65d7eff 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h @@ -93,6 +93,8 @@ unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring); /* provided by hw blocks that expose a ring buffer for commands */ struct amdgpu_ring_funcs { enum amdgpu_ring_type type; + uint32_t align_mask; + u32 nop; /* ring read/write ptr handling */ u32 (*get_rptr)(struct amdgpu_ring *ring); @@ -149,10 +151,8 @@ struct amdgpu_ring { unsigned max_dw; int count_dw; uint64_t gpu_addr; - uint32_t align_mask; uint32_t ptr_mask; bool ready; - u32 nop; u32 idx; u32 me; u32 pipe; @@ -178,8 +178,8 @@ void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib); void amdgpu_ring_commit(struct amdgpu_ring *ring); void amdgpu_ring_undo(struct amdgpu_ring *ring); int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring, - unsigned ring_size, u32 nop, u32 align_mask, - struct amdgpu_irq_src *irq_src, unsigned irq_type); + unsigned ring_size, struct amdgpu_irq_src *irq_src, + unsigned irq_type); void amdgpu_ring_fini(struct amdgpu_ring *ring); #endif -- cgit