From c42664cceb368ee04848e23a9964afd953a9145c Mon Sep 17 00:00:00 2001 From: Daniel Vetter Date: Thu, 7 Nov 2013 11:05:40 +0100 Subject: drm/i915: Optimize pipe irq handling on bdw MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We have a per-pipe bit in the master irq control register, so use it. This allows us to drop the masks for aggregate interrupt bits and be a bit more explicit in the code. It also removes one indentation level. Reviewed-by: Ben Widawsky Reviewed-by: Ville Syrjälä Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_irq.c | 40 +++++++++++++++++++--------------------- 1 file changed, 19 insertions(+), 21 deletions(-) (limited to 'drivers/gpu/drm/i915/i915_irq.c') diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 54338cf72feb..c04fbbf0acf7 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1749,6 +1749,7 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg) u32 master_ctl; irqreturn_t ret = IRQ_NONE; uint32_t tmp = 0; + enum pipe pipe; atomic_inc(&dev_priv->irq_received); @@ -1777,31 +1778,28 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg) } } - if (master_ctl & GEN8_DE_IRQS) { - int de_ret = 0; - int pipe; - for_each_pipe(pipe) { - uint32_t pipe_iir; - - pipe_iir = I915_READ(GEN8_DE_PIPE_IIR(pipe)); - if (pipe_iir & GEN8_PIPE_VBLANK) - drm_handle_vblank(dev, pipe); + for_each_pipe(pipe) { + uint32_t pipe_iir; - if (pipe_iir & GEN8_PIPE_FLIP_DONE) { - intel_prepare_page_flip(dev, pipe); - intel_finish_page_flip_plane(dev, pipe); - } + if (!(master_ctl & GEN8_DE_PIPE_IRQ(pipe))) + continue; - if (pipe_iir & GEN8_DE_PIPE_IRQ_ERRORS) - DRM_ERROR("Errors on pipe %c\n", 'A' + pipe); + pipe_iir = I915_READ(GEN8_DE_PIPE_IIR(pipe)); + if (pipe_iir & GEN8_PIPE_VBLANK) + drm_handle_vblank(dev, pipe); - if (pipe_iir) { - de_ret++; - ret = IRQ_HANDLED; - I915_WRITE(GEN8_DE_PIPE_IIR(pipe), pipe_iir); - } + if (pipe_iir & GEN8_PIPE_FLIP_DONE) { + intel_prepare_page_flip(dev, pipe); + intel_finish_page_flip_plane(dev, pipe); } - if (!de_ret) + + if (pipe_iir & GEN8_DE_PIPE_IRQ_ERRORS) + DRM_ERROR("Errors on pipe %c\n", 'A' + pipe); + + if (pipe_iir) { + ret = IRQ_HANDLED; + I915_WRITE(GEN8_DE_PIPE_IIR(pipe), pipe_iir); + } else DRM_ERROR("The master control interrupt lied (DE PIPE)!\n"); } -- cgit