diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x
index 234c33fbdb55..3acf7fc31659 100644
--- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x

- addresses to trigger on. Inclusion or exclusion is specificed

-Description: (RO) Print the content of the ETM Trace Start/Stop Conrol

-Description: (RO) Print the content of the ETM Enable Conrol #1

-Description: (RO) Print the content of the ETM Enable Conrol #2

diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
index 08b1964f27d3..a0425d70d009 100644
--- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x

- VMID, context ID and instuction address in the trace unit

-Contact: linux-iio@vger.kernel.org

- Discrete set of available values for the respective device

- configuration are listed in this file.

diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-events b/Documentation/ABI/testing/sysfs-bus-event_source-devices-events
index 505f080d20a1..77de58d03822 100644
--- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-events
+++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-events

- Examples (each of these lines would be in a seperate file):

- recieved from the kernel to match the unit specified in the

diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci
index 12e2bf92783f..40f7cd240591 100644
--- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci
+++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci

diff --git a/Documentation/ABI/testing/sysfs-bus-fsi-devices-sbefifo b/Documentation/ABI/testing/sysfs-bus-fsi-devices-sbefifo
index 531fe9d6b40a..c7393b4dd2d8 100644
--- a/Documentation/ABI/testing/sysfs-bus-fsi-devices-sbefifo
+++ b/Documentation/ABI/testing/sysfs-bus-fsi-devices-sbefifo

- ocurred and no transfers have completed since the timeout. A

- value of 0 indicates that no timeout has ocurred, or if one

- has, more recent transfers have completed successful.

diff --git a/Documentation/ABI/testing/sysfs-bus-i2c-devices-fsa9480 b/Documentation/ABI/testing/sysfs-bus-i2c-devices-fsa9480
index 42dfc9399d2d..288bc2fa9547 100644
--- a/Documentation/ABI/testing/sysfs-bus-i2c-devices-fsa9480
+++ b/Documentation/ABI/testing/sysfs-bus-i2c-devices-fsa9480

- CHARGER Charger is attaced

diff --git a/Documentation/ABI/testing/sysfs-bus-iio-filter-admv8818 b/Documentation/ABI/testing/sysfs-bus-iio-filter-admv8818
index f6c035752639..31dbb390573f 100644
--- a/Documentation/ABI/testing/sysfs-bus-iio-filter-admv8818
+++ b/Documentation/ABI/testing/sysfs-bus-iio-filter-admv8818

- identifier for an NVDIMM, which refelects the id attribute.

- ctl_res_cnt = "event=0x1"

- Indicating that NVDIMM contents cant

-Contact: thunderbolt-software@lists.01.org

-What: /sys/bus/umc/

-KernelVersion: 2.6.27

-Contact: David Vrabel <david.vrabel@csr.com>

- The Wireless Host Controller Interface (WHCI)

- specification describes a PCI-based device with

- multiple capabilities; the UWB Multi-interface

- The umc bus presents each of the individual

- capabilties as a device.

-What: /sys/bus/umc/devices/.../capability_id

-KernelVersion: 2.6.27

-Contact: David Vrabel <david.vrabel@csr.com>

- The ID of this capability, with 0 being the radio

- controller capability.

-What: /sys/bus/umc/devices/.../version

-KernelVersion: 2.6.27

-Contact: David Vrabel <david.vrabel@csr.com>

- The specification version this capability's hardware

- interface complies with.

- Certified Wireless USB devices are not authorized

- initially and should be (by writing 1) after the

- device has been authenticated.

-What: /sys/bus/usb/device/.../wusb_cdid

-KernelVersion: 2.6.27

-Contact: David Vrabel <david.vrabel@csr.com>

- For Certified Wireless USB devices only.

- A devices's CDID, as 16 space-separated hex octets.

-What: /sys/bus/usb/device/.../wusb_ck

-KernelVersion: 2.6.27

-Contact: David Vrabel <david.vrabel@csr.com>

- For Certified Wireless USB devices only.

- Write the device's connection key (CK) to start the

- authentication of the device. The CK is 16

- space-separated hex octets.

-What: /sys/bus/usb/device/.../wusb_disconnect

-KernelVersion: 2.6.27

-Contact: David Vrabel <david.vrabel@csr.com>

- For Certified Wireless USB devices only.

- Write a 1 to force the device to disconnect

- (equivalent to unplugging a wired USB device).

- Decimal value of the size of the MMIO space that may be mmaped

diff --git a/Documentation/ABI/testing/sysfs-class-firmware-attributes b/Documentation/ABI/testing/sysfs-class-firmware-attributes
index 1b3ecae80b3d..f205d39409a3 100644
--- a/Documentation/ABI/testing/sysfs-class-firmware-attributes
+++ b/Documentation/ABI/testing/sysfs-class-firmware-attributes

- On Dell and Lenovo systems, if Admin password is set, then all BIOS attributes

- attribute changes applied

- to the read-only variant of thie MTD device (in

- Posssible values are:

- network device transmit queue. Possible vaules depend on the

- through EC's private PID. Swiching to a different mode will

- all data is read by usersapce.

- shouldbe a short, lowercase string, not containing spaces nor

-What: /sys/class/uwb_rc

-KernelVersion: 2.6.27

-Contact: linux-usb@vger.kernel.org

- Interfaces for WiMedia Ultra Wideband Common Radio

- Platform (UWB) radio controllers.

- Familiarity with the ECMA-368 'High Rate Ultra

- Wideband MAC and PHY Specification' is assumed.

-What: /sys/class/uwb_rc/beacon_timeout_ms

-KernelVersion: 2.6.27

- If no beacons are received from a device for at least

- this time, the device will be considered to have gone

- and it will be removed. The default is 3 superframes

- (~197 ms) as required by the specification.

-What: /sys/class/uwb_rc/uwb<N>/

-KernelVersion: 2.6.27

-Contact: linux-usb@vger.kernel.org

- An individual UWB radio controller.

-What: /sys/class/uwb_rc/uwb<N>/beacon

-KernelVersion: 2.6.27

-Contact: linux-usb@vger.kernel.org

- to force a specific channel to be used when beaconing,

- or, if <channel> is -1, to prohibit beaconing. If

- <channel> is 0, then the default channel selection

- algorithm will be used. Valid channels depends on the

- radio controller's supported band groups.

- Reading returns the currently active channel, or -1 if

- the radio controller is not beaconing.

-What: /sys/class/uwb_rc/uwb<N>/ASIE

-KernelVersion: 3.18

-Contact: linux-usb@vger.kernel.org

- The application-specific information element (ASIE)

- included in this device's beacon, in space separated

- Reading returns the current ASIE. Writing replaces

- the current ASIE with the one written.

-What: /sys/class/uwb_rc/uwb<N>/scan

-KernelVersion: 2.6.27

-Contact: linux-usb@vger.kernel.org

- <channel> <type> [<bpst offset>]

- to start (or stop) scanning on a channel. <type> is one of:

- == =======================================

- 2 scan while inactive

- 3 scanning disabled

- 4 scan (with start time of <bpst offset>)

- == =======================================

-What: /sys/class/uwb_rc/uwb<N>/mac_address

-KernelVersion: 2.6.27

-Contact: linux-usb@vger.kernel.org

- The EUI-48, in colon-separated hex octets, for this

- radio controller. A write will change the radio

- controller's EUI-48 but only do so while the device is

- not beaconing or scanning.

-What: /sys/class/uwb_rc/uwb<N>/wusbhc

-KernelVersion: 2.6.27

-Contact: linux-usb@vger.kernel.org

- A symlink to the device (if any) of the WUSB Host

- Controller PAL using this radio controller.

-What: /sys/class/uwb_rc/uwb<N>/<EUI-48>/

-KernelVersion: 2.6.27

-Contact: linux-usb@vger.kernel.org

- A neighbour UWB device that has either been detected

- as part of a scan or is a member of the radio

- controllers beacon group.

-What: /sys/class/uwb_rc/uwb<N>/<EUI-48>/BPST

-KernelVersion: 2.6.27

-Contact: linux-usb@vger.kernel.org

- The time (using the radio controllers internal 1 ms

- interval superframe timer) of the last beacon from

- this device was received.

-What: /sys/class/uwb_rc/uwb<N>/<EUI-48>/DevAddr

-KernelVersion: 2.6.27

-Contact: linux-usb@vger.kernel.org

- The current DevAddr of this device in colon separated

-What: /sys/class/uwb_rc/uwb<N>/<EUI-48>/EUI_48

-KernelVersion: 2.6.27

-Contact: linux-usb@vger.kernel.org

- The EUI-48 of this device in colon separated hex

-What: /sys/class/uwb_rc/uwb<N>/<EUI-48>/IEs

-KernelVersion: 2.6.27

-Contact: linux-usb@vger.kernel.org

- The latest IEs included in this device's beacon, in

- space separated hex octets with one IE per line.

-What: /sys/class/uwb_rc/uwb<N>/<EUI-48>/LQE

-KernelVersion: 2.6.27

-Contact: linux-usb@vger.kernel.org

- Link Quality Estimate - the Signal to Noise Ratio

- (SNR) of all packets received from this device in dB.

- This gives an estimate on a suitable PHY rate. Refer

- to [ECMA-368] section 13.3 for more details.

-What: /sys/class/uwb_rc/uwb<N>/<EUI-48>/RSSI

-KernelVersion: 2.6.27

-Contact: linux-usb@vger.kernel.org

- Received Signal Strength Indication - the strength of

- the received signal in dB. LQE is a more useful

- measure of the radio link quality.

-What: /sys/class/uwb_rc/uwb<N>/wusbhc/wusb_chid

-KernelVersion: 2.6.27

-Contact: David Vrabel <david.vrabel@csr.com>

- Write the CHID (16 space-separated hex octets) for this host controller.

- This starts the host controller, allowing it to accept connection from

- Set an all zero CHID to stop the host controller.

-What: /sys/class/uwb_rc/uwb<N>/wusbhc/wusb_trust_timeout

-KernelVersion: 2.6.27

-Contact: David Vrabel <david.vrabel@csr.com>

- Devices that haven't sent a WUSB packet to the host

- within 'wusb_trust_timeout' ms are considered to have

- disconnected and are removed. The default value of

- 4000 ms is the value required by the WUSB

- Since this relates to security (specifically, the

- lifetime of PTKs and GTKs) it should not be changed

-What: /sys/class/uwb_rc/uwb<N>/wusbhc/wusb_phy_rate

-KernelVersion: 2.6.32

-Contact: David Vrabel <david.vrabel@csr.com>

- The maximum PHY rate to use for all connected devices.

- This is only of limited use for testing and

- development as the hardware's automatic rate

- adaptation is better then this simple control.

- Refer to [ECMA-368] section 10.3.1.1 for the value to

-What: /sys/class/uwb_rc/uwb<N>/wusbhc/wusb_dnts

-KernelVersion: 3.11

-Contact: Thomas Pugliese <thomas.pugliese@gmail.com>

- The device notification time slot (DNTS) count and inverval in

- milliseconds that the WUSB host should use. This controls how

- often the devices will have the opportunity to send

- notifications to the host.

-What: /sys/class/uwb_rc/uwb<N>/wusbhc/wusb_retry_count

-KernelVersion: 3.11

-Contact: Thomas Pugliese <thomas.pugliese@gmail.com>

- The number of retries that the WUSB host should attempt

- before reporting an error for a bus transaction. The range of

- valid values is [0..15], where 0 indicates infinite retries.

- type's .online() is exeucted successfully.

diff --git a/Documentation/ABI/testing/sysfs-driver-chromeos-acpi b/Documentation/ABI/testing/sysfs-driver-chromeos-acpi
index c308926e1568..d46b1c85840d 100644
--- a/Documentation/ABI/testing/sysfs-driver-chromeos-acpi
+++ b/Documentation/ABI/testing/sysfs-driver-chromeos-acpi

- has either been flashed successfully or an error occured.

- data programmed at the factory. The data is layed out in 32bit

-What: /sys/bus/platform/drivers/ufshcd/*/device_descriptor/hpb_version

-What: /sys/bus/platform/devices/*.ufs/device_descriptor/hpb_version

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: This entry shows the HPB specification version.

- The full information about the descriptor can be found in the UFS

- HPB (Host Performance Booster) Extension specifications.

- Example: version 1.2.3 = 0123h

- The file is read only.

-What: /sys/bus/platform/drivers/ufshcd/*/device_descriptor/hpb_control

-What: /sys/bus/platform/devices/*.ufs/device_descriptor/hpb_control

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: This entry shows an indication of the HPB control mode.

- 00h: Host control mode

- 01h: Device control mode

- The file is read only.

-What: /sys/bus/platform/drivers/ufshcd/*/geometry_descriptor/hpb_region_size

-What: /sys/bus/platform/devices/*.ufs/geometry_descriptor/hpb_region_size

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: This entry shows the bHPBRegionSize which can be calculated

- as in the following (in bytes):

- HPB Region size = 512B * 2^bHPBRegionSize

- The file is read only.

-What: /sys/bus/platform/drivers/ufshcd/*/geometry_descriptor/hpb_number_lu

-What: /sys/bus/platform/devices/*.ufs/geometry_descriptor/hpb_number_lu

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: This entry shows the maximum number of HPB LU supported by

- 00h: HPB is not supported by the device.

- 01h ~ 20h: Maximum number of HPB LU supported by the device

- The file is read only.

-What: /sys/bus/platform/drivers/ufshcd/*/geometry_descriptor/hpb_subregion_size

-What: /sys/bus/platform/devices/*.ufs/geometry_descriptor/hpb_subregion_size

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: This entry shows the bHPBSubRegionSize, which can be

- calculated as in the following (in bytes) and shall be a multiple of

- logical block size:

- HPB Sub-Region size = 512B x 2^bHPBSubRegionSize

- bHPBSubRegionSize shall not exceed bHPBRegionSize.

- The file is read only.

-What: /sys/bus/platform/drivers/ufshcd/*/geometry_descriptor/hpb_max_active_regions

-What: /sys/bus/platform/devices/*.ufs/geometry_descriptor/hpb_max_active_regions

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: This entry shows the maximum number of active HPB regions that

- is supported by the device.

- The file is read only.

-What: /sys/class/scsi_device/*/device/unit_descriptor/hpb_lu_max_active_regions

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: This entry shows the maximum number of HPB regions assigned to

- the HPB logical unit.

- The file is read only.

-What: /sys/class/scsi_device/*/device/unit_descriptor/hpb_pinned_region_start_offset

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: This entry shows the start offset of HPB pinned region.

- The file is read only.

-What: /sys/class/scsi_device/*/device/unit_descriptor/hpb_number_pinned_regions

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: This entry shows the number of HPB pinned regions assigned to

- the HPB logical unit.

- The file is read only.

-What: /sys/class/scsi_device/*/device/hpb_stats/hit_cnt

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: This entry shows the number of reads that changed to HPB read.

- The file is read only.

-What: /sys/class/scsi_device/*/device/hpb_stats/miss_cnt

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: This entry shows the number of reads that cannot be changed to

- The file is read only.

-What: /sys/class/scsi_device/*/device/hpb_stats/rcmd_noti_cnt

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: This entry shows the number of response UPIUs that has

- recommendations for activating sub-regions and/or inactivating region.

- The file is read only.

-What: /sys/class/scsi_device/*/device/hpb_stats/rcmd_active_cnt

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: For the HPB device control mode, this entry shows the number of

- active sub-regions recommended by response UPIUs. For the HPB host control

- mode, this entry shows the number of active sub-regions recommended by the

- HPB host control mode heuristic algorithm.

- The file is read only.

-What: /sys/class/scsi_device/*/device/hpb_stats/rcmd_inactive_cnt

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: For the HPB device control mode, this entry shows the number of

- inactive regions recommended by response UPIUs. For the HPB host control

- mode, this entry shows the number of inactive regions recommended by the

- HPB host control mode heuristic algorithm.

- The file is read only.

-What: /sys/class/scsi_device/*/device/hpb_stats/map_req_cnt

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: This entry shows the number of read buffer commands for

- activating sub-regions recommended by response UPIUs.

- The file is read only.

-What: /sys/class/scsi_device/*/device/hpb_params/requeue_timeout_ms

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: This entry shows the requeue timeout threshold for write buffer

- command in ms. The value can be changed by writing an integer to

-What: /sys/bus/platform/drivers/ufshcd/*/attributes/max_data_size_hpb_single_cmd

-What: /sys/bus/platform/devices/*.ufs/attributes/max_data_size_hpb_single_cmd

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: This entry shows the maximum HPB data size for using a single HPB

- The file is read only.

-What: /sys/bus/platform/drivers/ufshcd/*/flags/hpb_enable

-What: /sys/bus/platform/devices/*.ufs/flags/hpb_enable

-Contact: Daejun Park <daejun7.park@samsung.com>

-Description: This entry shows the status of HPB.

- == ============================

- 0 HPB is not enabled.

- == ============================

- The file is read only.

-What: /sys/class/scsi_device/*/device/hpb_param_sysfs/activation_thld

-Date: February 2021

-Contact: Avri Altman <avri.altman@wdc.com>

-Description: In host control mode, reads are the major source of activation

- trials. Once this threshold hs met, the region is added to the

- "to-be-activated" list. Since we reset the read counter upon

- write, this include sending a rb command updating the region

-What: /sys/class/scsi_device/*/device/hpb_param_sysfs/normalization_factor

-Date: February 2021

-Contact: Avri Altman <avri.altman@wdc.com>

-Description: In host control mode, we think of the regions as "buckets".

- Those buckets are being filled with reads, and emptied on write.

- We use entries_per_srgn - the amount of blocks in a subregion as

- our bucket size. This applies because HPB1.0 only handles

- single-block reads. Once the bucket size is crossed, we trigger

- a normalization work - not only to avoid overflow, but mainly

- because we want to keep those counters normalized, as we are

- using those reads as a comparative score, to make various decisions.

- The normalization is dividing (shift right) the read counter by

- the normalization_factor. If during consecutive normalizations

- an active region has exhausted its reads - inactivate it.

-What: /sys/class/scsi_device/*/device/hpb_param_sysfs/eviction_thld_enter

-Date: February 2021

-Contact: Avri Altman <avri.altman@wdc.com>

-Description: Region deactivation is often due to the fact that eviction took

- place: A region becomes active at the expense of another. This is

- happening when the max-active-regions limit has been crossed.

- In host mode, eviction is considered an extreme measure. We

- want to verify that the entering region has enough reads, and

- the exiting region has much fewer reads. eviction_thld_enter is

- the min reads that a region must have in order to be considered

- a candidate for evicting another region.

-What: /sys/class/scsi_device/*/device/hpb_param_sysfs/eviction_thld_exit

-Date: February 2021

-Contact: Avri Altman <avri.altman@wdc.com>

-Description: Same as above for the exiting region. A region is considered to

- be a candidate for eviction only if it has fewer reads than

- eviction_thld_exit.

-What: /sys/class/scsi_device/*/device/hpb_param_sysfs/read_timeout_ms

-Date: February 2021

-Contact: Avri Altman <avri.altman@wdc.com>

-Description: In order not to hang on to "cold" regions, we inactivate

- a region that has no READ access for a predefined amount of

- time - read_timeout_ms. If read_timeout_ms has expired, and the

- region is dirty, it is less likely that we can make any use of

- HPB reading it so we inactivate it. Still, deactivation has

- its overhead, and we may still benefit from HPB reading this

- region if it is clean - see read_timeout_expiries.

-What: /sys/class/scsi_device/*/device/hpb_param_sysfs/read_timeout_expiries

-Date: February 2021

-Contact: Avri Altman <avri.altman@wdc.com>

-Description: If the region read timeout has expired, but the region is clean,

- just re-wind its timer for another spin. Do that as long as it

- is clean and did not exhaust its read_timeout_expiries threshold.

-What: /sys/class/scsi_device/*/device/hpb_param_sysfs/timeout_polling_interval_ms

-Date: February 2021

-Contact: Avri Altman <avri.altman@wdc.com>

-Description: The frequency with which the delayed worker that checks the

- read_timeouts is awakened.

-What: /sys/class/scsi_device/*/device/hpb_param_sysfs/inflight_map_req

-Date: February 2021

-Contact: Avri Altman <avri.altman@wdc.com>

-Description: In host control mode the host is the originator of map requests.

- To avoid flooding the device with map requests, use a simple throttling

- mechanism that limits the number of inflight map requests.

- effectively disables hotplug for the correspoinding

- oridinal value of the hub on the other end of the fabric

- oridinal value of the port on the other end of the fabric cable

- 0x04 UTIL if FS utilization is over threashold

- blocks less than 2MB. The candidates to be discarded are cached until

- checkpoint is triggered, and issued during the checkpoint.

- By default, it is disabled with 0.

- faster, at the cost of higher latency for incomming I/O.

-Date: Feburary 2018

- of this kdamond. Writing 'clear_schemes_tried_regions' to the

- file removes contents of the 'tried_regions' directory.

-Description: Writing to and reading from this file sets and gets the mimimum

- the memory of the interest. 'anon' for anonymous pages, or

- 'memcg' for specific memory cgroup can be written and read.

- The offlining is done in kernel specific granuality.

diff --git a/Documentation/ABI/testing/sysfs-platform-dell-laptop b/Documentation/ABI/testing/sysfs-platform-dell-laptop
index 82bcfe9df66e..701529653283 100644
--- a/Documentation/ABI/testing/sysfs-platform-dell-laptop
+++ b/Documentation/ABI/testing/sysfs-platform-dell-laptop

- This file allows to specifiy the on/off threshold value,

- fials with -EINVAL if input parsing fails or input error code

- dameon and opens the device when install is requested.

diff --git a/Documentation/ABI/testing/sysfs-platform-mellanox-bootctl b/Documentation/ABI/testing/sysfs-platform-mellanox-bootctl
index 4c5c02d8f870..65ed3865da62 100644
--- a/Documentation/ABI/testing/sysfs-platform-mellanox-bootctl
+++ b/Documentation/ABI/testing/sysfs-platform-mellanox-bootctl

- plaforms (BYT/CHT/Merrifield/BSW).

-What: /sys/bus/usb/drivers/wusb_cbaf/.../wusb_*

-KernelVersion: 2.6.27

-Contact: David Vrabel <david.vrabel@csr.com>

- Various files for managing Cable Based Association of

- (wireless) USB devices.

- The sequence of operations should be:

- 1. Device is plugged in.

- 2. The connection manager (CM) sees a device with CBA capability.

- (the wusb_chid etc. files in /sys/devices/blah/OURDEVICE).

- 3. The CM writes the host name, supported band groups,

- and the CHID (host ID) into the wusb_host_name,

- wusb_host_band_groups and wusb_chid files. These

- get sent to the device and the CDID (if any) for

- this host is requested.

- 4. The CM can verify that the device's supported band

- groups (wusb_device_band_groups) are compatible

- 5. The CM reads the wusb_cdid file.

- 6. The CM looks it up its database.

- - If it has a matching CHID,CDID entry, the device

- has been authorized before and nothing further

- - If the CDID is zero (or the CM doesn't find a

- matching CDID in its database), the device is

- assumed to be not known. The CM may associate

- the host with device by: writing a randomly

- generated CDID to wusb_cdid and then a random CK

- to wusb_ck (this uploads the new CC to the

- CMD may choose to prompt the user before

- associating with a new device.

- 7. Device is unplugged.

- Association Models Supplement to the

- Certified Wireless Universal Serial Bus

- Specification, version 1.0.

-What: /sys/bus/usb/drivers/wusb_cbaf/.../wusb_chid

-KernelVersion: 2.6.27

-Contact: David Vrabel <david.vrabel@csr.com>

- The CHID of the host formatted as 16 space-separated

- Writes fetches device's supported band groups and the

- the CDID for any existing association with this host.

-What: /sys/bus/usb/drivers/wusb_cbaf/.../wusb_host_name

-KernelVersion: 2.6.27

-Contact: David Vrabel <david.vrabel@csr.com>

- A friendly name for the host as a UTF-8 encoded string.

-What: /sys/bus/usb/drivers/wusb_cbaf/.../wusb_host_band_groups

-KernelVersion: 2.6.27

-Contact: David Vrabel <david.vrabel@csr.com>

- The band groups supported by the host, in the format

- defined in [WUSB-AM].

-What: /sys/bus/usb/drivers/wusb_cbaf/.../wusb_device_band_groups

-KernelVersion: 2.6.27

-Contact: David Vrabel <david.vrabel@csr.com>

- The band groups supported by the device, in the format

- defined in [WUSB-AM].

-What: /sys/bus/usb/drivers/wusb_cbaf/.../wusb_cdid

-KernelVersion: 2.6.27

-Contact: David Vrabel <david.vrabel@csr.com>

- The device's CDID formatted as 16 space-separated hex

-What: /sys/bus/usb/drivers/wusb_cbaf/.../wusb_ck

-KernelVersion: 2.6.27

-Contact: David Vrabel <david.vrabel@csr.com>

- Write 16 space-separated random, hex octets to

- associate with the device.

-corruption; for example, to halt system memory corruption due to DMA's

- attempts I/O at this point, or not. I/O's will fail, returning

- EEH_MAX_FAILS I/O's are attempted to a frozen adapter, EEH

- Proposal: All I/O's should be done _synchronously_ from within

-restoring the PCI BAR's and PCI configuration header to a state

-PCI error events are caused by software bugs, e.g. DMA's to

-capability structure except the PCI Express capability structure, in

-which Root Control register and Device Control register are shared

-between PME and AER. This patch assumes that all service drivers

-will be well behaved and not overwrite other service driver's

-configuration settings.

-The usual cause of a lockdep-RCU slat is someone accessing an

- if (!try_get_ref(obj)) // might fail for free objects

- ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1; });

- if (obj->key == key)

-We need to make sure a reader cannot read the new 'obj->obj_next' value

-With hlist_nulls we can avoid extra smp_rmb() in lockless_lookup()

-and extra _release() in insert function.

- hlist_nulls_for_each_entry_rcu(obj, node, head, member) {

-In a system with a CONFIG_CGROUP=y kernel and the cgroup2 filesystem

-Under below explanation, we assume CONFIG_MEM_RES_CTRL_SWAP=y.

- memory.kmem.limit_in_bytes This knob is deprecated and writing to

- it will return -ENOTSUPP.

-inserted into inode (radix-tree). While it's mapped into the page tables of

-unaccounted when it's removed from radix-tree. Even if RSS pages are fully

-notification only if there are no event listers for group C.

- and the following three when the controller is enabled:

- 49 = /dev/ttyCPM5 PPC CPM (SCC or SMC) - port 3

- 50 = /dev/ttyIOC0 Altix serial card

- 81 = /dev/ttyIOC31 Altix serial card

- 84 = /dev/ttyIOC84 Altix ioc4 serial card

- 115 = /dev/ttyIOC115 Altix ioc4 serial card

- 116 = /dev/ttySIOC0 Altix ioc3 serial card

- 147 = /dev/ttySIOC31 Altix ioc3 serial card

- 49 = /dev/cucpm5 Callout device for ttyCPM5

- 50 = /dev/cuioc40 Callout device for ttyIOC40

- 81 = /dev/cuioc431 Callout device for ttyIOC431

-Note the regexp ``^[-+=][flmpt_]+$`` matches a flags specification.

-To clear all flags at once, use ``=_`` or ``-flmpt``.

--------------------------------------------------------------------------------------------------

-------------------------------------------------------------------------------

-The HUGETLB_PAGE_DTOR flag denotes hugetlbfs pages. Makedumpfile

-excludes these pages.

-all users of bitmap_parse().

-The parameters listed below are only valid if certain kernel build options were

-enabled and if respective hardware is present. The text in square brackets at

-the beginning of each description states the restrictions within which a

-parameter is applicable::

- LP Printer support is enabled.

- NUMA NUMA support is enabled.

- PV_OPS A paravirtualized kernel is enabled.

- RISCV RISCV architecture is enabled.

- SWSUSP Software suspend (hibernation) is enabled.

- VMMIO Driver for memory mapped virtio devices is enabled.

- BOOT Is a boot loader parameter.

- arm64.nopauth [ARM64] Unconditionally disable Pointer Authentication

- arm64.nosve [ARM64] Unconditionally disable Scalable Vector

- arm64.nomops [ARM64] Unconditionally disable Memory Copy and Memory

- Set instructions support

- See Documentation/s390/common_io.rst for details.

- [KNL, X86-64, ARM64] Select a region under 4G first, and

- [KNL, X86-64, ARM64] range could be above 4G. Allow kernel

- to allocate physical memory region from top, so could

- be above 4G if system have more than 4G ram installed.

- Otherwise memory region will be allocated below 4G, if

- [KNL, X86-64, ARM64] range under 4G. When crashkernel=X,high

- (TPR shadow). Default is 1 (enabled). Disalbe by KVM if

- memhp_default_state=online/offline

- nohlt [ARM,ARM64,MICROBLAZE,MIPS,SH] Forces the kernel to

- nosmt [KNL,MIPS,S390] Disable symmetric multithreading (SMT).

- [KNL,X86] Disable symmetric multithreading (SMT).

- panic_print= Bitmask for printing system info when panic happens.

- User can chose combination of the following bits:

- bit 0: print all tasks info

- bit 1: print system memory info

- bit 2: print timer info

- bit 3: print locks info if CONFIG_LOCKDEP is on

- bit 4: print ftrace buffer

- bit 5: print all printk messages in buffer

- bit 6: print all CPUs backtrace (if available in the arch)

- *Be aware* that this option may print a _lot_ of lines,

- so there are risks of losing older messages in the log.

- Use this option carefully, maybe worth to setup a

- bigger log buffer with "log_buf_len" along with this.

- rcuscale.perf_type= [KNL]

- thermal.nocrt= [HW,ACPI]

- Set to disable actions on ACPI thermal zone

- critical and hot trip points.

- (default -1 = authorized except for wireless USB,

- workqueue.disable_numa

- By default, all work items queued to unbound

- workqueues are affine to the NUMA nodes they're

- issued on, which results in better behavior in

- general. If NUMA affinity needs to be disabled for

- whatever reason, this option can be used. Note

- that this also can be controlled per-workqueue for

- workqueues visible under /sys/bus/workqueue/.

-driver for Android as found in Code Aurora [#f1]_ [#f2]_.

-.. [#f1] https://source.codeaurora.org/quic/la/kernel/msm-3.10/

-.. [#f2] https://source.codeaurora.org/quic/la/kernel/msm-3.18/

- │ │ │ │ │ │ │ tried_regions/

-privileged user space programs' control of DAMON. User space tools or deamons

-stats, please refer to :ref:`stats section <sysfs_schemes_stats>`. Writing

-``update_schemes_tried_regions`` to ``state`` file updates the DAMON-based

-operation scheme action tried regions directory for each DAMON-based operation

-scheme of the kdamond. Writing ``clear_schemes_tried_regions`` to ``state``

-file clears the DAMON-based operating scheme action tried regions directory for

-each DAMON-based operation scheme of the kdamond. For details of the

-DAMON-based operation scheme action tried regions directory, please refer to

-:ref:`tried_regions section <sysfs_schemes_tried_regions>`.

-Each filter directory contains three files, namely ``type``, ``matcing``, and

-``memcg_path``. You can write one of two special keywords, ``anon`` for

-anonymous pages, or ``memcg`` for specific memory cgroup filtering. In case of

-the memory cgroup filtering, you can specify the memory cgroup of the interest

-by writing the path of the memory cgroup from the cgroups mount point to

-``memcg_path`` file. You can write ``Y`` or ``N`` to ``matching`` file to

-filter out pages that does or does not match to the type, respectively. Then,

-the scheme's action will not be applied to the pages that specified to be

-Note that filters are currently supported only when ``paddr``

-`implementation <sysfs_contexts>` is being used.

-should ask DAMON sysfs interface to updte the content of the files for the

-relevant ``kdamonds/<N>/state`` file, DAMON creates directories named integer

-starting from ``0`` under this directory. Each directory contains files

-exposing detailed information about each of the memory region that the

-corresponding scheme's ``action`` has tried to be applied under this directory,

-during next :ref:`aggregation interval <sysfs_monitoring_attrs>`. The

-information includes address range, ``nr_accesses``, and ``age`` of the region.

- general_profit =~ pages_sharing * sizeof(page) - (all_rmap_items) *

- where all_rmap_items can be easily obtained by summing ``pages_sharing``,

- ``pages_shared``, ``pages_unshared`` and ``pages_volatile``.

- process_profit =~ ksm_merging_pages * sizeof(page) -

- where ksm_merging_pages is shown under the directory ``/proc/<pid>/``,

- and ksm_rmap_items is shown in ``/proc/<pid>/ksm_stat``. The process profit

- is also shown in ``/proc/<pid>/ksm_stat`` as ksm_process_profit.

-terminated by sending a fatal signal. A timeout based offlining can easily be

-Zswap receives pages for compression through the Frontswap API and is able to

-When a swap page is passed from frontswap to zswap, zswap maintains a mapping

-During a page fault on a PTE that is a swap entry, frontswap calls the zswap

-load function to decompress the page into the page allocated by the page fault

-in the swap_map goes to 0) the swap code calls the zswap invalidate function,

-via frontswap, to free the compressed entry.

-Any module that has an unparseable signature will be rejected.

-lines have the same result:

-perf_user_access (arm64 only)

-=================================

-Controls user space access for reading perf event counters. When set to 1,

-user space can read performance monitor counter registers directly.

- after an underlying RAID device has had it's geometry

- I've just got 240K/s off it (a dd with bs=128k); thats about half of what

- macros. This is the preffered method due to speed but it

- problamatic if using video cards and other memory-heavy devices.

-Q: Why is the main 24MHz oscillator gatable? Wouldn't that break the

-ARMv6 architecture deprecates use of the SWP/SWPB instructions, and recommeds

- and provice tcm_alloc() and tcm_free() for this

-Name Size Description

- one transaction then multiple transations are still required. The

- This table describes the properties of PMU support implmented by

--- it's baseline. ACPI firmware must continue to work, even though it may

-| ARM | Cortex-A510 | #2051678 | ARM64_ERRATUM_2051678 |

-+----------------+-----------------+-----------------+-----------------------------+

-| ARM | Cortex-A510 | #2077057 | ARM64_ERRATUM_2077057 |

-+----------------+-----------------+-----------------+-----------------------------+

-| ARM | Cortex-A510 | #2441009 | ARM64_ERRATUM_2441009 |

-+----------------+-----------------+-----------------+-----------------------------+

-| ARM | Cortex-A510 | #2658417 | ARM64_ERRATUM_2658417 |

-+----------------+-----------------+-----------------+-----------------------------+

- SME_PT_ZA_*() macros are provided to facilitate access to the data.

- ../loongarch/index

- alot of bugfixes all over.

- lots of bugfixes and enhancments.

- distributed in this same directory, Documentation/s390, as

- cd Documentation/s390

- described in Documentation/s390/driver-model.rst.

- documentation on the S/390 debug feature (Documentation/s390/s390dbf.rst)

- Documentation/s390/s390dbf.rst.

-configured via it's APCB by:

-4. Documentation/s390/cds.rst

-Sample Boot Configuartion

- efi_main(void *handle, efi_system_table_t *table, struct boot_params *bp)

-Alignment Check (#AC) exception when a split lock operation is attemped.

-100% certainty, but the complexity involved makes it extremly unlikely.

-As a result, when this happpens, user should stop running any new

-use the memory controllers RCW, thought non-MX controlers likely

- Complete bio with error if prepare failed for some reson.

-the driver. A fixed mmaped area (array) on ``/dev/ublkc*`` is provided for

-Q: Why there is no BPF_SDIV for signed divide operation?

-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

-A: Because it would be rarely used. llvm errors in such case and

-prints a suggestion to use unsigned divide instead.

-Q: In some cases clang flag ``-target bpf`` is used but in other cases the

-independent, ``-target <arch>`` still has some impact on generated code:

-- For clang ``-target bpf``, it is guaranteed that pointer or long /

- Otherwise, ``clang -target bpf`` is generally recommended.

- BPF_PROG_TYPE_SK_MSG require ``-target bpf``

-The .BTF.ext section encodes func_info and line_info which needs loader

-manipulation before loading into the kernel.

-contains func_info and line_info section. See :ref:`BPF_Prog_Load` for details

-about func_info and line_info record format.

- func_info_rec_size

- line_info_rec_size

- -bash-4.4$ clang -c -g -O2 -target bpf t2.c

- -bash-4.4$ clang -S -g -O2 -target bpf t2.c

-replicate those exmaples here. Note, however, that all of the aforementioned

-with the map API (HASH, ARRAY), others less so. Consequentially, programs

-As mentioned in the `ISA standard documentation <instruction-set.rst#legacy-bpf-packet-access-instructions>`_,

-Compiled with ``clang -target bpf -O2 -c test.c``, the following is

-Compiled with ``clang -target bpf -O2 -c test.c``, we will have

-Compiled with ``clang -target bpf -O2 -g -c test.c``, we will see a

-========================================

-eBPF Instruction Set Specification, v1.0

-========================================

-This document specifies version 1.0 of the eBPF instruction set.

-For brevity, this document uses the type notion "u64", "u32", etc.

-to mean an unsigned integer whose width is the specified number of bits,

-and "s32", etc. to mean a signed integer of the specified number of bits.

-Registers and calling convention

-================================

-eBPF has 10 general purpose registers and a read-only frame pointer register,

-all of which are 64-bits wide.

-The eBPF calling convention is defined as:

-* R0: return value from function calls, and exit value for eBPF programs

-* R1 - R5: arguments for function calls

-* R6 - R9: callee saved registers that function calls will preserve

-* R10: read-only frame pointer to access stack

-R0 - R5 are scratch registers and eBPF programs needs to spill/fill them if

-necessary across calls.

-eBPF has two instruction encodings:

-======== ===== ==========================================================

-code value description

-======== ===== ==========================================================

-BPF_ADD 0x00 dst += src

-BPF_SUB 0x10 dst -= src

-BPF_MUL 0x20 dst \*= src

-BPF_DIV 0x30 dst = (src != 0) ? (dst / src) : 0

-BPF_OR 0x40 dst \|= src

-BPF_AND 0x50 dst &= src

-BPF_LSH 0x60 dst <<= (src & mask)

-BPF_RSH 0x70 dst >>= (src & mask)

-BPF_NEG 0x80 dst = ~src

-BPF_MOD 0x90 dst = (src != 0) ? (dst % src) : dst

-BPF_XOR 0xa0 dst ^= src

-BPF_MOV 0xb0 dst = src

-BPF_ARSH 0xc0 sign extending dst >>= (src & mask)

-BPF_END 0xd0 byte swap operations (see `Byte swap instructions`_ below)

-======== ===== ==========================================================

-the 64-bit or 32-bit value will wrap. If eBPF program execution would

-Also note that the division and modulo operations are unsigned. Thus, for

-``BPF_ALU``, 'imm' is first interpreted as an unsigned 32-bit value, whereas

-for ``BPF_ALU64``, 'imm' is first sign extended to 64 bits and the result

-interpreted as an unsigned 64-bit value. There are no instructions for

-signed division or modulo.

-~~~~~~~~~~~~~~~~~~~~~~

-The byte swap instructions use an instruction class of ``BPF_ALU`` and a 4-bit

-'code' field of ``BPF_END``.

-The 1-bit source operand field in the opcode is used to select what byte

-order the operation convert from or to:

-========= ===== =================================================

-source value description

-========= ===== =================================================

-BPF_TO_LE 0x00 convert between host byte order and little endian

-BPF_TO_BE 0x08 convert between host byte order and big endian

-========= ===== =================================================

-``BPF_ALU | BPF_TO_LE | BPF_END`` with imm = 16 means::

-``BPF_ALU | BPF_TO_BE | BPF_END`` with imm = 64 means::

-BPF_JA 0x0 0x0 PC += offset BPF_JMP only

-BPF_CALL 0x8 0x1 call PC += offset see `Program-local functions`_

-The eBPF program needs to store the return value into register R0 before doing a

-``BPF_JA``. A ``BPF_EXIT`` within the program-local function will return to

- dst = *(size *) (src + offset)

-Where size is one of: ``BPF_B``, ``BPF_H``, ``BPF_W``, or ``BPF_DW``.

-by other eBPF programs or means outside of this specification.

-All atomic operations supported by eBPF are encoded as store operations

-Maps are shared memory regions accessible by eBPF programs on some platforms.

-eBPF previously introduced special instructions for access to packet data that were

-5) ``void update_mmu_cache(struct vm_area_struct *vma,

- unsigned long address, pte_t *ptep)``

- At the end of every page fault, this routine is invoked to

- tell the architecture specific code that a translation

- now exists at virtual address "address" for address space

- "vma->vm_mm", in the software page tables.

- ``void flush_dcache_page(struct page *page)``

- that {get,pin}_user_pages{_fast} already call flush_dcache_page

- page at the page->virtual mapping of that page. It is important to

- There is a bit set aside in page->flags (PG_arch_1) as "architecture

- This allows these interfaces to be implemented much more efficiently.

- It allows one to "defer" (perhaps indefinitely) the actual flush if

- there are currently no user processes mapping this page. See sparc64's

- flush_dcache_page and update_mmu_cache implementations for an example

- of how to go about doing this.

- The idea is, first at flush_dcache_page() time, if page_file_mapping()

- returns a mapping, and mapping_mapped on that mapping returns %false,

- just mark the architecture private page flag bit. Later, in

- update_mmu_cache(), a check is made of this flag bit, and if set the

- flush is done and the flag bit is cleared.

- ``void flush_dcache_folio(struct folio *folio)``

- This function is called under the same circumstances as

- flush_dcache_page(). It allows the architecture to

- optimise for flushing the entire folio of pages instead

- of flushing one page at a time.

- get_user_pages()). Note: flush_dcache_page() deliberately

- flush_dcache_page and update_mmu_cache. In the future, the hope

-constants for dynamically allocated states - CPUHP_PREPARE_DYN,

-CPUHP_ONLINE_DYN - depending on the state section (PREPARE, ONLINE) for

- state = cpuhp_setup_state(CPUHP_ONLINE_DYN, "subsys:offline", NULL, subsys_cpu_offline);

- state = cpuhp_setup_state_nocalls(CPUHP_ONLINE_DYN, "subsys:online", subsys_cpu_online, NULL);

- state = cpuhp_setup_state_multi(CPUHP_ONLINE_DYN, "subsys:online", subsys_cpu_online, subsys_cpu_offline);

- } while (status & pending);

-Integer power Functions

------------------------

-Defines if the kernel validation policy is per operation (``per-op``)

-or for the entire family (``global``). New families should use ``per-op``

-(default) to be able to narrow down the attributes accepted by a specific

- short int %d or %x

-====================================

-Concurrency Managed Workqueue (cmwq)

-====================================

-``@max_active`` determines the maximum number of execution contexts

-per CPU which can be assigned to the work items of a wq. For example,

-with ``@max_active`` of 16, at most 16 work items of the wq can be

-executing at the same time per CPU.

-Currently, for a bound wq, the maximum limit for ``@max_active`` is

-512 and the default value used when 0 is specified is 256. For an

-unbound wq, the limit is higher of 512 and 4 *

-``num_possible_cpus()``. These values are chosen sufficiently high

-such that they are not the limiting factor while providing protection

- total infl CPUtime CPUhog CMwake mayday rescued

- events_unbound 38306 0 0.1 - - - -

- total infl CPUtime CPUhog CMwake mayday rescued

- events_unbound 38322 0 0.1 - - - -

-Generic KASAN is supported on x86_64, arm, arm64, powerpc, riscv, s390, and

-xtensa, and the tag-based KASAN modes are supported only on arm64.

diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
index d6c84b6e7fe6..6216cfb0a188 100644
--- a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
+++ b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml
index cb78cfa56702..c960c8e0a9a5 100644
--- a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml
+++ b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml
index 5fedaed49a1f..6745b4cc8f1c 100644
--- a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml
+++ b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.yaml b/Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.yaml
index 108460627d9a..f725e6940993 100644
--- a/Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.yaml
+++ b/Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

-$id: "http://devicetree.org/schemas/arm/arm,embedded-trace-extension.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/arm/arm,trace-buffer-extension.yaml b/Documentation/devicetree/bindings/arm/arm,trace-buffer-extension.yaml
index b1322658063a..87128e7b7d28 100644
--- a/Documentation/devicetree/bindings/arm/arm,trace-buffer-extension.yaml
+++ b/Documentation/devicetree/bindings/arm/arm,trace-buffer-extension.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

-$id: "http://devicetree.org/schemas/arm/arm,trace-buffer-extension.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/arm/arm,versatile-sysreg.yaml b/Documentation/devicetree/bindings/arm/arm,versatile-sysreg.yaml
index 491eef1e1b10..3b060c36b90c 100644
--- a/Documentation/devicetree/bindings/arm/arm,versatile-sysreg.yaml
+++ b/Documentation/devicetree/bindings/arm/arm,versatile-sysreg.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml
index cdd65881fcdd..8dd6b6446394 100644
--- a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml
+++ b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml

- $ref: '/schemas/simple-bus.yaml'

diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed,sbc.yaml b/Documentation/devicetree/bindings/arm/aspeed/aspeed,sbc.yaml
index c72aab706484..b8c5cacb09bd 100644
--- a/Documentation/devicetree/bindings/arm/aspeed/aspeed,sbc.yaml
+++ b/Documentation/devicetree/bindings/arm/aspeed/aspeed,sbc.yaml

-$id: "http://devicetree.org/schemas/arm/aspeed/aspeed,sbc.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml
index e0eff4c05879..68f717670f78 100644
--- a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml
+++ b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml
index 5c3ac97e8728..4cc4e6754681 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml

diff --git a/Documentation/devicetree/bindings/arm/firmware/tlm,trusted-foundations.yaml b/Documentation/devicetree/bindings/arm/firmware/tlm,trusted-foundations.yaml
index 9d1857c0aa07..e3980b659f63 100644
--- a/Documentation/devicetree/bindings/arm/firmware/tlm,trusted-foundations.yaml
+++ b/Documentation/devicetree/bindings/arm/firmware/tlm,trusted-foundations.yaml

-$id: "http://devicetree.org/schemas/arm/firmware/tlm,trusted-foundations.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

- - polyhex,imx8mp-debix # Polyhex Debix boards

- - polyhex,imx8mp-debix-model-a # Polyhex Debix Model A Board

- For the Vybrid SoC familiy all variants with DDR controller are supported,

- places the kernel uses vf610 to refer to the whole familiy.

diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml
index 528dad4cde3c..4fc208d3995e 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml

diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
index 4b4dcf551eb6..2ee0c740eb56 100644
--- a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
+++ b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml

diff --git a/Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml b/Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml
index ff378d5cbd32..4a323e8c785d 100644
--- a/Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml
+++ b/Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml b/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml
index 86b59de7707e..c24ad0968f3e 100644
--- a/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml
+++ b/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt
index d84105c7c935..9d5d70c98058 100644
--- a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt
+++ b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt

- - a set of gatable clocks

- - The second cell identifies the particular core clock or gatable

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mipi0a.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mipi0a.txt
index 8be5978f388d..1c671943ce4d 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mipi0a.txt
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mipi0a.txt

-The available power doamins are defined in dt-bindings/power/mt*-power.h.

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vcodecsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vcodecsys.txt
index c877bcc1a5c5..f090147b7f1e 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vcodecsys.txt
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vcodecsys.txt

-The available power doamins are defined in dt-bindings/power/mt*-power.h.

-Some Qualcomm MSM devices contain a point-to-point serial bus used to

-communicate with a limited range of devices (mostly power management

-These require the following properties:

-- compatible: "qcom,ssbi"

-- qcom,controller-type

- indicates the SSBI bus variant the controller should use to talk

- with the slave device. This should be one of "ssbi", "ssbi2", or

- "pmic-arbiter". The type chosen is determined by the attached

-The slave device should be the single child node of the ssbi device

-with a compatible field.

diff --git a/Documentation/devicetree/bindings/arm/mstar/mstar,l3bridge.yaml b/Documentation/devicetree/bindings/arm/mstar/mstar,l3bridge.yaml
index 6816bd68f9cf..a8ac4a2d672d 100644
--- a/Documentation/devicetree/bindings/arm/mstar/mstar,l3bridge.yaml
+++ b/Documentation/devicetree/bindings/arm/mstar/mstar,l3bridge.yaml

-$id: "http://devicetree.org/schemas/arm/mstar/mstar,l3bridge.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/arm/mstar/mstar,smpctrl.yaml b/Documentation/devicetree/bindings/arm/mstar/mstar,smpctrl.yaml
index 599c65980f5d..5739848000b1 100644
--- a/Documentation/devicetree/bindings/arm/mstar/mstar,smpctrl.yaml
+++ b/Documentation/devicetree/bindings/arm/mstar/mstar,smpctrl.yaml

-$id: "http://devicetree.org/schemas/arm/mstar/mstar,smpctrl.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

-[1] Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt

-- OMAP2 generic - defaults to OMAP2420

- compatible = "ti,omap2"

- compatible = "ti,omap3"

-- OMAP4 generic - defaults to OMAP4430

- compatible = "ti,omap4"

-- OMAP5 generic - defaults to OMAP5430

- compatible = "ti,omap5"

- compatible = "ti,omap2420", "ti,omap2"

- compatible = "ti,omap2430", "ti,omap2"

- compatible = "ti,omap3430", "ti,omap3"

- legacy: "ti,omap34xx" - please do not use any more

- compatible = "ti,am3517", "ti,omap3"

- compatible = "ti,omap3630", "ti,omap3"

- legacy: "ti,omap36xx" - please do not use any more

- compatible = "ti,am33xx"

- compatible = "ti,omap4430", "ti,omap4"

- compatible = "ti,omap4460", "ti,omap4"

- compatible = "ti,omap5430", "ti,omap5"

- compatible = "ti,omap5432", "ti,omap5"

-- OMAP3 BeagleBoard : Low cost community board

- compatible = "ti,omap3-beagle", "ti,omap3430", "ti,omap3"

-- OMAP3 BeagleBoard A to B4 : Early BeagleBoard revisions A to B4 with a timer quirk

- compatible = "ti,omap3-beagle-ab4", "ti,omap3-beagle", "ti,omap3430", "ti,omap3"

-- OMAP3 Tobi with Overo : Commercial expansion board with daughter board

- compatible = "gumstix,omap3-overo-tobi", "gumstix,omap3-overo", "ti,omap3430", "ti,omap3"

-- OMAP4 SDP : Software Development Board

- compatible = "ti,omap4-sdp", "ti,omap4430", "ti,omap4"

-- OMAP4 PandaBoard : Low cost community board

- compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4"

-- OMAP4 DuoVero with Parlor : Commercial expansion board with daughter board

- compatible = "gumstix,omap4-duovero-parlor", "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4";

-- OMAP4 VAR-STK-OM44 : Commercial dev kit with VAR-OM44CustomBoard and VAR-SOM-OM44 w/WLAN

- compatible = "variscite,var-stk-om44", "variscite,var-som-om44", "ti,omap4460", "ti,omap4";

-- OMAP4 VAR-DVK-OM44 : Commercial dev kit with VAR-OM44CustomBoard, VAR-SOM-OM44 w/WLAN and LCD touchscreen

- compatible = "variscite,var-dvk-om44", "variscite,var-som-om44", "ti,omap4460", "ti,omap4";

-- OMAP3 EVM : Software Development Board for OMAP35x, AM/DM37x

- compatible = "ti,omap3-evm", "ti,omap3630", "ti,omap3"

-- AM335X EVM : Software Development Board for AM335x

- compatible = "ti,am335x-evm", "ti,am33xx"

-- AM335X Bone : Low cost community board

- compatible = "ti,am335x-bone", "ti,am33xx"

-- AM3359 ICEv2 : Low cost Industrial Communication Engine EVM.

- compatible = "ti,am3359-icev2", "ti,am33xx"

-- AM335X OrionLXm : Substation Automation Platform

- compatible = "novatech,am335x-lxm", "ti,am33xx"

-- AM335X phyBOARD-WEGA: Single Board Computer dev kit

- compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx"

-- AM335X CM-T335 : System On Module, built around the Sitara AM3352/4

- compatible = "compulab,cm-t335", "ti,am33xx"

-- AM335X SBC-T335 : single board computer, built around the Sitara AM3352/4

- compatible = "compulab,sbc-t335", "compulab,cm-t335", "ti,am33xx"

-- AM335X phyCORE-AM335x: Development kit

- compatible = "phytec,am335x-pcm-953", "phytec,am335x-phycore-som", "ti,am33xx"

-- AM335x phyBOARD-REGOR: Single Board Computer

- compatible = "phytec,am335x-regor", "phytec,am335x-phycore-som", "ti,am33xx"

-- AM335X UC-8100-ME-T: Communication-centric industrial computing platform

- compatible = "moxa,uc-8100-me-t", "ti,am33xx";

-- OMAP5 EVM : Evaluation Module

- compatible = "ti,omap5-evm", "ti,omap5"

-- DM3730 Logic PD Torpedo + Wireless: Commercial System on Module with WiFi and Bluetooth

- compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3630", "ti,omap3"

-- DM3730 Logic PD SOM-LV: Commercial System on Module with WiFi and Bluetooth

- compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3630", "ti,omap3"

diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
index 2ec9b5b24d73..ea3c5db6b52d 100644
--- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
index 5c08342664ea..3bad47b7b02b 100644
--- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

- - pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+-.*$"

diff --git a/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml b/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml
index 2297ad3f4774..d2dce238ff5d 100644
--- a/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml
+++ b/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml

-$id: "http://devicetree.org/schemas/arm/stm32/st,mlahb.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml b/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml
index b63ff591ef8f..d083d8ad48b7 100644
--- a/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml
+++ b/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml

-$id: "http://devicetree.org/schemas/arm/stm32/st,stm32-syscon.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
index 4466b455bffa..4bf28e717a56 100644
--- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
+++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml

- - lxa,stm32mp157c-mc1 # Linux Automation MC-1

- - description: Emlid Neutis N5 Developper Board

- - description: Emlid Neutis N5H3 Developper Board

-NVIDIA compliant embedded controller

-Required properties:

-- compatible : should be "nvidia,nvec".

-- reg : the iomem of the i2c slave controller

-- interrupts : the interrupt line of the i2c slave controller

-- clock-frequency : the frequency of the i2c bus

-- gpios : the gpio used for ec request

-- slave-addr: the i2c address of the slave controller

-- clocks : Must contain an entry for each entry in clock-names.

- See ../clocks/clock-bindings.txt for details.

-- clock-names : Must include the following entries:

-- resets : Must contain an entry for each entry in reset-names.

- See ../reset/reset.txt for details.

-- reset-names : Must include the following entries:

diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt
deleted file mode 100644
index 9a4295b54539..000000000000
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt
+++ /dev/null

-Required properties:

-- compatible : For Tegra20, must contain "nvidia,tegra20-ahb". For

- Tegra30, must contain "nvidia,tegra30-ahb". Otherwise, must contain

- '"nvidia,<chip>-ahb", "nvidia,tegra30-ahb"' where <chip> is tegra124,

- tegra132, or tegra210.

-- reg : Should contain 1 register ranges(address and length). For

- Tegra20, Tegra30, and Tegra114 chips, the value must be <0x6000c004

- 0x10c>. For Tegra124, Tegra132 and Tegra210 chips, the value should

- be be <0x6000c000 0x150>.

-Example (for a Tegra20 chip):

- ahb: ahb@6000c004 {

- compatible = "nvidia,tegra20-ahb";

- reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */

diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt
deleted file mode 100644
index a855c1bffc0f..000000000000
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt
+++ /dev/null

-NVIDIA Tegra Flow Controller

-Required properties:

-- compatible: Should contain one of the following:

- - "nvidia,tegra20-flowctrl": for Tegra20

- - "nvidia,tegra30-flowctrl": for Tegra30

- - "nvidia,tegra114-flowctrl": for Tegra114

- - "nvidia,tegra124-flowctrl": for Tegra124

- - "nvidia,tegra132-flowctrl", "nvidia,tegra124-flowctrl": for Tegra132

- - "nvidia,tegra210-flowctrl": for Tegra210

-- reg: Should contain one register range (address and length)

- flow-controller@60007000 {

- compatible = "nvidia,tegra20-flowctrl";

- reg = <0x60007000 0x1000>;

diff --git a/Documentation/devicetree/bindings/ata/pata-common.yaml b/Documentation/devicetree/bindings/ata/pata-common.yaml
index 2412894a255d..337ddf1113c4 100644
--- a/Documentation/devicetree/bindings/ata/pata-common.yaml
+++ b/Documentation/devicetree/bindings/ata/pata-common.yaml

- It doesn't constitue a device tree binding specification by itself but is

diff --git a/Documentation/devicetree/bindings/bus/brcm,gisb-arb.yaml b/Documentation/devicetree/bindings/bus/brcm,gisb-arb.yaml
index b23c3001991e..3aaefdbe361e 100644
--- a/Documentation/devicetree/bindings/bus/brcm,gisb-arb.yaml
+++ b/Documentation/devicetree/bindings/bus/brcm,gisb-arb.yaml

- String list of the litteral name of the GISB masters. Should match the

diff --git a/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml
index 4157e885c6e7..26362c9006e2 100644
--- a/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml
+++ b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml

- The Tegra ACONNECT bus is an AXI switch which is used to connnect various

- devices accessed via the ACONNNECT are described by child-nodes.

diff --git a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml
new file mode 100644
index 000000000000..9ab5f0c435d4
--- /dev/null
+++ b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml

diff --git a/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml
index 3b0548c34791..9f9816fbecbc 100644
--- a/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml
+++ b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml

- unevaluatedProperties: false

diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-osc-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-osc-clk.yaml
index 52a7b6e7124c..0052bf1e8a6b 100644
--- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-osc-clk.yaml
+++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-osc-clk.yaml

-title: Allwinner A10 Gatable Oscillator Clock

diff --git a/Documentation/devicetree/bindings/clock/alphascale,acc.txt b/Documentation/devicetree/bindings/clock/alphascale,acc.txt
index b3205b21c9d0..c9fb9324c634 100644
--- a/Documentation/devicetree/bindings/clock/alphascale,acc.txt
+++ b/Documentation/devicetree/bindings/clock/alphascale,acc.txt

-The ACC (Alphascale Clock Controller) is responsible of choising proper

-clock source, setting deviders and clock gates.

diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt b/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt
deleted file mode 100644
index c41f0be5d438..000000000000
--- a/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt
+++ /dev/null

-* Amlogic GXBB AO Clock and Reset Unit

-The Amlogic GXBB AO clock controller generates and supplies clock to various

-controllers within the Always-On part of the SoC.

-Required Properties:

-- compatible: value should be different for each SoC family as :

- - GXBB (S905) : "amlogic,meson-gxbb-aoclkc"

- - GXL (S905X, S905D) : "amlogic,meson-gxl-aoclkc"

- - GXM (S912) : "amlogic,meson-gxm-aoclkc"

- - AXG (A113D, A113X) : "amlogic,meson-axg-aoclkc"

- - G12A (S905X2, S905D2, S905Y2) : "amlogic,meson-g12a-aoclkc"

- followed by the common "amlogic,meson-gx-aoclkc"

-- clocks: list of clock phandle, one for each entry clock-names.

-- clock-names: should contain the following:

- * "xtal" : the platform xtal

- * "mpeg-clk" : the main clock controller mother clock (aka clk81)

- * "ext-32k-0" : external 32kHz reference #0 if any (optional)

- * "ext-32k-1" : external 32kHz reference #1 if any (optional - gx only)

- * "ext-32k-2" : external 32kHz reference #2 if any (optional - gx only)

-- #clock-cells: should be 1.

-Each clock is assigned an identifier and client nodes can use this identifier

-to specify the clock which they consume. All available clocks are defined as

-preprocessor macros in the dt-bindings/clock/gxbb-aoclkc.h header and can be

-used in device tree sources.

-- #reset-cells: should be 1.

-Each reset is assigned an identifier and client nodes can use this identifier

-to specify the reset which they consume. All available resets are defined as

-preprocessor macros in the dt-bindings/reset/gxbb-aoclkc.h header and can be

-used in device tree sources.

-Parent node should have the following properties :

-- compatible: "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd"

-- reg: base address and size of the AO system control register space.

-Example: AO Clock controller node:

-ao_sysctrl: sys-ctrl@0 {

- compatible = "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd";

- reg = <0x0 0x0 0x0 0x100>;

- clkc_AO: clock-controller {

- compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc";

- #clock-cells = <1>;

- #reset-cells = <1>;

- clocks = <&xtal>, <&clkc CLKID_CLK81>;

- clock-names = "xtal", "mpeg-clk";

-Example: UART controller node that consumes the clock and reset generated

- by the clock controller:

- uart_AO: serial@4c0 {

- compatible = "amlogic,meson-uart";

- reg = <0x4c0 0x14>;

- interrupts = <0 90 1>;

- clocks = <&clkc_AO CLKID_AO_UART1>;

- resets = <&clkc_AO RESET_AO_UART1>;

diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.yaml
new file mode 100644
index 000000000000..628e5dd33dd4
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.yaml

diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
deleted file mode 100644
index 7ccecd5c02c1..000000000000
--- a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
+++ /dev/null

-* Amlogic GXBB Clock and Reset Unit

-The Amlogic GXBB clock controller generates and supplies clock to various

-controllers within the SoC.

-Required Properties:

-- compatible: should be:

- "amlogic,gxbb-clkc" for GXBB SoC,

- "amlogic,gxl-clkc" for GXL and GXM SoC,

- "amlogic,axg-clkc" for AXG SoC.

- "amlogic,g12a-clkc" for G12A SoC.

- "amlogic,g12b-clkc" for G12B SoC.

- "amlogic,sm1-clkc" for SM1 SoC.

-- clocks : list of clock phandle, one for each entry clock-names.

-- clock-names : should contain the following:

- * "xtal": the platform xtal

-- #clock-cells: should be 1.

-Each clock is assigned an identifier and client nodes can use this identifier

-to specify the clock which they consume. All available clocks are defined as

-preprocessor macros in the dt-bindings/clock/gxbb-clkc.h header and can be

-used in device tree sources.

-Parent node should have the following properties :

-- compatible: "syscon", "simple-mfd, and "amlogic,meson-gx-hhi-sysctrl" or

- "amlogic,meson-axg-hhi-sysctrl"

-- reg: base address and size of the HHI system control register space.

-Example: Clock controller node:

-sysctrl: system-controller@0 {

- compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd";

- reg = <0 0 0 0x400>;

- clkc: clock-controller {

- #clock-cells = <1>;

- compatible = "amlogic,gxbb-clkc";

- clock-names = "xtal";

-Example: UART controller node that consumes the clock generated by the clock

- uart_AO: serial@c81004c0 {

- compatible = "amlogic,meson-uart";

- reg = <0xc81004c0 0x14>;

- interrupts = <0 90 1>;

- clocks = <&clkc CLKID_CLK81>;

diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.yaml
new file mode 100644
index 000000000000..63246f1cb539
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.yaml

-* Hisilicon Hix5hd2 Clock Controller

-The hix5hd2 clock controller generates and supplies clock to various

-controllers within the hix5hd2 SoC.

-Required Properties:

-- compatible: should be "hisilicon,hix5hd2-clock"

-- reg: Address and length of the register set

-- #clock-cells: Should be <1>

-Each clock is assigned an identifier and client nodes use this identifier

-to specify the clock which they consume.

-All these identifier could be found in <dt-bindings/clock/hix5hd2-clock.h>.

- clock: clock@f8a22000 {

- compatible = "hisilicon,hix5hd2-clock";

- reg = <0xf8a22000 0x1000>;

- #clock-cells = <1>;

- uart0: uart@f8b00000 {

- compatible = "arm,pl011", "arm,primecell";

- reg = <0xf8b00000 0x1000>;

- interrupts = <0 49 4>;

- clocks = <&clock HIX5HD2_FIXED_83M>;

- clock-names = "apb_pclk";

diff --git a/Documentation/devicetree/bindings/clock/intel,agilex5-clkmgr.yaml b/Documentation/devicetree/bindings/clock/intel,agilex5-clkmgr.yaml
new file mode 100644
index 000000000000..d120b0da7f3d
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/intel,agilex5-clkmgr.yaml

diff --git a/Documentation/devicetree/bindings/clock/keystone-pll.txt b/Documentation/devicetree/bindings/clock/keystone-pll.txt
index 47570d207215..9a3fbc665606 100644
--- a/Documentation/devicetree/bindings/clock/keystone-pll.txt
+++ b/Documentation/devicetree/bindings/clock/keystone-pll.txt

-- reg - pll control0 and pll multipler registers

diff --git a/Documentation/devicetree/bindings/clock/lpc1850-ccu.txt b/Documentation/devicetree/bindings/clock/lpc1850-ccu.txt
index fa97c12014ac..8cf8f0ecdd16 100644
--- a/Documentation/devicetree/bindings/clock/lpc1850-ccu.txt
+++ b/Documentation/devicetree/bindings/clock/lpc1850-ccu.txt

- /* A user of CCU brach clocks */

diff --git a/Documentation/devicetree/bindings/clock/lpc1850-creg-clk.txt b/Documentation/devicetree/bindings/clock/lpc1850-creg-clk.txt
index 6f1c7b4e4d2c..b6b2547a3d17 100644
--- a/Documentation/devicetree/bindings/clock/lpc1850-creg-clk.txt
+++ b/Documentation/devicetree/bindings/clock/lpc1850-creg-clk.txt

-These clocks are used by the RTC and the Event Router peripherials.

-The 32 kHz can also be routed to other peripherials to enable low

diff --git a/Documentation/devicetree/bindings/clock/maxim,max9485.txt b/Documentation/devicetree/bindings/clock/maxim,max9485.txt
index 61bec1100a94..b8f5c3bbf12b 100644
--- a/Documentation/devicetree/bindings/clock/maxim,max9485.txt
+++ b/Documentation/devicetree/bindings/clock/maxim,max9485.txt

-- clocks: Input clock, must provice 27.000 MHz

diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.yaml b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.yaml
index 1b2181f6d440..a9ba21144a56 100644
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.yaml
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.yaml

- const: nvidia,tegra124-car

-Oxford Semiconductor OXNAS SoC Family Standard Clocks

-================================================

-Please also refer to clock-bindings.txt in this directory for common clock

-Required properties:

-- compatible: For OX810SE, should be "oxsemi,ox810se-stdclk"

- For OX820, should be "oxsemi,ox820-stdclk"

-- #clock-cells: 1, see below

-Parent node should have the following properties :

-- compatible: For OX810SE, should be

- "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd"

- For OX820, should be

- "oxsemi,ox820-sys-ctrl", "syscon", "simple-mfd"

-sys: sys-ctrl@000000 {

- compatible = "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd";

- reg = <0x000000 0x100000>;

- compatible = "oxsemi,ox810se-stdclk";

- #clock-cells = <1>;

diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml
index 8a210c4c5f82..0a3ef7fd03fa 100644
--- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml

- <&gcc GCC_DISP_AHB_CLK>;

diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
index d6774db257f0..59cc88a52f6b 100644
--- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml

- #include <dt-bindings/power/qcom-rpmpd.h>

- power-domains = <&rpmhpd SM8250_MMCX>;

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml
index 09cd7a786871..19211176ee0b 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq4019.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq4019.yaml
index 6ebaef2288fa..fb3957d485f9 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq4019.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq4019.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml
index deef398a9872..52e7831a8d6d 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml
index d2186e25f55f..62d6f1fe1228 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml
index f77036ace31b..97523cc1ecfb 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml
index 3c9729050d6f..58f7fb22c5c4 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml
index ba969e7a57bf..559fc21435c8 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml

- - Taniya Das <tdas@codeaurora.org>

- include/dt-bindings/clock/qcom,gcc-mdm9615.h

- include/dt-bindings/reset/qcom,gcc-mdm9615.h

- - qcom,gcc-mdm9615

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml
index b2256f81b265..7bc6c57e4d11 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml
index 8bf9b6f49550..7aae21a76690 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml
index ff0b18bbb0fc..c4ca08d9ad5a 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
index 68e1b7822fe0..0595da0e8a42 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml
index 3ea0ff37a4cb..58ccb7df847c 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml
index ead6665b9a45..5d77c092be5b 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml
index 9a31981fbeb2..75259f468d54 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml

- - description: PCIE 1 Phy Auxillary clock source (Optional clock)

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml
index 7129fbcf2b6c..788825105f24 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
index a00216b3b15a..f369fa34e00c 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,kpss-acc-v1.yaml b/Documentation/devicetree/bindings/clock/qcom,kpss-acc-v1.yaml
index a466e4e8aacd..57632757d4e6 100644
--- a/Documentation/devicetree/bindings/clock/qcom,kpss-acc-v1.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,kpss-acc-v1.yaml

- clock-controller for enabling the cpu and hanling the aux clocks.

diff --git a/Documentation/devicetree/bindings/clock/qcom,lcc.yaml b/Documentation/devicetree/bindings/clock/qcom,lcc.yaml
index 8c783823e93c..55985e562a34 100644
--- a/Documentation/devicetree/bindings/clock/qcom,lcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,lcc.yaml

diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml
index 422f5776a771..aa35a40648ba 100644
--- a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml b/Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml
index 3ffe69d8cdd5..0dfbd8c4d465 100644
--- a/Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml

- const: qcom,msm8996-cbf

diff --git a/Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml
index 2d8897991663..7b271ae210a3 100644
--- a/Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml
index 767a9d03aa32..d712b1a87e25 100644
--- a/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml

- - Melody Olvera <quic_molvera@quicinc.com>

diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
index 267cf8c26823..fd14d18309a8 100644
--- a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml
index 098c8acf4bad..2dfc2a4f1918 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml
index 95ad16d0abc3..1c9ce300a435 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml
index f297694ef8b8..fdfb389083c1 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml
index 1e856a8a996e..873a2f918bac 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml
index b60adbad4590..01feef1cab0a 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml
index cfe6594a0a6b..c42b0ef61385 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
index 97c6bd96e0cb..f44c5c130d2d 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml
index 447cdc447a0c..deee5423d66e 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml
index 76b53ce64e40..719844d7ea11 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml

- - Taniya Das <tdas@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml
index 23505c8c3dbd..46d1d91e3a01 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml

- const: qcom,sm8350-videocc

- #include <dt-bindings/power/qcom-rpmpd.h>

- power-domains = <&rpmhpd SM8350_MMCX>;

diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml
index 87ae74166807..8178c35bc348 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml

- #include <dt-bindings/power/qcom-rpmpd.h>

- power-domains = <&rpmhpd SM8450_MMCX>;

diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml
index 1dd1f696dcd3..2f22310b08a9 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml

- #include <dt-bindings/power/qcom-rpmpd.h>

- power-domains = <&rpmhpd SM8450_MMCX>;

diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
index f1c6dd50f184..bad8f019a8d3 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml

- #include <dt-bindings/power/qcom-rpmpd.h>

- power-domains = <&rpmhpd SM8450_MMCX>;

diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml
index ab25f7cbaa2e..c129f8c16b50 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml

- #include <dt-bindings/power/qcom-rpmpd.h>

- power-domains = <&rpmhpd SM8550_MMCX>;

diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml
index 2b07146161b4..6999e36ace1b 100644
--- a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml

- - Taniya Das <tdas@codeaurora.org>

- #include <dt-bindings/power/qcom-rpmpd.h>

- power-domains = <&rpmhpd SM8250_MMCX>;

diff --git a/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml b/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml
index 1703e305e6d8..a0658056c330 100644
--- a/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml
+++ b/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml

- which compatible string shoule be:

diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-ispcrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-ispcrg.yaml
new file mode 100644
index 000000000000..3b8b85be5cd0
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-ispcrg.yaml

diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-pll.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-pll.yaml
new file mode 100644
index 000000000000..be8300ce86d0
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-pll.yaml

diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-stgcrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-stgcrg.yaml
new file mode 100644
index 000000000000..b64ccd84200a
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-stgcrg.yaml

diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
index 84373ae31644..5ba0a885aa80 100644
--- a/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
+++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml

- <&tdm_ext>, <&mclk_ext>;

- "tdm_ext", "mclk_ext";

diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-voutcrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-voutcrg.yaml
new file mode 100644
index 000000000000..af77bd8c86b1
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-voutcrg.yaml

diff --git a/Documentation/devicetree/bindings/clock/ti,cdce925.yaml b/Documentation/devicetree/bindings/clock/ti,cdce925.yaml
index a4ec8dd5ddf1..95c1c6f8b755 100644
--- a/Documentation/devicetree/bindings/clock/ti,cdce925.yaml
+++ b/Documentation/devicetree/bindings/clock/ti,cdce925.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/clock/ti,sci-clk.yaml b/Documentation/devicetree/bindings/clock/ti,sci-clk.yaml
index 63d976341696..0a9d6a4c4b66 100644
--- a/Documentation/devicetree/bindings/clock/ti,sci-clk.yaml
+++ b/Documentation/devicetree/bindings/clock/ti,sci-clk.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

-as they are programmed into the regster. E.g:

diff --git a/Documentation/devicetree/bindings/clock/vf610-clock.txt b/Documentation/devicetree/bindings/clock/vf610-clock.txt
index 63f9f1ac3439..109ffa3a5b66 100644
--- a/Documentation/devicetree/bindings/clock/vf610-clock.txt
+++ b/Documentation/devicetree/bindings/clock/vf610-clock.txt

-- clock-names: list of names of clocks which are exteral input clocks to the

diff --git a/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml b/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
index 5cbb34d0b61b..1ba687d433b1 100644
--- a/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
+++ b/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml

- const: xlnx,versal-clk

- - description: reference clock

- - description: alternate reference clock

- - description: alternate reference clock for programmable logic

- - const: pl_alt_ref

---------------------------------------------------------------------------

-Device Tree Clock bindings for the Zynq Ultrascale+ MPSoC controlled using

-Zynq MPSoC firmware interface

---------------------------------------------------------------------------

-The clock controller is a h/w block of Zynq Ultrascale+ MPSoC clock

-tree. It reads required input clock frequencies from the devicetree and acts

-as clock provider for all clock consumers of PS clocks.

-See clock_bindings.txt for more information on the generic clock bindings.

-Required properties:

- - #clock-cells: Must be 1

- - compatible: Must contain: "xlnx,zynqmp-clk"

- - clocks: List of clock specifiers which are external input

- clocks to the given clock controller. Please refer

- the next section to find the input clocks for a

- - clock-names: List of clock names which are exteral input clocks

- to the given clock controller. Please refer to the

- clock bindings for more details.

-Input clocks for zynqmp Ultrascale+ clock controller:

-The Zynq UltraScale+ MPSoC has one primary and four alternative reference clock

-inputs. These required clock inputs are:

- - pss_ref_clk (PS reference clock)

- - video_clk (reference clock for video system )

- - pss_alt_ref_clk (alternative PS reference clock)

- - gt_crx_ref_clk (transceiver reference clock)

-The following strings are optional parameters to the 'clock-names' property in

-order to provide an optional (E)MIO clock source:

- - mio_clk_XX # with XX = 00..77

- - mio_clk_50_or_51 #for the mux clock to gem tsu from 50 or 51

-Output clocks are registered based on clock information received

-from firmware. Output clocks indexes are mentioned in

-include/dt-bindings/clock/xlnx-zynqmp-clk.h.

- zynqmp_firmware: zynqmp-firmware {

- compatible = "xlnx,zynqmp-firmware";

- zynqmp_clk: clock-controller {

- #clock-cells = <1>;

- compatible = "xlnx,zynqmp-clk";

- clocks = <&pss_ref_clk>, <&video_clk>, <&pss_alt_ref_clk>, <&aux_ref_clk>, <&gt_crx_ref_clk>;

- clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk","aux_ref_clk", "gt_crx_ref_clk";

diff --git a/Documentation/devicetree/bindings/connector/usb-connector.yaml b/Documentation/devicetree/bindings/connector/usb-connector.yaml
index 1c4d3eb87763..7c8a3e8430d3 100644
--- a/Documentation/devicetree/bindings/connector/usb-connector.yaml
+++ b/Documentation/devicetree/bindings/connector/usb-connector.yaml

- SNK_DISCOVERY) and the actual currrent limit after reception of PS_Ready for PD link or during

- sink-vdos-v1: [ 'sink-vdos' ]

- sink-vdos: [ 'sink-vdos-v1' ]

-additionalProperties: true

diff --git a/Documentation/devicetree/bindings/cpu/nvidia,tegra186-ccplex-cluster.yaml b/Documentation/devicetree/bindings/cpu/nvidia,tegra186-ccplex-cluster.yaml
new file mode 100644
index 000000000000..16a448974561
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpu/nvidia,tegra186-ccplex-cluster.yaml

diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
index a6b3bb8fdf33..c1d225fcf2d5 100644
--- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml

-TI CPUFreq and OPP bindings

-================================

-Certain TI SoCs, like those in the am335x, am437x, am57xx, and dra7xx

-families support different OPPs depending on the silicon variant in use.

-The ti-cpufreq driver can use revision and an efuse value from the SoC to

-provide the OPP framework with supported hardware information. This is

-used to determine which OPPs from the operating-points-v2 table get enabled

-when it is parsed by the OPP framework.

-Required properties:

---------------------

-- operating-points-v2: Phandle to the operating-points-v2 table to use.

-In 'operating-points-v2' table:

-- compatible: Should be

- - 'operating-points-v2-ti-cpu' for am335x, am43xx, and dra7xx/am57xx,

- omap34xx, omap36xx and am3517 SoCs

-- syscon: A phandle pointing to a syscon node representing the control module

- register space of the SoC.

-Optional properties:

---------------------

-- "vdd-supply", "vbb-supply": to define two regulators for dra7xx

-- "cpu0-supply", "vbb-supply": to define two regulators for omap36xx

-For each opp entry in 'operating-points-v2' table:

-- opp-supported-hw: Two bitfields indicating:

- 1. Which revision of the SoC the OPP is supported by

- 2. Which eFuse bits indicate this OPP is available

- A bitwise AND is performed against these values and if any bit

- matches, the OPP gets enabled.

-/* From arch/arm/boot/dts/am33xx.dtsi */

- #address-cells = <1>;

- #size-cells = <0>;

- compatible = "arm,cortex-a8";

- device_type = "cpu";

- operating-points-v2 = <&cpu0_opp_table>;

- clocks = <&dpll_mpu_ck>;

- clock-names = "cpu";

- clock-latency = <300000>; /* From omap-cpufreq driver */

- * cpu0 has different OPPs depending on SoC revision and some on revisions

- * 0x2 and 0x4 have eFuse bits that indicate if they are available or not

-cpu0_opp_table: opp-table {

- compatible = "operating-points-v2-ti-cpu";

- syscon = <&scm_conf>;

- * The three following nodes are marked with opp-suspend

- * because they can not be enabled simultaneously on a

- opp-hz = /bits/ 64 <300000000>;

- opp-microvolt = <950000 931000 969000>;

- opp-supported-hw = <0x06 0x0010>;

- opp100-275000000 {

- opp-hz = /bits/ 64 <275000000>;

- opp-microvolt = <1100000 1078000 1122000>;

- opp-supported-hw = <0x01 0x00FF>;

- opp100-300000000 {

- opp-hz = /bits/ 64 <300000000>;

- opp-microvolt = <1100000 1078000 1122000>;

- opp-supported-hw = <0x06 0x0020>;

- opp100-500000000 {

- opp-hz = /bits/ 64 <500000000>;

- opp-microvolt = <1100000 1078000 1122000>;

- opp-supported-hw = <0x01 0xFFFF>;

- opp100-600000000 {

- opp-hz = /bits/ 64 <600000000>;

- opp-microvolt = <1100000 1078000 1122000>;

- opp-supported-hw = <0x06 0x0040>;

- opp120-600000000 {

- opp-hz = /bits/ 64 <600000000>;

- opp-microvolt = <1200000 1176000 1224000>;

- opp-supported-hw = <0x01 0xFFFF>;

- opp120-720000000 {

- opp-hz = /bits/ 64 <720000000>;

- opp-microvolt = <1200000 1176000 1224000>;

- opp-supported-hw = <0x06 0x0080>;

- oppturbo-720000000 {

- opp-hz = /bits/ 64 <720000000>;

- opp-microvolt = <1260000 1234800 1285200>;

- opp-supported-hw = <0x01 0xFFFF>;

- oppturbo-800000000 {

- opp-hz = /bits/ 64 <800000000>;

- opp-microvolt = <1260000 1234800 1285200>;

- opp-supported-hw = <0x06 0x0100>;

- oppnitro-1000000000 {

- opp-hz = /bits/ 64 <1000000000>;

- opp-microvolt = <1325000 1298500 1351500>;

- opp-supported-hw = <0x04 0x0200>;

diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
index 92e1d76e29ee..7da9aa82d837 100644
--- a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml

diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
index bb828068c3b8..8e665d910e6e 100644
--- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml

diff --git a/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml b/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml
index b767ec72a999..ac480765cde0 100644
--- a/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml
+++ b/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml

diff --git a/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml b/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml
index 77ec8bc70bf7..ff10a0838ad6 100644
--- a/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml
+++ b/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml b/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml
index e300df4b47f3..d27dcb2fef12 100644
--- a/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml
+++ b/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml

- derterming the current state of each IP.

diff --git a/Documentation/devicetree/bindings/display/atmel/hlcdc-dc.txt b/Documentation/devicetree/bindings/display/atmel/hlcdc-dc.txt
index 0398aec488ac..923aea25344c 100644
--- a/Documentation/devicetree/bindings/display/atmel/hlcdc-dc.txt
+++ b/Documentation/devicetree/bindings/display/atmel/hlcdc-dc.txt

- to external devices using the OF graph reprensentation (see ../graph.txt).

diff --git a/Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml
index 0b51c64f141a..8747b95ec20d 100644
--- a/Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml

- DSI host controller. It doesn't constitue a device tree binding specification

diff --git a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml
index 0521261b04a9..ae894d996d21 100644
--- a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml

diff --git a/Documentation/devicetree/bindings/display/cirrus,clps711x-fb.txt b/Documentation/devicetree/bindings/display/cirrus,clps711x-fb.txt
index 0ab5f0663611..84c75f849891 100644
--- a/Documentation/devicetree/bindings/display/cirrus,clps711x-fb.txt
+++ b/Documentation/devicetree/bindings/display/cirrus,clps711x-fb.txt

-* Currus Logic CLPS711X Framebuffer

diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index 7a7cf3fb3e6d..f12558960cd8 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml

diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
index 01848bdd5873..c6dbab65d5f7 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml
index e6b00d7387ce..69d13867b7cf 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml
index a43e11d3b00d..52bbe132e6da 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml
index 9c1f9140c731..7e6687cb002b 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml
index 62fb3e484eb2..288d8babb76a 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
index 8e9031bbde73..dd6619555a12 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml
index 0f6f08890e7e..6b57ce41c95f 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml
index 58ca8912a8c3..56b9b247e8c2 100644
--- a/Documentation/devicetree/bindings/display/msm/gpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml

diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
index ccd7d6417523..f69196e4cc76 100644
--- a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
+++ b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml b/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml
index 2fe032d0e8f8..91c774f106ce 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml
index db9f07c6142d..0999ea07f47b 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

- This is the bindings documentation for the Mobile Display Subsytem(MDSS) that

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml
index 8d3cd46260fb..d5a64c8a921f 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
index 3c2b6ed98a56..e320ab1de6de 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml
index 414f4e7ebdf1..be6cd8adb3b6 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
index 2995b84b2cd4..4184b84d4c21 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml
index 630b11480496..8137618237ce 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

- const: qcom,sm6375-dpu

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
index 42ef06edddc4..3b9c103e504a 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml
index 26dc073bd19a..b0fbe86219d1 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
index 078e1d1a7d2f..43500dad66e7 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-dpu.yaml
index f2c8e16cf067..d19e3bec4600 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-dpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-dpu.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-mdss.yaml
index c239544bc37f..db680fb12b6a 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-mdss.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml
index 0f7765d832e7..b917064bdf33 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml
index 6ecb00920d7f..d6d7ac1b2ef8 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml
index bf62c2f5325a..510eb6c19364 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml
index b9f83088f370..17221b62a642 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml
new file mode 100644
index 000000000000..57f0e3647711
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml
index ed0ad194d4ce..db255b1f4c20 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

- dpu_intf2_out: endpoint {

- remote-endpoint = <&dsi1_in>;

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml
index 76369a4f7c4d..30d36fffaedb 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

- dpu_intf2_out: endpoint {

- remote-endpoint = <&dsi1_in>;

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml
index 2b3f3fe9bdf7..13146b3f053c 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml
index 5182e958e069..54cdaa827cd3 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml
index 687c8c170cd4..ffa5047e901f 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

- #include <dt-bindings/power/qcom-rpmpd.h>

- power-domains = <&rpmhpd SM8250_MMCX>;

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml
index 368d3db0ce96..e887f031b8be 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

- #include <dt-bindings/power/qcom-rpmpd.h>

- power-domains = <&rpmhpd SM8250_MMCX>;

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml
index 120500395c9a..96ef2d9c3512 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

- #include <dt-bindings/power/qcom-rpmpd.h>

- power-domains = <&rpmhpd SM8350_MMCX>;

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml
index 79a226e4cc6a..60d4aae1131b 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

- #include <dt-bindings/power/qcom-rpmpd.h>

- power-domains = <&rpmhpd SM8350_MMCX>;

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml
index 0d17ece1c453..2a5d3daed0e1 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

- #include <dt-bindings/power/qcom-rpmpd.h>

- power-domains = <&rpmhpd SM8450_MMCX>;

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml
index f26eb5643aed..bb22940b9385 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

- #include <dt-bindings/power/qcom-rpmpd.h>

- power-domains = <&rpmhpd SM8450_MMCX>;

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml
index ff58a747bb6f..16a541fca66f 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

- #include <dt-bindings/power/qcom-rpmpd.h>

- power-domains = <&rpmhpd SM8550_MMCX>;

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml
index 887be33ba108..48aea8005c86 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

- #include <dt-bindings/power/qcom-rpmpd.h>

- power-domains = <&rpmhpd SM8550_MMCX>;

diff --git a/Documentation/devicetree/bindings/display/panel/advantech,idk-2121wr.yaml b/Documentation/devicetree/bindings/display/panel/advantech,idk-2121wr.yaml
index 67682fe77f10..2e8dbdb5a3d5 100644
--- a/Documentation/devicetree/bindings/display/panel/advantech,idk-2121wr.yaml
+++ b/Documentation/devicetree/bindings/display/panel/advantech,idk-2121wr.yaml

diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml b/Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml
index 1b2a1baa26f9..ffb35288ffbb 100644
--- a/Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml b/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml
index c5d1df680858..e7ab6224b52e 100644
--- a/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml

diff --git a/Documentation/devicetree/bindings/display/panel/mantix,mlaf057we51-x.yaml b/Documentation/devicetree/bindings/display/panel/mantix,mlaf057we51-x.yaml
index a4b8569ab81c..74ff772973d6 100644
--- a/Documentation/devicetree/bindings/display/panel/mantix,mlaf057we51-x.yaml
+++ b/Documentation/devicetree/bindings/display/panel/mantix,mlaf057we51-x.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.yaml b/Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.yaml
index 9f97598efdfa..72463795e4c6 100644
--- a/Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.yaml
+++ b/Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.yaml

- - FT5x6 capacitive touch screnn controller (optional)

diff --git a/Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.yaml b/Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.yaml
index ad7d3575190e..1e4f140f48b8 100644
--- a/Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.yaml
+++ b/Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/display/panel/panel-common.yaml b/Documentation/devicetree/bindings/display/panel/panel-common.yaml
index 5b38dc89cb21..0a57a31f4f3d 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-common.yaml
+++ b/Documentation/devicetree/bindings/display/panel/panel-common.yaml

- display panels. It doesn't constitue a device tree binding specification by

diff --git a/Documentation/devicetree/bindings/display/panel/panel-dsi-cm.yaml b/Documentation/devicetree/bindings/display/panel/panel-dsi-cm.yaml
index 4a36aa64c716..f8dc9929e833 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-dsi-cm.yaml
+++ b/Documentation/devicetree/bindings/display/panel/panel-dsi-cm.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml b/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml
index 929fe046d1e7..9f1016551e0b 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml
+++ b/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml

diff --git a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
index 2f0238b770eb..e808215cb39e 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
+++ b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml
index 90c04cff8281..73674baea75d 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml
+++ b/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
index 1d4936fc5182..25b4589d4a58 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
+++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml

- # Chunghwa Picture Tubes Ltd. 7" WXGA TFT LCD panel

- - chunghwa,claa070wp03xg

- # HannStar Display Corp. HSD101PWW2 10.1" WXGA (1280x800) LVDS panel

- - hannstar,hsd101pww2

diff --git a/Documentation/devicetree/bindings/display/panel/raydium,rm68200.yaml b/Documentation/devicetree/bindings/display/panel/raydium,rm68200.yaml
index e8ce2315631a..46fe1014ebc4 100644
--- a/Documentation/devicetree/bindings/display/panel/raydium,rm68200.yaml
+++ b/Documentation/devicetree/bindings/display/panel/raydium,rm68200.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
index 150e81090af2..5ea74426b1d5 100644
--- a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
+++ b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml b/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml
index fa6556363cca..ef162b51d010 100644
--- a/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml
+++ b/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml

- const: sitronix,st7789v

diff --git a/Documentation/devicetree/bindings/display/panel/startek,kd070fhfid015.yaml b/Documentation/devicetree/bindings/display/panel/startek,kd070fhfid015.yaml
new file mode 100644
index 000000000000..d817f998cddc
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/startek,kd070fhfid015.yaml

diff --git a/Documentation/devicetree/bindings/display/panel/visionox,r66451.yaml b/Documentation/devicetree/bindings/display/panel/visionox,r66451.yaml
new file mode 100644
index 000000000000..6ba323683921
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/visionox,r66451.yaml

diff --git a/Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml b/Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml
index 444ac2a4772d..fa745a6f4456 100644
--- a/Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml
+++ b/Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/panel/visionox,vtdr6130.yaml b/Documentation/devicetree/bindings/display/panel/visionox,vtdr6130.yaml
index 84562a5b710a..d5a8295106c1 100644
--- a/Documentation/devicetree/bindings/display/panel/visionox,vtdr6130.yaml
+++ b/Documentation/devicetree/bindings/display/panel/visionox,vtdr6130.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml
index fba45091d909..b60b90472d42 100644
--- a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/display/solomon,ssd1307fb.yaml b/Documentation/devicetree/bindings/display/solomon,ssd1307fb.yaml
index 94bb5ef567c6..20e2bd15d4d2 100644
--- a/Documentation/devicetree/bindings/display/solomon,ssd1307fb.yaml
+++ b/Documentation/devicetree/bindings/display/solomon,ssd1307fb.yaml

- Height in pixel of the screen driven by the controller

- Width in pixel of the screen driven by the controller

diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-sor.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-sor.yaml
index 70f0e45c71d6..6f2e22471965 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-sor.yaml
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-sor.yaml

- description: phandle to a DispayPort AUX interface

diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
index b6b402f16161..ae09cd3cbce1 100644
--- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
+++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml

- The AM65x TI Keystone Display SubSystem with two output ports and

- two video planes. The first video port supports OLDI and the second

- supports DPI format. The fist plane is full video plane with all

- features and the second is a "lite plane" without scaling support.

- const: ti,am65x-dss

- The DSS OLDI output port node form video port 1

diff --git a/Documentation/devicetree/bindings/dma/atmel-xdma.txt b/Documentation/devicetree/bindings/dma/atmel-xdma.txt
index 510b7f25ba24..76d649b3a25d 100644
--- a/Documentation/devicetree/bindings/dma/atmel-xdma.txt
+++ b/Documentation/devicetree/bindings/dma/atmel-xdma.txt

- "microchip,sama7g5-dma".

-* BCM2835 DMA controller

-The BCM2835 DMA controller has 16 channels in total.

-Only the lower 13 channels have an associated IRQ.

-Some arbitrary channels are used by the firmware

-(1,3,6,7 in the current firmware version).

-The channels 0,2 and 3 have special functionality

-and should not be used by the driver.

-Required properties:

-- compatible: Should be "brcm,bcm2835-dma".

-- reg: Should contain DMA registers location and length.

-- interrupts: Should contain the DMA interrupts associated

- to the DMA channels in ascending order.

-- interrupt-names: Should contain the names of the interrupt

- in the form "dmaXX".

- Use "dma-shared-all" for the common interrupt line

- that is shared by all dma channels.

-- #dma-cells: Must be <1>, the cell in the dmas property of the

- client device represents the DREQ number.

-- brcm,dma-channel-mask: Bit mask representing the channels

- not used by the firmware in ascending order,

- i.e. first channel corresponds to LSB.

-dma: dma@7e007000 {

- compatible = "brcm,bcm2835-dma";

- reg = <0x7e007000 0xf00>;

- interrupts = <1 16>,

- /* dma channel 11-14 share one irq */

- /* unused shared irq for all channels */

- interrupt-names = "dma0",

- brcm,dma-channel-mask = <0x7f35>;

-DMA clients connected to the BCM2835 DMA controller must use the format

-described in the dma.txt file, using a two-cell specifier for each channel.

-bcm2835_i2s: i2s@7e203000 {

- compatible = "brcm,bcm2835-i2s";

- reg = < 0x7e203000 0x24>;

- clocks = <&clocks BCM2835_CLOCK_PCM>;

- dma-names = "tx", "rx";

diff --git a/Documentation/devicetree/bindings/dma/ingenic,dma.yaml b/Documentation/devicetree/bindings/dma/ingenic,dma.yaml
index 37400496e086..d9cca3006e73 100644
--- a/Documentation/devicetree/bindings/dma/ingenic,dma.yaml
+++ b/Documentation/devicetree/bindings/dma/ingenic,dma.yaml

- channel. These channels will only be assigned when explicitely

diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.txt b/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.txt
index c6908e7c42cc..447fb44e7abe 100644
--- a/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.txt
+++ b/Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.txt

-- reg: Should contain DMA registers location and length. This shuld include

diff --git a/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml b/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml
index f1ddcf672261..3ad0d9b1fbc5 100644
--- a/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml
+++ b/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml

- # APQ8064, IPQ8064 and MSM8960

- # MSM8974, APQ8074 and APQ8084

- # MSM8916 and SDM845

- Indicates that the bam is controlled by remote proccessor i.e. execution

diff --git a/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml b/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml
index 1e5752b19a49..7b94d24d5ef4 100644
--- a/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml
+++ b/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml

- engine are elegible for memcpy transfers

diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
index d1700a5c36bf..590d1948f202 100644
--- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
+++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt

-$id: "http://devicetree.org/schemas/eeprom/at24.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

-$id: "http://devicetree.org/schemas/eeprom/at25.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/extcon/maxim,max77843.yaml b/Documentation/devicetree/bindings/extcon/maxim,max77843.yaml
index 128960545640..55800fb0221d 100644
--- a/Documentation/devicetree/bindings/extcon/maxim,max77843.yaml
+++ b/Documentation/devicetree/bindings/extcon/maxim,max77843.yaml

diff --git a/Documentation/devicetree/bindings/extcon/qcom,pm8941-misc.yaml b/Documentation/devicetree/bindings/extcon/qcom,pm8941-misc.yaml
index 2c8cf6aab19a..6b80518cbf62 100644
--- a/Documentation/devicetree/bindings/extcon/qcom,pm8941-misc.yaml
+++ b/Documentation/devicetree/bindings/extcon/qcom,pm8941-misc.yaml

- - Guru Das Srinagesh <gurus@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/extcon/siliconmitus,sm5502-muic.yaml b/Documentation/devicetree/bindings/extcon/siliconmitus,sm5502-muic.yaml
index 7a224b2f0977..7ef2d9bef72d 100644
--- a/Documentation/devicetree/bindings/extcon/siliconmitus,sm5502-muic.yaml
+++ b/Documentation/devicetree/bindings/extcon/siliconmitus,sm5502-muic.yaml

diff --git a/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml b/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml
index 9a785bbaafb7..e6bed7d93e2d 100644
--- a/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml
+++ b/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml

-$id: "http://devicetree.org/schemas/firmware/intel,ixp4xx-network-processing-engine.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.yaml b/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.yaml
index 833c07f1685c..c43d17f6e96b 100644
--- a/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.yaml
+++ b/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.yaml

- predefined and work on top of sysram, which is an SRAM inside the

- chip. See ".../sram/sram.yaml" for the bindings.

- mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB

- TEGRA_HSP_DB_MASTER_BPMP>;

diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
index bdbee58a542b..4233ea839bfc 100644
--- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
+++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml

diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
index 910bebe6cfa8..822864488dcb 100644
--- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
+++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml

diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt
index 6694ef29a267..528df8a0e6d8 100644
--- a/Documentation/devicetree/bindings/fpga/fpga-region.txt
+++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt

- * In some implementations, the FPGA Manager transparantly handles gating the

-A persona must have boundary connections that line up with those of the partion

diff --git a/Documentation/devicetree/bindings/fsi/ibm,i2cr-fsi-master.yaml b/Documentation/devicetree/bindings/fsi/ibm,i2cr-fsi-master.yaml
new file mode 100644
index 000000000000..442cecdc57cb
--- /dev/null
+++ b/Documentation/devicetree/bindings/fsi/ibm,i2cr-fsi-master.yaml

-Broadcom Kona Family GPIO

-=========================

-This GPIO driver is used in the following Broadcom SoCs:

- BCM11130, BCM11140, BCM11351, BCM28145, BCM28155

-The Broadcom GPIO Controller IP can be configured prior to synthesis to

-support up to 8 banks of 32 GPIOs where each bank has its own IRQ. The

-GPIO controller only supports edge, not level, triggering of interrupts.

-Required properties

--------------------

-- compatible: "brcm,bcm11351-gpio", "brcm,kona-gpio"

-- reg: Physical base address and length of the controller's registers.

-- interrupts: The interrupt outputs from the controller. There is one GPIO

- interrupt per GPIO bank. The number of interrupts listed depends on the

- number of GPIO banks on the SoC. The interrupts must be ordered by bank,

- starting with bank 0. There is always a 1:1 mapping between banks and

-- #gpio-cells: Should be <2>. The first cell is the pin number, the second

- cell is used to specify optional parameters:

- - bit 0 specifies polarity (0 for normal, 1 for inverted)

- See also "gpio-specifier" in .../devicetree/bindings/gpio/gpio.txt.

-- #interrupt-cells: Should be <2>. The first cell is the GPIO number. The

- second cell is used to specify flags. The following subset of flags is

- - trigger type (bits[1:0]):

- 1 = low-to-high edge triggered.

- 2 = high-to-low edge triggered.

- 3 = low-to-high or high-to-low edge triggered

- Valid values are 1, 2, 3

- See also .../devicetree/bindings/interrupt-controller/interrupts.txt.

-- gpio-controller: Marks the device node as a GPIO controller.

-- interrupt-controller: Marks the device node as an interrupt controller.

- gpio: gpio@35003000 {

- compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";

- reg = <0x35003000 0x800>;

- <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;

- #gpio-cells = <2>;

- #interrupt-cells = <2>;

- interrupt-controller;

diff --git a/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml b/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml
index ae18603697d7..d0ca2af89f1e 100644
--- a/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml

diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml b/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml
index fa116148ee90..99febb8ea1b6 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml
+++ b/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml

diff --git a/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt
index e90fb987e25f..7ddf292db144 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt

- - first cell is 0-N coresponding for EXT_INT_0 to EXT_INT_N.

-* Oxford Semiconductor OXNAS SoC GPIO Controller

-Please refer to gpio.txt for generic information regarding GPIO bindings.

-Required properties:

- - compatible: "oxsemi,ox810se-gpio" or "oxsemi,ox820-gpio"

- - reg: Base address and length for the device.

- - interrupts: The port interrupt shared by all pins.

- - gpio-controller: Marks the port as GPIO controller.

- - #gpio-cells: Two. The first cell is the pin number and

- the second cell is used to specify the gpio polarity as defined in

- defined in <dt-bindings/gpio/gpio.h>:

- 0 = GPIO_ACTIVE_HIGH

- 1 = GPIO_ACTIVE_LOW

- - interrupt-controller: Marks the device node as an interrupt controller.

- - #interrupt-cells: Two. The first cell is the GPIO number and second cell

- is used to specify the trigger type as defined in

- <dt-bindings/interrupt-controller/irq.h>:

- IRQ_TYPE_EDGE_RISING

- IRQ_TYPE_EDGE_FALLING

- IRQ_TYPE_EDGE_BOTH

- - gpio-ranges: Interaction with the PINCTRL subsystem, it also specifies the

- gpio base and count, should be in the format of numeric-gpio-range as

- specified in the gpio.txt file.

- compatible = "oxsemi,ox810se-gpio";

- reg = <0x000000 0x100000>;

- interrupts = <21>;

- #gpio-cells = <2>;

- interrupt-controller;

- #interrupt-cells = <2>;

- gpio-ranges = <&pinctrl 0 0 32>;

- gpios = <&gpio0 12 0>;

diff --git a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml
index b391cc1b4590..eefe7b345286 100644
--- a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml

- GPIO-controller properties as desribed in this bindings file.

diff --git a/Documentation/devicetree/bindings/gpio/st,stmpe-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,stmpe-gpio.yaml
index 22c0cae73425..4555f1644a4d 100644
--- a/Documentation/devicetree/bindings/gpio/st,stmpe-gpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/st,stmpe-gpio.yaml

diff --git a/Documentation/devicetree/bindings/gpio/ti,omap-gpio.yaml b/Documentation/devicetree/bindings/gpio/ti,omap-gpio.yaml
index bd721c839059..7b75d2f92f1b 100644
--- a/Documentation/devicetree/bindings/gpio/ti,omap-gpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/ti,omap-gpio.yaml

- SoCs which have not been converted to the ti,sysc interconnect hierarachy.

- have not been converted to the ti,sysc interconnect hierarachy.

diff --git a/Documentation/devicetree/bindings/gpio/x-powers,axp209-gpio.yaml b/Documentation/devicetree/bindings/gpio/x-powers,axp209-gpio.yaml
index 1638cfe90f1c..5eeb29bcdd21 100644
--- a/Documentation/devicetree/bindings/gpio/x-powers,axp209-gpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/x-powers,axp209-gpio.yaml

-$id: "http://devicetree.org/schemas/gpio/x-powers,axp209-gpio.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml b/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml
index 18e61aff2185..56143f1fe84a 100644
--- a/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml
+++ b/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml

-$id: "http://devicetree.org/schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/gpio/xylon,logicvc-gpio.yaml b/Documentation/devicetree/bindings/gpio/xylon,logicvc-gpio.yaml
index a36aec27069c..59c79a6943ec 100644
--- a/Documentation/devicetree/bindings/gpio/xylon,logicvc-gpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/xylon,logicvc-gpio.yaml

-$id: "http://devicetree.org/schemas/gpio/xylon,logicvc-gpio.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/hwlock/allwinner,sun6i-a31-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/allwinner,sun6i-a31-hwspinlock.yaml
index 38478dad8b25..584cce3211c0 100644
--- a/Documentation/devicetree/bindings/hwlock/allwinner,sun6i-a31-hwspinlock.yaml
+++ b/Documentation/devicetree/bindings/hwlock/allwinner,sun6i-a31-hwspinlock.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml
index 0a955c7b9706..5ba60d532fcd 100644
--- a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml
+++ b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml b/Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml
index ca2b47320689..2e45364d0543 100644
--- a/Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml
+++ b/Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml

- The value of curent sense resistor in microohms. If not provided,

diff --git a/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml b/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml
index 0cf3ed6212a6..6751f9b643b4 100644
--- a/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml
+++ b/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml

- Bindings for the Analog Devices AXI FAN Control driver. Spefications of the

diff --git a/Documentation/devicetree/bindings/hwmon/adi,ltc2992.yaml b/Documentation/devicetree/bindings/hwmon/adi,ltc2992.yaml
index b39c632956e8..0ad12d245656 100644
--- a/Documentation/devicetree/bindings/hwmon/adi,ltc2992.yaml
+++ b/Documentation/devicetree/bindings/hwmon/adi,ltc2992.yaml

- The value of curent sense resistor in microohms.

diff --git a/Documentation/devicetree/bindings/hwmon/aspeed-pwm-tacho.txt b/Documentation/devicetree/bindings/hwmon/aspeed-pwm-tacho.txt
index 3ac02988a1a5..8645cd3b867a 100644
--- a/Documentation/devicetree/bindings/hwmon/aspeed-pwm-tacho.txt
+++ b/Documentation/devicetree/bindings/hwmon/aspeed-pwm-tacho.txt

- Atleast one Fan tach input channel is required.

diff --git a/Documentation/devicetree/bindings/hwmon/iio-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/iio-hwmon.yaml
index c54b5986b365..e5b24782f448 100644
--- a/Documentation/devicetree/bindings/hwmon/iio-hwmon.yaml
+++ b/Documentation/devicetree/bindings/hwmon/iio-hwmon.yaml

-$id: "http://devicetree.org/schemas/hwmon/iio-hwmon.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/hwmon/jedec,jc42.yaml b/Documentation/devicetree/bindings/hwmon/jedec,jc42.yaml
index 0e49b3901161..bf3332153ad8 100644
--- a/Documentation/devicetree/bindings/hwmon/jedec,jc42.yaml
+++ b/Documentation/devicetree/bindings/hwmon/jedec,jc42.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/hwmon/lltc,ltc4151.yaml b/Documentation/devicetree/bindings/hwmon/lltc,ltc4151.yaml
index b1a4c235376e..e62aff670478 100644
--- a/Documentation/devicetree/bindings/hwmon/lltc,ltc4151.yaml
+++ b/Documentation/devicetree/bindings/hwmon/lltc,ltc4151.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

- cofigured to measure 5.0V power supply. Default is 3.3V.

diff --git a/Documentation/devicetree/bindings/hwmon/ltq-cputemp.txt b/Documentation/devicetree/bindings/hwmon/ltq-cputemp.txt
index 33fd00a987c7..473b34c876dd 100644
--- a/Documentation/devicetree/bindings/hwmon/ltq-cputemp.txt
+++ b/Documentation/devicetree/bindings/hwmon/ltq-cputemp.txt

-Lantiq cpu temperatur sensor

diff --git a/Documentation/devicetree/bindings/hwmon/microchip,mcp3021.yaml b/Documentation/devicetree/bindings/hwmon/microchip,mcp3021.yaml
index 028d6e570131..f5e104c1b0d0 100644
--- a/Documentation/devicetree/bindings/hwmon/microchip,mcp3021.yaml
+++ b/Documentation/devicetree/bindings/hwmon/microchip,mcp3021.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml b/Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml
index bd67cfee6d19..56db2292f062 100644
--- a/Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml
+++ b/Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml

- - description: PVT temprature sensor registers

diff --git a/Documentation/devicetree/bindings/hwmon/national,lm90.yaml b/Documentation/devicetree/bindings/hwmon/national,lm90.yaml
index 7b9d48d6d6da..6e59c8fdef30 100644
--- a/Documentation/devicetree/bindings/hwmon/national,lm90.yaml
+++ b/Documentation/devicetree/bindings/hwmon/national,lm90.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.txt b/Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.txt
index 28f43e929f6d..8523777f560c 100644
--- a/Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.txt
+++ b/Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.txt

-Each fan subnode must have one PWM channel and atleast one Fan tach channel.

diff --git a/Documentation/devicetree/bindings/hwmon/nxp,mc34vr500.yaml b/Documentation/devicetree/bindings/hwmon/nxp,mc34vr500.yaml
index 306f67315835..48d654e52114 100644
--- a/Documentation/devicetree/bindings/hwmon/nxp,mc34vr500.yaml
+++ b/Documentation/devicetree/bindings/hwmon/nxp,mc34vr500.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/hwmon/sensirion,sht15.yaml b/Documentation/devicetree/bindings/hwmon/sensirion,sht15.yaml
index 80df7182ea28..14ac783c9a5f 100644
--- a/Documentation/devicetree/bindings/hwmon/sensirion,sht15.yaml
+++ b/Documentation/devicetree/bindings/hwmon/sensirion,sht15.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml b/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml
index 159238efa9ed..3d14d5fc96c5 100644
--- a/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml
+++ b/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml

- For further information refere to Documentation/hwmon/shtc1.rst

diff --git a/Documentation/devicetree/bindings/hwmon/starfive,jh71x0-temp.yaml b/Documentation/devicetree/bindings/hwmon/starfive,jh71x0-temp.yaml
index f5b34528928d..733cba780186 100644
--- a/Documentation/devicetree/bindings/hwmon/starfive,jh71x0-temp.yaml
+++ b/Documentation/devicetree/bindings/hwmon/starfive,jh71x0-temp.yaml

diff --git a/Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml b/Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml
index c5a889e3e27b..7e5b62a0215d 100644
--- a/Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml
+++ b/Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml b/Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml
index dcbc6fbc3b48..8b5307c875ff 100644
--- a/Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml
+++ b/Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml b/Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml
index fde5225ce012..cdd1489e0c54 100644
--- a/Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml
+++ b/Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml

- If 0, the calibration process will be skiped and the current and power

diff --git a/Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml b/Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml
index bce68a326919..ebc8d466c1aa 100644
--- a/Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml
+++ b/Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml

- description: The value of curent sense resistor in microohms.

diff --git a/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml b/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml
index ff57c5416ebc..9f1d35ce1fe8 100644
--- a/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml
+++ b/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml

diff --git a/Documentation/devicetree/bindings/i2c/i2c-arb-gpio-challenge.txt b/Documentation/devicetree/bindings/i2c/i2c-arb-gpio-challenge.txt
deleted file mode 100644
index 548a73cde796..000000000000
--- a/Documentation/devicetree/bindings/i2c/i2c-arb-gpio-challenge.txt
+++ /dev/null

-GPIO-based I2C Arbitration Using a Challenge & Response Mechanism

-=================================================================

-This uses GPIO lines and a challenge & response mechanism to arbitrate who is

-the master of an I2C bus in a multimaster situation.

-In many cases using GPIOs to arbitrate is not needed and a design can use

-the standard I2C multi-master rules. Using GPIOs is generally useful in

-the case where there is a device on the bus that has errata and/or bugs

-that makes standard multimaster mode not feasible.

-Note that this scheme works well enough but has some downsides:

-* It is nonstandard (not using standard I2C multimaster)

-* Having two masters on a bus in general makes it relatively hard to debug

- problems (hard to tell if i2c issues were caused by one master, another, or

- some device on the bus).

-All masters on the bus have a 'bus claim' line which is an output that the

-others can see. These are all active low with pull-ups enabled. We'll

-describe these lines as:

-- OUR_CLAIM: output from us signaling to other hosts that we want the bus

-- THEIR_CLAIMS: output from others signaling that they want the bus

-The basic algorithm is to assert your line when you want the bus, then make

-sure that the other side doesn't want it also. A detailed explanation is best

-done with an example.

-Let's say we want to claim the bus. We:

-1. Assert OUR_CLAIM.

-2. Waits a little bit for the other sides to notice (slew time, say 10

-3. Check THEIR_CLAIMS. If none are asserted then the we have the bus and we are

-4. Otherwise, wait for a few milliseconds and see if THEIR_CLAIMS are released.

-5. If not, back off, release the claim and wait for a few more milliseconds.

-6. Go back to 1 (until retry time has expired).

-Required properties:

-- compatible: i2c-arb-gpio-challenge

-- our-claim-gpio: The GPIO that we use to claim the bus.

-- their-claim-gpios: The GPIOs that the other sides use to claim the bus.

- Note that some implementations may only support a single other master.

-- I2C arbitration bus node. See i2c-arb.txt in this directory.

-Optional properties:

-- slew-delay-us: microseconds to wait for a GPIO to go high. Default is 10 us.

-- wait-retry-us: we'll attempt another claim after this many microseconds.

- Default is 3000 us.

-- wait-free-us: we'll give up after this many microseconds. Default is 50000 us.

- compatible = "acme,some-i2c-device";

- #address-cells = <1>;

- #size-cells = <0>;

- compatible = "i2c-arb-gpio-challenge";

- i2c-parent = <&{/i2c@12CA0000}>;

- our-claim-gpio = <&gpf0 3 1>;

- their-claim-gpios = <&gpe0 4 1>;

- slew-delay-us = <10>;

- wait-retry-us = <3000>;

- wait-free-us = <50000>;

- #address-cells = <1>;

- #size-cells = <0>;

- // Normal I2C device

diff --git a/Documentation/devicetree/bindings/i2c/i2c-arb-gpio-challenge.yaml b/Documentation/devicetree/bindings/i2c/i2c-arb-gpio-challenge.yaml
new file mode 100644
index 000000000000..b618b5a3433a
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-arb-gpio-challenge.yaml

-Common i2c arbitration bus properties.

-- i2c-arb child node

-Required properties for the i2c-arb child node:

-- #address-cells = <1>;

-- #size-cells = <0>;

-Optional properties for i2c-arb child node:

-- Child nodes conforming to i2c bus binding

- An NXP pca9541 I2C bus master selector at address 0x74

- with a NXP pca8574 GPIO expander attached.

- compatible = "nxp,pca9541";

- #address-cells = <1>;

- #size-cells = <0>;

- compatible = "nxp,pca8574";

- #gpio-cells = <2>;

diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
index 9f1726d0356b..2d7bb998b0e9 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml

-title: NXP PCA954x I2C bus switch

- The binding supports NXP PCA954x and PCA984x I2C mux/switch devices.

- - $ref: /schemas/i2c/i2c-mux.yaml#

- compatible = "nxp,pca9548";

-- clock-frequency: Constains desired I2C bus clock frequency in Hz.

-* NXP PCA9541 I2C bus master selector

-Required Properties:

- - compatible: Must be "nxp,pca9541"

- - reg: The I2C address of the device.

- The following required properties are defined externally:

- - I2C arbitration bus node. See i2c-arb.txt in this directory.

- i2c-arbitrator@74 {

- compatible = "nxp,pca9541";

- #address-cells = <1>;

- #size-cells = <0>;

- compatible = "atmel,24c08";

diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
index ec79b7270437..042d4dc636ee 100644
--- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
+++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml

- Dynamic address to be assigned to this device. This property is only

- valid if the I3C device has a static address (first cell of the reg

- /* I3C device with a static I2C address. */

diff --git a/Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml b/Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml
index c002afdbfc7c..5dda8cb44cdb 100644
--- a/Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml
+++ b/Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml

-$id: "http://devicetree.org/schemas/i3c/mipi-i3c-hci.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/iio/accel/fsl,mma7455.yaml b/Documentation/devicetree/bindings/iio/accel/fsl,mma7455.yaml
index c8659c5eba2a..cb31e75ba680 100644
--- a/Documentation/devicetree/bindings/iio/accel/fsl,mma7455.yaml
+++ b/Documentation/devicetree/bindings/iio/accel/fsl,mma7455.yaml

diff --git a/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml b/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml
new file mode 100644
index 000000000000..7ef46c90ebc8
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml

diff --git a/Documentation/devicetree/bindings/iio/adc/atmel,sama9260-adc.yaml b/Documentation/devicetree/bindings/iio/adc/atmel,sama9260-adc.yaml
index e6a1f915b542..1f30a8569187 100644
--- a/Documentation/devicetree/bindings/iio/adc/atmel,sama9260-adc.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/atmel,sama9260-adc.yaml

diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml
index 2127d639a768..e004659099c1 100644
--- a/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml

- Data acquisition rate in samples per second

diff --git a/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml b/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml
index be93c109d6ac..8cbad7e792b6 100644
--- a/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml

- |30 |Differential analog input signal voltage measurment. |Voltage

diff --git a/Documentation/devicetree/bindings/iio/cdc/adi,ad7150.yaml b/Documentation/devicetree/bindings/iio/cdc/adi,ad7150.yaml
index 2155d3f5666c..3d7074fd17be 100644
--- a/Documentation/devicetree/bindings/iio/cdc/adi,ad7150.yaml
+++ b/Documentation/devicetree/bindings/iio/cdc/adi,ad7150.yaml

-title: Analog device AD7150 and similar capacitance to digital convertors.

- sensors. It doesn't constitue a device tree binding specification by itself but

diff --git a/Documentation/devicetree/bindings/iio/dac/microchip,mcp4728.yaml b/Documentation/devicetree/bindings/iio/dac/microchip,mcp4728.yaml
new file mode 100644
index 000000000000..99831d7f1c16
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/dac/microchip,mcp4728.yaml

diff --git a/Documentation/devicetree/bindings/iio/frequency/adi,admv1013.yaml b/Documentation/devicetree/bindings/iio/frequency/adi,admv1013.yaml
index fc813bcb6532..f2eb2287ed9e 100644
--- a/Documentation/devicetree/bindings/iio/frequency/adi,admv1013.yaml
+++ b/Documentation/devicetree/bindings/iio/frequency/adi,admv1013.yaml

diff --git a/Documentation/devicetree/bindings/iio/frequency/adi,admv1014.yaml b/Documentation/devicetree/bindings/iio/frequency/adi,admv1014.yaml
index ab86daa2c56e..39cc63a11762 100644
--- a/Documentation/devicetree/bindings/iio/frequency/adi,admv1014.yaml
+++ b/Documentation/devicetree/bindings/iio/frequency/adi,admv1014.yaml

- External clock that provides the Local Oscilator input.

diff --git a/Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml b/Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml
index a2bc1fa92da0..79e75a8675cb 100644
--- a/Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml
+++ b/Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml

- Relative humidity and tempereature sensors on I2C bus

diff --git a/Documentation/devicetree/bindings/iio/pressure/honeywell,mprls0025pa.yaml b/Documentation/devicetree/bindings/iio/pressure/honeywell,mprls0025pa.yaml
index c0a923febf13..b31f8120f14e 100644
--- a/Documentation/devicetree/bindings/iio/pressure/honeywell,mprls0025pa.yaml
+++ b/Documentation/devicetree/bindings/iio/pressure/honeywell,mprls0025pa.yaml

- If not present the device is not resetted during the probe.

diff --git a/Documentation/devicetree/bindings/iio/proximity/ams,as3935.yaml b/Documentation/devicetree/bindings/iio/proximity/ams,as3935.yaml
index c999994e19e3..9567993ce480 100644
--- a/Documentation/devicetree/bindings/iio/proximity/ams,as3935.yaml
+++ b/Documentation/devicetree/bindings/iio/proximity/ams,as3935.yaml

- This lightening distance sensor uses an I2C or SPI interface. The

diff --git a/Documentation/devicetree/bindings/iio/proximity/murata,irsd200.yaml b/Documentation/devicetree/bindings/iio/proximity/murata,irsd200.yaml
new file mode 100644
index 000000000000..67f5389ece67
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/proximity/murata,irsd200.yaml

diff --git a/Documentation/devicetree/bindings/iio/proximity/semtech,sx9310.yaml b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9310.yaml
index 5de0bb2180e6..775555d147bf 100644
--- a/Documentation/devicetree/bindings/iio/proximity/semtech,sx9310.yaml
+++ b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9310.yaml

-additionalProperties: false

diff --git a/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml
index b3aa2ebf9661..48f221463166 100644
--- a/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml
+++ b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml

-additionalProperties: false

diff --git a/Documentation/devicetree/bindings/iio/st,st-sensors.yaml b/Documentation/devicetree/bindings/iio/st,st-sensors.yaml
index e450821a741d..fff7e3d83a02 100644
--- a/Documentation/devicetree/bindings/iio/st,st-sensors.yaml
+++ b/Documentation/devicetree/bindings/iio/st,st-sensors.yaml

- Intertial interrupt lines INT1 and INT2 if these exist. This means up to

diff --git a/Documentation/devicetree/bindings/input/azoteq,iqs7222.yaml b/Documentation/devicetree/bindings/input/azoteq,iqs7222.yaml
index 9ddba7f2e7aa..5b1769c19b17 100644
--- a/Documentation/devicetree/bindings/input/azoteq,iqs7222.yaml
+++ b/Documentation/devicetree/bindings/input/azoteq,iqs7222.yaml

-title: Azoteq IQS7222A/B/C Capacitive Touch Controller

- The Azoteq IQS7222A, IQS7222B and IQS7222C are multichannel capacitive touch

- controllers that feature additional sensing capabilities.

- 1: GPIO3 (IQS7222C only)

- 2: GPIO4 (IQS7222C only)

- Specifies the speed of movement after which coordinate filtering is

- no longer applied.

- Specifies the speed of movement after which coordinate filtering is

- Specifies the distance across which a swipe or flick gesture must

- travel in order to be acknowledged by the device. The number spec-

- ified for any one swipe or flick gesture applies to all remaining

- swipe or flick gestures.

- 1: GPIO3 (IQS7222C only)

- 2: GPIO4 (IQS7222C only)

- gpio-1: GPIO3 (IQS7222C only)

- gpio-2: GPIO4 (IQS7222C only)

- const: azoteq,iqs7222b

- "^slider-[0-1]$": false

- "^channel-([0-9]|1[0-9])$":

- azoteq,ulp-allow: false

diff --git a/Documentation/devicetree/bindings/input/elan,ekth3000.yaml b/Documentation/devicetree/bindings/input/elan,ekth3000.yaml
index 2a9bb6ace021..24dc2d69613f 100644
--- a/Documentation/devicetree/bindings/input/elan,ekth3000.yaml
+++ b/Documentation/devicetree/bindings/input/elan,ekth3000.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/input/elan,ekth6915.yaml b/Documentation/devicetree/bindings/input/elan,ekth6915.yaml
index 05e6f2df604c..3e2d216c6432 100644
--- a/Documentation/devicetree/bindings/input/elan,ekth6915.yaml
+++ b/Documentation/devicetree/bindings/input/elan,ekth6915.yaml

diff --git a/Documentation/devicetree/bindings/input/goodix,gt7375p.yaml b/Documentation/devicetree/bindings/input/goodix,gt7375p.yaml
index 1edad1da1196..358cb8275bf1 100644
--- a/Documentation/devicetree/bindings/input/goodix,gt7375p.yaml
+++ b/Documentation/devicetree/bindings/input/goodix,gt7375p.yaml

diff --git a/Documentation/devicetree/bindings/input/hid-over-i2c.yaml b/Documentation/devicetree/bindings/input/hid-over-i2c.yaml
index 7156b08f7645..138caad96a29 100644
--- a/Documentation/devicetree/bindings/input/hid-over-i2c.yaml
+++ b/Documentation/devicetree/bindings/input/hid-over-i2c.yaml

diff --git a/Documentation/devicetree/bindings/input/rmi4/rmi_2d_sensor.txt b/Documentation/devicetree/bindings/input/rmi4/rmi_2d_sensor.txt
deleted file mode 100644
index 9afffbdf6e28..000000000000
--- a/Documentation/devicetree/bindings/input/rmi4/rmi_2d_sensor.txt
+++ /dev/null

-Synaptics RMI4 2D Sensor Device Binding

-The Synaptics RMI4 core is able to support RMI4 devices using different

-transports and different functions. This file describes the device tree

-bindings for devices which contain 2D sensors using Function 11 or

-Function 12. Complete documentation for transports and other functions

-Documentation/devicetree/bindings/input/rmi4.

-RMI4 Function 11 and Function 12 are for 2D touch position sensing.

-Additional documentation for F11 can be found at:

-http://www.synaptics.com/sites/default/files/511-000136-01-Rev-E-RMI4-Interfacing-Guide.pdf

-Optional Touch Properties:

-Description in Documentation/devicetree/bindings/input/touchscreen

-- touchscreen-inverted-x

-- touchscreen-inverted-y

-- touchscreen-swapped-x-y

-Optional Properties:

-- syna,clip-x-low: Sets a minimum value for X.

-- syna,clip-y-low: Sets a minimum value for Y.

-- syna,clip-x-high: Sets a maximum value for X.

-- syna,clip-y-high: Sets a maximum value for Y.

-- syna,offset-x: Add an offset to X.

-- syna,offset-y: Add an offset to Y.

-- syna,delta-x-threshold: Set the minimum distance on the X axis required

- to generate an interrupt in reduced reporting

-- syna,delta-y-threshold: Set the minimum distance on the Y axis required

- to generate an interrupt in reduced reporting

-- syna,sensor-type: Set the sensor type. 1 for touchscreen 2 for touchpad.

-- syna,disable-report-mask: Mask for disabling posiiton reporting. Used to

- disable reporing absolute position data.

-- syna,rezero-wait-ms: Time in miliseconds to wait after issuing a rezero

-Example of a RMI4 I2C device with F11:

- compatible = "syna,rmi4-i2c";

- touchscreen-inverted-y;

- syna,sensor-type = <2>;

-Synaptics RMI4 F01 Device Binding

-The Synaptics RMI4 core is able to support RMI4 devices using different

-transports and different functions. This file describes the device tree

-bindings for devices which contain Function 1. Complete documentation

-for transports and other functions can be found in:

-Documentation/devicetree/bindings/input/rmi4.

-Additional documentation for F01 can be found at:

-http://www.synaptics.com/sites/default/files/511-000136-01-Rev-E-RMI4-Interfacing-Guide.pdf

-Optional Properties:

-- syna,nosleep-mode: If set the device will run at full power without sleeping.

- nosleep has 3 modes, 0 will not change the default

- setting, 1 will disable nosleep (allow sleeping),

- and 2 will enable nosleep (disabling sleep).

-- syna,wakeup-threshold: Defines the amplitude of the disturbance to the

- background capacitance that will cause the

- device to wake from dozing.

-- syna,doze-holdoff-ms: The delay to wait after the last finger lift and the

-- syna,doze-interval-ms: The time period that the device sleeps between finger

-Example of a RMI4 I2C device with F01:

- compatible = "syna,rmi4-i2c";

- syna,nosleep-mode = <1>;

-Synaptics RMI4 I2C Device Binding

-The Synaptics RMI4 core is able to support RMI4 devices using different

-transports and different functions. This file describes the device tree

-bindings for devices using the I2C transport driver. Complete documentation

-for other transports and functions can be found in

-Documentation/devicetree/bindings/input/rmi4.

-Required Properties:

-- compatible: syna,rmi4-i2c

-- #address-cells: Set to 1 to indicate that the function child nodes

- consist of only on uint32 value.

-- #size-cells: Set to 0 to indicate that the function child nodes do not

- have a size property.

-Optional Properties:

-- interrupts: interrupt which the rmi device is connected to.

-See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt

-- syna,reset-delay-ms: The number of milliseconds to wait after resetting the

-- syna,startup-delay-ms: The number of milliseconds to wait after powering on

-- vdd-supply: VDD power supply.

-See ../regulator/regulator.txt

-- vio-supply: VIO power supply

-See ../regulator/regulator.txt

-Function Parameters:

-Parameters specific to RMI functions are contained in child nodes of the rmi device

- node. Documentation for the parameters of each function can be found in:

-Documentation/devicetree/bindings/input/rmi4/rmi_f*.txt.

- compatible = "syna,rmi4-i2c";

- #address-cells = <1>;

- #size-cells = <0>;

- interrupt-parent = <&gpio>;

- interrupts = <4 2>;

- syna,nosleep-mode = <1>;

- touchscreen-inverted-y;

- syna,sensor-type = <2>;

-Synaptics RMI4 SPI Device Binding

-The Synaptics RMI4 core is able to support RMI4 devices using different

-transports and different functions. This file describes the device tree

-bindings for devices using the SPI transport driver. Complete documentation

-for other transports and functions can be found in

-Documentation/devicetree/bindings/input/rmi4.

-Required Properties:

-- compatible: syna,rmi4-spi

-- reg: Chip select address for the device

-- #address-cells: Set to 1 to indicate that the function child nodes

- consist of only on uint32 value.

-- #size-cells: Set to 0 to indicate that the function child nodes do not

- have a size property.

-Optional Properties:

-- interrupts: interrupt which the rmi device is connected to.

-See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt

-- spi-rx-delay-us: microsecond delay after a read transfer.

-- spi-tx-delay-us: microsecond delay after a write transfer.

-Function Parameters:

-Parameters specific to RMI functions are contained in child nodes of the rmi device

- node. Documentation for the parameters of each function can be found in:

-Documentation/devicetree/bindings/input/rmi4/rmi_f*.txt.

- compatible = "syna,rmi4-spi";

- #address-cells = <1>;

- #size-cells = <0>;

- spi-max-frequency = <4000000>;

- interrupt-parent = <&gpio>;

- interrupts = <TEGRA_GPIO(K, 2) 0x2>;

- spi-rx-delay-us = <30>;

- syna,nosleep-mode = <1>;

- touchscreen-inverted-y;

- syna,sensor-type = <2>;

-Required properties:

- - compatible : "st,stmpe-keypad"

- - linux,keymap : See ./matrix-keymap.txt

-Optional properties:

- - debounce-interval : Debouncing interval time in milliseconds

- - st,scan-count : Scanning cycles elapsed before key data is updated

- - st,no-autorepeat : If specified device will not autorepeat

- - keypad,num-rows : See ./matrix-keymap.txt

- - keypad,num-columns : See ./matrix-keymap.txt

- compatible = "st,stmpe-keypad";

- debounce-interval = <64>;

- st,scan-count = <8>;

- linux,keymap = <0x205006b

diff --git a/Documentation/devicetree/bindings/input/touchscreen/azoteq,iqs7211.yaml b/Documentation/devicetree/bindings/input/touchscreen/azoteq,iqs7211.yaml
new file mode 100644
index 000000000000..8cf371b99f19
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/touchscreen/azoteq,iqs7211.yaml

diff --git a/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml b/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml
index ef4c841387bd..f2808cb4d99d 100644
--- a/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml
+++ b/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml

diff --git a/Documentation/devicetree/bindings/input/touchscreen/eeti,exc3000.yaml b/Documentation/devicetree/bindings/input/touchscreen/eeti,exc3000.yaml
index 007adbc89c14..9dc25d30a0a8 100644
--- a/Documentation/devicetree/bindings/input/touchscreen/eeti,exc3000.yaml
+++ b/Documentation/devicetree/bindings/input/touchscreen/eeti,exc3000.yaml

diff --git a/Documentation/devicetree/bindings/input/touchscreen/melfas,mms114.yaml b/Documentation/devicetree/bindings/input/touchscreen/melfas,mms114.yaml
index fdd02898e249..07f9dd6b1c9c 100644
--- a/Documentation/devicetree/bindings/input/touchscreen/melfas,mms114.yaml
+++ b/Documentation/devicetree/bindings/input/touchscreen/melfas,mms114.yaml

diff --git a/Documentation/devicetree/bindings/input/touchscreen/stmpe.txt b/Documentation/devicetree/bindings/input/touchscreen/stmpe.txt
deleted file mode 100644
index 238b51555c04..000000000000
--- a/Documentation/devicetree/bindings/input/touchscreen/stmpe.txt
+++ /dev/null

-Required properties:

- - compatible: "st,stmpe-ts"

-Optional properties:

-- st,ave-ctrl : Sample average control

-- st,touch-det-delay : Touch detect interrupt delay (recommended is 3)

-- st,settling : Panel driver settling time (recommended is 2)

-- st,fraction-z : Length of the fractional part in z (recommended is 7)

- (fraction-z ([0..7]) = Count of the fractional part)

-- st,i-drive : current limit value of the touchscreen drivers

- 0 -> 20 mA (typical 35mA max)

- 1 -> 50 mA (typical 80 mA max)

-Optional properties common with MFD (deprecated):

- - st,sample-time : ADC conversion time in number of clock.

- 4 -> 80 clocks (recommended)

- - st,mod-12b : ADC Bit mode

- - st,ref-sel : ADC reference source

- - st,adc-freq : ADC Clock speed

-Node should be child node of stmpe node to which it belongs.

-Note that common ADC settings of stmpe_touchscreen (child) will take precedence

-over the settings done in MFD.

- compatible = "st,stmpe811";

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_touch_int>;

- #address-cells = <1>;

- #size-cells = <0>;

- interrupts = <10 IRQ_TYPE_LEVEL_LOW>;

- interrupt-parent = <&gpio4>;

- interrupt-controller;

- irq-trigger = <0x1>;

- /* Common ADC settings */

- /* 3.25 MHz ADC clock speed */

- st,adc-freq = <1>;

- /* internal ADC reference */

- /* ADC converstion time: 80 clocks */

- st,sample-time = <4>;

- stmpe_touchscreen {

- compatible = "st,stmpe-ts";

- /* 8 sample average control */

- st,ave-ctrl = <3>;

- /* 5 ms touch detect interrupt delay */

- st,touch-det-delay = <5>;

- /* 1 ms panel driver settling time */

- st,settling = <3>;

- /* 7 length fractional part in z */

- st,fraction-z = <7>;

- * 50 mA typical 80 mA max touchscreen drivers

- * current limit value

- compatible = "st,stmpe-adc";

- st,norequest-mask = <0x0F>;

diff --git a/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml b/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml
index 895592da9626..431c13335c40 100644
--- a/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml
+++ b/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml

diff --git a/Documentation/devicetree/bindings/input/touchscreen/tsc2007.txt b/Documentation/devicetree/bindings/input/touchscreen/tsc2007.txt
index ed00f61b8c08..210486a3fb11 100644
--- a/Documentation/devicetree/bindings/input/touchscreen/tsc2007.txt
+++ b/Documentation/devicetree/bindings/input/touchscreen/tsc2007.txt

-- gpios: the interrupt gpio the chip is connected to (trough the penirq pin).

diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
index 5d17bdcfdf70..73f809cdb783 100644
--- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
+++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml

diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
index 9d0a98d77ae9..21dae0b92819 100644
--- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
+++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml

diff --git a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
index 4d93ad415e0b..a46497af1fd8 100644
--- a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
+++ b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml

- - $ref: qcom,rpmh-common.yaml#

diff --git a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
index e84e4f33b358..3d06db98e978 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
index 39e64c7f6360..2bc38479a41e 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml

- range [0-15]. Extented SPI interrupts are in the range [0-1023].

diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt b/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt
index 2a1d16bdf834..ea939f54c5eb 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt

-- compatible: "arm,versatile-fpga-irq" or "oxsemi,ox810se-rps-irq"

diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
index 0f1af5a1c12e..bdd173056f72 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt

-28: DMAALL - triggers on all dma interrupts (including chanel 15)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml
index c680de1cbd56..786f2426399b 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml

- The BCM3380 Level 1 / Level 2 interrrupt controller shows up in various forms

diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
index a106ba6e810b..4847b04be1a1 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt
deleted file mode 100644
index 977d7ed3670e..000000000000
--- a/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt
+++ /dev/null

-STMicroelectronics STi System Configuration Controlled IRQs

------------------------------------------------------------

-On STi based systems; External, CTI (Core Sight), PMU (Performance Management),

-and PL310 L2 Cache IRQs are controlled using System Configuration registers.

-This driver is used to unmask them prior to use.

-Required properties:

-- compatible : Should be "st,stih407-irq-syscfg"

-- st,syscfg : Phandle to Cortex-A9 IRQ system config registers

-- st,irq-device : Array of IRQs to enable - should be 2 in length

-- st,fiq-device : Array of FIQs to enable - should be 2 in length

-Optional properties:

-- st,invert-ext : External IRQs can be inverted at will. This property inverts

- these IRQs using bitwise logic. A number of defines have been

- provided for convenience:

- ST_IRQ_SYSCFG_EXT_1_INV

- ST_IRQ_SYSCFG_EXT_2_INV

- ST_IRQ_SYSCFG_EXT_3_INV

- compatible = "st,stih407-irq-syscfg";

- st,syscfg = <&syscfg_cpu>;

- st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,

- <ST_IRQ_SYSCFG_PMU_1>;

- st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,

- <ST_IRQ_SYSCFG_DISABLED>;

diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml b/Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml
new file mode 100644
index 000000000000..2b153d7c5421
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml
index 65523d9459d8..3cd5a1822e14 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 3a31a979709b..cf29ab10501c 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml

diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
index 5b6395bc10e0..ea6b0f5f24de 100644
--- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
+++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml

- const: mediatek,mt8195-iommu-infra

diff --git a/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml b/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml
index d9fabdf930d9..a74eb899c381 100644
--- a/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml
+++ b/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml

- - qcom,msm8916-iommu

- - qcom,msm8953-iommu

- - const: qcom,msm-iommu-v1

diff --git a/Documentation/devicetree/bindings/iommu/xen,grant-dma.yaml b/Documentation/devicetree/bindings/iommu/xen,grant-dma.yaml
index be1539d234f9..3528b81daa25 100644
--- a/Documentation/devicetree/bindings/iommu/xen,grant-dma.yaml
+++ b/Documentation/devicetree/bindings/iommu/xen,grant-dma.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml
index 4ff6fabfcb30..129e32c4c774 100644
--- a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml
+++ b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml

- $ref: '/schemas/types.yaml#/definitions/uint32-array'

- $ref: "/schemas/types.yaml#/definitions/uint32-array"

- $ref: '/schemas/types.yaml#/definitions/uint32'

diff --git a/Documentation/devicetree/bindings/ipmi/ipmi-ipmb.yaml b/Documentation/devicetree/bindings/ipmi/ipmi-ipmb.yaml
index 3f25cdb4e99b..52647bff31af 100644
--- a/Documentation/devicetree/bindings/ipmi/ipmi-ipmb.yaml
+++ b/Documentation/devicetree/bindings/ipmi/ipmi-ipmb.yaml

diff --git a/Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml b/Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml
index c1b4bf95ef99..4bffa3d86128 100644
--- a/Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml
+++ b/Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml

diff --git a/Documentation/devicetree/bindings/leds/backlight/mediatek,mt6370-backlight.yaml b/Documentation/devicetree/bindings/leds/backlight/mediatek,mt6370-backlight.yaml
index 5533b6562d92..16fc98e71233 100644
--- a/Documentation/devicetree/bindings/leds/backlight/mediatek,mt6370-backlight.yaml
+++ b/Documentation/devicetree/bindings/leds/backlight/mediatek,mt6370-backlight.yaml

- Enable the backlight shutdown when OCP level triggerred.

- # LED will turn on (but for leds-gpio see "default-state" property in

- # Documentation/devicetree/bindings/leds/leds-gpio.yaml)

-* Panasonic AN30259A 3-channel LED driver

-The AN30259A is a LED controller capable of driving three LEDs independently. It supports

-constant current output and sloping current output modes. The chip is connected over I2C.

-Required properties:

- - compatible: Must be "panasonic,an30259a".

- - reg: I2C slave address.

- - #address-cells: Must be 1.

- - #size-cells: Must be 0.

-Each LED is represented as a sub-node of the panasonic,an30259a node.

-Required sub-node properties:

- - reg: Pin that the LED is connected to. Must be 1, 2, or 3.

-Optional sub-node properties:

- see Documentation/devicetree/bindings/leds/common.txt

- see Documentation/devicetree/bindings/leds/common.txt (deprecated)

- - linux,default-trigger :

- see Documentation/devicetree/bindings/leds/common.txt

-#include <dt-bindings/leds/common.h>

-led-controller@30 {

- compatible = "panasonic,an30259a";

- #address-cells = <1>;

- #size-cells = <0>;

- linux,default-trigger = "heartbeat";

- function = LED_FUNCTION_INDICATOR;

- color = <LED_COLOR_ID_RED>;

- function = LED_FUNCTION_INDICATOR;

- color = <LED_COLOR_ID_GREEN>;

- function = LED_FUNCTION_INDICATOR;

- color = <LED_COLOR_ID_BLUE>;

diff --git a/Documentation/devicetree/bindings/leds/leds-aw2013.yaml b/Documentation/devicetree/bindings/leds/leds-aw2013.yaml
index 08f3e1cfc1b1..26238446f2bd 100644
--- a/Documentation/devicetree/bindings/leds/leds-aw2013.yaml
+++ b/Documentation/devicetree/bindings/leds/leds-aw2013.yaml

diff --git a/Documentation/devicetree/bindings/leds/leds-group-multicolor.yaml b/Documentation/devicetree/bindings/leds/leds-group-multicolor.yaml
new file mode 100644
index 000000000000..8ed059a5a724
--- /dev/null
+++ b/Documentation/devicetree/bindings/leds/leds-group-multicolor.yaml

diff --git a/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml b/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml
index 058be1fedbc8..e9d4514d0166 100644
--- a/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml
+++ b/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml

- description: Maximun current at each LED channel.

diff --git a/Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml b/Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml
index e6f1999cb22f..ea84ad426df1 100644
--- a/Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml
+++ b/Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml

- value should be outputed, as defined in the datasheet. The number of

diff --git a/Documentation/devicetree/bindings/leds/nxp,pca953x.yaml b/Documentation/devicetree/bindings/leds/nxp,pca953x.yaml
index edf6f55df685..9610bca57dd5 100644
--- a/Documentation/devicetree/bindings/leds/nxp,pca953x.yaml
+++ b/Documentation/devicetree/bindings/leds/nxp,pca953x.yaml

diff --git a/Documentation/devicetree/bindings/leds/panasonic,an30259a.yaml b/Documentation/devicetree/bindings/leds/panasonic,an30259a.yaml
new file mode 100644
index 000000000000..e918dceea082
--- /dev/null
+++ b/Documentation/devicetree/bindings/leds/panasonic,an30259a.yaml

diff --git a/Documentation/devicetree/bindings/leds/rohm,bd2606mvv.yaml b/Documentation/devicetree/bindings/leds/rohm,bd2606mvv.yaml
index 14700a2e5fea..44dd91aa239d 100644
--- a/Documentation/devicetree/bindings/leds/rohm,bd2606mvv.yaml
+++ b/Documentation/devicetree/bindings/leds/rohm,bd2606mvv.yaml

diff --git a/Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml b/Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml
index 58f0d94c6d71..b7a3ef76cbf4 100644
--- a/Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml
+++ b/Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml

diff --git a/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt b/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt
index 752ae6b00d26..c80065a1eb97 100644
--- a/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt
+++ b/Documentation/devicetree/bindings/mailbox/brcm,iproc-flexrm-mbox.txt

- to CPU provided atleast one completion message is available.

diff --git a/Documentation/devicetree/bindings/mailbox/ti,omap-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/ti,omap-mailbox.yaml
index d433e496ec6e..1a2001e58880 100644
--- a/Documentation/devicetree/bindings/mailbox/ti,omap-mailbox.yaml
+++ b/Documentation/devicetree/bindings/mailbox/ti,omap-mailbox.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

- yet been converted to the ti,sysc interconnect hierarachy, but is

diff --git a/Documentation/devicetree/bindings/media/amphion,vpu.yaml b/Documentation/devicetree/bindings/media/amphion,vpu.yaml
index a9d80eaeeeb6..c0d83d755239 100644
--- a/Documentation/devicetree/bindings/media/amphion,vpu.yaml
+++ b/Documentation/devicetree/bindings/media/amphion,vpu.yaml

- "^vpu_core@[0-9a-f]+$":

- vpu_core0: vpu_core@2d080000 {

- vpu_core1: vpu_core@2d090000 {

- vpu_core2: vpu_core@2d0a0000 {

-Cadence MIPI-CSI2 RX controller

-===============================

-The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI

-lanes in input, and 4 different pixel streams in output.

-Required properties:

- - compatible: must be set to "cdns,csi2rx" and an SoC-specific compatible

- - reg: base address and size of the memory mapped region

- - clocks: phandles to the clocks driving the controller

- - clock-names: must contain:

- * sys_clk: main clock

- * p_clk: register bank clock

- * pixel_if[0-3]_clk: pixel stream output clock, one for each stream

- implemented in hardware, between 0 and 3

-Optional properties:

- - phys: phandle to the external D-PHY, phy-names must be provided

- - phy-names: must contain "dphy", if the implementation uses an

- - ports: A ports node with one port child node per device input and output

- port, in accordance with the video interface bindings defined in

- Documentation/devicetree/bindings/media/video-interfaces.txt. The

- port nodes are numbered as follows:

- -----------------------------

- The stream output port nodes are optional if they are not

- connected to anything at the hardware level or implemented

- in the design.Since there is only one endpoint per port,

- the endpoints are not numbered.

-csi2rx: csi-bridge@0d060000 {

- compatible = "cdns,csi2rx";

- reg = <0x0d060000 0x1000>;

- clocks = <&byteclock>, <&byteclock>

- <&coreclock>, <&coreclock>,

- <&coreclock>, <&coreclock>;

- clock-names = "sys_clk", "p_clk",

- "pixel_if0_clk", "pixel_if1_clk",

- "pixel_if2_clk", "pixel_if3_clk";

- #address-cells = <1>;

- #size-cells = <0>;

- csi2rx_in_sensor: endpoint {

- remote-endpoint = <&sensor_out_csi2rx>;

- clock-lanes = <0>;

- data-lanes = <1 2>;

- csi2rx_out_grabber0: endpoint {

- remote-endpoint = <&grabber0_in_csi2rx>;

- csi2rx_out_grabber1: endpoint {

- remote-endpoint = <&grabber1_in_csi2rx>;

- csi2rx_out_grabber2: endpoint {

- remote-endpoint = <&grabber2_in_csi2rx>;

- csi2rx_out_grabber3: endpoint {

- remote-endpoint = <&grabber3_in_csi2rx>;

diff --git a/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml b/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml
index 369c48fd9bf9..a6b73498bc21 100644
--- a/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml
+++ b/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml

- status = "disabled";

-* Omnivision OV5695 MIPI CSI-2 sensor

-Required Properties:

-- compatible: shall be "ovti,ov5695"

-- clocks: reference to the xvclk input clock

-- clock-names: shall be "xvclk"

-- avdd-supply: Analog voltage supply, 2.8 volts

-- dovdd-supply: Digital I/O voltage supply, 1.8 volts

-- dvdd-supply: Digital core voltage supply, 1.2 volts

-- reset-gpios: Low active reset gpio

-The device node shall contain one 'port' child node with an

-'endpoint' subnode for its digital output video port,

-in accordance with the video interface bindings defined in

-Documentation/devicetree/bindings/media/video-interfaces.txt.

-The endpoint optional property 'data-lanes' shall be "<1 2>".

- ov5695: camera-sensor@36 {

- compatible = "ovti,ov5695";

- pinctrl-names = "default";

- pinctrl-0 = <&clk_24m_cam>;

- clocks = <&cru SCLK_TESTCLKOUT1>;

- clock-names = "xvclk";

- avdd-supply = <&pp2800_cam>;

- dovdd-supply = <&pp1800>;

- dvdd-supply = <&pp1250_cam>;

- reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;

- wcam_out: endpoint {

- remote-endpoint = <&mipi_in_wcam>;

- data-lanes = <1 2>;

-* Omnivision 1/7.5-Inch B&W VGA CMOS Digital Image Sensor

-The Omnivision OV7251 is a 1/7.5-Inch CMOS active pixel digital image sensor

-with an active array size of 640H x 480V. It is programmable through a serial

-Required Properties:

-- compatible: Value should be "ovti,ov7251".

-- clocks: Reference to the xclk clock.

-- clock-names: Should be "xclk".

-- clock-frequency: Frequency of the xclk clock.

-- enable-gpios: Chip enable GPIO. Polarity is GPIO_ACTIVE_HIGH. This corresponds

- to the hardware pin XSHUTDOWN which is physically active low.

-- vdddo-supply: Chip digital IO regulator.

-- vdda-supply: Chip analog regulator.

-- vddd-supply: Chip digital core regulator.

-The device node shall contain one 'port' child node with a single 'endpoint'

-subnode for its digital output video port, in accordance with the video

-interface bindings defined in

-Documentation/devicetree/bindings/media/video-interfaces.txt.

- ov7251: camera-sensor@60 {

- compatible = "ovti,ov7251";

- enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;

- pinctrl-names = "default";

- pinctrl-0 = <&camera_bw_default>;

- clocks = <&clks 200>;

- clock-names = "xclk";

- clock-frequency = <24000000>;

- vdddo-supply = <&camera_dovdd_1v8>;

- vdda-supply = <&camera_avdd_2v8>;

- vddd-supply = <&camera_dvdd_1v2>;

- ov7251_ep: endpoint {

- clock-lanes = <1>;

- remote-endpoint = <&csi0_ep>;

diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov5693.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov5693.yaml
index 359dc08440a8..6829a4aadd22 100644
--- a/Documentation/devicetree/bindings/media/i2c/ovti,ov5693.yaml
+++ b/Documentation/devicetree/bindings/media/i2c/ovti,ov5693.yaml

-title: Omnivision OV5693 CMOS Sensor

- The Omnivision OV5693 is a high performance, 1/4-inch, 5 megapixel, CMOS

- image sensor that delivers 2592x1944 at 30fps. It provides full-frame,

- OV5693 is controlled via I2C and two-wire Serial Camera Control Bus (SCCB).

- The sensor output is available via CSI-2 serial data output (up to 2-lane).

- const: ovti,ov5693

- - link-frequencies

diff --git a/Documentation/devicetree/bindings/media/i2c/st,st-mipid02.yaml b/Documentation/devicetree/bindings/media/i2c/st,st-mipid02.yaml
index 19a39d753aad..b68141264c0e 100644
--- a/Documentation/devicetree/bindings/media/i2c/st,st-mipid02.yaml
+++ b/Documentation/devicetree/bindings/media/i2c/st,st-mipid02.yaml

diff --git a/Documentation/devicetree/bindings/media/i2c/toshiba,tc358746.yaml b/Documentation/devicetree/bindings/media/i2c/toshiba,tc358746.yaml
index b8ba85a2416c..c5cab549ee8e 100644
--- a/Documentation/devicetree/bindings/media/i2c/toshiba,tc358746.yaml
+++ b/Documentation/devicetree/bindings/media/i2c/toshiba,tc358746.yaml

- parallel-out The chip is programmable trough I2C and SPI but the SPI

diff --git a/Documentation/devicetree/bindings/media/i2c/tvp5150.txt b/Documentation/devicetree/bindings/media/i2c/tvp5150.txt
index 719b2995dc17..94b908ace53c 100644
--- a/Documentation/devicetree/bindings/media/i2c/tvp5150.txt
+++ b/Documentation/devicetree/bindings/media/i2c/tvp5150.txt

- instead of using the autodetection mechnism. Please look at

diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml
index fad59b486d5d..b401c67e3ba0 100644
--- a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml

- - const: vcodecpll

- - const: univpll_d2

- - const: clk_cci400_sel

- - const: venc_lt_sel

- - const: vdec_bus_clk_src

- - assigned-clock-parents

- vcodec_dec: vcodec@16000000 {

- reg = <0x16000000 0x100>, /*VDEC_SYS*/

- <0x16020000 0x1000>, /*VDEC_MISC*/

diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
index dca9b0c5e106..a500a585c692 100644
--- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml

- to lat and core hardware deocder. Lat workqueue need to get input bitstream and lat buffer,

diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
index 6038b9b5ab36..e4665469a86c 100644
--- a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
+++ b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml

- const: fsl,imx8mn-isi

diff --git a/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml b/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml
index 2350bf4b370e..9410f13ca97c 100644
--- a/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml
+++ b/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml

- const: "venus-decoder"

- const: "venus-encoder"

diff --git a/Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml
index 7915dcd2d99f..f66033ae8b59 100644
--- a/Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml
+++ b/Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml

- #include <dt-bindings/power/qcom-rpmpd.h>

- <&rpmhpd SM8250_MX>;

diff --git a/Documentation/devicetree/bindings/media/rockchip-isp1.yaml b/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
index 0bad7e640148..e466dff8286d 100644
--- a/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
+++ b/Documentation/devicetree/bindings/media/rockchip-isp1.yaml

diff --git a/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml b/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml
index a02724221ff3..b40cec0eb651 100644
--- a/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml

diff --git a/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml b/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml
index 5acfcad12bb7..8d9dae15ade0 100644
--- a/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml

diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
index aee7f6cf1300..2381660b324c 100644
--- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml

- hardward id is not consecutive from its M4U point of view.

diff --git a/Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml b/Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml
index fb4920397d08..4e4af3cfc0fe 100644
--- a/Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml

- (incluing command line, address line and clock line) drive strength.

- srpd_lite_idle nanoseonds. This parameter is for LPDDR4 only.

diff --git a/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml b/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml
index 75143db51411..b74ad9a3305c 100644
--- a/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml

- (16-bit) configuration. It is cappable of correcting single bit ECC errors

diff --git a/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml b/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml
index cf94176fe1eb..8789e3639ff7 100644
--- a/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml
+++ b/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml

- # Already checked in the main schema

- additionalProperties: false

- # Already checked in the main schema

- additionalProperties: false

- # Already checked in the main schema

- additionalProperties: false

- # Already checked in the main schema

- additionalProperties: false

- # Already checked in the main schema

- additionalProperties: false

diff --git a/Documentation/devicetree/bindings/mfd/allwinner,sun8i-a23-prcm.yaml b/Documentation/devicetree/bindings/mfd/allwinner,sun8i-a23-prcm.yaml
index 16c80a7eec49..e51f85519911 100644
--- a/Documentation/devicetree/bindings/mfd/allwinner,sun8i-a23-prcm.yaml
+++ b/Documentation/devicetree/bindings/mfd/allwinner,sun8i-a23-prcm.yaml

- # Already checked in the main schema

- additionalProperties: false

- # Already checked in the main schema

- additionalProperties: false

- # Already checked in the main schema

- additionalProperties: false

- const: allwinner,sun8i-a23-codec-analog

- # Already checked in the main schema

- additionalProperties: false

diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml b/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml
index 750996d9a175..5dfe77aca167 100644
--- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml
+++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml

- * A set of SuperIO[3] scratch registers enableing implementation of e.g. custom

diff --git a/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt b/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt
index 9d837535637b..af692e8833a5 100644
--- a/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt
+++ b/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt

diff --git a/Documentation/devicetree/bindings/mfd/atmel-gpbr.txt b/Documentation/devicetree/bindings/mfd/atmel-gpbr.txt
index e8c525569f10..3c989d1760a2 100644
--- a/Documentation/devicetree/bindings/mfd/atmel-gpbr.txt
+++ b/Documentation/devicetree/bindings/mfd/atmel-gpbr.txt

diff --git a/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt b/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt
index 5f8880cc757e..7de696eefaed 100644
--- a/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt
+++ b/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt

diff --git a/Documentation/devicetree/bindings/mfd/atmel-matrix.txt b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
index 89d05c64fb01..6e5f83614e83 100644
--- a/Documentation/devicetree/bindings/mfd/atmel-matrix.txt
+++ b/Documentation/devicetree/bindings/mfd/atmel-matrix.txt

diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml
index 9f9a14af875e..cb480162f967 100644
--- a/Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml
+++ b/Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml

- $ref: "../gpio/brcm,bcm63xx-gpio.yaml"

- $ref: "../pinctrl/brcm,bcm6318-pinctrl.yaml"

diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml
index 803277dd2725..c14def1b2ad2 100644
--- a/Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml
+++ b/Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml

- $ref: "../gpio/brcm,bcm63xx-gpio.yaml"

- $ref: "../pinctrl/brcm,bcm63268-pinctrl.yaml"

diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml
index b9a6856ce970..5f48209ed40f 100644
--- a/Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml
+++ b/Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml

- $ref: "../gpio/brcm,bcm63xx-gpio.yaml"

- $ref: "../pinctrl/brcm,bcm6328-pinctrl.yaml"

diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml
index 4651fe4dde07..f1f4629565d9 100644
--- a/Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml
+++ b/Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml

- $ref: "../gpio/brcm,bcm63xx-gpio.yaml"

- $ref: "../pinctrl/brcm,bcm6358-pinctrl.yaml"

diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml
index 0330b621fd38..4d594739b382 100644
--- a/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml
+++ b/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml

- $ref: "../gpio/brcm,bcm63xx-gpio.yaml"

- $ref: "../pinctrl/brcm,bcm6362-pinctrl.yaml"

diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml
index 82d3e4415bda..aae83d432880 100644
--- a/Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml
+++ b/Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml

- $ref: "../gpio/brcm,bcm63xx-gpio.yaml"

- $ref: "../pinctrl/brcm,bcm6368-pinctrl.yaml"

diff --git a/Documentation/devicetree/bindings/mfd/maxim,max77693.yaml b/Documentation/devicetree/bindings/mfd/maxim,max77693.yaml
index 1b06a77ec798..9804d13de648 100644
--- a/Documentation/devicetree/bindings/mfd/maxim,max77693.yaml
+++ b/Documentation/devicetree/bindings/mfd/maxim,max77693.yaml

diff --git a/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml b/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml
index e6a2387d8650..9e4eed34dae8 100644
--- a/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml
+++ b/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml

- - Guru Das Srinagesh <gurus@codeaurora.org>

diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
index 8b9a2008a354..9f03436b1cdc 100644
--- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
+++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml

- additionalProperties: true # FIXME qcom,pm8916-wcd-analog-codec binding not converted yet

diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
index 7ab7b2c7f3e6..d783cc4e4e86 100644
--- a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
+++ b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml

- #include <dt-bindings/leds/common.h>

diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml
index 10f207a38178..b7b323b1a4f2 100644
--- a/Documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml
+++ b/Documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml

- enable sate is controlled via this pin. Set this property if vout1-en

- Watchog timeout in milliseconds. If single value is given it is

diff --git a/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml b/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml
index 97c61097f9e2..b17ebeb0a42f 100644
--- a/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml
+++ b/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml

- "^(buck[1-4]|ldo[1-6]|boost|vref_ddr|pwr_sw[1-2])$":

- $ref: ../regulator/regulator.yaml

diff --git a/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml b/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml
index 6c8d42f27fe8..94f9767a927d 100644
--- a/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml
+++ b/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml

- description: Earpeice voltage

- description: The voltage for the auxilary LDO regulator 1

- description: The voltage for the auxilary LDO regulator 2

- description: The voltage for the auxilary LDO regulator 3

- description: The voltage for the auxilary LDO regulator 4

- description: The voltage for the auxilary LDO regulator 5

- description: The voltage for the auxilary LDO regulator 6

- description: The voltage for the auxilary LDO regulator 8

diff --git a/Documentation/devicetree/bindings/mfd/stericsson,db8500-prcmu.yaml b/Documentation/devicetree/bindings/mfd/stericsson,db8500-prcmu.yaml
index 1d4d88f7e82d..5e0002f099e4 100644
--- a/Documentation/devicetree/bindings/mfd/stericsson,db8500-prcmu.yaml
+++ b/Documentation/devicetree/bindings/mfd/stericsson,db8500-prcmu.yaml

- description: RF transciever voltage regulator.

-* ST Microelectronics STMPE Multi-Functional Device

-STMPE is an MFD device which may expose the following inbuilt devices: gpio,

-keypad, touchscreen, adc, pwm, rotator.

-Required properties:

- - compatible : "st,stmpe[610|801|811|1600|1601|2401|2403]"

- - reg : I2C/SPI address of the device

-Optional properties:

- - interrupts : The interrupt outputs from the controller

- - interrupt-controller : Marks the device node as an interrupt controller

- - wakeup-source : Marks the input device as wakable

- - st,autosleep-timeout : Valid entries (ms); 4, 16, 32, 64, 128, 256, 512 and 1024

- - irq-gpio : If present, which GPIO to use for event IRQ

-Optional properties for devices with touch and ADC (STMPE811|STMPE610):

- - st,sample-time : ADC conversion time in number of clock.

- 0 -> 36 clocks 4 -> 80 clocks (recommended)

- 1 -> 44 clocks 5 -> 96 clocks

- 2 -> 56 clocks 6 -> 124 clocks

- - st,mod-12b : ADC Bit mode

- 0 -> 10bit ADC 1 -> 12bit ADC

- - st,ref-sel : ADC reference source

- 0 -> internal 1 -> external

- - st,adc-freq : ADC Clock speed

- 0 -> 1.625 MHz 2 || 3 -> 6.5 MHz

- stmpe1601: stmpe1601@40 {

- compatible = "st,stmpe1601";

- interrupts = <26 0x4>;

- interrupt-parent = <&gpio6>;

- interrupt-controller;

- st,autosleep-timeout = <1024>;

diff --git a/Documentation/devicetree/bindings/mips/loongson/ls2k-reset.yaml b/Documentation/devicetree/bindings/mips/loongson/ls2k-reset.yaml
index 20b5836efd90..358ac8cd4d1d 100644
--- a/Documentation/devicetree/bindings/mips/loongson/ls2k-reset.yaml
+++ b/Documentation/devicetree/bindings/mips/loongson/ls2k-reset.yaml

-$id: "http://devicetree.org/schemas/mips/loongson/ls2k-reset.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/mips/loongson/rs780e-acpi.yaml b/Documentation/devicetree/bindings/mips/loongson/rs780e-acpi.yaml
index 7c0f9022202c..3e3a3705e879 100644
--- a/Documentation/devicetree/bindings/mips/loongson/rs780e-acpi.yaml
+++ b/Documentation/devicetree/bindings/mips/loongson/rs780e-acpi.yaml

-$id: "http://devicetree.org/schemas/mips/loongson/rs780e-acpi.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/misc/intel,ixp4xx-ahb-queue-manager.yaml b/Documentation/devicetree/bindings/misc/intel,ixp4xx-ahb-queue-manager.yaml
index 38ab0499102d..36a9dbdf3f03 100644
--- a/Documentation/devicetree/bindings/misc/intel,ixp4xx-ahb-queue-manager.yaml
+++ b/Documentation/devicetree/bindings/misc/intel,ixp4xx-ahb-queue-manager.yaml

-$id: "http://devicetree.org/schemas/misc/intel,ixp4xx-ahb-queue-manager.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml
index a6c19a6cc99e..3e99801f77d2 100644
--- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml

diff --git a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml
index 3ee758886558..3a8e74894ae0 100644
--- a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml

diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml
index 86c73fd825fd..58ae298cd2fc 100644
--- a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml
+++ b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml

- mmc-pwrseq-simple.txt. But now it\'s reused as a tunable delay

- PLL of the source clock.

- assigned-clock-parents:

- parent of source clock, used for HS400 mode to get 400Mhz source clock.

-In addition to the properties described in this docuent, the details

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-atmel.txt b/Documentation/devicetree/bindings/mmc/sdhci-atmel.txt
index 69edfd4d3922..a9fb0a91245f 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-atmel.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-atmel.txt

-- compatible: Must be "atmel,sama5d2-sdhci" or "microchip,sam9x60-sdhci".

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
index 6da28e630577..80141eb7fc6b 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml

- #include <dt-bindings/power/qcom-rpmpd.h>

- power-domains = <&rpmhpd SM8250_CX>;

diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
index 57d077c0b7c1..7a0e9dcdc444 100644
--- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
+++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt

-In suspend the fclk is off and the module is disfunctional. Even register reads

diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
index 787ef488dd5b..57b6957c8415 100644
--- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
+++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml

diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
index 89959e5c47ba..58f0cea160ef 100644
--- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
+++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml

- Must also include "jedec,spi-nor" for any SPI NOR flash that can be

- identified by the JEDEC READ ID opcode (0x9F).

diff --git a/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml
index a10729bb1840..1ecea848e8b9 100644
--- a/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml
+++ b/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml

diff --git a/Documentation/devicetree/bindings/mtd/microchip,mchp48l640.yaml b/Documentation/devicetree/bindings/mtd/microchip,mchp48l640.yaml
index 00882892f47e..0ff32bd00bf6 100644
--- a/Documentation/devicetree/bindings/mtd/microchip,mchp48l640.yaml
+++ b/Documentation/devicetree/bindings/mtd/microchip,mchp48l640.yaml

-$id: "http://devicetree.org/schemas/mtd/microchip,mchp48l640.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
index 83a4fe4cc29d..28167c0cf271 100644
--- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml
+++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml

-# SPDX-License-Identifier: GPL-2.0

-* Oxford Semiconductor OXNAS NAND Controller

-Please refer to nand-controller.yaml for generic information regarding MTD NAND bindings.

-Required properties:

- - compatible: "oxsemi,ox820-nand"

- - reg: Base address and length for NAND mapped memory.

-Optional Properties:

- - clocks: phandle to the NAND gate clock if needed.

- - resets: phandle to the NAND reset control if needed.

-nandc: nand-controller@41000000 {

- compatible = "oxsemi,ox820-nand";

- reg = <0x41000000 0x100000>;

- clocks = <&stdclk CLK_820_NAND>;

- resets = <&reset RESET_NAND>;

- #address-cells = <1>;

- #size-cells = <0>;

- #address-cells = <1>;

- #size-cells = <1>;

- nand-ecc-mode = "soft";

- nand-ecc-algo = "hamming";

- reg = <0x00000000 0x00e00000>;

- partition@e00000 {

- reg = <0x00e00000 0x07200000>;

diff --git a/Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml b/Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml
index 56cbb42b5aea..eba2f3026ab0 100644
--- a/Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml
+++ b/Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml

diff --git a/Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt b/Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt
index d0935d2afef8..284cddb3118e 100644
--- a/Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt
+++ b/Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt

-* Broadcom Starfighter 2 integrated swich

diff --git a/Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml b/Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml
index 0be426ee1e44..6684810fcbf0 100644
--- a/Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml
+++ b/Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml

diff --git a/Documentation/devicetree/bindings/net/can/allwinner,sun4i-a10-can.yaml b/Documentation/devicetree/bindings/net/can/allwinner,sun4i-a10-can.yaml
index 9c494957a07a..e42ea28d6ab4 100644
--- a/Documentation/devicetree/bindings/net/can/allwinner,sun4i-a10-can.yaml
+++ b/Documentation/devicetree/bindings/net/can/allwinner,sun4i-a10-can.yaml

- const: allwinner,sun8i-r40-can

diff --git a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml
index 67879aab623b..f9ffb963d6b1 100644
--- a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml
+++ b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml

-additionalProperties: false

- a resonable value will be calculated.

diff --git a/Documentation/devicetree/bindings/net/can/tcan4x5x.txt b/Documentation/devicetree/bindings/net/can/tcan4x5x.txt
index e3501bfa22e9..170e23f0610d 100644
--- a/Documentation/devicetree/bindings/net/can/tcan4x5x.txt
+++ b/Documentation/devicetree/bindings/net/can/tcan4x5x.txt

- - compatible: "ti,tcan4x5x"

- a sleep state or if the device is active.

- - device-wake-gpios: Wake up GPIO to wake up the TCAN device.

diff --git a/Documentation/devicetree/bindings/net/can/xilinx,can.yaml b/Documentation/devicetree/bindings/net/can/xilinx,can.yaml
index 897d2cbda45b..64d57c343e6f 100644
--- a/Documentation/devicetree/bindings/net/can/xilinx,can.yaml
+++ b/Documentation/devicetree/bindings/net/can/xilinx,can.yaml

-Davicom DM9000 Fast Ethernet controller

-Required properties:

-- compatible = "davicom,dm9000";

-- reg : physical addresses and sizes of registers, must contain 2 entries:

- first entry : address register,

- second entry : data register.

-- interrupts : interrupt specifier specific to interrupt controller

-Optional properties:

-- davicom,no-eeprom : Configuration EEPROM is not available

-- davicom,ext-phy : Use external PHY

-- reset-gpios : phandle of gpio that will be used to reset chip during probe

-- vcc-supply : phandle of regulator that will be used to enable power to chip

- ethernet@18000000 {

- compatible = "davicom,dm9000";

- reg = <0x18000000 0x2 0x18000004 0x2>;

- interrupt-parent = <&gpn>;

- interrupts = <7 4>;

- local-mac-address = [00 00 de ad be ef];

- davicom,no-eeprom;

- reset-gpios = <&gpf 12 GPIO_ACTIVE_LOW>;

- vcc-supply = <&eth0_power>;

diff --git a/Documentation/devicetree/bindings/net/dsa/brcm,sf2.yaml b/Documentation/devicetree/bindings/net/dsa/brcm,sf2.yaml
index c745407f2f68..b06c416893ff 100644
--- a/Documentation/devicetree/bindings/net/dsa/brcm,sf2.yaml
+++ b/Documentation/devicetree/bindings/net/dsa/brcm,sf2.yaml

-title: Broadcom Starfighter 2 integrated swich

diff --git a/Documentation/devicetree/bindings/net/dsa/marvell.txt b/Documentation/devicetree/bindings/net/dsa/marvell.txt
index 33726134f5c9..6ec0c181b6db 100644
--- a/Documentation/devicetree/bindings/net/dsa/marvell.txt
+++ b/Documentation/devicetree/bindings/net/dsa/marvell.txt

- 6163, 6190, 6190X, 6191, 6290, 6390, 6390X

diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
index e51be1ac0362..03b5567be389 100644
--- a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
+++ b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml

diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
index 6b0d359367da..9f6a5ccbcefe 100644
--- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml
+++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml

diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
index c1241c8a3b77..8fb2a6ee7e5b 100644
--- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml
+++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml

- TX/RX lanes. This property allows the PHY to work correcly after

-* Faraday Technology FTGMAC100 gigabit ethernet controller

-Required properties:

-- compatible: "faraday,ftgmac100"

- Must also contain one of these if used as part of an Aspeed AST2400

- or 2500 family SoC as they have some subtle tweaks to the

- - "aspeed,ast2400-mac"

- - "aspeed,ast2500-mac"

- - "aspeed,ast2600-mac"

-- reg: Address and length of the register set for the device

-- interrupts: Should contain ethernet controller interrupt

-Optional properties:

-- phy-handle: See ethernet.txt file in the same directory.

-- phy-mode: See ethernet.txt file in the same directory. If the property is

- absent, "rgmii" is assumed. Supported values are "rgmii*" and "rmii" for

- aspeed parts. Other (unknown) parts will accept any value.

-- use-ncsi: Use the NC-SI stack instead of an MDIO PHY. Currently assumes

- rmii (100bT) but kept as a separate property in case NC-SI grows support

- for a gigabit link.

-- no-hw-checksum: Used to disable HW checksum support. Here for backward

- compatibility as the driver now should have correct defaults based on

-- clocks: In accordance with the generic clock bindings. Must describe the MAC

- IP clock, and optionally an RMII RCLK gate for the AST2500/AST2600. The

- required MAC clock must be the first cell.

- - "MACCLK": The MAC IP clock

- - "RCLK": Clock gate for the RMII RCLK

-- mdio: See mdio.txt file in the same directory.

- mac0: ethernet@1e660000 {

- compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";

- reg = <0x1e660000 0x180>;

-Example with phy-handle:

- mac1: ethernet@1e680000 {

- compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";

- reg = <0x1e680000 0x180>;

- phy-handle = <&phy>;

- phy-mode = "rgmii";

- #address-cells = <1>;

- #size-cells = <0>;

- phy: ethernet-phy@1 {

- compatible = "ethernet-phy-ieee802.3-c22";

diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml
index 31cc0c412805..e74502a0afe8 100644
--- a/Documentation/devicetree/bindings/net/mediatek,net.yaml
+++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml

- mediatek,infracfg:

- $ref: /schemas/types.yaml#/definitions/phandle

- Phandle to the syscon node that handles the path from GMAC to

diff --git a/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml b/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml
index 5aa320c8af5a..ed9d845f6008 100644
--- a/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml

- Otherwise, PHY WOL is perferred.

diff --git a/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml b/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml
index 0b97e14d947f..77c9bbf987e1 100644
--- a/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml
+++ b/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml

- - usb424,9909 # SMSC9512/9514 USB Hub & Ethernet Devic. ID)

diff --git a/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml b/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml
index 157e3bbcaf6f..26688e2302ea 100644
--- a/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml
+++ b/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml

diff --git a/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml b/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml
index 8e9a95f24c80..89663fdd3eba 100644
--- a/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml
+++ b/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml

- trigged on falling edge.

- trigged on rising edge.

-* Oxford Semiconductor OXNAS DWMAC Ethernet controller

-The device inherits all the properties of the dwmac/stmmac devices

-described in the file stmmac.txt in the current directory with the

-Required properties on all platforms:

-- compatible: For the OX820 SoC, it should be :

- - "oxsemi,ox820-dwmac" to select glue

- - "snps,dwmac-3.512" to select IP version.

- For the OX810SE SoC, it should be :

- - "oxsemi,ox810se-dwmac" to select glue

- - "snps,dwmac-3.512" to select IP version.

-- clocks: Should contain phandles to the following clocks

-- clock-names: Should contain the following:

- - "stmmaceth" for the host clock - see stmmac.txt

- - "gmac" for the peripheral gate clock

-- oxsemi,sys-ctrl: a phandle to the system controller syscon node

-etha: ethernet@40400000 {

- compatible = "oxsemi,ox820-dwmac", "snps,dwmac-3.512";

- reg = <0x40400000 0x2000>;

- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;

- interrupt-names = "macirq", "eth_wake_irq";

- mac-address = [000000000000]; /* Filled in by U-Boot */

- phy-mode = "rgmii";

- clocks = <&stdclk CLK_820_ETHA>, <&gmacclk>;

- clock-names = "gmac", "stmmaceth";

- resets = <&reset RESET_MAC>;

- /* Regmap for sys registers */

- oxsemi,sys-ctrl = <&sys>;

diff --git a/Documentation/devicetree/bindings/net/qca,ar803x.yaml b/Documentation/devicetree/bindings/net/qca,ar803x.yaml
index 161d28919316..3acd09f0da86 100644
--- a/Documentation/devicetree/bindings/net/qca,ar803x.yaml
+++ b/Documentation/devicetree/bindings/net/qca,ar803x.yaml

diff --git a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml b/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml
index 7f324c6da915..70bbc4220e2a 100644
--- a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml

diff --git a/Documentation/devicetree/bindings/net/samsung-sxgbe.txt b/Documentation/devicetree/bindings/net/samsung-sxgbe.txt
index 2cff6d8a585a..b9381b761a27 100644
--- a/Documentation/devicetree/bindings/net/samsung-sxgbe.txt
+++ b/Documentation/devicetree/bindings/net/samsung-sxgbe.txt

- trasmit DMA interrupts, receive DMA interrupts and lpi interrupt.

- index 1 to 25 - 8 variable trasmit interrupts, variable 16 receive interrupts

diff --git a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
index ad3c6e109ce1..bb0224a3e826 100644
--- a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
+++ b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt

-- snps,burst-map: Bitmap of allowed AXI burst lengts, with the LSB

- posssible values from "txclk", "clk_125" or "clkgen".

diff --git a/Documentation/devicetree/bindings/net/wireless/mediatek,mt76.yaml b/Documentation/devicetree/bindings/net/wireless/mediatek,mt76.yaml
index 67b63f119f64..252207adbc54 100644
--- a/Documentation/devicetree/bindings/net/wireless/mediatek,mt76.yaml
+++ b/Documentation/devicetree/bindings/net/wireless/mediatek,mt76.yaml

- mediatek,mtd-eeprom = <&factory 0x0>;

-XILINX GMIITORGMII Converter Driver Device Tree Bindings

---------------------------------------------------------

-The Gigabit Media Independent Interface (GMII) to Reduced Gigabit Media

-Independent Interface (RGMII) core provides the RGMII between RGMII-compliant

-Ethernet physical media devices (PHY) and the Gigabit Ethernet controller.

-This core can be used in all three modes of operation(10/100/1000 Mb/s).

-The Management Data Input/Output (MDIO) interface is used to configure the

-Speed of operation. This core can switch dynamically between the three

-Different speed modes by configuring the conveter register through mdio write.

-This converter sits between the ethernet MAC and the external phy.

-MAC <==> GMII2RGMII <==> RGMII_PHY

-For more details about mdio please refer phy.txt file in the same directory.

-Required properties:

-- compatible : Should be "xlnx,gmii-to-rgmii-1.0"

-- reg : The ID number for the phy, usually a small integer

-- phy-handle : Should point to the external phy device.

- See ethernet.txt file in the same directory.

- #address-cells = <1>;

- #size-cells = <0>;

- phy: ethernet-phy@0 {

- gmiitorgmii: gmiitorgmii@8 {

- compatible = "xlnx,gmii-to-rgmii-1.0";

- phy-handle = <&phy>;

-- altr,has-mul: Specifies CPU hardware multipy support, should be 1.

diff --git a/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml b/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml
index e698098450e1..ac2381e66027 100644
--- a/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml
+++ b/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml

diff --git a/Documentation/devicetree/bindings/nvmem/layouts/fixed-layout.yaml b/Documentation/devicetree/bindings/nvmem/layouts/fixed-layout.yaml
index c271537d0714..9bd34bd5af30 100644
--- a/Documentation/devicetree/bindings/nvmem/layouts/fixed-layout.yaml
+++ b/Documentation/devicetree/bindings/nvmem/layouts/fixed-layout.yaml

diff --git a/Documentation/devicetree/bindings/nvmem/layouts/onie,tlv-layout.yaml b/Documentation/devicetree/bindings/nvmem/layouts/onie,tlv-layout.yaml
index 714a6538cc7c..ee8ac322332d 100644
--- a/Documentation/devicetree/bindings/nvmem/layouts/onie,tlv-layout.yaml
+++ b/Documentation/devicetree/bindings/nvmem/layouts/onie,tlv-layout.yaml

- number, hardware version, mac addresses, etc). The underlaying device type

- $ref: layouts/fixed-cell.yaml

diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
index 6cd4682a167d..8740938c32eb 100644
--- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
+++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml

diff --git a/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
new file mode 100644
index 000000000000..02d1d2c17129
--- /dev/null
+++ b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml

diff --git a/Documentation/devicetree/bindings/opp/opp-v2-base.yaml b/Documentation/devicetree/bindings/opp/opp-v2-base.yaml
index 47e6f36b7637..e2f8f7af3cf4 100644
--- a/Documentation/devicetree/bindings/opp/opp-v2-base.yaml
+++ b/Documentation/devicetree/bindings/opp/opp-v2-base.yaml

diff --git a/Documentation/devicetree/bindings/opp/ti-omap5-opp-supply.txt b/Documentation/devicetree/bindings/opp/ti-omap5-opp-supply.txt
deleted file mode 100644
index b70d326117cd..000000000000
--- a/Documentation/devicetree/bindings/opp/ti-omap5-opp-supply.txt
+++ /dev/null

-Texas Instruments OMAP compatible OPP supply description

-OMAP5, DRA7, and AM57 family of SoCs have Class0 AVS eFuse registers which

-contain data that can be used to adjust voltages programmed for some of their

-supplies for more efficient operation. This binding provides the information

-needed to read these values and use them to program the main regulator during

-an OPP transitions.

-Also, some supplies may have an associated vbb-supply which is an Adaptive Body

-Bias regulator which much be transitioned in a specific sequence with regards

-to the vdd-supply and clk when making an OPP transition. By supplying two

-regulators to the device that will undergo OPP transitions we can make use

-of the multi regulator binding that is part of the OPP core described here [1]

-to describe both regulators needed by the platform.

-[1] Documentation/devicetree/bindings/opp/opp-v2.yaml

-Required Properties for Device Node:

-- vdd-supply: phandle to regulator controlling VDD supply

-- vbb-supply: phandle to regulator controlling Body Bias supply

- (Usually Adaptive Body Bias regulator)

-Required Properties for opp-supply node:

-- compatible: Should be one of:

- "ti,omap-opp-supply" - basic OPP supply controlling VDD and VBB

- "ti,omap5-opp-supply" - OMAP5+ optimized voltages in efuse(class0)VDD

- "ti,omap5-core-opp-supply" - OMAP5+ optimized voltages in efuse(class0) VDD

-- reg: Address and length of the efuse register set for the device (mandatory

- only for "ti,omap5-opp-supply")

-- ti,efuse-settings: An array of u32 tuple items providing information about

- optimized efuse configuration. Each item consists of the following:

- volt: voltage in uV - reference voltage (OPP voltage)

- efuse_offseet: efuse offset from reg where the optimized voltage is stored.

-- ti,absolute-max-voltage-uv: absolute maximum voltage for the OPP supply.

-/* Device Node (CPU) */

- device_type = "cpu";

- vdd-supply = <&vcc>;

- vbb-supply = <&abb_mpu>;

-/* OMAP OPP Supply with Class0 registers */

-opp_supply_mpu: opp_supply@4a003b20 {

- compatible = "ti,omap5-opp-supply";

- reg = <0x4a003b20 0x8>;

- ti,efuse-settings = <

- ti,absolute-max-voltage-uv = <1500000>;

diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
index 811112255d7d..a223ce029cab 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml

- - qcom,sdx55-pcie-ep

- - qcom,sdx65-pcie-ep

- - qcom,sm8450-pcie-ep

- - qcom,sdx65-pcie-ep

diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index 81971be4e554..eadba38171e1 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml

diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
index a4f61ced5e88..1ae8dcfa072c 100644
--- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml

diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
index 1a83f0f65f19..8bbdeb8821f8 100644
--- a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml

diff --git a/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml
index b35c4d256e40..99eac888ae03 100644
--- a/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
index 230a17f24966..2bb91542e984 100644
--- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
+++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml

- pattern: "^t-phy@[0-9a-f]+$"

diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra210-xusb-padctl.yaml b/Documentation/devicetree/bindings/phy/nvidia,tegra210-xusb-padctl.yaml
index d16bd6e47f90..e9237c58ce45 100644
--- a/Documentation/devicetree/bindings/phy/nvidia,tegra210-xusb-padctl.yaml
+++ b/Documentation/devicetree/bindings/phy/nvidia,tegra210-xusb-padctl.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
index 0d70c8341095..104953e849e7 100644
--- a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
+++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt

-contains the PHY configuration register, and each device suppports up to 2 PHY

diff --git a/Documentation/devicetree/bindings/phy/pistachio-usb-phy.txt b/Documentation/devicetree/bindings/phy/pistachio-usb-phy.txt
index afbc7e24a3de..c7970c07ee32 100644
--- a/Documentation/devicetree/bindings/phy/pistachio-usb-phy.txt
+++ b/Documentation/devicetree/bindings/phy/pistachio-usb-phy.txt

- - img,cr-top: Must constain a phandle to the CR_TOP syscon node.

diff --git a/Documentation/devicetree/bindings/phy/pxa1928-usb-phy.txt b/Documentation/devicetree/bindings/phy/pxa1928-usb-phy.txt
index 660a13ca90b3..da94426aa694 100644
--- a/Documentation/devicetree/bindings/phy/pxa1928-usb-phy.txt
+++ b/Documentation/devicetree/bindings/phy/pxa1928-usb-phy.txt

-- #phys-cells: should be 0. From commmon phy binding.

diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml
new file mode 100644
index 000000000000..2671a048c926
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml

diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml
index 3d42ee3901a1..5073007267ad 100644
--- a/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml

- Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see

- qcom,sc8280xp-qmp-pcie-phy.yaml.

- - qcom,msm8998-qmp-pcie-phy

- - qcom,sc8180x-qmp-pcie-phy

- - qcom,sdm845-qhp-pcie-phy

- - qcom,sdm845-qmp-pcie-phy

- - qcom,sdx55-qmp-pcie-phy

- - qcom,sm8250-qmp-gen3x1-pcie-phy

- - qcom,sm8250-qmp-gen3x2-pcie-phy

- - qcom,sm8250-qmp-modem-pcie-phy

- - qcom,sm8450-qmp-gen3x1-pcie-phy

- - qcom,sm8450-qmp-gen4x2-pcie-phy

- vdda-phy-supply: true

- vdda-pll-supply: true

- vddp-ref-clk-supply: true

- "^phy@[0-9a-f]+$":

- description: single PHY-provider child node

- - description: PIPE clock

- clock-output-names:

- - clock-output-names

- additionalProperties: false

- - "#address-cells"

- - qcom,msm8998-qmp-pcie-phy

- - qcom,ipq6018-qmp-pcie-phy

- - qcom,ipq8074-qmp-gen3-pcie-phy

- - qcom,ipq8074-qmp-pcie-phy

- - qcom,sc8180x-qmp-pcie-phy

- - qcom,sdm845-qhp-pcie-phy

- - qcom,sdm845-qmp-pcie-phy

- - qcom,sdx55-qmp-pcie-phy

- - qcom,sm8250-qmp-gen3x1-pcie-phy

- - qcom,sm8250-qmp-gen3x2-pcie-phy

- - qcom,sm8250-qmp-modem-pcie-phy

- - qcom,sm8450-qmp-gen3x1-pcie-phy

- - qcom,sm8450-qmp-gen4x2-pcie-phy

- - qcom,sc8180x-qmp-pcie-phy

- - qcom,sm8250-qmp-gen3x2-pcie-phy

- - qcom,sm8250-qmp-modem-pcie-phy

- - qcom,sm8450-qmp-gen4x2-pcie-phy

- patternProperties:

- "^phy@[0-9a-f]+$":

- - description: TX lane 1

- - description: RX lane 1

- - description: PCS

- - description: TX lane 2

- - description: RX lane 2

- - description: PCS_MISC

- - qcom,sdm845-qmp-pcie-phy

- - qcom,sdx55-qmp-pcie-phy

- - qcom,sm8250-qmp-gen3x1-pcie-phy

- - qcom,sm8450-qmp-gen3x1-pcie-phy

- patternProperties:

- "^phy@[0-9a-f]+$":

- - description: PCS

- - description: PCS_MISC

- - qcom,ipq6018-qmp-pcie-phy

- - qcom,ipq8074-qmp-pcie-phy

- - qcom,msm8998-qmp-pcie-phy

- - qcom,sdm845-qhp-pcie-phy

- patternProperties:

- "^phy@[0-9a-f]+$":

- - description: PCS

- #include <dt-bindings/clock/qcom,gcc-sm8250.h>

- phy-wrapper@1c0e000 {

- compatible = "qcom,sm8250-qmp-gen3x2-pcie-phy";

- reg = <0x01c0e000 0x1c0>;

- #address-cells = <1>;

- #size-cells = <1>;

- ranges = <0x0 0x01c0e000 0x1000>;

- clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,

- <&gcc GCC_PCIE_1_CFG_AHB_CLK>,

- <&gcc GCC_PCIE_WIGIG_CLKREF_EN>,

- <&gcc GCC_PCIE1_PHY_REFGEN_CLK>;

- clock-names = "aux", "cfg_ahb", "ref", "refgen";

- resets = <&gcc GCC_PCIE_1_PHY_BCR>;

- reset-names = "phy";

- vdda-phy-supply = <&vreg_l10c_0p88>;

- vdda-pll-supply = <&vreg_l6b_1p2>;

- reg = <0x200 0x170>,

- clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;

- #clock-cells = <0>;

- clock-output-names = "pcie_1_pipe_clk";

diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml
deleted file mode 100644
index 881ba543fd46..000000000000
--- a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml
+++ /dev/null

-# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

-$id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-ufs-phy.yaml#

-$schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Qualcomm QMP PHY controller (UFS, MSM8996)

- - Vinod Koul <vkoul@kernel.org>

- QMP PHY controller supports physical layer functionality for a number of

- controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.

- Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see

- qcom,sc8280xp-qmp-ufs-phy.yaml.

- - qcom,msm8996-qmp-ufs-phy

- - qcom,msm8998-qmp-ufs-phy

- - qcom,sc8180x-qmp-ufs-phy

- - qcom,sdm845-qmp-ufs-phy

- - qcom,sm6115-qmp-ufs-phy

- - qcom,sm6350-qmp-ufs-phy

- - qcom,sm8150-qmp-ufs-phy

- - qcom,sm8250-qmp-ufs-phy

- - qcom,sm8350-qmp-ufs-phy

- - qcom,sm8450-qmp-ufs-phy

- - description: serdes

- vdda-phy-supply: true

- vdda-pll-supply: true

- vddp-ref-clk-supply: true

- "^phy@[0-9a-f]+$":

- description: single PHY-provider child node

- additionalProperties: false

- - "#address-cells"

-additionalProperties: false

- - qcom,msm8996-qmp-ufs-phy

- - qcom,msm8998-qmp-ufs-phy

- - qcom,sc8180x-qmp-ufs-phy

- - qcom,sdm845-qmp-ufs-phy

- - qcom,sm6115-qmp-ufs-phy

- - qcom,sm6350-qmp-ufs-phy

- - qcom,sm8150-qmp-ufs-phy

- - qcom,sm8250-qmp-ufs-phy

- - qcom,sm8450-qmp-ufs-phy

- - qcom,msm8998-qmp-ufs-phy

- - qcom,sc8180x-qmp-ufs-phy

- - qcom,sdm845-qmp-ufs-phy

- - qcom,sm6350-qmp-ufs-phy

- - qcom,sm8150-qmp-ufs-phy

- - qcom,sm8250-qmp-ufs-phy

- - qcom,sm8350-qmp-ufs-phy

- - qcom,sm8450-qmp-ufs-phy

- patternProperties:

- "^phy@[0-9a-f]+$":

- - description: TX lane 1

- - description: RX lane 1

- - description: PCS

- - description: TX lane 2

- - description: RX lane 2

- - qcom,msm8996-qmp-ufs-phy

- - qcom,sm6115-qmp-ufs-phy

- patternProperties:

- "^phy@[0-9a-f]+$":

- - description: PCS

- #include <dt-bindings/clock/qcom,gcc-sm8250.h>

- #include <dt-bindings/clock/qcom,rpmh.h>

- phy-wrapper@1d87000 {

- compatible = "qcom,sm8250-qmp-ufs-phy";

- reg = <0x01d87000 0x1c0>;

- #address-cells = <1>;

- #size-cells = <1>;

- ranges = <0x0 0x01d87000 0x1000>;

- clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;

- clock-names = "ref", "ref_aux";

- resets = <&ufs_mem_hc 0>;

- reset-names = "ufsphy";

- vdda-phy-supply = <&vreg_l6b>;

- vdda-pll-supply = <&vreg_l3b>;

- reg = <0x400 0x108>,

diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml
index 4c96dab5b9e3..827109d37041 100644
--- a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml

- - qcom,sc7180-qmp-usb3-phy

- - qcom,sc8180x-qmp-usb3-phy

- - qcom,sdm845-qmp-usb3-phy

- - qcom,sm8150-qmp-usb3-phy

- - qcom,sm8250-qmp-usb3-phy

- - qcom,sm8350-qmp-usb3-phy

- - qcom,sm8450-qmp-usb3-phy

- - description: DP_COM

- - qcom,sc7180-qmp-usb3-phy

- - qcom,sm8150-qmp-usb3-phy

- - qcom,sm8250-qmp-usb3-phy

- - qcom,sm8350-qmp-usb3-phy

- - const: ref_clk_src

- - qcom,sdm845-qmp-usb3-phy

- - qcom,sm8150-qmp-usb3-phy

- - qcom,sm8350-qmp-usb3-phy

- - qcom,sm8450-qmp-usb3-phy

- patternProperties:

- "^phy@[0-9a-f]+$":

- - description: TX lane 1

- - description: RX lane 1

- - description: PCS

- - description: TX lane 2

- - description: RX lane 2

- - description: PCS_MISC

- - qcom,sc7180-qmp-usb3-phy

- - qcom,sc8180x-qmp-usb3-phy

- - qcom,sm8250-qmp-usb3-phy

diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-pcie-phy.yaml
new file mode 100644
index 000000000000..d05eef0e1ccd
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-pcie-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml
deleted file mode 100644
index d30734338888..000000000000
--- a/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml
+++ /dev/null

-# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

-$id: http://devicetree.org/schemas/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml#

-$schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Qualcomm QMP USB3 DP PHY controller (SC7180)

- The QMP PHY controller supports physical layer functionality for a number of

- controllers on Qualcomm chipsets, such as, PCIe, UFS and USB.

- Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see

- qcom,sc8280xp-qmp-usb43dp-phy.yaml.

- - Wesley Cheng <quic_wcheng@quicinc.com>

- - qcom,sc7180-qmp-usb3-dp-phy

- - qcom,sc8180x-qmp-usb3-dp-phy

- - qcom,sdm845-qmp-usb3-dp-phy

- - qcom,sm8250-qmp-usb3-dp-phy

- - qcom,sc7280-qmp-usb3-dp-phy

- - const: qcom,sm8250-qmp-usb3-dp-phy

- - description: Address and length of PHY's USB serdes block.

- - description: Address and length of the DP_COM control block.

- - description: Address and length of PHY's DP serdes block.

- orientation-switch:

- description: Flag the port as possible handler of orientation switching

- - description: reset of phy block.

- - description: phy common block reset.

- Phandle to a regulator supply to PHY core block.

- Phandle to 1.8V regulator supply to PHY refclk pll block.

- vddp-ref-clk-supply:

- Phandle to a regulator supply to any specific refclk pll block.

- "^usb3-phy@[0-9a-f]+$":

- additionalProperties: false

- - description: Address and length of TX.

- - description: Address and length of RX.

- - description: Address and length of PCS.

- - description: Address and length of TX2.

- - description: Address and length of RX2.

- - description: Address and length of pcs_misc.

- - description: pipe clock

- clock-output-names:

- - const: usb3_phy_pipe_clk_src

- "^dp-phy@[0-9a-f]+$":

- additionalProperties: false

- - description: Address and length of TX.

- - description: Address and length of RX.

- - description: Address and length of PCS.

- - description: Address and length of TX2.

- - description: Address and length of RX2.

- - "#address-cells"

- - qcom,sc7180-qmp-usb3-dp-phy

- - qcom,sdm845-qmp-usb3-dp-phy

- - description: Phy aux clock

- - description: Phy config clock

- - description: 19.2 MHz ref clk

- - description: Phy common block aux clock

- - qcom,sc8180x-qmp-usb3-dp-phy

- - description: Phy aux clock

- - description: 19.2 MHz ref clk

- - description: Phy common block aux clock

- - qcom,sm8250-qmp-usb3-dp-phy

- - description: Phy aux clock

- - description: Board XO source

- - description: Phy common block aux clock

- - const: ref_clk_src

-additionalProperties: false

- #include <dt-bindings/clock/qcom,gcc-sdm845.h>

- usb_1_qmpphy: phy-wrapper@88e9000 {

- compatible = "qcom,sdm845-qmp-usb3-dp-phy";

- reg = <0x088e9000 0x18c>,

- <0x088e8000 0x10>,

- <0x088ea000 0x40>;

- reg-names = "usb", "dp_com", "dp";

- #address-cells = <1>;

- #size-cells = <1>;

- ranges = <0x0 0x088e9000 0x2000>;

- clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,

- <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,

- <&gcc GCC_USB3_PRIM_CLKREF_CLK>,

- <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;

- clock-names = "aux", "cfg_ahb", "ref", "com_aux";

- resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,

- <&gcc GCC_USB3_DP_PHY_PRIM_BCR>;

- reset-names = "phy", "common";

- vdda-phy-supply = <&vdda_usb2_ss_1p2>;

- vdda-pll-supply = <&vdda_usb2_ss_core>;

- orientation-switch;

- reg = <0x200 0x128>,

- #clock-cells = <0>;

- clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;

- clock-output-names = "usb3_phy_pipe_clk_src";

- reg = <0xa200 0x200>,

- #clock-cells = <1>;

diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
index a0407fc79563..2c3d6553a7ba 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml
index a1897a7606df..d981d77e82e4 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
index ef1c02d8ac88..9af203dc8793 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml
index 083fda530b48..029569d5fcf3 100644
--- a/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml

- const: qcom,pm8550b-eusb2-repeater

diff --git a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
index 0d6b8c28be07..5254413137c6 100644
--- a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
+++ b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml

- const: rockchip,rk3568-usb2phy

diff --git a/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
index 9f2d8d2cc7a5..c4fbffcde6e4 100644
--- a/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml b/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml
index 5c35e5ceec0b..46e64fa293d5 100644
--- a/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml
+++ b/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml

diff --git a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml
index 0e6505e9da50..5ac994b3c0aa 100644
--- a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml
+++ b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml

- The Rockchip SoC has a MIPI CSI D-PHY based on an Innosilicon IP wich

diff --git a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
index 5ba55f9f20cc..452e584d9812 100644
--- a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/starfive,jh7110-dphy-rx.yaml b/Documentation/devicetree/bindings/phy/starfive,jh7110-dphy-rx.yaml
new file mode 100644
index 000000000000..7224cde6fce0
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/starfive,jh7110-dphy-rx.yaml

diff --git a/Documentation/devicetree/bindings/phy/starfive,jh7110-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/starfive,jh7110-pcie-phy.yaml
new file mode 100644
index 000000000000..2e83a6164cd1
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/starfive,jh7110-pcie-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/starfive,jh7110-usb-phy.yaml b/Documentation/devicetree/bindings/phy/starfive,jh7110-usb-phy.yaml
new file mode 100644
index 000000000000..269e9f9f12b6
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/starfive,jh7110-usb-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml
index 9ea30eaba314..3f16ff14484d 100644
--- a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml
+++ b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml

- achieve the funtionality of an external type-C plug flip mux.

-Recommended properies:

diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml
index 467016cbb037..450240570314 100644
--- a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml

- # accomodate with nodes like uart4-rts-cts-pins), where each

diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a1.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a1.yaml
index 99080c9eaac3..4e7a456ea4cc 100644
--- a/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a1.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a1.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-common.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-common.yaml
index a7b29ef0bab6..e707c222a07f 100644
--- a/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-common.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-common.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-aobus.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-aobus.yaml
index 7c9c94ec5b7b..0942ea60c6cd 100644
--- a/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-aobus.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-aobus.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-periphs.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-periphs.yaml
index 4bcb8b60420f..e3c8bde30559 100644
--- a/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-periphs.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-periphs.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-aobus.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-aobus.yaml
index 32d99c9b6afc..c1b03147e8ec 100644
--- a/Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-aobus.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-aobus.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-cbus.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-cbus.yaml
index d0441051f34a..4ec85b8248fa 100644
--- a/Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-cbus.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-cbus.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml
index bef85c25cdef..37c0a74c7c01 100644
--- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml

- patternProperties:

- "^function|groups$":

- $ref: /schemas/types.yaml#/definitions/string

- enum: [ ACPI, ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,

- ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, DDCCLK, DDCDAT,

- EXTRST, FLACK, FLBUSY, FLWP, GPID, GPID0, GPID2, GPID4, GPID6, GPIE0,

- GPIE2, GPIE4, GPIE6, I2C10, I2C11, I2C12, I2C13, I2C14, I2C3, I2C4,

- I2C5, I2C6, I2C7, I2C8, I2C9, LPCPD, LPCPME, LPCRST, LPCSMI, MAC1LINK,

- MAC2LINK, MDIO1, MDIO2, NCTS1, NCTS2, NCTS3, NCTS4, NDCD1, NDCD2,

- NDCD3, NDCD4, NDSR1, NDSR2, NDSR3, NDSR4, NDTR1, NDTR2, NDTR3, NDTR4,

- NDTS4, NRI1, NRI2, NRI3, NRI4, NRTS1, NRTS2, NRTS3, OSCCLK, PWM0,

- PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, RGMII1, RGMII2, RMII1,

- RMII2, ROM16, ROM8, ROMCS1, ROMCS2, ROMCS3, ROMCS4, RXD1, RXD2, RXD3,

- RXD4, SALT1, SALT2, SALT3, SALT4, SD1, SD2, SGPMCK, SGPMI, SGPMLD,

- SGPMO, SGPSCK, SGPSI0, SGPSI1, SGPSLD, SIOONCTRL, SIOPBI, SIOPBO,

- SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1, SPI1DEBUG, SPI1PASSTHRU,

- SPICS1, TIMER3, TIMER4, TIMER5, TIMER6, TIMER7, TIMER8, TXD1, TXD2,

- TXD3, TXD4, UART6, USB11D1, USB11H2, USB2D1, USB2H1, USBCKI, VGABIOS_ROM,

- VGAHS, VGAVS, VPI18, VPI24, VPI30, VPO12, VPO24, WDTRST1, WDTRST2]

-additionalProperties: false

diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml
index 14c391f16899..863da5d80826 100644
--- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml

- patternProperties:

- "^function|groups$":

- $ref: /schemas/types.yaml#/definitions/string

- enum: [ ACPI, ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,

- ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, DDCCLK, DDCDAT,

- ESPI, FWSPICS1, FWSPICS2, GPID0, GPID2, GPID4, GPID6, GPIE0, GPIE2,

- GPIE4, GPIE6, I2C10, I2C11, I2C12, I2C13, I2C14, I2C3, I2C4, I2C5,

- I2C6, I2C7, I2C8, I2C9, LAD0, LAD1, LAD2, LAD3, LCLK, LFRAME, LPCHC,

- LPCPD, LPCPLUS, LPCPME, LPCRST, LPCSMI, LSIRQ, MAC1LINK, MAC2LINK,

- MDIO1, MDIO2, NCTS1, NCTS2, NCTS3, NCTS4, NDCD1, NDCD2, NDCD3, NDCD4,

- NDSR1, NDSR2, NDSR3, NDSR4, NDTR1, NDTR2, NDTR3, NDTR4, NRI1, NRI2,

- NRI3, NRI4, NRTS1, NRTS2, NRTS3, NRTS4, OSCCLK, PEWAKE, PNOR, PWM0,

- PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, RGMII1, RGMII2, RMII1,

- RMII2, RXD1, RXD2, RXD3, RXD4, SALT1, SALT10, SALT11, SALT12, SALT13,

- SALT14, SALT2, SALT3, SALT4, SALT5, SALT6, SALT7, SALT8, SALT9, SCL1,

- SCL2, SD1, SD2, SDA1, SDA2, SGPS1, SGPS2, SIOONCTRL, SIOPBI, SIOPBO,

- SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1, SPI1CS1, SPI1DEBUG,

- SPI1PASSTHRU, SPI2CK, SPI2CS0, SPI2CS1, SPI2MISO, SPI2MOSI, TIMER3,

- TIMER4, TIMER5, TIMER6, TIMER7, TIMER8, TXD1, TXD2, TXD3, TXD4, UART6,

- USB11BHID, USB2AD, USB2AH, USB2BD, USB2BH, USBCKI, VGABIOSROM, VGAHS,

- VGAVS, VPI24, VPO, WDTRST1, WDTRST2]

-additionalProperties: false

diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml
index 859a1889dc1e..612464aef98b 100644
--- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml

- $ref: /schemas/types.yaml#/definitions/string

- enum: [ ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15, ADC2,

- ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, EMMC, ESPI, ESPIALT,

- FSI1, FSI2, FWQSPI, FWSPIABR, FWSPID, FWSPIWP, GPIT0, GPIT1, GPIT2, GPIT3,

- GPIT4, GPIT5, GPIT6, GPIT7, GPIU0, GPIU1, GPIU2, GPIU3, GPIU4, GPIU5,

- GPIU6, GPIU7, I2C1, I2C10, I2C11, I2C12, I2C13, I2C14, I2C15, I2C16,

- I2C2, I2C3, I2C4, I2C5, I2C6, I2C7, I2C8, I2C9, I3C3, I3C4, I3C5,

- I3C6, JTAGM, LHPD, LHSIRQ, LPC, LPCHC, LPCPD, LPCPME, LPCSMI, LSIRQ,

- MACLINK1, MACLINK2, MACLINK3, MACLINK4, MDIO1, MDIO2, MDIO3, MDIO4,

- NCTS1, NCTS2, NCTS3, NCTS4, NDCD1, NDCD2, NDCD3, NDCD4, NDSR1, NDSR2,

- NDSR3, NDSR4, NDTR1, NDTR2, NDTR3, NDTR4, NRI1, NRI2, NRI3, NRI4,

- NRTS1, NRTS2, NRTS3, NRTS4, OSCCLK, PEWAKE, PWM0, PWM1, PWM10, PWM11,

- PWM12, PWM13, PWM14, PWM15, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, PWM8,

- PWM9, RGMII1, RGMII2, RGMII3, RGMII4, RMII1, RMII2, RMII3, RMII4,

- RXD1, RXD2, RXD3, RXD4, SALT1, SALT10, SALT11, SALT12, SALT13, SALT14,

- SALT15, SALT16, SALT2, SALT3, SALT4, SALT5, SALT6, SALT7, SALT8,

- SALT9, SD1, SD2, SGPM1, SGPM2, SGPS1, SGPS2, SIOONCTRL, SIOPBI, SIOPBO,

- SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1, SPI1ABR, SPI1CS1, SPI1WP, SPI2,

- SPI2CS1, SPI2CS2, TACH0, TACH1, TACH10, TACH11, TACH12, TACH13, TACH14,

- TACH15, TACH2, TACH3, TACH4, TACH5, TACH6, TACH7, TACH8, TACH9, THRU0,

- THRU1, THRU2, THRU3, TXD1, TXD2, TXD3, TXD4, UART10, UART11, UART12,

- UART13, UART6, UART7, UART8, UART9, USBAD, USBADP, USB2AH, USB2AHP,

- USB2BD, USB2BH, VB, VGAHS, VGAVS, WDTRST1, WDTRST2, WDTRST3, WDTRST4 ]

- $ref: /schemas/types.yaml#/definitions/string

- enum: [ ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15, ADC2,

- ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, EMMCG1, EMMCG4,

- EMMCG8, ESPI, ESPIALT, FSI1, FSI2, FWQSPI, FWSPIABR, FWSPID, FWSPIWP,

- GPIT0, GPIT1, GPIT2, GPIT3, GPIT4, GPIT5, GPIT6, GPIT7, GPIU0, GPIU1,

- GPIU2, GPIU3, GPIU4, GPIU5, GPIU6, GPIU7, HVI3C3, HVI3C4, I2C1, I2C10,

- I2C11, I2C12, I2C13, I2C14, I2C15, I2C16, I2C2, I2C3, I2C4, I2C5,

- I2C6, I2C7, I2C8, I2C9, I3C3, I3C4, I3C5, I3C6, JTAGM, LHPD, LHSIRQ,

- LPC, LPCHC, LPCPD, LPCPME, LPCSMI, LSIRQ, MACLINK1, MACLINK2, MACLINK3,

- MACLINK4, MDIO1, MDIO2, MDIO3, MDIO4, NCTS1, NCTS2, NCTS3, NCTS4,

- NDCD1, NDCD2, NDCD3, NDCD4, NDSR1, NDSR2, NDSR3, NDSR4, NDTR1, NDTR2,

- NDTR3, NDTR4, NRI1, NRI2, NRI3, NRI4, NRTS1, NRTS2, NRTS3, NRTS4,

- OSCCLK, PEWAKE, PWM0, PWM1, PWM10G0, PWM10G1, PWM11G0, PWM11G1, PWM12G0,

- PWM12G1, PWM13G0, PWM13G1, PWM14G0, PWM14G1, PWM15G0, PWM15G1, PWM2,

- PWM3, PWM4, PWM5, PWM6, PWM7, PWM8G0, PWM8G1, PWM9G0, PWM9G1, QSPI1,

- QSPI2, RGMII1, RGMII2, RGMII3, RGMII4, RMII1, RMII2, RMII3, RMII4,

- RXD1, RXD2, RXD3, RXD4, SALT1, SALT10G0, SALT10G1, SALT11G0, SALT11G1,

- SALT12G0, SALT12G1, SALT13G0, SALT13G1, SALT14G0, SALT14G1, SALT15G0,

- SALT15G1, SALT16G0, SALT16G1, SALT2, SALT3, SALT4, SALT5, SALT6,

- SALT7, SALT8, SALT9G0, SALT9G1, SD1, SD2, SD3, SGPM1, SGPM2, SGPS1, SGPS2,

- SIOONCTRL, SIOPBI, SIOPBO, SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1,

- SPI1ABR, SPI1CS1, SPI1WP, SPI2, SPI2CS1, SPI2CS2, TACH0, TACH1, TACH10, TACH11,

- TACH12, TACH13, TACH14, TACH15, TACH2, TACH3, TACH4, TACH5, TACH6,

- TACH7, TACH8, TACH9, THRU0, THRU1, THRU2, THRU3, TXD1, TXD2, TXD3,

- TXD4, UART10, UART11, UART12G0, UART12G1, UART13G0, UART13G1, UART6,

- UART7, UART8, UART9, USBA, USBB, VB, VGAHS, VGAVS, WDTRST1, WDTRST2,

-additionalProperties: false

diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm11351-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/brcm,bcm11351-pinctrl.txt
deleted file mode 100644
index e047a198db38..000000000000
--- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm11351-pinctrl.txt
+++ /dev/null

-Broadcom BCM281xx Pin Controller

-This is a pin controller for the Broadcom BCM281xx SoC family, which includes

-BCM11130, BCM11140, BCM11351, BCM28145, and BCM28155 SoCs.

-=== Pin Controller Node ===

-Required Properties:

-- compatible: Must be "brcm,bcm11351-pinctrl"

-- reg: Base address of the PAD Controller register block and the size

-For example, the following is the bare minimum node:

- pinctrl@35004800 {

- compatible = "brcm,bcm11351-pinctrl";

- reg = <0x35004800 0x430>;

-As a pin controller device, in addition to the required properties, this node

-should also contain the pin configuration nodes that client devices reference,

-=== Pin Configuration Node ===

-Each pin configuration node is a sub-node of the pin controller node and is a

-container of an arbitrary number of subnodes, called pin group nodes in this

-Please refer to the pinctrl-bindings.txt in this directory for details of the

-common pinctrl bindings used by client devices, including the definition of a

-"pin configuration node".

-=== Pin Group Node ===

-A pin group node specifies the desired pin mux and/or pin configuration for an

-arbitrary number of pins. The name of the pin group node is optional and not

-A pin group node only affects the properties specified in the node, and has no

-effect on any properties that are omitted.

-The pin group node accepts a subset of the generic pin config properties. For

-details generic pin config properties, please refer to pinctrl-bindings.txt

-and <include/linux/pinctrl/pinconfig-generic.h>.

-Each pin controlled by this pin controller belong to one of three types:

-Standard, I2C, and HDMI. Each type accepts a different set of pin config

-properties. A list of pins and their types is provided below.

-Required Properties (applicable to all pins):

-- pins: Multiple strings. Specifies the name(s) of one or more pins to

- be configured by this node.

-Optional Properties (for standard pins):

-- function: String. Specifies the pin mux selection. Values

- must be one of: "alt1", "alt2", "alt3", "alt4"

-- input-schmitt-enable: No arguments. Enable schmitt-trigger mode.

-- input-schmitt-disable: No arguments. Disable schmitt-trigger mode.

-- bias-pull-up: No arguments. Pull up on pin.

-- bias-pull-down: No arguments. Pull down on pin.

-- bias-disable: No arguments. Disable pin bias.

-- slew-rate: Integer. Meaning depends on configured pin mux:

- 0: Standard(100kbps)& Fast(400kbps) mode

- 1: Highspeed (3.4Mbps) mode

- 0: normal slew rate

- 1: normal slew rate

-- input-enable: No arguments. Enable input (does not affect

-- input-disable: No arguments. Disable input (does not affect

-- drive-strength: Integer. Drive strength in mA. Valid values are

- 2, 4, 6, 8, 10, 12, 14, 16 mA.

-Optional Properties (for I2C pins):

-- function: String. Specifies the pin mux selection. Values

- must be one of: "alt1", "alt2", "alt3", "alt4"

-- bias-pull-up: Integer. Pull up strength in Ohm. There are 3

- pull-up resistors (1.2k, 1.8k, 2.7k) available

- in parallel for I2C pins, so the valid values

- are: 568, 720, 831, 1080, 1200, 1800, 2700 Ohm.

-- bias-disable: No arguments. Disable pin bias.

-- slew-rate: Integer. Meaning depends on configured pin mux:

- 0: Standard(100kbps)& Fast(400kbps) mode

- 1: Highspeed (3.4Mbps) mode

- 0: normal slew rate

- 1: normal slew rate

-- input-enable: No arguments. Enable input (does not affect

-- input-disable: No arguments. Disable input (does not affect

-Optional Properties (for HDMI pins):

-- function: String. Specifies the pin mux selection. Values

- must be one of: "alt1", "alt2", "alt3", "alt4"

-- slew-rate: Integer. Controls slew rate.

- 0: Standard(100kbps)& Fast(400kbps) mode

- 1: Highspeed (3.4Mbps) mode

-- input-enable: No arguments. Enable input (does not affect

-- input-disable: No arguments. Disable input (does not affect

-// pin controller node

- compatible = "brcm,bcm11351-pinctrl";

- reg = <0x35004800 0x430>;

- // pin configuration node

- dev_a_default: dev_a_active {

- //group node defining 1 standard pin

- pins = "std_pin1";

- function = "alt1";

- input-schmitt-enable;

- drive-strength = <4>;

- // group node defining 2 I2C pins

- pins = "i2c_pin1", "i2c_pin2";

- function = "alt2";

- bias-pull-up = <720>;

- // group node defining 2 HDMI pins

- pins = "hdmi_pin1", "hdmi_pin2";

- function = "alt3";

- // other pin group nodes

- // other pin configuration nodes

-In the example above, "dev_a_active" is a pin configuration node with a number

-of sub-nodes. In the pin group node "grp_1", one pin, "std_pin1", is defined in

-the "pins" property. Thus, the remaining properties in the "grp_1" node applies

-only to this pin, including the following settings:

- - setting pinmux to "alt1"

- - enabling schmitt-trigger (hystersis) mode

- - disabling pin bias

- - setting the slew-rate to 1

- - setting the drive strength to 4 mA

-Note that neither "input-enable" nor "input-disable" was specified - the pinctrl

-subsystem will therefore leave this property unchanged from whatever state it

-was in before applying these changes.

-The "pins" property in the pin group node "grp_2" specifies two pins -

-"i2c_pin1" and "i2c_pin2"; the remaining properties in this pin group node,

-therefore, applies to both of these pins. The properties include:

- - setting pinmux to "alt2"

- - setting pull-up resistance to 720 Ohm (ie. enabling 1.2k and 1.8k resistors

- - enabling both pins' input

-"slew-rate" is not specified in this pin group node, so the slew-rate for these

-pins are left as-is.

-Finally, "grp_3" defines two HDMI pins. The following properties are applied to

- - setting pinmux to "alt3"

- - setting slew-rate to 1; for HDMI pins, this corresponds to the 3.4 Mbps

-The input is neither enabled or disabled, and is left untouched.

-=== Pin Names and Type ===

-The following are valid pin names and their pin types:

- "adcsync", Standard

- "bat_rm", Standard

- "classgpwr", Standard

- "clk_cx8", Standard

- "clkout_0", Standard

- "clkout_1", Standard

- "clkout_2", Standard

- "clkout_3", Standard

- "clkreq_in_0", Standard

- "clkreq_in_1", Standard

- "cws_sys_req1", Standard

- "cws_sys_req2", Standard

- "cws_sys_req3", Standard

- "digmic1_clk", Standard

- "digmic1_dq", Standard

- "digmic2_clk", Standard

- "digmic2_dq", Standard

- "gpen13", Standard

- "gpen14", Standard

- "gpen15", Standard

- "gpio00", Standard

- "gpio01", Standard

- "gpio02", Standard

- "gpio03", Standard

- "gpio04", Standard

- "gpio05", Standard

- "gpio06", Standard

- "gpio07", Standard

- "gpio08", Standard

- "gpio09", Standard

- "gpio10", Standard

- "gpio11", Standard

- "gpio12", Standard

- "gpio13", Standard

- "gpio14", Standard

- "gps_pablank", Standard

- "gps_tmark", Standard

- "kp_col_ip_0", Standard

- "kp_col_ip_1", Standard

- "kp_col_ip_2", Standard

- "kp_col_ip_3", Standard

- "kp_row_op_0", Standard

- "kp_row_op_1", Standard

- "kp_row_op_2", Standard

- "kp_row_op_3", Standard

- "lcd_b_0", Standard

- "lcd_b_1", Standard

- "lcd_b_2", Standard

- "lcd_b_3", Standard

- "lcd_b_4", Standard

- "lcd_b_5", Standard

- "lcd_b_6", Standard

- "lcd_b_7", Standard

- "lcd_g_0", Standard

- "lcd_g_1", Standard

- "lcd_g_2", Standard

- "lcd_g_3", Standard

- "lcd_g_4", Standard

- "lcd_g_5", Standard

- "lcd_g_6", Standard

- "lcd_g_7", Standard

- "lcd_hsync", Standard

- "lcd_oe", Standard

- "lcd_pclk", Standard

- "lcd_r_0", Standard

- "lcd_r_1", Standard

- "lcd_r_2", Standard

- "lcd_r_3", Standard

- "lcd_r_4", Standard

- "lcd_r_5", Standard

- "lcd_r_6", Standard

- "lcd_r_7", Standard

- "lcd_vsync", Standard

- "mdmgpio0", Standard

- "mdmgpio1", Standard

- "mdmgpio2", Standard

- "mdmgpio3", Standard

- "mdmgpio4", Standard

- "mdmgpio5", Standard

- "mdmgpio6", Standard

- "mdmgpio7", Standard

- "mdmgpio8", Standard

- "mphi_data_0", Standard

- "mphi_data_1", Standard

- "mphi_data_2", Standard

- "mphi_data_3", Standard

- "mphi_data_4", Standard

- "mphi_data_5", Standard

- "mphi_data_6", Standard

- "mphi_data_7", Standard

- "mphi_data_8", Standard

- "mphi_data_9", Standard

- "mphi_data_10", Standard

- "mphi_data_11", Standard

- "mphi_data_12", Standard

- "mphi_data_13", Standard

- "mphi_data_14", Standard

- "mphi_data_15", Standard

- "mphi_ha0", Standard

- "mphi_hat0", Standard

- "mphi_hat1", Standard

- "mphi_hce0_n", Standard

- "mphi_hce1_n", Standard

- "mphi_hrd_n", Standard

- "mphi_hwr_n", Standard

- "mphi_run0", Standard

- "mphi_run1", Standard

- "mtx_scan_clk", Standard

- "mtx_scan_data", Standard

- "nand_ad_0", Standard

- "nand_ad_1", Standard

- "nand_ad_2", Standard

- "nand_ad_3", Standard

- "nand_ad_4", Standard

- "nand_ad_5", Standard

- "nand_ad_6", Standard

- "nand_ad_7", Standard

- "nand_ale", Standard

- "nand_cen_0", Standard

- "nand_cen_1", Standard

- "nand_cle", Standard

- "nand_oen", Standard

- "nand_rdy_0", Standard

- "nand_rdy_1", Standard

- "nand_wen", Standard

- "nand_wp", Standard

- "pmu_int", Standard

- "rfst2g_mtsloten3g", Standard

- "rgmii_0_rx_ctl", Standard

- "rgmii_0_rxc", Standard

- "rgmii_0_rxd_0", Standard

- "rgmii_0_rxd_1", Standard

- "rgmii_0_rxd_2", Standard

- "rgmii_0_rxd_3", Standard

- "rgmii_0_tx_ctl", Standard

- "rgmii_0_txc", Standard

- "rgmii_0_txd_0", Standard

- "rgmii_0_txd_1", Standard

- "rgmii_0_txd_2", Standard

- "rgmii_0_txd_3", Standard

- "rgmii_1_rx_ctl", Standard

- "rgmii_1_rxc", Standard

- "rgmii_1_rxd_0", Standard

- "rgmii_1_rxd_1", Standard

- "rgmii_1_rxd_2", Standard

- "rgmii_1_rxd_3", Standard

- "rgmii_1_tx_ctl", Standard

- "rgmii_1_txc", Standard

- "rgmii_1_txd_0", Standard

- "rgmii_1_txd_1", Standard

- "rgmii_1_txd_2", Standard

- "rgmii_1_txd_3", Standard

- "rgmii_gpio_0", Standard

- "rgmii_gpio_1", Standard

- "rgmii_gpio_2", Standard

- "rgmii_gpio_3", Standard

- "rtxdata2g_txdata3g1", Standard

- "rtxen2g_txdata3g2", Standard

- "rxdata3g0", Standard

- "rxdata3g1", Standard

- "rxdata3g2", Standard

- "sdio1_clk", Standard

- "sdio1_cmd", Standard

- "sdio1_data_0", Standard

- "sdio1_data_1", Standard

- "sdio1_data_2", Standard

- "sdio1_data_3", Standard

- "sdio4_clk", Standard

- "sdio4_cmd", Standard

- "sdio4_data_0", Standard

- "sdio4_data_1", Standard

- "sdio4_data_2", Standard

- "sdio4_data_3", Standard

- "sim_clk", Standard

- "sim_data", Standard

- "sim_det", Standard

- "sim_resetn", Standard

- "sim2_clk", Standard

- "sim2_data", Standard

- "sim2_det", Standard

- "sim2_resetn", Standard

- "ssp_extclk", Standard

- "ssp0_clk", Standard

- "ssp0_fs", Standard

- "ssp0_rxd", Standard

- "ssp0_txd", Standard

- "ssp2_clk", Standard

- "ssp2_fs_0", Standard

- "ssp2_fs_1", Standard

- "ssp2_fs_2", Standard

- "ssp2_fs_3", Standard

- "ssp2_rxd_0", Standard

- "ssp2_rxd_1", Standard

- "ssp2_txd_0", Standard

- "ssp2_txd_1", Standard

- "ssp3_clk", Standard

- "ssp3_fs", Standard

- "ssp3_rxd", Standard

- "ssp3_txd", Standard

- "ssp4_clk", Standard

- "ssp4_fs", Standard

- "ssp4_rxd", Standard

- "ssp4_txd", Standard

- "ssp5_clk", Standard

- "ssp5_fs", Standard

- "ssp5_rxd", Standard

- "ssp5_txd", Standard

- "ssp6_clk", Standard

- "ssp6_fs", Standard

- "ssp6_rxd", Standard

- "ssp6_txd", Standard

- "stat_1", Standard

- "stat_2", Standard

- "sysclken", Standard

- "traceclk", Standard

- "tracedt00", Standard

- "tracedt01", Standard

- "tracedt02", Standard

- "tracedt03", Standard

- "tracedt04", Standard

- "tracedt05", Standard

- "tracedt06", Standard

- "tracedt07", Standard

- "tracedt08", Standard

- "tracedt09", Standard

- "tracedt10", Standard

- "tracedt11", Standard

- "tracedt12", Standard

- "tracedt13", Standard

- "tracedt14", Standard

- "tracedt15", Standard

- "txdata3g0", Standard

- "txpwrind", Standard

- "uartb1_ucts", Standard

- "uartb1_urts", Standard

- "uartb1_urxd", Standard

- "uartb1_utxd", Standard

- "uartb2_urxd", Standard

- "uartb2_utxd", Standard

- "uartb3_ucts", Standard

- "uartb3_urts", Standard

- "uartb3_urxd", Standard

- "uartb3_utxd", Standard

- "uartb4_ucts", Standard

- "uartb4_urts", Standard

- "uartb4_urxd", Standard

- "uartb4_utxd", Standard

- "vc_cam1_scl", I2C

- "vc_cam1_sda", I2C

- "vc_cam2_scl", I2C

- "vc_cam2_sda", I2C

- "vc_cam3_scl", I2C

- "vc_cam3_sda", I2C

diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm11351-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm11351-pinctrl.yaml
new file mode 100644
index 000000000000..90c275295199
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm11351-pinctrl.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml b/Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml
index 739a08f00467..beb769e887c7 100644
--- a/Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml

- controller allows assiging any of 256 possible functions to any of

diff --git a/Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml b/Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml
index 222d57541b65..7f30ec2f1e54 100644
--- a/Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml
index 35723966b70a..890961826c6f 100644
--- a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml
index 7f0e2d6cd6d9..3bbc00df5548 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml

- Pull up setings for 2 pull resistors, R0 and R1. User can

diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml
index 601d86aecdd4..68e91c05f122 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml

- Pull up setings for 2 pull resistors, R0 and R1. User can

diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml
index 10717cee9058..74d52a741f6f 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml

- Pull up setings for 2 pull resistors, R0 and R1. Valid arguments

- Pull down setings for 2 pull resistors, R0 and R1. Valid arguments

diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
index 0f615ada290a..5ad65135fe1c 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml

- Pull up setings for 2 pull resistors, R0 and R1. Valid arguments

- Pull down setings for 2 pull resistors, R0 and R1. Valid arguments

diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
index ff24cf29eea7..8507bd15f243 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml

- Pull up setings for 2 pull resistors, R0 and R1. User can

diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
index 61b33b5416f5..7b43e7857281 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml

- Pull up setings for 2 pull resistors, R0 and R1. User can

diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.yaml
index 065dedb3573a..1690c0ef553a 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.yaml
index f924652bef0d..9b7368bd3862 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra194-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra194-pinmux.yaml
index 60a4bdf01bf2..87b6f4f42f25 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra194-pinmux.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra194-pinmux.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.yaml
index 432ea40209a8..63cd743a30e0 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.yaml
index 28ae2e6d0cbc..e99387a6da5e 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.yaml
index c0eda7848767..36c8f3301a8f 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.yaml

-* Oxford Semiconductor OXNAS SoC Family Pin Controller

-Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and

-../interrupt-controller/interrupts.txt for generic information regarding

-pin controller, GPIO, and interrupt bindings.

-OXNAS 'pin configuration node' is a node of a group of pins which can be

-used for a specific device or function. This node represents configurations of

-pins, optional function, and optional mux related configuration.

-Required properties for pin controller node:

- - compatible: "oxsemi,ox810se-pinctrl" or "oxsemi,ox820-pinctrl"

- - oxsemi,sys-ctrl: a phandle to the system controller syscon node

-Required properties for pin configuration sub-nodes:

- - pins: List of pins to which the configuration applies.

-Optional properties for pin configuration sub-nodes:

-----------------------------------------------------

- - function: Mux function for the specified pins.

- - bias-pull-up: Enable weak pull-up.

- compatible = "oxsemi,ox810se-pinctrl";

- /* Regmap for sys registers */

- oxsemi,sys-ctrl = <&sys>;

- pinctrl_uart2: pinctrl_uart2 {

- function = "fct3";

-uart2: serial@900000 {

- compatible = "ns16550a";

- reg = <0x900000 0x100000>;

- clocks = <&sysclk>;

- interrupts = <29>;

- reg-io-width = <1>;

- current-speed = <115200>;

- resets = <&reset 22>;

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_uart2>;

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-max77620.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-max77620.txt
index 511fc234558b..28fbca180068 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-max77620.txt
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-max77620.txt

-Theres is also customised properties for the GPIO1, GPIO2 and GPIO3. These

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-rk805.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-rk805.txt
index 939cb5b6ffea..6ad49e51c72e 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-rk805.txt
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-rk805.txt

-Theres is also not customised properties for any GPIO.

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
deleted file mode 100644
index bfd222b05495..000000000000
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
+++ /dev/null

-One-register-per-pin type device tree based pinctrl driver

-Required properties:

-- compatible : "pinctrl-single" or "pinconf-single".

- "pinctrl-single" means that pinconf isn't supported.

- "pinconf-single" means that generic pinconf is supported.

-- reg : offset and length of the register set for the mux registers

-- #pinctrl-cells : number of cells in addition to the index, set to 1

- or 2 for pinctrl-single,pins and set to 2 for pinctrl-single,bits

-- pinctrl-single,register-width : pinmux register access width in bits

-- pinctrl-single,function-mask : mask of allowed pinmux function bits

- in the pinmux register

-Optional properties:

-- pinctrl-single,function-off : function off mode for disabled state if

- available and same for all registers; if not specified, disabling of

- pin functions is ignored

-- pinctrl-single,bit-per-mux : boolean to indicate that one register controls

- more than one pin, for which "pinctrl-single,function-mask" property specifies

- position mask of pin.

-- pinctrl-single,drive-strength : array of value that are used to configure

- drive strength in the pinmux register. They're value of drive strength

- current and drive strength mask.

- /* drive strength current, mask */

- pinctrl-single,power-source = <0x30 0xf0>;

-- pinctrl-single,bias-pullup : array of value that are used to configure the

- input bias pullup in the pinmux register.

- /* input, enabled pullup bits, disabled pullup bits, mask */

- pinctrl-single,bias-pullup = <0 1 0 1>;

-- pinctrl-single,bias-pulldown : array of value that are used to configure the

- input bias pulldown in the pinmux register.

- /* input, enabled pulldown bits, disabled pulldown bits, mask */

- pinctrl-single,bias-pulldown = <2 2 0 2>;

- * Two bits to control input bias pullup and pulldown: User should use

- pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. One bit means

- pullup, and the other one bit means pulldown.

- * Three bits to control input bias enable, pullup and pulldown. User should

- use pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. Input bias

- enable bit should be included in pullup or pulldown bits.

- * Although driver could set PIN_CONFIG_BIAS_DISABLE, there's no property as

- pinctrl-single,bias-disable. Because pinctrl single driver could implement

- it by calling pulldown, pullup disabled.

-- pinctrl-single,input-schmitt : array of value that are used to configure

- input schmitt in the pinmux register. In some silicons, there're two input

- schmitt value (rising-edge & falling-edge) in the pinmux register.

- /* input schmitt value, mask */

- pinctrl-single,input-schmitt = <0x30 0x70>;

-- pinctrl-single,input-schmitt-enable : array of value that are used to

- configure input schmitt enable or disable in the pinmux register.

- /* input, enable bits, disable bits, mask */

- pinctrl-single,input-schmitt-enable = <0x30 0x40 0 0x70>;

-- pinctrl-single,low-power-mode : array of value that are used to configure

- low power mode of this pin. For some silicons, the low power mode will

- control the output of the pin when the pad including the pin enter low

- /* low power mode value, mask */

- pinctrl-single,low-power-mode = <0x288 0x388>;

-- pinctrl-single,gpio-range : list of value that are used to configure a GPIO

- range. They're value of subnode phandle, pin base in pinctrl device, pin

- number in this range, GPIO function value of this GPIO range.

- The number of parameters is depend on #pinctrl-single,gpio-range-cells

- /* pin base, nr pins & gpio function */

- pinctrl-single,gpio-range = <&range 0 3 0>, <&range 3 9 1>;

-- interrupt-controller : standard interrupt controller binding if using

- interrupts for wake-up events for example. In this case pinctrl-single

- is set up as a chained interrupt controller and the wake-up interrupts

- can be requested by the drivers using request_irq().

-- #interrupt-cells : standard interrupt binding if using interrupts

-This driver assumes that there is only one register for each pin (unless the

-pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as

-specified in the pinctrl-bindings.txt document in this directory.

-The pin configuration nodes for pinctrl-single are specified as pinctrl

-register offset and values using pinctrl-single,pins. Only the bits specified

-in pinctrl-single,function-mask are updated.

-When #pinctrl-cells = 1, then setting a pin for a device could be done with:

- pinctrl-single,pins = <0xdc 0x118>;

-Where 0xdc is the offset from the pinctrl register base address for the device

-pinctrl register, and 0x118 contains the desired value of the pinctrl register.

-When #pinctrl-cells = 2, then setting a pin for a device could be done with:

- pinctrl-single,pins = <0xdc 0x30 0x07>;

-Where 0x30 is the pin configuration value and 0x07 is the pin mux mode value.

-These two values are OR'd together to produce the value stored at offset 0xdc.

-See the device example and static board pins example below for more information.

-In case when one register changes more than one pin's mux the

-pinctrl-single,bits need to be used which takes three parameters:

- pinctrl-single,bits = <0xdc 0x18 0xff>;

-Where 0xdc is the offset from the pinctrl register base address for the

-device pinctrl register, 0x18 is the desired value, and 0xff is the sub mask to

-be used when applying this change to the register.

-Optional sub-node: In case some pins could be configured as GPIO in the pinmux

-register, those pins could be defined as a GPIO range. This sub-node is required

-by pinctrl-single,gpio-range property.

-Required properties in sub-node:

-- #pinctrl-single,gpio-range-cells : the number of parameters after phandle in

- pinctrl-single,gpio-range property.

- range: gpio-range {

- #pinctrl-single,gpio-range-cells = <3>;

-/* SoC common file */

-/* first controller instance for pins in core domain */

-pmx_core: pinmux@4a100040 {

- compatible = "pinctrl-single";

- reg = <0x4a100040 0x0196>;

- #address-cells = <1>;

- #size-cells = <0>;

- #interrupt-cells = <1>;

- interrupt-controller;

- pinctrl-single,register-width = <16>;

- pinctrl-single,function-mask = <0xffff>;

-/* second controller instance for pins in wkup domain */

-pmx_wkup: pinmux@4a31e040 {

- compatible = "pinctrl-single";

- reg = <0x4a31e040 0x0038>;

- #address-cells = <1>;

- #size-cells = <0>;

- #interrupt-cells = <1>;

- interrupt-controller;

- pinctrl-single,register-width = <16>;

- pinctrl-single,function-mask = <0xffff>;

-control_devconf0: pinmux@48002274 {

- compatible = "pinctrl-single";

- reg = <0x48002274 4>; /* Single register */

- #address-cells = <1>;

- #size-cells = <0>;

- pinctrl-single,bit-per-mux;

- pinctrl-single,register-width = <32>;

- pinctrl-single,function-mask = <0x5F>;

-/* third controller instance for pins in gpio domain */

-pmx_gpio: pinmux@d401e000 {

- compatible = "pinconf-single";

- reg = <0xd401e000 0x0330>;

- #address-cells = <1>;

- #size-cells = <1>;

- pinctrl-single,register-width = <32>;

- pinctrl-single,function-mask = <7>;

- /* sparse GPIO range could be supported */

- pinctrl-single,gpio-range = <&range 0 3 0>, <&range 3 9 1>,

- <&range 12 1 0>, <&range 13 29 1>,

- <&range 43 1 0>, <&range 44 49 1>,

- <&range 94 1 1>, <&range 96 2 1>;

- range: gpio-range {

- #pinctrl-single,gpio-range-cells = <3>;

-/* board specific .dts file */

- * map all board specific static pins enabled by the pinctrl driver

- * itself during the boot (or just set them up in the bootloader)

- pinctrl-names = "default";

- pinctrl-0 = <&board_pins>;

- board_pins: pinmux_board_pins {

- pinctrl-single,pins = <

- uart0_pins: pinmux_uart0_pins {

- pinctrl-single,pins = <

- 0x208 0 /* UART0_RXD (IOCFG138) */

- 0x20c 0 /* UART0_TXD (IOCFG139) */

- pinctrl-single,bias-pulldown = <0 2 2>;

- pinctrl-single,bias-pullup = <0 1 1>;

- /* map uart2 pins */

- uart2_pins: pinmux_uart2_pins {

- pinctrl-single,pins = <

-&control_devconf0 {

- mcbsp1_pins: pinmux_mcbsp1_pins {

- pinctrl-single,bits = <

- 0x00 0x18 0x18 /* FSR/CLKR signal from FSX/CLKX pin */

- mcbsp2_clks_pins: pinmux_mcbsp2_clks_pins {

- pinctrl-single,bits = <

- 0x00 0x40 0x40 /* McBSP2 CLKS from McBSP_CLKS pin */

- pinctrl-names = "default";

- pinctrl-0 = <&uart0_pins>;

- pinctrl-names = "default";

- pinctrl-0 = <&uart2_pins>;

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml
index 8aaf50181cef..3f8ad07c7cfd 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
index fa51fa9536f7..00c5a00e35fc 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml

- qcom,adsp-bypass-mode:

- Tells ADSP is in bypass mode.

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml
new file mode 100644
index 000000000000..abac3311fc55
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-lpass-lpi-pinctrl.yaml
new file mode 100644
index 000000000000..2e65ae08dd21
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-lpass-lpi-pinctrl.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml
index 0fc3c0f52c19..181cd1676c0a 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml
index 83800fcf0ce4..2bd7d47d0fdb 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml
index 37173a64fed2..8271e7b2c162 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml

- - $ref: pincfg-node.yaml#

- - $ref: pinmux-node.yaml#

- The child nodes of the pin controller designate pins to be used for

- specific peripheral functions or as GPIO.

- A pin multiplexing sub-node describes how to configure a set of

- (or a single) pin in some desired alternate function mode.

- The values for the pinmux properties are a combination of port name,

- pin number and the desired function index. Use the RZA2_PINMUX macro

- located in include/dt-bindings/pinctrl/r7s9210-pinctrl.h to easily

- For assigning GPIO pins, use the macro RZA2_PIN also in

- to express the desired port pin.

- Values are constructed from GPIO port number, pin number, and

- alternate function configuration number using the RZA2_PINMUX()

- helper macro in r7s9210-pinctrl.h.

- additionalProperties: false

-additionalProperties: false

diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
index 9ce1a07fc015..145c5442f268 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml
index 19d4d2facfb4..816688580e33 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzv2m-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzv2m-pinctrl.yaml
index c87161f2954f..cb81a17bd0b1 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,rzv2m-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzv2m-pinctrl.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml
index a6f34df82e90..880da721a927 100644
--- a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/sprd,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/sprd,pinctrl.txt
index b1cea7a3a071..779b8ef0f6e6 100644
--- a/Documentation/devicetree/bindings/pinctrl/sprd,pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/sprd,pinctrl.txt

-slect 3.0v, then the pin can output 3.0v. "system control" is used

diff --git a/Documentation/devicetree/bindings/pinctrl/ti,omap-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/ti,omap-pinctrl.txt
deleted file mode 100644
index 88c80273da91..000000000000
--- a/Documentation/devicetree/bindings/pinctrl/ti,omap-pinctrl.txt
+++ /dev/null

-OMAP Pinctrl definitions

-Required properties:

-- compatible : Should be one of:

- "ti,omap2420-padconf" - OMAP2420 compatible pinctrl

- "ti,omap2430-padconf" - OMAP2430 compatible pinctrl

- "ti,omap3-padconf" - OMAP3 compatible pinctrl

- "ti,omap4-padconf" - OMAP4 compatible pinctrl

- "ti,omap5-padconf" - OMAP5 compatible pinctrl

- "ti,dra7-padconf" - DRA7 compatible pinctrl

- "ti,am437-padconf" - AM437x compatible pinctrl

-See Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt for further details.

diff --git a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
index 24ad0614e61b..01b6f2b57843 100644
--- a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml

diff --git a/Documentation/devicetree/bindings/pmem/pmem-region.txt b/Documentation/devicetree/bindings/pmem/pmem-region.txt
index 5cfa4f016a00..cd79975e85ec 100644
--- a/Documentation/devicetree/bindings/pmem/pmem-region.txt
+++ b/Documentation/devicetree/bindings/pmem/pmem-region.txt

- The reg property should specificy an address range that is

- - Any relevant NUMA assocativity properties for the target platform.

diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
index eab21bb2050a..d80bbedfe3aa 100644
--- a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
+++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml

- Secure Power Domains used in Meson A1/C1/S4 SoCs, and should be the child node

diff --git a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
index f9c211a9a938..9b03c41d3604 100644
--- a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
+++ b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml

diff --git a/Documentation/devicetree/bindings/power/renesas,sysc-rmobile.yaml b/Documentation/devicetree/bindings/power/renesas,sysc-rmobile.yaml
index 559718997de7..fba6914ec40d 100644
--- a/Documentation/devicetree/bindings/power/renesas,sysc-rmobile.yaml
+++ b/Documentation/devicetree/bindings/power/renesas,sysc-rmobile.yaml

- PM domain node representing a PM domain. This node hould be named by

diff --git a/Documentation/devicetree/bindings/power/reset/gpio-poweroff.yaml b/Documentation/devicetree/bindings/power/reset/gpio-poweroff.yaml
index 45d66c775115..b54ec003a1e0 100644
--- a/Documentation/devicetree/bindings/power/reset/gpio-poweroff.yaml
+++ b/Documentation/devicetree/bindings/power/reset/gpio-poweroff.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/power/reset/gpio-restart.yaml b/Documentation/devicetree/bindings/power/reset/gpio-restart.yaml
index d3d18e0f5db3..53535de0d41c 100644
--- a/Documentation/devicetree/bindings/power/reset/gpio-restart.yaml
+++ b/Documentation/devicetree/bindings/power/reset/gpio-restart.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/power/reset/restart-handler.yaml b/Documentation/devicetree/bindings/power/reset/restart-handler.yaml
index f2ffdd29d52a..965a834a3dbe 100644
--- a/Documentation/devicetree/bindings/power/reset/restart-handler.yaml
+++ b/Documentation/devicetree/bindings/power/reset/restart-handler.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/power/supply/bq256xx.yaml b/Documentation/devicetree/bindings/power/supply/bq256xx.yaml
index 4fe9c3705265..a76afe3ca299 100644
--- a/Documentation/devicetree/bindings/power/supply/bq256xx.yaml
+++ b/Documentation/devicetree/bindings/power/supply/bq256xx.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/power/supply/sbs,sbs-manager.yaml b/Documentation/devicetree/bindings/power/supply/sbs,sbs-manager.yaml
index 99f506d6b0a0..f255f3858d08 100644
--- a/Documentation/devicetree/bindings/power/supply/sbs,sbs-manager.yaml
+++ b/Documentation/devicetree/bindings/power/supply/sbs,sbs-manager.yaml

-title: SBS compliant manger

diff --git a/Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt b/Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt
deleted file mode 100644
index 54b9f9d0f90f..000000000000
--- a/Documentation/devicetree/bindings/power/xlnx,zynqmp-genpd.txt
+++ /dev/null

------------------------------------------------------------

-Device Tree Bindings for the Xilinx Zynq MPSoC PM domains

------------------------------------------------------------

-The binding for zynqmp-power-controller follow the common

-generic PM domain binding[1].

-[1] Documentation/devicetree/bindings/power/power-domain.yaml

-== Zynq MPSoC Generic PM Domain Node ==

- - Below property should be in zynqmp-firmware node.

- - #power-domain-cells: Number of cells in a PM domain specifier. Must be 1.

-Power domain ID indexes are mentioned in

-include/dt-bindings/power/xlnx-zynqmp-power.h.

- zynqmp_firmware: zynqmp-firmware {

- #power-domain-cells = <1>;

- power-domains = <&zynqmp_firmware 28>;

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt
index 801c66069121..4787db8de23f 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt

- these registers should be set if the coresponding CPU should be

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dcsr.txt b/Documentation/devicetree/bindings/powerpc/fsl/dcsr.txt
index 4b01e1afafda..62744afb5b75 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/dcsr.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/dcsr.txt

- functionalty to perform transaction and transaction attribute matches.

- functionalty to trigger event notifications and debug traces.

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/raideng.txt b/Documentation/devicetree/bindings/powerpc/fsl/raideng.txt
index 4ad29b9ac2ac..ea902bc5873d 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/raideng.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/raideng.txt

- This property is used by the IOMMU (PAMU) to distinquish

diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/gamecube.txt b/Documentation/devicetree/bindings/powerpc/nintendo/gamecube.txt
index b558585b1aaf..3826bd1219d1 100644
--- a/Documentation/devicetree/bindings/powerpc/nintendo/gamecube.txt
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/gamecube.txt

-1.c) The Digital Signal Procesor (DSP) node

diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wii.txt b/Documentation/devicetree/bindings/powerpc/nintendo/wii.txt
index 3ff6ebbb4998..6f69a9dfe198 100644
--- a/Documentation/devicetree/bindings/powerpc/nintendo/wii.txt
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wii.txt

-1.c) The Digital Signal Procesor (DSP) node

-Device-Tree Bindings for a PPS Signal on GPIO

-These properties describe a PPS (pulse-per-second) signal connected to

-Required properties:

-- compatible: should be "pps-gpio"

-- gpios: one PPS GPIO in the format described by ../gpio/gpio.txt

-Additional required properties for the PPS ECHO functionality:

-- echo-gpios: one PPS ECHO GPIO in the format described by ../gpio/gpio.txt

-- echo-active-ms: duration in ms of the active portion of the echo pulse

-Optional properties:

-- assert-falling-edge: when present, assert is indicated by a falling edge

- (instead of by a rising edge)

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_pps>;

- gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;

- assert-falling-edge;

- echo-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;

- echo-active-ms = <100>;

- compatible = "pps-gpio";

-Broadcom Kona PWM controller device tree bindings

-This controller has 6 channels.

-Required Properties :

-- compatible: should contain "brcm,kona-pwm"

-- reg: physical base address and length of the controller's registers

-- clocks: phandle + clock specifier pair for the external clock

-- #pwm-cells: Should be 3. See pwm.yaml in this directory for a

- description of the cells format.

-Refer to clocks/clock-bindings.txt for generic clock consumer properties.

-pwm: pwm@3e01a000 {

- compatible = "brcm,bcm11351-pwm", "brcm,kona-pwm";

- reg = <0x3e01a000 0xc4>;

- clocks = <&pwm_clk>;

diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
index fe603fb1b2cc..2162f661ed5a 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
+++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml

- - samsung,s3c2410-pwm # 16-bit, S3C24xx

- - samsung,s3c6400-pwm # 32-bit, S3C64xx

- - samsung,s5p6440-pwm # 32-bit, S5P64x0

- - samsung,s5pc100-pwm # 32-bit, S5PC100, S5PV210, Exynos4210 rev0 SoCs

- - samsung,exynos4210-pwm # 32-bit, Exynos

diff --git a/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml b/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml
index 9aabdb373afa..4d0b5964443d 100644
--- a/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml
+++ b/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml

diff --git a/Documentation/devicetree/bindings/regulator/active-semi,act8846.yaml b/Documentation/devicetree/bindings/regulator/active-semi,act8846.yaml
index 3725348bb235..02f45b5834d0 100644
--- a/Documentation/devicetree/bindings/regulator/active-semi,act8846.yaml
+++ b/Documentation/devicetree/bindings/regulator/active-semi,act8846.yaml

- additionalProperties: false

- $ref: /schemas/regulator/regulator.yaml#

- unevaluatedProperties: false

- description: Handle to the VP1 input supply

- $ref: /schemas/regulator/regulator.yaml#

- unevaluatedProperties: false

- description: Handle to the VP2 input supply

- $ref: /schemas/regulator/regulator.yaml#

- unevaluatedProperties: false

- description: Handle to the VP3 input supply

- $ref: /schemas/regulator/regulator.yaml#

- unevaluatedProperties: false

- description: Handle to the VP4 input supply

- description: Handle to the INL1 input supply

- $ref: /schemas/regulator/regulator.yaml#

- unevaluatedProperties: false

- description: Handle to the INL2 input supply

- $ref: /schemas/regulator/regulator.yaml#

- unevaluatedProperties: false

- description: Handle to the INL3 input supply

diff --git a/Documentation/devicetree/bindings/regulator/awinic,aw37503.yaml b/Documentation/devicetree/bindings/regulator/awinic,aw37503.yaml
new file mode 100644
index 000000000000..c92a881ed60e
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/awinic,aw37503.yaml

diff --git a/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml b/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml
index dc626517c2ad..13b3f75f8e5e 100644
--- a/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml
+++ b/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml

- pattern: "^BUCK([1-2])$"

- BUCK2 present in DA9122, DA9220, DA9131, DA9132 only

diff --git a/Documentation/devicetree/bindings/regulator/mps,mp5416.yaml b/Documentation/devicetree/bindings/regulator/mps,mp5416.yaml
index 2e720d152890..0221397eb51e 100644
--- a/Documentation/devicetree/bindings/regulator/mps,mp5416.yaml
+++ b/Documentation/devicetree/bindings/regulator/mps,mp5416.yaml

diff --git a/Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml b/Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml
index f3fcfc8be72f..6de5b027f990 100644
--- a/Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml
+++ b/Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml

- $ref: regulator.yaml#

diff --git a/Documentation/devicetree/bindings/regulator/pfuze100.yaml b/Documentation/devicetree/bindings/regulator/pfuze100.yaml
index e384e4953f0a..0eda44752cdd 100644
--- a/Documentation/devicetree/bindings/regulator/pfuze100.yaml
+++ b/Documentation/devicetree/bindings/regulator/pfuze100.yaml

diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpm-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpm-regulator.yaml
index 8a08698e3484..b4eb4001eb3d 100644
--- a/Documentation/devicetree/bindings/regulator/qcom,rpm-regulator.yaml
+++ b/Documentation/devicetree/bindings/regulator/qcom,rpm-regulator.yaml

- "^((s|l|lvs)[0-9]*)|(s[1-2][a-b])|(ncp)|(mvs)|(usb-switch)|(hdmi-switch)$":

diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
index b9498504ad79..127a6f39b7f0 100644
--- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
+++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml

- enum: [a, b, c, d, e, f, g, h, k]

- "^vdd-l1[0245789]-supply$": true

diff --git a/Documentation/devicetree/bindings/regulator/qcom,sdm845-refgen-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,sdm845-refgen-regulator.yaml
new file mode 100644
index 000000000000..f02f97d4fdd2
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/qcom,sdm845-refgen-regulator.yaml

diff --git a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml
index a8ca8e0b27f8..9ea8ac0786ac 100644
--- a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml
+++ b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml

diff --git a/Documentation/devicetree/bindings/regulator/regulator-max77620.txt b/Documentation/devicetree/bindings/regulator/regulator-max77620.txt
index 1c4bfe786736..bcf788897e44 100644
--- a/Documentation/devicetree/bindings/regulator/regulator-max77620.txt
+++ b/Documentation/devicetree/bindings/regulator/regulator-max77620.txt

-Theres are also additional properties for SD/LDOs. These additional properties

diff --git a/Documentation/devicetree/bindings/regulator/regulator.yaml b/Documentation/devicetree/bindings/regulator/regulator.yaml
index e158c2d3d3f9..9daf0fc2465f 100644
--- a/Documentation/devicetree/bindings/regulator/regulator.yaml
+++ b/Documentation/devicetree/bindings/regulator/regulator.yaml

- the hardware propably is malfunctional and damage prevention is requested.

- the hardware propably is malfunctional and damage prevention is requested

diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt4831-regulator.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt4831-regulator.yaml
index d9c23333e157..cd06e957b9db 100644
--- a/Documentation/devicetree/bindings/regulator/richtek,rt4831-regulator.yaml
+++ b/Documentation/devicetree/bindings/regulator/richtek,rt4831-regulator.yaml

diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt5190a-regulator.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt5190a-regulator.yaml
index edb411be0390..89341fdaa3af 100644
--- a/Documentation/devicetree/bindings/regulator/richtek,rt5190a-regulator.yaml
+++ b/Documentation/devicetree/bindings/regulator/richtek,rt5190a-regulator.yaml

- synchronous buck converters, 1 LDO, I2C control interface and peripherial

diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml
index 358297dd3fb7..e95e046e9ed6 100644
--- a/Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml
+++ b/Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml

diff --git a/Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml b/Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml
index 446ec5127d1f..fec3d396ca50 100644
--- a/Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml
+++ b/Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml

diff --git a/Documentation/devicetree/bindings/regulator/richtek,rtq2208.yaml b/Documentation/devicetree/bindings/regulator/richtek,rtq2208.yaml
new file mode 100644
index 000000000000..609c06615bdc
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/richtek,rtq2208.yaml

diff --git a/Documentation/devicetree/bindings/regulator/richtek,rtq6752-regulator.yaml b/Documentation/devicetree/bindings/regulator/richtek,rtq6752-regulator.yaml
index e6e5a9a7d940..ef62c618de67 100644
--- a/Documentation/devicetree/bindings/regulator/richtek,rtq6752-regulator.yaml
+++ b/Documentation/devicetree/bindings/regulator/richtek,rtq6752-regulator.yaml

-* Dialog Semiconductor SLG51000 Voltage Regulator

-Required properties:

-- compatible : Should be "dlg,slg51000" for SLG51000

-- reg : Specifies the I2C slave address.

-- xxx-supply: Input voltage supply regulator for ldo3 to ldo7.

- These entries are required if regulators are enabled for a device.

- An absence of these properties can cause the regulator registration to fail.

- If some of input supply is powered through battery or always-on supply then

- also it is required to have these parameters with proper node handle of always

- vin3-supply: Input supply for ldo3

- vin4-supply: Input supply for ldo4

- vin5-supply: Input supply for ldo5

- vin6-supply: Input supply for ldo6

- vin7-supply: Input supply for ldo7

-Optional properties:

-- interrupt-parent : Specifies the reference to the interrupt controller.

-- interrupts : IRQ line information.

-- dlg,cs-gpios : Specify a valid GPIO for chip select

-- regulators : This node defines the settings for the regulators.

- The content of the sub-node is defined by the standard binding

- for regulators; see regulator.txt.

- The SLG51000 regulators are bound using their names listed below:

-Optional properties for regulators:

-- enable-gpios : Specify a valid GPIO for platform control of the regulator.

- pmic: slg51000@75 {

- compatible = "dlg,slg51000";

- regulator-name = "ldo1";

- regulator-min-microvolt = <2400000>;

- regulator-max-microvolt = <3300000>;

- regulator-name = "ldo2";

- regulator-min-microvolt = <2400000>;

- regulator-max-microvolt = <3300000>;

- regulator-name = "ldo3";

- regulator-min-microvolt = <1200000>;

- regulator-max-microvolt = <3750000>;

- regulator-name = "ldo4";

- regulator-min-microvolt = <1200000>;

- regulator-max-microvolt = <3750000>;

- regulator-name = "ldo5";

- regulator-min-microvolt = <500000>;

- regulator-max-microvolt = <1200000>;

- regulator-name = "ldo6";

- regulator-min-microvolt = <500000>;

- regulator-max-microvolt = <1200000>;

- regulator-name = "ldo7";

- regulator-min-microvolt = <1200000>;

- regulator-max-microvolt = <3750000>;

diff --git a/Documentation/devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml b/Documentation/devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml
index 7d53cfa2c288..c9586d277f41 100644
--- a/Documentation/devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml
+++ b/Documentation/devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml

diff --git a/Documentation/devicetree/bindings/regulator/vctrl.txt b/Documentation/devicetree/bindings/regulator/vctrl.txt
index 601328d7fdbb..e940377cfd69 100644
--- a/Documentation/devicetree/bindings/regulator/vctrl.txt
+++ b/Documentation/devicetree/bindings/regulator/vctrl.txt

- inmediately to changes in the control voltage. To

diff --git a/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml b/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml
index 011819c10988..11e378648b3f 100644
--- a/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml
+++ b/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
index 0c3910f152d1..30632efdad8b 100644
--- a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml
index 643ee787a81f..a2b0079de039 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml
index 7b43ad3daa56..e78a89c9ec41 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,glink-rpm-edge.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,glink-rpm-edge.yaml
index f5a044e20c4e..884158bccd50 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,glink-rpm-edge.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,glink-rpm-edge.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml
index c1ac6ca1e759..0643faae2c39 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml

- - description: RPMH XO clock

- - description: RPMH PNOC clock

- - description: GCC MSS PRNG clock

- - description: RPMH QDSS clock

- const: qcom,msm8998-mss-pil

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml
index 171ef85de193..63a82e7a8bf8 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml
index 5efa0e5c0439..eb868a7ff4cd 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,rpm-proc.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,rpm-proc.yaml
new file mode 100644
index 000000000000..7afafde17a38
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,rpm-proc.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml
index 5cefd2c58593..689d5d535331 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml
index c1f8dd8d0e4c..4744a37b2b5d 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml
index f6fbc531dc28..96d53baf6e00 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml
index c66e298462c7..5d463272165f 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml
index f5d1fa9f45f1..028287235912 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml

- - qcom,sm6115-adsp-pas

- - qcom,sm6115-cdsp-pas

- - qcom,sm6115-mpss-pas

- - qcom,sm6115-adsp-pas

- - qcom,sm6115-cdsp-pas

- - qcom,sm6115-mpss-pas

- - qcom,sm6115-adsp-pas

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml
index fee02fa800b5..f7e40fb166da 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml
index 2c085ac2c3fb..238c6e5e67c5 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml
index af24f9a3cdf1..53cea8e53a31 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml

- #include <dt-bindings/power/qcom-rpmpd.h>

- power-domains = <&rpmhpd SM8450_LCX>,

- <&rpmhpd SM8450_LMX>;

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
index fe216aa531ed..58120829fb06 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml

diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml
index f16e90380df1..9768db8663eb 100644
--- a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml
index fcc3db97fe8f..a492f74a8608 100644
--- a/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

- The cores do not use an MMU, but has a Region Address Translater

diff --git a/Documentation/devicetree/bindings/remoteproc/ti,omap-remoteproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,omap-remoteproc.yaml
index 1fdc2741c36e..94eb2033e79c 100644
--- a/Documentation/devicetree/bindings/remoteproc/ti,omap-remoteproc.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/ti,omap-remoteproc.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml b/Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml
index 35f0bb38f7b2..2811334515d1 100644
--- a/Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/remoteproc/ti,pru-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,pru-rproc.yaml
index cd55d80137f7..baccd98754a9 100644
--- a/Documentation/devicetree/bindings/remoteproc/ti,pru-rproc.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/ti,pru-rproc.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml b/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml
index 9f677367dd9f..78aac69f1060 100644
--- a/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra264-bpmp-shmem.yaml b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra264-bpmp-shmem.yaml
new file mode 100644
index 000000000000..f9b2f0fdc282
--- /dev/null
+++ b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra264-bpmp-shmem.yaml

diff --git a/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml b/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml
index 4379cec6b35a..761c70cf9ddf 100644
--- a/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml
+++ b/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml

- - Dinh Nguyen <dinguyen@altera.com>

- - altr,modrst-offset

diff --git a/Documentation/devicetree/bindings/reset/ti,sci-reset.yaml b/Documentation/devicetree/bindings/reset/ti,sci-reset.yaml
index dcf9206e12be..e10eb98eddad 100644
--- a/Documentation/devicetree/bindings/reset/ti,sci-reset.yaml
+++ b/Documentation/devicetree/bindings/reset/ti,sci-reset.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/reset/ti,tps380x-reset.yaml b/Documentation/devicetree/bindings/reset/ti,tps380x-reset.yaml
index f436f2cf1df7..6063784f0352 100644
--- a/Documentation/devicetree/bindings/reset/ti,tps380x-reset.yaml
+++ b/Documentation/devicetree/bindings/reset/ti,tps380x-reset.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt b/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt
index 86945502ccb5..61a0ff33e89f 100644
--- a/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt
+++ b/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt

- availible flags defined in the DT include

diff --git a/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml
index 0d50f6a54af3..49db66801429 100644
--- a/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml
+++ b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml

- - description: EIP150 gatable clock

- - description: Main gatable clock

diff --git a/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml b/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml
index 4d2bef15fb7a..c8bb2eef442d 100644
--- a/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml
+++ b/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml

- - atmel,at91rm9200-rtc

- - atmel,at91sam9x5-rtc

- - atmel,sama5d4-rtc

- - atmel,sama5d2-rtc

- - microchip,sam9x60-rtc

- - microchip,sama7g5-rtc

-* Maxim DS3231 Real Time Clock

-Required properties:

-- compatible: Should contain "maxim,ds3231".

-- reg: I2C address for chip.

-- #clock-cells: Should be 1.

-- clock-output-names:

- overwrite the default clock names "ds3231_clk_sqw" and "ds3231_clk_32khz".

-Each clock is assigned an identifier and client nodes can use this identifier

-to specify the clock which they consume. Following indices are allowed:

- - 0: square-wave output on the SQW pin

- - 1: square-wave output on the 32kHz pin

-- interrupts: rtc alarm/event interrupt. When this property is selected,

- clock on the SQW pin cannot be used.

-ds3231: ds3231@51 {

- compatible = "maxim,ds3231";

- #clock-cells = <1>;

- clocks = <&ds3231 0>;

- clocks = <&ds3231 1>;

diff --git a/Documentation/devicetree/bindings/rtc/nxp,pcf2127.yaml b/Documentation/devicetree/bindings/rtc/nxp,pcf2127.yaml
index bcb230027622..2d9fe5a75b06 100644
--- a/Documentation/devicetree/bindings/rtc/nxp,pcf2127.yaml
+++ b/Documentation/devicetree/bindings/rtc/nxp,pcf2127.yaml

- called "Regsiter A".

diff --git a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml
index 9af77f21bb7f..2a65f31ac5a0 100644
--- a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml
+++ b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml

- # Intersil ISL12022 Real-time Clock

diff --git a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
index 01ec45b3b406..2e189e548327 100644
--- a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml

diff --git a/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml b/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml
index 93062403276b..3a5b59f5d3e3 100644
--- a/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml
+++ b/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml

- - fsl,imx93-lpuart

diff --git a/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt b/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt
deleted file mode 100644
index f709304036c2..000000000000
--- a/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt
+++ /dev/null

-NVIDIA Tegra20/Tegra30 high speed (DMA based) UART controller driver.

-Required properties:

-- compatible : should be,

- "nvidia,tegra20-hsuart" for Tegra20,

- "nvidia,tegra30-hsuart" for Tegra30,

- "nvidia,tegra186-hsuart" for Tegra186,

- "nvidia,tegra194-hsuart" for Tegra194.

-- reg: Should contain UART controller registers location and length.

-- interrupts: Should contain UART controller interrupts.

-- clocks: Must contain one entry, for the module clock.

- See ../clocks/clock-bindings.txt for details.

-- resets : Must contain an entry for each entry in reset-names.

- See ../reset/reset.txt for details.

-- reset-names : Must include the following entries:

-- dmas : Must contain an entry for each entry in dma-names.

- See ../dma/dma.txt for details.

-- dma-names : Must include the following entries:

-Optional properties:

-- nvidia,enable-modem-interrupt: Enable modem interrupts. Should be enable

- only if all 8 lines of UART controller are pinmuxed.

-- nvidia,adjust-baud-rates: List of entries providing percentage of baud rate

- adjustment within a range.

- Each entry contains sets of 3 values. Range low/high and adjusted rate.

- <range_low range_high adjusted_rate>

- When baud rate set on controller falls within the range mentioned in this

- field, baud rate will be adjusted by percentage mentioned here.

- Ex: <9600 115200 200>

- Increase baud rate by 2% when set baud rate falls within range 9600 to 115200

-Baud Rate tolerance:

- Standard UART devices are expected to have tolerance for baud rate error by

- -4 to +4 %. All Tegra devices till Tegra210 had this support. However,

- Tegra186 chip has a known hardware issue. UART Rx baud rate tolerance level

- is 0% to +4% in 1-stop config. Otherwise, the received data will have

- corruption/invalid framing errors. Parker errata suggests adjusting baud

- rate to be higher than the deviations observed in Tx.

- Tx deviation of connected device can be captured over scope (or noted from

- its spec) for valid range and Tegra baud rate has to be set above actual

- Tx baud rate observed. To do this we use nvidia,adjust-baud-rates

- As an example, consider there is deviation observed in Tx for baud rates as

- 0 to 9600 has 1% deviation

- 9600 to 115200 2% deviation

- This slight deviation is expcted and Tegra UART is expected to handle it. Due

- to the issue stated above, baud rate on Tegra UART should be set equal to or

- above deviation observed for avoiding frame errors.

- Property should be set like this

- nvidia,adjust-baud-rates = <0 9600 100>,

- <9600 115200 200>;

- compatible = "nvidia,tegra30-hsuart", "nvidia,tegra20-hsuart";

- reg = <0x70006000 0x40>;

- interrupts = <0 36 0x04>;

- nvidia,enable-modem-interrupt;

- clocks = <&tegra_car 6>;

- resets = <&tegra_car 6>;

- reset-names = "serial";

- dmas = <&apbdma 8>, <&apbdma 8>;

- dma-names = "rx", "tx";

- nvidia,adjust-baud-rates = <1000000 4000000 136>; /* 1.36% shift */

diff --git a/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.yaml b/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.yaml
new file mode 100644
index 000000000000..04d55fecf47c
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.yaml

diff --git a/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt b/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt
index 0fa8e3e43bf8..1a7e4bff0456 100644
--- a/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt
+++ b/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt

diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
index 3862411c77b5..17c553123f96 100644
--- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml

-- st,force-m1 bool flat to force asc to be in Mode-1 recommeded

diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml
new file mode 100644
index 000000000000..16977e4e4357
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml

diff --git a/Documentation/devicetree/bindings/soc/aspeed/uart-routing.yaml b/Documentation/devicetree/bindings/soc/aspeed/uart-routing.yaml
index 6876407124dc..51aaf34acb32 100644
--- a/Documentation/devicetree/bindings/soc/aspeed/uart-routing.yaml
+++ b/Documentation/devicetree/bindings/soc/aspeed/uart-routing.yaml

-$id: "http://devicetree.org/schemas/soc/aspeed/uart-routing.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml b/Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml
index 8634865015cd..ceb81646fe75 100644
--- a/Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml
+++ b/Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml

-$id: "http://devicetree.org/schemas/soc/intel/intel,hps-copy-engine.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/soc/litex/litex,soc-controller.yaml b/Documentation/devicetree/bindings/soc/litex/litex,soc-controller.yaml
index ecae9fa8561b..a64406ca17b5 100644
--- a/Documentation/devicetree/bindings/soc/litex/litex,soc-controller.yaml
+++ b/Documentation/devicetree/bindings/soc/litex/litex,soc-controller.yaml

-$id: "http://devicetree.org/schemas/soc/litex/litex,soc-controller.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/soc/loongson/loongson,ls2k-pmc.yaml b/Documentation/devicetree/bindings/soc/loongson/loongson,ls2k-pmc.yaml
new file mode 100644
index 000000000000..da2dcfeebf12
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/loongson/loongson,ls2k-pmc.yaml

diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-ccif.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-ccif.yaml
index 8e6ba2ec8a43..f0fa92b04b32 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-ccif.yaml
+++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-ccif.yaml

- controller used to perfrom offload rx packet processing (e.g. 802.11

diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml
index 04ffee3a7c59..365a9fed5914 100644
--- a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml
+++ b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml

- services include hardware rng, reprogramming of the FPGA and verfification of the

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
index 9dc8e48c8af4..d1c7c2be865f 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml

- used to identify the resource and must therefor be "cx", "mx" or "ebi".

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
index 6440dc801387..bceb479f74c5 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml

- unevaluatedProperties: false

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
index 65c02a7fef80..2fa725b8af5d 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml

- - qcom,rpm-qcm2290

- - qcom,rpm-msm8953

- compatible = "qcom,smd";

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml
index 063e595c12f7..4819ce90d206 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml

diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
index 398663d21ab1..e52e176d8cb3 100644
--- a/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
+++ b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml

-$id: "http://devicetree.org/schemas/soc/renesas/renesas,rzg2l-sysc.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

diff --git a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
new file mode 100644
index 000000000000..0039319e91fe
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml

diff --git a/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra20-ahb.yaml b/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra20-ahb.yaml
new file mode 100644
index 000000000000..2f7269a26b8e
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra20-ahb.yaml

diff --git a/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra20-flowctrl.yaml b/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra20-flowctrl.yaml
new file mode 100644
index 000000000000..705544b7f98f
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra20-flowctrl.yaml

diff --git a/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml b/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml
index 22cf9002fee7..158186610c53 100644
--- a/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml
+++ b/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml

-$id: "http://devicetree.org/schemas/soc/ti/k3-ringacc.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

- <0x0 0x33000000 0x0 0x40000>;

- reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";

diff --git a/Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml b/Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
index 5df7688a1e1c..a750035d6234 100644
--- a/Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
+++ b/Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml

-# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml b/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml
index bf1234550343..5db718e4d0e7 100644
--- a/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml
+++ b/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml

- $ref: /schemas/types.yaml#/definitions/non-unique-string-array

- A list of the connections between audio components. Each entry is a

- pair of strings, the first being the connection's sink, the second

- being the connection's source.

- $ref: /schemas/types.yaml#/definitions/string

- description: User specified audio sound card name

diff --git a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml
index b358fd601ed3..d4277d342e69 100644
--- a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml
+++ b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml

- $ref: /schemas/types.yaml#/definitions/non-unique-string-array

- A list of the connections between audio components. Each entry is a

- pair of strings, the first being the connection's sink, the second

- being the connection's source.

- $ref: /schemas/types.yaml#/definitions/string

- description: User specified audio sound card name

-additionalProperties: false

diff --git a/Documentation/devicetree/bindings/sound/awinic,aw88395.yaml b/Documentation/devicetree/bindings/sound/awinic,aw88395.yaml
index 35eef7d818a2..4051c2538caf 100644
--- a/Documentation/devicetree/bindings/sound/awinic,aw88395.yaml
+++ b/Documentation/devicetree/bindings/sound/awinic,aw88395.yaml

- const: awinic,aw88395

diff --git a/Documentation/devicetree/bindings/sound/axentia,tse850-pcm5142.txt b/Documentation/devicetree/bindings/sound/axentia,tse850-pcm5142.txt
index 9d049d4bfd58..b6cc5f6f78c2 100644
--- a/Documentation/devicetree/bindings/sound/axentia,tse850-pcm5142.txt
+++ b/Documentation/devicetree/bindings/sound/axentia,tse850-pcm5142.txt

-The 'loop1' gpio pin controlls two relays, which are either in loop position,

- -cirrus,monitor-signal-format : Sub-node for the Monitor Signaling Formating

- - cirrus,boost-ctl-select : Boost conerter control source selection.

- * 2) TDM mode on one signle data pin -- SDOUT1 carries

diff --git a/Documentation/devicetree/bindings/sound/dialog,da7219.yaml b/Documentation/devicetree/bindings/sound/dialog,da7219.yaml
index bb5af48ab1e1..eb7d219e2c86 100644
--- a/Documentation/devicetree/bindings/sound/dialog,da7219.yaml
+++ b/Documentation/devicetree/bindings/sound/dialog,da7219.yaml

- enum: ["diff", "se_p", "se_n"]

- enum: ["low", "high"]

diff --git a/Documentation/devicetree/bindings/sound/fsl,easrc.yaml b/Documentation/devicetree/bindings/sound/fsl,easrc.yaml
index bdde68a1059c..a680d7aff237 100644
--- a/Documentation/devicetree/bindings/sound/fsl,easrc.yaml
+++ b/Documentation/devicetree/bindings/sound/fsl,easrc.yaml

- const: fsl,imx8mn-easrc

diff --git a/Documentation/devicetree/bindings/sound/fsl,esai.txt b/Documentation/devicetree/bindings/sound/fsl,esai.txt
index 0a2480aeecf0..90112ca1ff42 100644
--- a/Documentation/devicetree/bindings/sound/fsl,esai.txt
+++ b/Documentation/devicetree/bindings/sound/fsl,esai.txt

- duplicated from Transmition related registers.

diff --git a/Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml b/Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml
index e847611a85f7..188f38baddec 100644
--- a/Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml
+++ b/Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml

- $ref: /schemas/types.yaml#/definitions/string

- description: User specified audio sound card name

- $ref: /schemas/types.yaml#/definitions/non-unique-string-array

- A list of the connections between audio components. Each entry is a

- pair of strings, the first being the connection's sink, the second

- being the connection's source.

-additionalProperties: false

diff --git a/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml b/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml
index ba5b7728cf33..bac940553965 100644
--- a/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml
+++ b/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml

- $ref: /schemas/types.yaml#/definitions/non-unique-string-array

- A list of the connections between audio components. Each entry is a

- pair of strings, the first being the connection's sink, the second

- being the connection's source.

- $ref: /schemas/types.yaml#/definitions/string

- description: User specified audio sound card name

-additionalProperties: false

diff --git a/Documentation/devicetree/bindings/sound/google,sc7280-herobrine.yaml b/Documentation/devicetree/bindings/sound/google,sc7280-herobrine.yaml
index 0b1a01a4c14e..ec4b6e547ca6 100644
--- a/Documentation/devicetree/bindings/sound/google,sc7280-herobrine.yaml
+++ b/Documentation/devicetree/bindings/sound/google,sc7280-herobrine.yaml

- $ref: /schemas/types.yaml#/definitions/non-unique-string-array

- A list of the connections between audio components. Each entry is a

- pair of strings, the first being the connection's sink, the second

- being the connection's source.

- $ref: /schemas/types.yaml#/definitions/string

- description: User specified audio sound card name

-additionalProperties: false

-GTM601 UMTS modem audio interface CODEC

-This device has no configuration interface. The sample rate and channels are

-based on the compatible string

- "option,gtm601" = 8kHz mono

- "broadmobi,bm818" = 48KHz stereo

-Required properties:

- - compatible : one of

-codec: gtm601_codec {

- compatible = "option,gtm601";

diff --git a/Documentation/devicetree/bindings/sound/imx-audio-card.yaml b/Documentation/devicetree/bindings/sound/imx-audio-card.yaml
index b6f5d486600e..f7ad5ea2491e 100644
--- a/Documentation/devicetree/bindings/sound/imx-audio-card.yaml
+++ b/Documentation/devicetree/bindings/sound/imx-audio-card.yaml

- $ref: /schemas/types.yaml#/definitions/string

- description: User specified audio sound card name

- $ref: /schemas/types.yaml#/definitions/non-unique-string-array

- A list of the connections between audio components. Each entry is a

- pair of strings, the first being the connection's sink, the second

- being the connection's source. Valid names could be power supplies,

- MicBias of codec and the jacks on the board.

-additionalProperties: false

-Maxim Integrated MAX98925/MAX98926/MAX98927 Speaker Amplifier

-This device supports I2C.

-Required properties:

- - compatible : should be one of the following

- - "maxim,max98925"

- - "maxim,max98926"

- - "maxim,max98927"

- - vmon-slot-no : slot number used to send voltage information

- or in inteleave mode this will be used as

- MAX98925/MAX98926 slot range : 0 ~ 30, Default : 0

- MAX98927 slot range : 0 ~ 15, Default : 0

- - imon-slot-no : slot number used to send current information

- MAX98925/MAX98926 slot range : 0 ~ 30, Default : 0

- MAX98927 slot range : 0 ~ 15, Default : 0

- - interleave-mode : When using two MAX9892X in a system it is

- possible to create ADC data that that will

- overflow the frame size. Digital Audio Interleave

- mode provides a means to output VMON and IMON data

- from two devices on a single DOUT line when running

- smaller frames sizes such as 32 BCLKS per LRCLK or

- 48 BCLKS per LRCLK.

- Range : 0 (off), 1 (on), Default : 0

- - reg : the I2C address of the device for I2C

-Optional properties:

- - reset-gpios : GPIO to reset the device

-codec: max98927@3a {

- compatible = "maxim,max98927";

- vmon-slot-no = <0>;

- imon-slot-no = <1>;

- interleave-mode = <0>;

diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt7986-afe.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt7986-afe.yaml
new file mode 100644
index 000000000000..398efdfe00f5
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/mediatek,mt7986-afe.yaml

diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt7986-wm8960.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt7986-wm8960.yaml
new file mode 100644
index 000000000000..09247ceea3f7
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/mediatek,mt7986-wm8960.yaml

diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt8188-afe.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt8188-afe.yaml
index e6cb711ece77..90520f89208b 100644
--- a/Documentation/devicetree/bindings/sound/mediatek,mt8188-afe.yaml
+++ b/Documentation/devicetree/bindings/sound/mediatek,mt8188-afe.yaml

- By default, all data received from ETDM pins will be outputed to

diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml
index 05e532b5d50a..43b3b67bdf3b 100644
--- a/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml
+++ b/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml

- $ref: /schemas/types.yaml#/definitions/string

- description: User specified audio sound card name

- $ref: /schemas/types.yaml#/definitions/non-unique-string-array

- A list of the connections between audio components. Each entry is a

- sink/source pair of strings. Valid names could be the input or output

- widgets of audio components, power supplies, MicBias of codec and the

-additionalProperties: false

diff --git a/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt b/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt
index 560762e0a168..f548e6a58240 100644
--- a/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt
+++ b/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt

-- compatible: should be one of the followings.

diff --git a/Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml b/Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml
index d5adf07d46e0..5c8dba2b3a81 100644
--- a/Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml
+++ b/Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml

- which etdm clock source is required by this etdm in moudule.

- which etdm clock source is required by this etdm out moudule.

-Nuvoton NAU88L21 audio codec

-This device supports I2C only.

-Required properties:

- - compatible : Must be "nuvoton,nau8821"

- - reg : the I2C address of the device. This is either 0x1B (CSB=0) or 0x54 (CSB=1).

-Optional properties:

- - nuvoton,jkdet-enable: Enable jack detection via JKDET pin.

- - nuvoton,jkdet-pull-enable: Enable JKDET pin pull. If set - pin pull enabled,

- otherwise pin in high impedance state.

- - nuvoton,jkdet-pull-up: Pull-up JKDET pin. If set then JKDET pin is pull up, otherwise pull down.

- - nuvoton,jkdet-polarity: JKDET pin polarity. 0 - active high, 1 - active low.

- - nuvoton,vref-impedance: VREF Impedance selection

- - nuvoton,micbias-voltage: Micbias voltage level.

- - nuvoton,jack-insert-debounce: number from 0 to 7 that sets debounce time to 2^(n+2) ms

- - nuvoton,jack-eject-debounce: number from 0 to 7 that sets debounce time to 2^(n+2) ms

- - nuvoton,dmic-clk-threshold: the ADC threshold of DMIC clock.

- - nuvoton,key_enable: Headset button detection switch.

- headset: nau8821@1b {

- compatible = "nuvoton,nau8821";

- interrupt-parent = <&gpio>;

- interrupts = <23 IRQ_TYPE_LEVEL_LOW>;

- nuvoton,jkdet-enable;

- nuvoton,jkdet-pull-enable;

- nuvoton,jkdet-pull-up;

- nuvoton,jkdet-polarity = <GPIO_ACTIVE_LOW>;

- nuvoton,vref-impedance = <2>;

- nuvoton,micbias-voltage = <6>;

- nuvoton,jack-insert-debounce = <7>;

- nuvoton,jack-eject-debounce = <7>;

- nuvoton,dmic-clk-threshold = 3072000;

diff --git a/Documentation/devicetree/bindings/sound/nuvoton,nau8822.yaml b/Documentation/devicetree/bindings/sound/nuvoton,nau8822.yaml
index 65105402a53d..cb8182bbc491 100644
--- a/Documentation/devicetree/bindings/sound/nuvoton,nau8822.yaml
+++ b/Documentation/devicetree/bindings/sound/nuvoton,nau8822.yaml

diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max9808x.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max9808x.yaml
index fc89dbd6bf24..c29d7942915c 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max9808x.yaml
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max9808x.yaml

- - "Headphone Jack"

- - "Internal Mic 1"

- - "Internal Mic 2"

diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5631.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5631.yaml
index a04487002e88..0c8067c3b056 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5631.yaml
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5631.yaml

- - "Headphone Jack"

diff --git a/Documentation/devicetree/bindings/sound/qcom,msm8916-wcd-analog.txt b/Documentation/devicetree/bindings/sound/qcom,msm8916-wcd-analog.txt
deleted file mode 100644
index e7d17dda55db..000000000000
--- a/Documentation/devicetree/bindings/sound/qcom,msm8916-wcd-analog.txt
+++ /dev/null

-msm8916 analog audio CODEC

-Bindings for codec Analog IP which is integrated in pmic pm8916,

-## Bindings for codec core on pmic:

-Required properties

- - compatible = "qcom,pm8916-wcd-analog-codec";

- - reg: represents the slave base address provided to the peripheral.

- - interrupts: List of interrupts in given SPMI peripheral.

- - interrupt-names: Names specified to above list of interrupts in same

- order. List of supported interrupt names are:

- "cdc_spk_cnp_int" - Speaker click and pop interrupt.

- "cdc_spk_clip_int" - Speaker clip interrupt.

- "cdc_spk_ocp_int" - Speaker over current protect interrupt.

- "mbhc_ins_rem_det1" - jack insert removal detect interrupt 1.

- "mbhc_but_rel_det" - button release interrupt.

- "mbhc_but_press_det" - button press event

- "mbhc_ins_rem_det" - jack insert removal detect interrupt.

- "mbhc_switch_int" - multi button headset interrupt.

- "cdc_ear_ocp_int" - Earphone over current protect interrupt.

- "cdc_hphr_ocp_int" - Headphone R over current protect interrupt.

- "cdc_hphl_ocp_det" - Headphone L over current protect interrupt.

- "cdc_ear_cnp_int" - earphone cnp interrupt.

- "cdc_hphr_cnp_int" - hphr click and pop interrupt.

- "cdc_hphl_cnp_int" - hphl click and pop interrupt.

- - clocks: Handle to mclk.

- - clock-names: should be "mclk"

- - vdd-cdc-io-supply: phandle to VDD_CDC_IO regulator DT node.

- - vdd-cdc-tx-rx-cx-supply: phandle to VDD_CDC_TX/RX/CX regulator DT node.

- - vdd-micbias-supply: phandle of VDD_MICBIAS supply's regulator DT node.

-Optional Properties:

- - qcom,mbhc-vthreshold-low: Array of 5 threshold voltages in mV for 5 buttons

- detection on headset when the mbhc is powered up

- by internal current source, this is a low power.

- - qcom,mbhc-vthreshold-high: Array of 5 thresold voltages in mV for 5 buttons

- detection on headset when mbhc is powered up

-- qcom,micbias-lvl: Voltage (mV) for Mic Bias

-- qcom,hphl-jack-type-normally-open: boolean, present if hphl pin on jack is a

- NO (Normally Open). If not specified, then

- its assumed that hphl pin on jack is NC

- (Normally Closed).

-- qcom,gnd-jack-type-normally-open: boolean, present if gnd pin on jack is

- NO (Normally Open). If not specified, then

- its assumed that gnd pin on jack is NC

- (Normally Closed).

-- qcom,micbias1-ext-cap: boolean, present if micbias1 has external capacitor

-- qcom,micbias2-ext-cap: boolean, present if micbias2 has external capacitor

- compatible = "qcom,pm8916-wcd-analog-codec";

- reg = <0xf000 0x200>;

- reg-names = "pmic-codec-core";

- clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;

- clock-names = "mclk";

- qcom,mbhc-vthreshold-low = <75 150 237 450 500>;

- qcom,mbhc-vthreshold-high = <75 150 237 450 500>;

- interrupt-parent = <&spmi_bus>;

- interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>,

- <0x1 0xf0 0x1 IRQ_TYPE_NONE>,

- <0x1 0xf0 0x2 IRQ_TYPE_NONE>,

- <0x1 0xf0 0x3 IRQ_TYPE_NONE>,

- <0x1 0xf0 0x4 IRQ_TYPE_NONE>,

- <0x1 0xf0 0x5 IRQ_TYPE_NONE>,

- <0x1 0xf0 0x6 IRQ_TYPE_NONE>,

- <0x1 0xf0 0x7 IRQ_TYPE_NONE>,

- <0x1 0xf1 0x0 IRQ_TYPE_NONE>,

- <0x1 0xf1 0x1 IRQ_TYPE_NONE>,

- <0x1 0xf1 0x2 IRQ_TYPE_NONE>,

- <0x1 0xf1 0x3 IRQ_TYPE_NONE>,

- <0x1 0xf1 0x4 IRQ_TYPE_NONE>,

- <0x1 0xf1 0x5 IRQ_TYPE_NONE>;

- interrupt-names = "cdc_spk_cnp_int",

- "cdc_spk_clip_int",

- "cdc_spk_ocp_int",

- "mbhc_ins_rem_det1",

- "mbhc_but_rel_det",

- "mbhc_but_press_det",

- "mbhc_ins_rem_det",

- "mbhc_switch_int",

- "cdc_ear_ocp_int",

- "cdc_hphr_ocp_int",

- "cdc_hphl_ocp_det",

- "cdc_ear_cnp_int",

- "cdc_hphr_cnp_int",

- "cdc_hphl_cnp_int";

- vdd-cdc-io-supply = <&pm8916_l5>;

- vdd-cdc-tx-rx-cx-supply = <&pm8916_l5>;

- vdd-micbias-supply = <&pm8916_l13>;

- #sound-dai-cells = <1>;

diff --git a/Documentation/devicetree/bindings/sound/qcom,pm8916-wcd-analog-codec.yaml b/Documentation/devicetree/bindings/sound/qcom,pm8916-wcd-analog-codec.yaml
new file mode 100644
index 000000000000..94e7a1860977
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/qcom,pm8916-wcd-analog-codec.yaml

diff --git a/Documentation/devicetree/bindings/sound/renesas,rsnd.txt b/Documentation/devicetree/bindings/sound/renesas,rsnd.txt
index b731f16aea84..dfd768b1ad7d 100644
--- a/Documentation/devicetree/bindings/sound/renesas,rsnd.txt
+++ b/Documentation/devicetree/bindings/sound/renesas,rsnd.txt

-CTU can convert [xx]ch to [yy]ch, or exchange outputed channel.

diff --git a/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml b/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml
index 8a821dec9526..13a5a0a10fe6 100644
--- a/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml
+++ b/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml

- $ref: audio-graph-port.yaml#/definitions/port-base

- unevaluatedProperties: false

- patternProperties:

- '^port(@[0-9a-f]+)?$':

- $ref: audio-graph-port.yaml#/definitions/port-base

- unevaluatedProperties: false

- patternProperties:

- "^endpoint(@[0-9a-f]+)?":

- $ref: audio-graph-port.yaml#/definitions/endpoint-base

- $ref: /schemas/types.yaml#/definitions/phandle-array

- unevaluatedProperties: false

- $ref: audio-graph-port.yaml#/definitions/port-base

- unevaluatedProperties: false

- patternProperties:

- "^endpoint(@[0-9a-f]+)?":

- $ref: audio-graph-port.yaml#/definitions/endpoint-base

- $ref: /schemas/types.yaml#/definitions/phandle-array

- unevaluatedProperties: false

diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3288-hdmi-analog.txt b/Documentation/devicetree/bindings/sound/rockchip,rk3288-hdmi-analog.txt
index e5430d1d34e4..73577ac1b89c 100644
--- a/Documentation/devicetree/bindings/sound/rockchip,rk3288-hdmi-analog.txt
+++ b/Documentation/devicetree/bindings/sound/rockchip,rk3288-hdmi-analog.txt

-Optionnal properties:

- minimum, impedance maximun, volume, DC offset w/o and w/ mic of each L and

diff --git a/Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml b/Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml
index 447e013f6e17..5ea0819a261a 100644
--- a/Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml
+++ b/Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml

- $ref: /schemas/types.yaml#/definitions/string

- description: The user-visible name of this sound complex.

- - samsung,audio-routing

-additionalProperties: false

- samsung,audio-routing =

diff --git a/Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml b/Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml
index 31095913e330..6ec80f529d84 100644
--- a/Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml
+++ b/Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml

- $ref: /schemas/types.yaml#/definitions/string

- description: The user-visible name of this sound complex.

- - samsung,audio-routing

-additionalProperties: false

- samsung,audio-routing =

diff --git a/Documentation/devicetree/bindings/sound/samsung,odroid.yaml b/Documentation/devicetree/bindings/sound/samsung,odroid.yaml
index c6751c40e63f..b77284e3e26a 100644
--- a/Documentation/devicetree/bindings/sound/samsung,odroid.yaml
+++ b/Documentation/devicetree/bindings/sound/samsung,odroid.yaml

- $ref: /schemas/types.yaml#/definitions/string

- description: The user-visible name of this sound complex.

-additionalProperties: false

- samsung,audio-routing =

diff --git a/Documentation/devicetree/bindings/sound/samsung,tm2.yaml b/Documentation/devicetree/bindings/sound/samsung,tm2.yaml
index 491e08019c04..760592599143 100644
--- a/Documentation/devicetree/bindings/sound/samsung,tm2.yaml
+++ b/Documentation/devicetree/bindings/sound/samsung,tm2.yaml

- description: The user-visible name of this sound complex.

- $ref: /schemas/types.yaml#/definitions/string

- - samsung,audio-routing

-additionalProperties: false

- samsung,audio-routing = "HP", "HPOUT1L",

diff --git a/Documentation/devicetree/bindings/sound/serial-midi.yaml b/Documentation/devicetree/bindings/sound/serial-midi.yaml
index 4afc29376efc..f6a807329a5a 100644
--- a/Documentation/devicetree/bindings/sound/serial-midi.yaml
+++ b/Documentation/devicetree/bindings/sound/serial-midi.yaml

- resuts in the standard MIDI baud rate, and set the 'current-speed' property to 38400 (default)

diff --git a/Documentation/devicetree/bindings/sound/simple-card.yaml b/Documentation/devicetree/bindings/sound/simple-card.yaml
index b05e05c81cc4..59ac2d1d1ccf 100644
--- a/Documentation/devicetree/bindings/sound/simple-card.yaml
+++ b/Documentation/devicetree/bindings/sound/simple-card.yaml

diff --git a/Documentation/devicetree/bindings/sound/snps,designware-i2s.yaml b/Documentation/devicetree/bindings/sound/snps,designware-i2s.yaml
index a970fd264b21..a48d040b0a4f 100644
--- a/Documentation/devicetree/bindings/sound/snps,designware-i2s.yaml
+++ b/Documentation/devicetree/bindings/sound/snps,designware-i2s.yaml

- description: Sampling rate reference clock

diff --git a/Documentation/devicetree/bindings/sound/sound-card-common.yaml b/Documentation/devicetree/bindings/sound/sound-card-common.yaml
new file mode 100644
index 000000000000..3a941177f684
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/sound-card-common.yaml

diff --git a/Documentation/devicetree/bindings/sound/sprd-pcm.txt b/Documentation/devicetree/bindings/sound/sprd-pcm.txt
index 4b23e84b2e57..fbbcade2181d 100644
--- a/Documentation/devicetree/bindings/sound/sprd-pcm.txt
+++ b/Documentation/devicetree/bindings/sound/sprd-pcm.txt

-* Spreadtrum DMA platfrom bindings

diff --git a/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml b/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml
index 56d206f97a96..59df8a832310 100644
--- a/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml
+++ b/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml

- can be defined. Subnode can be omitted for unsused sub-block.

diff --git a/Documentation/devicetree/bindings/sound/ti,j721e-cpb-ivi-audio.yaml b/Documentation/devicetree/bindings/sound/ti,j721e-cpb-ivi-audio.yaml
index 859d369c71e2..5b2874a80a4d 100644
--- a/Documentation/devicetree/bindings/sound/ti,j721e-cpb-ivi-audio.yaml
+++ b/Documentation/devicetree/bindings/sound/ti,j721e-cpb-ivi-audio.yaml

- extension board is extending the CPB audio support, decribed in:

diff --git a/Documentation/devicetree/bindings/sound/ti,tas2781.yaml b/Documentation/devicetree/bindings/sound/ti,tas2781.yaml
index 8d60e4e236d6..a69e6c223308 100644
--- a/Documentation/devicetree/bindings/sound/ti,tas2781.yaml
+++ b/Documentation/devicetree/bindings/sound/ti,tas2781.yaml

- aggreate as one Audio Device to support multiple audio slots.

diff --git a/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml b/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml
index c16e1760cf85..f3274bcc4c05 100644
--- a/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml
+++ b/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml

- I2C addresss of the device can be one of these 0x4c, 0x4d, 0x4e or 0x4f

diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8960.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8960.yaml
index ee8eba7f0104..62e62c335d07 100644
--- a/Documentation/devicetree/bindings/sound/wlf,wm8960.yaml
+++ b/Documentation/devicetree/bindings/sound/wlf,wm8960.yaml

-This device supports I2C only.

-Required properties:

- - compatible: "wlf,wm8904" or "wlf,wm8912"

- - reg: the I2C address of the device.

- - clock-names: "mclk"

- - clocks: reference to

- <Documentation/devicetree/bindings/clock/clock-bindings.txt>

-Pins on the device (for linking into audio routes):

- compatible = "wlf,wm8904";

- clock-names = "mclk";

diff --git a/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml b/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml
index fb44b89a754e..7d60a9654912 100644
--- a/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml
+++ b/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml

- Identifying lowerst numbered coloum in SoundWire Frame,

- Identifying highest numbered coloum in SoundWire Frame,

diff --git a/Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.txt b/Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.txt
index 9887b0724759..d7668f41b03b 100644
--- a/Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.txt
+++ b/Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.txt

-Broadcom BCM2835 auxiliar SPI1/2 controller

- point to the auxiliar clock driver of the bcm2835,

diff --git a/Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml b/Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml
index 28222aae3077..45975f40d943 100644
--- a/Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml
+++ b/Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml

- BRCMSTB (BCM7XXX), Cygnus, NSP and NS2. The Broadcom Master SPI hw IP consits

- MSPI master can be used wihout BSPI. BRCMSTB SoCs have an additional instance

diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
index 4f15f9a0cc34..cca81f89e252 100644
--- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
+++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml

diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
deleted file mode 100644
index db8e0d71c5bc..000000000000
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
+++ /dev/null

-NVIDIA Tegra114 SPI controller.

-Required properties:

-- compatible : For Tegra114, must contain "nvidia,tegra114-spi".

- Otherwise, must contain '"nvidia,<chip>-spi", "nvidia,tegra114-spi"' where

- <chip> is tegra124, tegra132, or tegra210.

-- reg: Should contain SPI registers location and length.

-- interrupts: Should contain SPI interrupts.

-- clock-names : Must include the following entries:

-- resets : Must contain an entry for each entry in reset-names.

- See ../reset/reset.txt for details.

-- reset-names : Must include the following entries:

-- dmas : Must contain an entry for each entry in clock-names.

- See ../dma/dma.txt for details.

-- dma-names : Must include the following entries:

-- clocks : Must contain an entry for each entry in clock-names.

- See ../clocks/clock-bindings.txt for details.

-Recommended properties:

-- spi-max-frequency: Definition as per

- Documentation/devicetree/bindings/spi/spi-bus.txt

-Optional properties:

-- nvidia,tx-clk-tap-delay: Delays the clock going out to the external device

- with this tap value. This property is used to tune the outgoing data from

- Tegra SPI master with respect to outgoing Tegra SPI master clock.

- Tap values vary based on the platform design trace lengths from Tegra SPI

- to corresponding slave devices. Valid tap values are from 0 thru 63.

-- nvidia,rx-clk-tap-delay: Delays the clock coming in from the external device

- with this tap value. This property is used to adjust the Tegra SPI master

- clock with respect to the data from the SPI slave device.

- Tap values vary based on the platform design trace lengths from Tegra SPI

- to corresponding slave devices. Valid tap values are from 0 thru 63.

- compatible = "nvidia,tegra114-spi";

- reg = <0x7000d600 0x200>;

- interrupts = <0 82 0x04>;

- spi-max-frequency = <25000000>;

- #address-cells = <1>;

- #size-cells = <0>;

- clocks = <&tegra_car 44>;

- clock-names = "spi";

- resets = <&tegra_car 44>;

- reset-names = "spi";

- dmas = <&apbdma 16>, <&apbdma 16>;

- dma-names = "rx", "tx";

- <spi-client>@<bus_num> {

- nvidia,rx-clk-tap-delay = <0>;

- nvidia,tx-clk-tap-delay = <16>;

diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.yaml
new file mode 100644
index 000000000000..58222ffa53d7
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.yaml

diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt
deleted file mode 100644
index c212491929b5..000000000000
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt
+++ /dev/null

-NVIDIA Tegra20 SFLASH controller.

-Required properties:

-- compatible : should be "nvidia,tegra20-sflash".

-- reg: Should contain SFLASH registers location and length.

-- interrupts: Should contain SFLASH interrupts.

-- clocks : Must contain one entry, for the module clock.

- See ../clocks/clock-bindings.txt for details.

-- resets : Must contain an entry for each entry in reset-names.

- See ../reset/reset.txt for details.

-- reset-names : Must include the following entries:

-- dmas : Must contain an entry for each entry in clock-names.

- See ../dma/dma.txt for details.

-- dma-names : Must include the following entries:

-Recommended properties:

-- spi-max-frequency: Definition as per

- Documentation/devicetree/bindings/spi/spi-bus.txt

- compatible = "nvidia,tegra20-sflash";

- reg = <0x7000c380 0x80>;

- interrupts = <0 39 0x04>;

- spi-max-frequency = <25000000>;

- #address-cells = <1>;

- #size-cells = <0>;

- clocks = <&tegra_car 43>;

- resets = <&tegra_car 43>;

- reset-names = "spi";

- dmas = <&apbdma 11>, <&apbdma 11>;

- dma-names = "rx", "tx";

diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.yaml
new file mode 100644
index 000000000000..e245bad85a25
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.yaml

diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt
deleted file mode 100644
index 40d80b93e327..000000000000
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt
+++ /dev/null

-NVIDIA Tegra20/Tegra30 SLINK controller.

-Required properties:

-- compatible : should be "nvidia,tegra20-slink", "nvidia,tegra30-slink".

-- reg: Should contain SLINK registers location and length.

-- interrupts: Should contain SLINK interrupts.

-- clocks : Must contain one entry, for the module clock.

- See ../clocks/clock-bindings.txt for details.

-- resets : Must contain an entry for each entry in reset-names.

- See ../reset/reset.txt for details.

-- reset-names : Must include the following entries:

-- dmas : Must contain an entry for each entry in clock-names.

- See ../dma/dma.txt for details.

-- dma-names : Must include the following entries:

-Recommended properties:

-- spi-max-frequency: Definition as per

- Documentation/devicetree/bindings/spi/spi-bus.txt

- compatible = "nvidia,tegra20-slink";

- reg = <0x7000d600 0x200>;

- interrupts = <0 82 0x04>;

- spi-max-frequency = <25000000>;

- #address-cells = <1>;

- #size-cells = <0>;

- clocks = <&tegra_car 44>;

- resets = <&tegra_car 44>;

- reset-names = "spi";

- dmas = <&apbdma 16>, <&apbdma 16>;

- dma-names = "rx", "tx";

diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.yaml
new file mode 100644
index 000000000000..291c25ec015d
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.yaml

- the DMA sepecifiers listed in dmas. The string names is to be

-Binding for Broadcom BCM6348/BCM6358 SPI controller

-Required properties:

-- compatible: must contain one of "brcm,bcm6348-spi", "brcm,bcm6358-spi".

-- reg: Base address and size of the controllers memory area.

-- interrupts: Interrupt for the SPI block.

-- clocks: phandle of the SPI clock.

-- clock-names: has to be "spi".

-- #address-cells: <1>, as required by generic SPI binding.

-- #size-cells: <0>, also as required by generic SPI binding.

-Optional properties:

-- num-cs: some controllers have less than 8 cs signals. Defaults to 8

-Child nodes as per the generic SPI binding.

- compatible = "brcm,bcm6368-spi", "brcm,bcm6358-spi";

- reg = <0x10000800 0x70c>;

- clocks = <&clkctl 9>;

- clock-names = "spi";

- #address-cells = <1>;

- #size-cells = <0>;

diff --git a/Documentation/devicetree/bindings/spi/spi-cadence.yaml b/Documentation/devicetree/bindings/spi/spi-cadence.yaml
index b7552739b554..d4b61b0e8301 100644
--- a/Documentation/devicetree/bindings/spi/spi-cadence.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-cadence.yaml

diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml b/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml
index e91425012319..727c5346b8ce 100644
--- a/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml

diff --git a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml
index a813c971ecf6..7fd591145480 100644
--- a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml

diff --git a/Documentation/devicetree/bindings/spi/spi-pl022.yaml b/Documentation/devicetree/bindings/spi/spi-pl022.yaml
index 91e540a92faf..5e5a704a766e 100644
--- a/Documentation/devicetree/bindings/spi/spi-pl022.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-pl022.yaml

diff --git a/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml b/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml
index 4bbf6db0b6bd..61c784ef7b51 100644
--- a/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml
+++ b/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml

- const: qcom,msm8974-ocmem

diff --git a/Documentation/devicetree/bindings/thermal/loongson,ls2k-thermal.yaml b/Documentation/devicetree/bindings/thermal/loongson,ls2k-thermal.yaml
new file mode 100644
index 000000000000..7538469997f9
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/loongson,ls2k-thermal.yaml

diff --git a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt
deleted file mode 100644
index aea4a2a178b9..000000000000
--- a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt
+++ /dev/null

-Tegra124 SOCTHERM thermal management system

-The SOCTHERM IP block contains thermal sensors, support for polled

-or interrupt-based thermal monitoring, CPU and GPU throttling based

-on temperature trip points, and handling external overcurrent

-notifications. It is also used to manage emergency shutdown in an

-overheating situation.

-Required properties :

-- compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".

- For Tegra132, must contain "nvidia,tegra132-soctherm".

- For Tegra210, must contain "nvidia,tegra210-soctherm".

-- reg : Should contain at least 2 entries for each entry in reg-names:

- - SOCTHERM register set

- - Tegra CAR register set: Required for Tegra124 and Tegra210.

- - CCROC register set: Required for Tegra132.

-- reg-names : Should contain at least 2 entries:

-- interrupts : Defines the interrupt used by SOCTHERM

-- clocks : Must contain an entry for each entry in clock-names.

- See ../clocks/clock-bindings.txt for details.

-- clock-names : Must include the following entries:

-- resets : Must contain an entry for each entry in reset-names.

- See ../reset/reset.txt for details.

-- reset-names : Must include the following entries:

-- #thermal-sensor-cells : Should be 1. For a description of this property, see

- Documentation/devicetree/bindings/thermal/thermal-sensor.yaml.

- See <dt-bindings/thermal/tegra124-soctherm.h> for a list of valid values

- when referring to thermal sensors.

-- throttle-cfgs: A sub-node which is a container of configuration for each

- hardware throttle events. These events can be set as cooling devices.

- * throttle events: Sub-nodes must be named as "light" or "heavy".

- - nvidia,priority: Each throttles has its own throttle settings, so the

- SW need to set priorities for various throttle, the HW arbiter can select

- the final throttle settings.

- Bigger value indicates higher priority, In general, higher priority

- translates to lower target frequency. SW needs to ensure that critical

- thermal alarms are given higher priority, and ensure that there is

- no race if priority of two vectors is set to the same value.

- The range of this value is 1~100.

- - nvidia,cpu-throt-percent: This property is for Tegra124 and Tegra210.

- It is the throttling depth of pulse skippers, it's the percentage

- - nvidia,cpu-throt-level: This property is only for Tegra132, it is the

- level of pulse skippers, which used to throttle clock frequencies. It

- indicates cpu clock throttling depth, and the depth can be programmed.

- Must set as following values:

- TEGRA_SOCTHERM_THROT_LEVEL_LOW, TEGRA_SOCTHERM_THROT_LEVEL_MED

- TEGRA_SOCTHERM_THROT_LEVEL_HIGH, TEGRA_SOCTHERM_THROT_LEVEL_NONE

- - nvidia,gpu-throt-level: This property is for Tegra124 and Tegra210.

- It is the level of pulse skippers, which used to throttle clock

- frequencies. It indicates gpu clock throttling depth and can be

- programmed to any of the following values which represent a throttling

- TEGRA_SOCTHERM_THROT_LEVEL_NONE (0%)

- TEGRA_SOCTHERM_THROT_LEVEL_LOW (50%),

- TEGRA_SOCTHERM_THROT_LEVEL_MED (75%),

- TEGRA_SOCTHERM_THROT_LEVEL_HIGH (85%).

- - #cooling-cells: Should be 1. This cooling device only support on/off state.

- For a description of this property see:

- Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml

- Optional properties: The following properties are T210 specific and

- valid only for OCx throttle events.

- - nvidia,count-threshold: Specifies the number of OC events that are

- required for triggering an interrupt. Interrupts are not triggered if

- the property is missing. A value of 0 will interrupt on every OC alarm.

- - nvidia,polarity-active-low: Configures the polarity of the OC alaram

- signal. If present, this means assert low, otherwise assert high.

- - nvidia,alarm-filter: Number of clocks to filter event. When the filter

- expires (which means the OC event has not occurred for a long time),

- the counter is cleared and filter is rearmed. Default value is 0.

- - nvidia,throttle-period-us: Specifies the number of uSec for which

- throttling is engaged after the OC event is deasserted. Default value

-Optional properties:

-- nvidia,thermtrips : When present, this property specifies the temperature at

- which the soctherm hardware will assert the thermal trigger signal to the

- Power Management IC, which can be configured to reset or shutdown the device.

- It is an array of pairs where each pair represents a tsensor id followed by a

- temperature in milli Celcius. In the absence of this property the critical

- trip point will be used for thermtrip temperature.

-- the "critical" type trip points will be used to set the temperature at which

-the SOC_THERM hardware will assert a thermal trigger if the "nvidia,thermtrips"

-property is missing. When the thermtrips property is present, the breach of a

-critical trip point is reported back to the thermal framework to implement

-- the "hot" type trip points will be set to SOC_THERM hardware as the throttle

-temperature. Once the temperature of this thermal zone is higher

-than it, it will trigger the HW throttle event.

- soctherm@700e2000 {

- compatible = "nvidia,tegra124-soctherm";

- reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */

- 0x0 0x60006000 0x0 0x400 /* CAR reg_base */

- reg-names = "soctherm-reg", "car-reg";

- interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;

- clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,

- <&tegra_car TEGRA124_CLK_SOC_THERM>;

- clock-names = "tsensor", "soctherm";

- resets = <&tegra_car 78>;

- reset-names = "soctherm";

- #thermal-sensor-cells = <1>;

- nvidia,thermtrips = <TEGRA124_SOCTHERM_SENSOR_CPU 102500

- TEGRA124_SOCTHERM_SENSOR_GPU 103000>;

- * When the "heavy" cooling device triggered,

- * the HW will skip cpu clock's pulse in 85% depth,

- * skip gpu clock's pulse in 85% level

- throttle_heavy: heavy {

- nvidia,priority = <100>;

- nvidia,cpu-throt-percent = <85>;

- nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;

- #cooling-cells = <1>;

- * When the "light" cooling device triggered,

- * the HW will skip cpu clock's pulse in 50% depth,

- * skip gpu clock's pulse in 50% level

- throttle_light: light {

- nvidia,priority = <80>;

- nvidia,cpu-throt-percent = <50>;

- nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_LOW>;

- #cooling-cells = <1>;

- * If these two devices are triggered in same time, the HW throttle

- * arbiter will select the highest priority as the final throttle

- * settings to skip cpu pulse.

- throttle_oc1: oc1 {

- nvidia,priority = <50>;

- nvidia,polarity-active-low;

- nvidia,count-threshold = <100>;

- nvidia,alarm-filter = <5100000>;

- nvidia,throttle-period-us = <0>;

- nvidia,cpu-throt-percent = <75>;

- nvidia,gpu-throt-level =

- <TEGRA_SOCTHERM_THROT_LEVEL_MED>;

-Example: referring to Tegra132's "reg", "reg-names" and "throttle-cfgs" :

- soctherm@700e2000 {

- compatible = "nvidia,tegra132-soctherm";

- reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */

- 0x0 0x70040000 0x0 0x200>; /* CCROC reg_base */;

- reg-names = "soctherm-reg", "ccroc-reg";

- * When the "heavy" cooling device triggered,

- * the HW will skip cpu clock's pulse in HIGH level

- throttle_heavy: heavy {

- nvidia,priority = <100>;

- nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;

- #cooling-cells = <1>;

- * When the "light" cooling device triggered,

- * the HW will skip cpu clock's pulse in MED level

- throttle_light: light {

- nvidia,priority = <80>;

- nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_MED>;

- #cooling-cells = <1>;

- * If these two devices are triggered in same time, the HW throttle

- * arbiter will select the highest priority as the final throttle

- * settings to skip cpu pulse.

-Example: referring to thermal sensors :

- polling-delay-passive = <1000>;

- polling-delay = <1000>;

- <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;

- cpu_shutdown_trip: shutdown-trip {

- temperature = <102500>;

- hysteresis = <1000>;

- type = "critical";

- cpu_throttle_trip: throttle-trip {

- temperature = <100000>;

- hysteresis = <1000>;

- trip = <&cpu_throttle_trip>;

- cooling-device = <&throttle_heavy 1 1>;

diff --git a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml
new file mode 100644
index 000000000000..04a2ba1aa946
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml

diff --git a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml
index 92762efc2120..5ff72ce5c887 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml

- - Thara Gopinath <thara.gopinath@linaro.org>

diff --git a/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml b/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml
index 2d14610888a7..585b5f5217c4 100644
--- a/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml
+++ b/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml

- Documentation/mips/ingenic-tcu.rst.

diff --git a/Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt b/Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt
deleted file mode 100644
index d191612539e8..000000000000
--- a/Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt
+++ /dev/null

-Oxford Semiconductor OXNAS SoCs Family RPS Timer

-================================================

-Required properties:

-- compatible: Should be "oxsemi,ox810se-rps-timer" or "oxsemi,ox820-rps-timer"

-- reg : Specifies base physical address and size of the registers.

-- interrupts : The interrupts of the two timers

-- clocks : The phandle of the timer clock source

-timer0: timer@200 {

- compatible = "oxsemi,ox810se-rps-timer";

- reg = <0x200 0x40>;

- clocks = <&rpsclk>;

- interrupts = <4 5>;

diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer.txt
index 147ef3e74452..b02ab0af10ce 100644
--- a/Documentation/devicetree/bindings/timer/snps,arc-timer.txt
+++ b/Documentation/devicetree/bindings/timer/snps,arc-timer.txt

-- Two idential copies TIMER0 and TIMER1 exist in ARC cores and historically

diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml
index ba2bfb547909..cd58179ae337 100644
--- a/Documentation/devicetree/bindings/trivial-devices.yaml
+++ b/Documentation/devicetree/bindings/trivial-devices.yaml

- # 10-bit 10 kOhm linear programable voltage divider

- # 10-bit 50 kOhm linear programable voltage divider

- # 10-bit 10 kOhm linear programable variable resistor

- # 10-bit 50 kOhm linear programable variable resistor

diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
index 47a4e9e1a775..bbaee4f5f7b2 100644
--- a/Documentation/devicetree/bindings/ufs/ufs-common.yaml
+++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml

- freq-table-hz: [ 'clocks' ]

diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
index 782402800d4a..1394557517b1 100644
--- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
+++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml

- if the total of packet size for pervious transactions are more than

diff --git a/Documentation/devicetree/bindings/usb/cypress,cypd4226.yaml b/Documentation/devicetree/bindings/usb/cypress,cypd4226.yaml
index 75eec4a9a020..89fc9a434d05 100644
--- a/Documentation/devicetree/bindings/usb/cypress,cypd4226.yaml
+++ b/Documentation/devicetree/bindings/usb/cypress,cypd4226.yaml

- unevaluatedProperties: false

diff --git a/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml
index 3fb4feb6d3d9..9ea1e4cd0709 100644
--- a/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml

- Indicates if the device atached to a downstream port is

diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
index b956bb5fada7..87986c45be88 100644
--- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml
+++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml

diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
index be268e23ca79..b9576015736b 100644
--- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml
+++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml

diff --git a/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml
index cc4cf92b70d1..d0927f6768a4 100644
--- a/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml
+++ b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

- SPDT USB Switch, witch is cotrolled by GPIO to de/multiplex

diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
index ae24dac78d9a..67591057f234 100644
--- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml

- - description: Phandle and clock specifier of MOCK_UTMI_CLK.

- - description: Phandle and clock specifoer of MASTER_CLK.

- assigned-clock-rates:

- - description: Must be 19.2MHz (19200000).

- - description: Must be >= 60 MHz in HS mode, >= 125 MHz in SS mode.

- - const: mock_utmi

diff --git a/Documentation/devicetree/bindings/usb/realtek,rts5411.yaml b/Documentation/devicetree/bindings/usb/realtek,rts5411.yaml
index 9309f003cd07..f0784d2e86da 100644
--- a/Documentation/devicetree/bindings/usb/realtek,rts5411.yaml
+++ b/Documentation/devicetree/bindings/usb/realtek,rts5411.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/usb/richtek,rt1719.yaml b/Documentation/devicetree/bindings/usb/richtek,rt1719.yaml
index 4ced2f68e2a9..07bec1fe6ebf 100644
--- a/Documentation/devicetree/bindings/usb/richtek,rt1719.yaml
+++ b/Documentation/devicetree/bindings/usb/richtek,rt1719.yaml

- The RT1719 is a sink-only USB Type-C contoller that complies with the latest

diff --git a/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml b/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml
index 42ceaf13cd5d..1ade99e85ba8 100644
--- a/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml

- const: samsung,exynos54333-dwusb3

- - const: pipe_pclk

-Samsung High Speed USB OTG controller

------------------------------

-The Samsung HSOTG IP can be found on Samsung SoCs, from S3C6400 onwards.

-It gives functionality of OTG-compliant USB 2.0 host and device with

-support for USB 2.0 high-speed (480Mbps) and full-speed (12 Mbps)

-Currently only device mode is supported.

-Required properties:

-- compatible: "samsung,s3c6400-hsotg" should be used for all currently

-- interrupts: specifier of interrupt signal of interrupt controller,

- according to bindings of interrupt controller,

-- clocks: contains an array of clock specifiers:

- - first entry: OTG clock

-- clock-names: contains array of clock names:

- - first entry: must be "otg"

-- vusb_d-supply: phandle to voltage regulator of digital section,

-- vusb_a-supply: phandle to voltage regulator of analog section.

- compatible = "samsung,s3c6400-hsotg";

- reg = <0x12480000 0x20000>;

- interrupts = <0 71 0>;

- clocks = <&clock 305>;

- clock-names = "otg";

- vusb_d-supply = <&vusb_reg>;

- vusb_a-supply = <&vusbdac_reg>;

diff --git a/Documentation/devicetree/bindings/usb/ti,usb8041.yaml b/Documentation/devicetree/bindings/usb/ti,usb8041.yaml
index 88ea6c952c66..c2e29bd61e11 100644
--- a/Documentation/devicetree/bindings/usb/ti,usb8041.yaml
+++ b/Documentation/devicetree/bindings/usb/ti,usb8041.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/usb/vialab,vl817.yaml b/Documentation/devicetree/bindings/usb/vialab,vl817.yaml
index 23a13e1d5c7a..76db9071b352 100644
--- a/Documentation/devicetree/bindings/usb/vialab,vl817.yaml
+++ b/Documentation/devicetree/bindings/usb/vialab,vl817.yaml

-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index af60bf1a6664..573578db9509 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml

diff --git a/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml b/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml
index f5cc7aa1b93b..443e2e7ab467 100644
--- a/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml

diff --git a/Documentation/devicetree/bindings/watchdog/marvell,cn10624-wdt.yaml b/Documentation/devicetree/bindings/watchdog/marvell,cn10624-wdt.yaml
new file mode 100644
index 000000000000..1b583f232e53
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/marvell,cn10624-wdt.yaml

diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
index 6d0fe6abd06a..5046dfa55f13 100644
--- a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml

diff --git a/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml b/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml
index fc553211e42d..62ddc284a524 100644
--- a/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml

- * a 32kHz clock in this case.

diff --git a/Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml b/Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml
index 51d03d5b08ad..3e9fd49d935e 100644
--- a/Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml

-$id: "http://devicetree.org/schemas/watchdog/toshiba,visconti-wdt.yaml#"

-$schema: "http://devicetree.org/meta-schemas/core.yaml#"

- * -EINVAL - invalid argument

- * -ENOMEM - out of memory

- * * 0 - OK to runtime suspend the device

- * * -EBUSY - Device should not be runtime suspended

-Delaying, scheduling, and timer routines

-----------------------------------------

-.. kernel-doc:: kernel/time/timer.c

-Wait queues and Wake events

----------------------------

-.. kernel-doc:: include/linux/wait.h

-.. kernel-doc:: kernel/sched/wait.c

- void (*port_disable) (struct ata_port *);

-Called from :c:func:`ata_bus_probe` error path, as well as when unregistering

-from the SCSI module (rmmod, hot unplug). This function should do

-whatever needs to be done to take the port out of use. In most cases,

-:c:func:`ata_port_disable` can be used as this hook.

-Called from :c:func:`ata_bus_probe` on a failed probe. Called from

-:c:func:`ata_scsi_release`.

- void (*eng_timeout) (struct ata_port *ap);

- void (*phy_reset) (struct ata_port *ap);

-Deprecated. Use ``->error_handler()`` instead.

-Read and write standard SATA phy registers. Currently only used if

-``->phy_reset`` hook called the :c:func:`sata_phy_reset` helper function.

-timeout and ATAPI error completion. This function calls low level libata

-driver's :c:func:`eng_timeout` callback, the standard callback for which is

-:c:func:`ata_eng_timeout`. It checks if a qc is active and calls

-:c:func:`ata_qc_timeout` on the qc if so. Actual error handling occurs in

-:c:func:`ata_qc_timeout`.

-If EH is invoked for timeout, :c:func:`ata_qc_timeout` stops BMDMA and

- void (*adap_configured)(struct cec_adapter *adap, bool configured);

-The seven low-level ops deal with various aspects of controlling the CEC adapter

-Called when the adapter is fully configured or unconfigured::

- void (*adap_configured)(struct cec_adapter *adap, bool configured);

-If configured == true, then the adapter is fully configured, i.e. all logical

-addresses have been successfully claimed. If configured == false, then the

-adapter is unconfigured. If the driver has to take specific actions after

-(un)configuration, then that can be done through this optional callback.

-CEC protocol driven. The following high-level callbacks are available:

-Provide some commonly-used math functions, usually required in order to

-estimate signal strength and signal to noise measurements in dB.

-.. kernel-doc:: include/media/dvb_math.h

-Bridge drivers in turn have to register a notifier object. This is

-performed using the :c:func:`v4l2_async_nf_register` call. To

-unregister the notifier the driver has to call

-:c:func:`v4l2_async_nf_unregister`. The former of the two functions

-takes two arguments: a pointer to struct :c:type:`v4l2_device` and a

-pointer to struct :c:type:`v4l2_async_notifier`.

-notifier must be initialized using the :c:func:`v4l2_async_nf_init`.

-Second, bridge drivers can then begin to form a list of subdevice descriptors

-that the bridge device needs for its operation. Several functions are available

-to add subdevice descriptors to a notifier, depending on the type of device and

-the needs of the driver.

-:c:func:`v4l2_async_nf_add_fwnode_remote` and

-:c:func:`v4l2_async_nf_add_i2c` are for bridge and ISP drivers for

-registering their async sub-devices with the notifier.

-:c:func:`v4l2_async_register_subdev_sensor` is a helper function for

-sensor drivers registering their own async sub-device, but it also registers a

-notifier and further registers async sub-devices for lens and flash devices

-found in firmware. The notifier for the sub-device is unregistered with the

-These functions allocate an async sub-device descriptor which is of type struct

-:c:type:`v4l2_async_subdev` embedded in a driver-specific struct. The &struct

-:c:type:`v4l2_async_subdev` shall be the first member of this struct:

- struct my_async_subdev {

- struct v4l2_async_subdev asd;

- struct my_async_subdev *my_asd;

- my_asd = v4l2_async_nf_add_fwnode_remote(&notifier, ep,

- struct my_async_subdev);

- return PTR_ERR(asd);

-The V4L2 core will then use these descriptors to match asynchronously

-registered subdevices to them. If a match is detected the ``.bound()``

-notifier callback is called. After all subdevices have been located the

-.complete() callback is called. When a subdevice is removed from the

-system the .unbind() method is called. All three callbacks are optional.

-:c:type:`v4l2_async_subdev` wrapper. If any of that data requires special

-:c:type:`v4l2_async_subdev`.

-Documentation/s390/driver-model.rst.

- Documentation/s390/vfio-ccw.rst.

- :identifiers: tty_prepare_flip_string tty_insert_flip_string_fixed_flag

- tty_insert_flip_string_flags __tty_insert_flip_char

- 480 Mbit/s for high speed USB (added for USB 2.0);

- also used for Wireless USB, which has no fixed speed

- - The attach_ioas callback is issued when the device is attached to an

- IOAS managed by the bound iommufd. The attached IOAS is automatically

- detached when the device is unbound from iommufd.

-This part is for the kenrel developers considering to add a function to

-- userspace app tries to write to mmaped vaddress

- * 2D acceleratrion

- as the console subsystem automagicaly binds ttys to the fb.

diff --git a/Documentation/features/core/thread-info-in-task/arch-support.txt b/Documentation/features/core/thread-info-in-task/arch-support.txt
index 9c5d39eebef2..97c65ed2ac23 100644
--- a/Documentation/features/core/thread-info-in-task/arch-support.txt
+++ b/Documentation/features/core/thread-info-in-task/arch-support.txt

-# description: arch makes use of the core kernel facility to embedd thread_info in task_struct

- | loongarch: | TODO |

diff --git a/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt b/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt
index bcc29d3aba9a..38a0a54b79f5 100644
--- a/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt
+++ b/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt

- | loongarch: | TODO |

diff --git a/Documentation/features/debug/kprobes/arch-support.txt b/Documentation/features/debug/kprobes/arch-support.txt
index 8a77d62a42c5..aad83b57587a 100644
--- a/Documentation/features/debug/kprobes/arch-support.txt
+++ b/Documentation/features/debug/kprobes/arch-support.txt

- | loongarch: | TODO |

diff --git a/Documentation/features/debug/kretprobes/arch-support.txt b/Documentation/features/debug/kretprobes/arch-support.txt
index cf4723c5ac55..61380010a4a7 100644
--- a/Documentation/features/debug/kretprobes/arch-support.txt
+++ b/Documentation/features/debug/kretprobes/arch-support.txt

- | loongarch: | TODO |

diff --git a/Documentation/features/debug/stackprotector/arch-support.txt b/Documentation/features/debug/stackprotector/arch-support.txt
index 71cd4ba18f7d..4c64c5d596f7 100644
--- a/Documentation/features/debug/stackprotector/arch-support.txt
+++ b/Documentation/features/debug/stackprotector/arch-support.txt

- | loongarch: | TODO |

diff --git a/Documentation/features/debug/uprobes/arch-support.txt b/Documentation/features/debug/uprobes/arch-support.txt
index d53f2f94fbda..24c8423b0abc 100644
--- a/Documentation/features/debug/uprobes/arch-support.txt
+++ b/Documentation/features/debug/uprobes/arch-support.txt

- | loongarch: | TODO |

diff --git a/Documentation/features/locking/lockdep/arch-support.txt b/Documentation/features/locking/lockdep/arch-support.txt
index ddb945278589..a36e231670d7 100644
--- a/Documentation/features/locking/lockdep/arch-support.txt
+++ b/Documentation/features/locking/lockdep/arch-support.txt

- | parisc: | TODO |

- | loongarch: | TODO |

- prexisting common 'shortcuts'.

- CONFIG_AFS - The AFS filesystem

-How to Get Lastest Version

-==========================

-may be overridden. This is not seen externally, and is used whan a process

-their parent volume. The cache backend is reponsible for rendering the binary

-The first step for a network filsystem is to acquire a volume cookie for the

-use by an acquired volume or ENOMEM if an allocation failure occured. It may

-will happen for write(2). The reads/writes are bufferred so only a

-mmaped from a `DAX` file will fail when there are no 'struct page' to describe

-and their indicies allocated in one mount are independent from ptys

-and their indicies in all other mounts.

- - All data and metadata are commited to the journal.

- access ops normal noraml N/A

-The sload.f2fs gives a way to insert files and directories in the exisiting disk

-fallocate(fd, DEFAULT_MODE), it allocates on-disk block addressess having

-- AES-128-CBC for contents and AES-128-CTS-CBC for filenames

-- AES-256-XTS for contents and AES-256-HCTR2 for filenames (v2 policies only)

-- SM4-XTS for contents and SM4-CTS-CBC for filenames (v2 policies only)

-If unsure, you should use the (AES-256-XTS, AES-256-CTS-CBC) pair.

-AES-128-CBC was added only for low-powered embedded devices with

-crypto accelerators such as CAAM or CESA that do not support XTS. To

-use AES-128-CBC, CONFIG_CRYPTO_ESSIV and CONFIG_CRYPTO_SHA256 (or

-another SHA-256 implementation) must be enabled so that ESSIV can be

-Adiantum is a (primarily) stream cipher-based mode that is fast even

-on CPUs without dedicated crypto instructions. It's also a true

-wide-block mode, unlike XTS. It can also eliminate the need to derive

-per-file encryption keys. However, it depends on the security of two

-primitives, XChaCha12 and AES-256, rather than just one. See the

-paper "Adiantum: length-preserving encryption for entry-level

-processors" (https://eprint.iacr.org/2018/720.pdf) for more details.

-To use Adiantum, CONFIG_CRYPTO_ADIANTUM must be enabled. Also, fast

-implementations of ChaCha and NHPoly1305 should be enabled, e.g.

-CONFIG_CRYPTO_CHACHA20_NEON and CONFIG_CRYPTO_NHPOLY1305_NEON for ARM.

-AES-256-HCTR2 is another true wide-block encryption mode that is intended for

-use on CPUs with dedicated crypto instructions. AES-256-HCTR2 has the property

-that a bitflip in the plaintext changes the entire ciphertext. This property

-makes it desirable for filename encryption since initialization vectors are

-reused within a directory. For more details on AES-256-HCTR2, see the paper

-"Length-preserving encryption with HCTR2"

-(https://eprint.iacr.org/2021/1441.pdf). To use AES-256-HCTR2,

-CONFIG_CRYPTO_HCTR2 must be enabled. Also, fast implementations of XCTR and

-POLYVAL should be enabled, e.g. CRYPTO_POLYVAL_ARM64_CE and

-CRYPTO_AES_ARM64_CE_BLK for ARM64.

-SM4 is a Chinese block cipher that is an alternative to AES. It has

-not seen as much security review as AES, and it only has a 128-bit key

-size. It may be useful in cases where its use is mandated.

-Otherwise, it should not be used. For SM4 support to be available, it

-also needs to be enabled in the kernel crypto API.

-New encryption modes can be added relatively easily, without changes

-to individual filesystems. However, authenticated encryption (AE)

-modes are not currently supported because of the difficulty of dealing

-with ciphertext expansion.

- (4) for ``filenames_encryption_mode``.

-are queued, except for those marked LM_FLAG_PRIORITY which are

-used only during recovery, and even then only for journal locks.

-tends to show up most with shared mmaped files which are being written

-the set of all possible ids useable on a given system.

-dealing with subsets we can embedd idmappings into each other, i.e. we can

-straightfoward algorithm to use is to apply the inverse of the first idmapping,

-For example, the id ``u1000`` is an id in the upper idmapset or "userspace

-idmapset" starting with ``u1000``. And it is mapped to ``k11000`` which is a

-kernel id in the lower idmapset or "kernel idmapset" starting with ``k10000``.

-The astute reader will have realized that this is simply a varation of the

-userspace id. We could only do this if we were to mount the whole fileystem

-directory case this change in ownership would even need to happen everytime the

-this ``vfsuid_t`` or ``vfsgid_t`` to become the new filesytem wide ownership.

-============== =============================================

-->release_folio() is called when the kernel is about to try to drop the

-buffers from the folio in preparation for freeing it. It returns false to

-indicate that the buffers are (or may be) freeable. If ->release_folio is

-NULL, the kernel assumes that the fs has no private interest in the buffers.

- int (*iterate) (struct file *, struct dir_context *);

- void (*open)(struct vm_area_struct*);

- void (*close)(struct vm_area_struct*);

- vm_fault_t (*fault)(struct vm_area_struct*, struct vm_fault *);

-============= ========= ===========================

-fault: yes can return with page locked

-page_mkwrite: yes can return with page locked

-============= ========= ===========================

-filesystem should skip it. Filesystem should use do_set_pte() to setup

-through the suppplied table of operations. Waits will be performed as

- - NFS-root (diskless) clients, where the local DCHP server (or

- Set the 'content' fileds in 'new' from 'orig'.

-unwarranted. However GSSAPI operations are fundementally separable in 2

-and several meta data files. The mata data files are the files used

- which is not necessarily as effectice as JBD would be.

- bytes of kcalloced memory. This memory is further intialized:

- applications are usually prepared to hande this error (mv(1) for example

- this "off" traslates to "follow", otherwise it translates to "nofollow".

-isofs, ext2, ext3, resierfs, fat

-SEEK_DATA. You can hanle this by returning -EINVAL, but it would be nicer to

-local filesystems can ignore tha argument - they are guaranteed that the

-"AnonHugePages" shows the ammount of memory backed by transparent hugepage.

-"ShmemPmdMapped" shows the ammount of shared (shmem/tmpfs) memory backed by

-"Shared_Hugetlb" and "Private_Hugetlb" show the ammounts of memory backed by

- mg mergable advise flag

- files which have been mmaped, such as libraries

-Originally, before the advent of pid namepsace, procfs was a global file

-underlaying filesystem.

-code. It is provided as a convenience for a start() funciton to

-The iterater value returned by start() or next() is guaranteed to be

-trusted.* and security.* namespaces. ramfs does not use swap and you cannot

-modify any parameter for a ramfs filesystem. The size limit of a ramfs

-To avoid wearing out the flash, the index is only persisted (*commited*) when

- check is too unflexible. With this option you can

- int (*freeze_super) (struct super_block *);

- int (*thaw_super) (struct super_block *);

- int (*iterate) (struct file *, struct dir_context *);

- called when the VFS needs to read the directory contents

- called when the VFS needs to read the directory contents when

- filesystem supports concurrent dir iterators

diff --git a/Documentation/filesystems/xfs-online-fsck-design.rst b/Documentation/filesystems/xfs-online-fsck-design.rst
index 791ab264b77e..1625d1131093 100644
--- a/Documentation/filesystems/xfs-online-fsck-design.rst
+++ b/Documentation/filesystems/xfs-online-fsck-design.rst

- Unsuccesful repairs are requeued as long as forward progress on repairs is

-Maintenace") of G. Graefe, `"Concurrent Queries and Updates in Summary Views

- automated fuzz testing of ondisk artifacts to find mischevious behavior and

-Checking an extended attribute structure is not so straightfoward due to the

-Checking a directory is pretty straightfoward:

-* For each AG, maintain a count of intent items targetting that AG.

-heapsort to hedge aginst performance collapse if the chosen quicksort pivots

-Online repair functions minimize the chances of this occuring by using very

-large transactions, which each can accomodate many thousands of block freeing

-Gaps betweeen data fork extents that are smaller than 64k are treated as if

- files that are partially writen (not empty nor full) or that have a zone that

diff --git a/Documentation/firmware-guide/acpi/chromeos-acpi-device.rst b/Documentation/firmware-guide/acpi/chromeos-acpi-device.rst
index f37fc90ce340..89419e116413 100644
--- a/Documentation/firmware-guide/acpi/chromeos-acpi-device.rst
+++ b/Documentation/firmware-guide/acpi/chromeos-acpi-device.rst

-The plug and play ID of a Chrome OS ACPI device is GGL0001. GGL is a valid PNP ID of Google.

-PNP ID can be used with the ACPI devices according to the guidelines. The following ACPI

-objects are supported:

-an evaluation of all of it's uses. This uncovered that they aren't needed

-usespace can define different policies. For example, some OSes can use MPO to

-.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

- :doc: product_name

-.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

-Strictly speaking this is not a DRM helper library but generally useable

-drivers. Besides that they make it unecessarily more complicated for userspace

-at this point. Futhermore the exposed restrictions are often wrongly set by

- can subclass these structures through embeddeding, or add entirely new state

-===========================

-One purpose of this output is to enable writing as generic as practicaly

-percentage of it's maximum frequency.

-the HW context is essentially (most of atleast) the state of a GPU.

-user space the need to restore (most of atleast) the GPU state at the

-i915,Generic,"""Broadcast RGB""",ENUM,"{ ""Automatic"", ""Full"", ""Limited 16:235"" }",Connector,"When this property is set to Limited 16:235 and CTM is set, the hardware will be programmed with the result of the multiplication of CTM by the limited range matrix to ensure the pixels normaly in the range 0..1.0 are remapped to the range 16/255..235/255."

+i915,Generic,"""Broadcast RGB""",ENUM,"{ ""Automatic"", ""Full"", ""Limited 16:235"" }",Connector,"When this property is set to Limited 16:235 and CTM is set, the hardware will be programmed with the result of the multiplication of CTM by the limited range matrix to ensure the pixels normally in the range 0..1.0 are remapped to the range 16/255..235/255."

-- CHIP: for register programing and HW specific feature (limitation) handling.

-- komeda_kms_dev: attachs or connects komeda_dev to DRM-KMS.

- The kernel time at crash formated as seconds.microseconds.

- simplier, locking gets simplier, etc...)

-VM_BIND locking hirarchy

-There is a conversion guide for atomic and all you need is a GPU for a

-non-converted driver (again virtual HW drivers for KVM are still all

-it's not consistently used. This should be fixed, preferrably in the atomic

-other driver specific per-object locks removed. The problem is tha rolling out

-Convert logging to drm_* functions with drm_device paramater

-Drawing to dispay memory quickly is crucial for many applications'

-struct drm_gem_object_funcs

----------------------------

-GEM objects can now have a function table instead of having the callbacks on the

-DRM driver struct. This is now the preferred way. Callbacks in drivers have been

-converted, except for struct drm_driver.gem_prime_mmap.

-Level: Intermediate

-driver with the help of the DRM fbconv helpers. [1] These helpers provide

-several fbdev drivers are available at [1] and a tutorial of this process

-available at [2]. The result is a primitive DRM driver that can run X11

- - [1] https://gitlab.freedesktop.org/tzimmermann/linux/tree/fbconv

- - [2] https://gitlab.freedesktop.org/tzimmermann/linux/blob/fbconv/drivers/gpu/drm/drm_fbconv_helper.c

-boards. The CPU temperature on ASUS boards is reported from PECI 0.

-driver doesn't use CAPABILITY to determine it's behavior.

- .probe_new = ds1200_probe,

-Kernel driver smm665

-====================

- * Summit Microelectronics SMM465

- Addresses scanned: -

- http://www.summitmicro.com/prod_select/summary/SMM465/SMM465DS.pdf

- * Summit Microelectronics SMM665, SMM665B

- Addresses scanned: -

- http://www.summitmicro.com/prod_select/summary/SMM665/SMM665B_2089_20.pdf

- * Summit Microelectronics SMM665C

- Addresses scanned: -

- http://www.summitmicro.com/prod_select/summary/SMM665C/SMM665C_2125.pdf

- * Summit Microelectronics SMM764

- Addresses scanned: -

- http://www.summitmicro.com/prod_select/summary/SMM764/SMM764_2098.pdf

- * Summit Microelectronics SMM766, SMM766B

- Addresses scanned: -

- http://www.summitmicro.com/prod_select/summary/SMM766/SMM766_2086.pdf

- http://www.summitmicro.com/prod_select/summary/SMM766B/SMM766B_2122.pdf

-Author: Guenter Roeck <linux@roeck-us.net>

- Default: 1250 (mV)

- Reference voltage on VREF_ADC pin in mV. It should not be necessary to set

- this parameter unless a non-default reference voltage is used.

-[From datasheet] The SMM665 is an Active DC Output power supply Controller

-that monitors, margins and cascade sequences power. The part monitors six

-power supply channels as well as VDD, 12V input, two general-purpose analog

-inputs and an internal temperature sensor using a 10-bit ADC.

-Each monitored channel has its own high and low limits, plus a critical

-Support for SMM465, SMM764, and SMM766 has been implemented but is untested.

-This driver does not probe for devices, since there is no register which

-can be safely used to identify the chip. You will have to instantiate

-the devices explicitly. When instantiating the device, you have to specify

-its configuration register address.

-Example: the following will load the driver for an SMM665 at address 0x57

- $ echo smm665 0x57 > /sys/bus/i2c/devices/i2c-1/new_device

-This driver uses the values in the datasheet to convert ADC register values

-into the values specified in the sysfs-interface document. All attributes are

-Min, max, lcrit, and crit values are used by the chip to trigger external signals

-and/or other activity. Triggered signals can include HEALTHY, RST, Power Off,

-or Fault depending on the chip configuration. The driver reports values as lcrit

-or crit if exceeding the limits triggers RST, Power Off, or Fault, and as min or

-max otherwise. For details please see the SMM665 datasheet.

-For SMM465 and SMM764, values for Channel E and F are reported but undefined.

-======================= =======================================================

-in1_input 12V input voltage (mV)

-in2_input 3.3V (VDD) input voltage (mV)

-in3_input Channel A voltage (mV)

-in4_input Channel B voltage (mV)

-in5_input Channel C voltage (mV)

-in6_input Channel D voltage (mV)

-in7_input Channel E voltage (mV)

-in8_input Channel F voltage (mV)

-in9_input AIN1 voltage (mV)

-in10_input AIN2 voltage (mV)

-in1_min 12v input minimum voltage (mV)

-in2_min 3.3V (VDD) input minimum voltage (mV)

-in3_min Channel A minimum voltage (mV)

-in4_min Channel B minimum voltage (mV)

-in5_min Channel C minimum voltage (mV)

-in6_min Channel D minimum voltage (mV)

-in7_min Channel E minimum voltage (mV)

-in8_min Channel F minimum voltage (mV)

-in9_min AIN1 minimum voltage (mV)

-in10_min AIN2 minimum voltage (mV)

-in1_max 12v input maximum voltage (mV)

-in2_max 3.3V (VDD) input maximum voltage (mV)

-in3_max Channel A maximum voltage (mV)

-in4_max Channel B maximum voltage (mV)

-in5_max Channel C maximum voltage (mV)

-in6_max Channel D maximum voltage (mV)

-in7_max Channel E maximum voltage (mV)

-in8_max Channel F maximum voltage (mV)

-in9_max AIN1 maximum voltage (mV)

-in10_max AIN2 maximum voltage (mV)

-in1_lcrit 12v input critical minimum voltage (mV)

-in2_lcrit 3.3V (VDD) input critical minimum voltage (mV)

-in3_lcrit Channel A critical minimum voltage (mV)

-in4_lcrit Channel B critical minimum voltage (mV)

-in5_lcrit Channel C critical minimum voltage (mV)

-in6_lcrit Channel D critical minimum voltage (mV)

-in7_lcrit Channel E critical minimum voltage (mV)

-in8_lcrit Channel F critical minimum voltage (mV)

-in9_lcrit AIN1 critical minimum voltage (mV)

-in10_lcrit AIN2 critical minimum voltage (mV)

-in1_crit 12v input critical maximum voltage (mV)

-in2_crit 3.3V (VDD) input critical maximum voltage (mV)

-in3_crit Channel A critical maximum voltage (mV)

-in4_crit Channel B critical maximum voltage (mV)

-in5_crit Channel C critical maximum voltage (mV)

-in6_crit Channel D critical maximum voltage (mV)

-in7_crit Channel E critical maximum voltage (mV)

-in8_crit Channel F critical maximum voltage (mV)

-in9_crit AIN1 critical maximum voltage (mV)

-in10_crit AIN2 critical maximum voltage (mV)

-in1_crit_alarm 12v input critical alarm

-in2_crit_alarm 3.3V (VDD) input critical alarm

-in3_crit_alarm Channel A critical alarm

-in4_crit_alarm Channel B critical alarm

-in5_crit_alarm Channel C critical alarm

-in6_crit_alarm Channel D critical alarm

-in7_crit_alarm Channel E critical alarm

-in8_crit_alarm Channel F critical alarm

-in9_crit_alarm AIN1 critical alarm

-in10_crit_alarm AIN2 critical alarm

-temp1_input Chip temperature

-temp1_min Minimum chip temperature

-temp1_max Maximum chip temperature

-temp1_crit Critical chip temperature

-temp1_crit_alarm Temperature critical alarm

-======================= =======================================================

-frames and data corruption is handled or unsignificant.

-adapter that comes with PhoenixRC [1]_ or other compatible adapters.

-the `input layer utilities` suite [2]_.

-.. [1] http://www.phoenix-sim.com/

-.. [2] https://www.kraxel.org/cgit/input/

-initiated contact on the surface, is a Euclidian Bipartite Matching

-The compiler used can be swapped out via ``CC=`` command line argument to ``make``.

-``CC=`` should be set when selecting a config and during a build. ::

- make CC=clang defconfig

-A single Clang compiler binary will typically contain all supported backends,

-which can help simplify cross compiling. ::

- make ARCH=arm64 CC=clang CROSS_COMPILE=aarch64-linux-gnu-

-``CROSS_COMPILE`` is not used to prefix the Clang compiler binary, instead

-``CROSS_COMPILE`` is used to set a command line flag: ``--target=<triple>``. For

- clang --target=aarch64-linux-gnu foo.c

-LLVM has substitutes for GNU binutils utilities. They can be enabled individually.

-The full list of supported make variables::

-To simplify the above command, Kbuild supports the ``LLVM`` variable::

-which will use ``/path/to/llvm/clang``, ``/path/to/llvm/ld.lld``, etc.

-``LLVM=1``. If you only wish to use certain LLVM utilities, use their respective

-The integrated assembler is enabled by default. You can pass ``LLVM_IAS=0`` to

-Omitting CROSS_COMPILE

-As explained above, ``CROSS_COMPILE`` is used to set ``--target=<triple>``.

-If ``CROSS_COMPILE`` is not specified, the ``--target=<triple>`` is inferred

-That means if you use only LLVM tools, ``CROSS_COMPILE`` becomes unnecessary.

-For example, to cross-compile the arm64 kernel::

- make ARCH=arm64 LLVM=1

-If ``LLVM_IAS=0`` is specified, ``CROSS_COMPILE`` is also used to derive

-``--prefix=<path>`` to search for the GNU assembler and linker. ::

- make ARCH=arm64 LLVM=1 LLVM_IAS=0 CROSS_COMPILE=aarch64-linux-gnu-

-We provide prebuilt stable versions of LLVM on `kernel.org <https://kernel.org/pub/tools/llvm/>`_.

- futher detail below.

-class and hence their usages and dependecies will contribute to those of

-charactor '?' would have been shown instead. Similar deduction can be

- The number of seconds to keep the test threads affinitied

-Instead, conditionals in header files and the core locking implemementation

-Tagged branches used in :ref:`Documentation/maintainer/pull-requests.rst

-<pullrequests>` should be signed with the developers public GPG key. Signed

-tags can be created by passing the ``-u`` flag to ``git tag``. However,

-since you would *usually* use the same key for the same project, you can

-Alternatively, edit your ``.git/config`` or ``~/.gitconfig`` file by hand:

-You may need to tell ``git`` to use ``gpg2``

-You may also like to tell ``gpg`` which ``tty`` to use (add to your shell rc file)

-The web site http://lore.kernel.org is meant as a grand archive of all mail

-The link tag will look like this:

-by adding the following hook into your git:

-.. code-block:: none

diff --git a/Documentation/maintainer/maintainer-entry-profile.rst b/Documentation/maintainer/maintainer-entry-profile.rst
index cfd37f31077f..6b64072d4bf2 100644
--- a/Documentation/maintainer/maintainer-entry-profile.rst
+++ b/Documentation/maintainer/maintainer-entry-profile.rst

-(see :ref:`Documentation/maintainer/configure-git.rst <configuregit>`).

-| pte_mkwrite | Creates a writable PTE |

-| pmd_mkwrite | Creates a writable PMD |

-As of this writing, anonymous page type and memory cgroup type are supported by

-the feature. Some filter target types can require additional arguments. For

-example, the memory cgroup filter type asks users to specify the file path of

-the memory cgroup for the filter. Hence, users can apply specific schemes to

-only anonymous pages, non-anonymous pages, pages of specific cgroups, all pages

-excluding those of specific cgroups, and any combination of those.

-Frontswap provides a "transcendent memory" interface for swap pages.

-In some environments, dramatic performance savings may be obtained because

-swapped pages are saved in RAM (or a RAM-like device) instead of a swap disk.

-.. _Transcendent memory in a nutshell: https://lwn.net/Articles/454795/

-Frontswap is so named because it can be thought of as the opposite of

-a "backing" store for a swap device. The storage is assumed to be

-a synchronous concurrency-safe page-oriented "pseudo-RAM device" conforming

-to the requirements of transcendent memory (such as Xen's "tmem", or

-in-kernel compressed memory, aka "zcache", or future RAM-like devices);

-this pseudo-RAM device is not directly accessible or addressable by the

-kernel and is of unknown and possibly time-varying size. The driver

-links itself to frontswap by calling frontswap_register_ops to set the

-frontswap_ops funcs appropriately and the functions it provides must

-conform to certain policies as follows:

-An "init" prepares the device to receive frontswap pages associated

-with the specified swap device number (aka "type"). A "store" will

-copy the page to transcendent memory and associate it with the type and

-offset associated with the page. A "load" will copy the page, if found,

-from transcendent memory into kernel memory, but will NOT remove the page

-from transcendent memory. An "invalidate_page" will remove the page

-from transcendent memory and an "invalidate_area" will remove ALL pages

-associated with the swap type (e.g., like swapoff) and notify the "device"

-to refuse further stores with that swap type.

-Once a page is successfully stored, a matching load on the page will normally

-succeed. So when the kernel finds itself in a situation where it needs

-to swap out a page, it first attempts to use frontswap. If the store returns

-success, the data has been successfully saved to transcendent memory and

-a disk write and, if the data is later read back, a disk read are avoided.

-If a store returns failure, transcendent memory has rejected the data, and the

-page can be written to swap as usual.

-Note that if a page is stored and the page already exists in transcendent memory

-(a "duplicate" store), either the store succeeds and the data is overwritten,

-or the store fails AND the page is invalidated. This ensures stale data may

-never be obtained from frontswap.

-If properly configured, monitoring of frontswap is done via debugfs in

-the `/sys/kernel/debug/frontswap` directory. The effectiveness of

-frontswap can be measured (across all swap devices) with:

- how many store attempts have failed

- how many loads were attempted (all should succeed)

- how many store attempts have succeeded

- how many invalidates were attempted

-A backend implementation may provide additional metrics.

-* Where's the value?

-When a workload starts swapping, performance falls through the floor.

-Frontswap significantly increases performance in many such workloads by

-providing a clean, dynamic interface to read and write swap pages to

-"transcendent memory" that is otherwise not directly addressable to the kernel.

-This interface is ideal when data is transformed to a different form

-and size (such as with compression) or secretly moved (as might be

-useful for write-balancing for some RAM-like devices). Swap pages (and

-evicted page-cache pages) are a great use for this kind of slower-than-RAM-

-but-much-faster-than-disk "pseudo-RAM device".

-Frontswap with a fairly small impact on the kernel,

-provides a huge amount of flexibility for more dynamic, flexible RAM

-utilization in various system configurations:

-In the single kernel case, aka "zcache", pages are compressed and

-stored in local memory, thus increasing the total anonymous pages

-that can be safely kept in RAM. Zcache essentially trades off CPU

-cycles used in compression/decompression for better memory utilization.

-Benchmarks have shown little or no impact when memory pressure is

-low while providing a significant performance improvement (25%+)

-on some workloads under high memory pressure.

-"RAMster" builds on zcache by adding "peer-to-peer" transcendent memory

-support for clustered systems. Frontswap pages are locally compressed

-as in zcache, but then "remotified" to another system's RAM. This

-allows RAM to be dynamically load-balanced back-and-forth as needed,

-i.e. when system A is overcommitted, it can swap to system B, and

-vice versa. RAMster can also be configured as a memory server so

-many servers in a cluster can swap, dynamically as needed, to a single

-server configured with a large amount of RAM... without pre-configuring

-how much of the RAM is available for each of the clients!

-In the virtual case, the whole point of virtualization is to statistically

-multiplex physical resources across the varying demands of multiple

-virtual machines. This is really hard to do with RAM and efforts to do

-it well with no kernel changes have essentially failed (except in some

-well-publicized special-case workloads).

-Specifically, the Xen Transcendent Memory backend allows otherwise

-"fallow" hypervisor-owned RAM to not only be "time-shared" between multiple

-virtual machines, but the pages can be compressed and deduplicated to

-optimize RAM utilization. And when guest OS's are induced to surrender

-underutilized RAM (e.g. with "selfballooning"), sudden unexpected

-memory pressure may result in swapping; frontswap allows those pages

-to be swapped to and from hypervisor RAM (if overall host system memory

-conditions allow), thus mitigating the potentially awful performance impact

-of unplanned swapping.

-A KVM implementation is underway and has been RFC'ed to lkml. And,

-using frontswap, investigation is also underway on the use of NVM as

-a memory extension technology.

-* Sure there may be performance advantages in some situations, but

- what's the space/time overhead of frontswap?

-If CONFIG_FRONTSWAP is disabled, every frontswap hook compiles into

-nothingness and the only overhead is a few extra bytes per swapon'ed

-swap device. If CONFIG_FRONTSWAP is enabled but no frontswap "backend"

-registers, there is one extra global variable compared to zero for

-every swap page read or written. If CONFIG_FRONTSWAP is enabled

-AND a frontswap backend registers AND the backend fails every "store"

-request (i.e. provides no memory despite claiming it might),

-CPU overhead is still negligible -- and since every frontswap fail

-precedes a swap page write-to-disk, the system is highly likely

-to be I/O bound and using a small fraction of a percent of a CPU

-will be irrelevant anyway.

-As for space, if CONFIG_FRONTSWAP is enabled AND a frontswap backend

-registers, one bit is allocated for every swap page for every swap

-device that is swapon'd. This is added to the EIGHT bits (which

-was sixteen until about 2.6.34) that the kernel already allocates

-for every swap page for every swap device that is swapon'd. (Hugh

-Dickins has observed that frontswap could probably steal one of

-the existing eight bits, but let's worry about that minor optimization

-later.) For very large swap disks (which are rare) on a standard

-4K pagesize, this is 1MB per 32GB swap.

-When swap pages are stored in transcendent memory instead of written

-out to disk, there is a side effect that this may create more memory

-pressure that can potentially outweigh the other advantages. A

-backend, such as zcache, must implement policies to carefully (but

-dynamically) manage memory limits to ensure this doesn't happen.

-* OK, how about a quick overview of what this frontswap patch does

- in terms that a kernel hacker can grok?

-Let's assume that a frontswap "backend" has registered during

-kernel initialization; this registration indicates that this

-frontswap backend has access to some "memory" that is not directly

-accessible by the kernel. Exactly how much memory it provides is

-entirely dynamic and random.

-Whenever a swap-device is swapon'd frontswap_init() is called,

-passing the swap device number (aka "type") as a parameter.

-This notifies frontswap to expect attempts to "store" swap pages

-associated with that number.

-Whenever the swap subsystem is readying a page to write to a swap

-device (c.f swap_writepage()), frontswap_store is called. Frontswap

-consults with the frontswap backend and if the backend says it does NOT

-have room, frontswap_store returns -1 and the kernel swaps the page

-to the swap device as normal. Note that the response from the frontswap

-backend is unpredictable to the kernel; it may choose to never accept a

-page, it could accept every ninth page, or it might accept every

-page. But if the backend does accept a page, the data from the page

-has already been copied and associated with the type and offset,

-and the backend guarantees the persistence of the data. In this case,

-frontswap sets a bit in the "frontswap_map" for the swap device

-corresponding to the page offset on the swap device to which it would

-otherwise have written the data.

-When the swap subsystem needs to swap-in a page (swap_readpage()),

-it first calls frontswap_load() which checks the frontswap_map to

-see if the page was earlier accepted by the frontswap backend. If

-it was, the page of data is filled from the frontswap backend and

-the swap-in is complete. If not, the normal swap-in code is

-executed to obtain the page of data from the real swap device.

-So every time the frontswap backend accepts a page, a swap device read

-and (potentially) a swap device write are replaced by a "frontswap backend

-store" and (possibly) a "frontswap backend loads", which are presumably much

-* Can't frontswap be configured as a "special" swap device that is

- just higher priority than any real swap device (e.g. like zswap,

- or maybe swap-over-nbd/NFS)?

-No. First, the existing swap subsystem doesn't allow for any kind of

-swap hierarchy. Perhaps it could be rewritten to accommodate a hierarchy,

-but this would require fairly drastic changes. Even if it were

-rewritten, the existing swap subsystem uses the block I/O layer which

-assumes a swap device is fixed size and any page in it is linearly

-addressable. Frontswap barely touches the existing swap subsystem,

-and works around the constraints of the block I/O subsystem to provide

-a great deal of flexibility and dynamicity.

-For example, the acceptance of any swap page by the frontswap backend is

-entirely unpredictable. This is critical to the definition of frontswap

-backends because it grants completely dynamic discretion to the

-backend. In zcache, one cannot know a priori how compressible a page is.

-"Poorly" compressible pages can be rejected, and "poorly" can itself be

-defined dynamically depending on current memory constraints.

-Further, frontswap is entirely synchronous whereas a real swap

-device is, by definition, asynchronous and uses block I/O. The

-block I/O layer is not only unnecessary, but may perform "optimizations"

-that are inappropriate for a RAM-oriented device including delaying

-the write of some pages for a significant amount of time. Synchrony is

-required to ensure the dynamicity of the backend and to avoid thorny race

-conditions that would unnecessarily and greatly complicate frontswap

-and/or the block I/O subsystem. That said, only the initial "store"

-and "load" operations need be synchronous. A separate asynchronous thread

-is free to manipulate the pages stored by frontswap. For example,

-the "remotification" thread in RAMster uses standard asynchronous

-kernel sockets to move compressed frontswap pages to a remote machine.

-Similarly, a KVM guest-side implementation could do in-guest compression

-and use "batched" hypercalls.

-In a virtualized environment, the dynamicity allows the hypervisor

-(or host OS) to do "intelligent overcommit". For example, it can

-choose to accept pages only until host-swapping might be imminent,

-then force guests to do their own swapping.

-There is a downside to the transcendent memory specifications for

-frontswap: Since any "store" might fail, there must always be a real

-slot on a real swap device to swap the page. Thus frontswap must be

-implemented as a "shadow" to every swapon'd device with the potential

-capability of holding every page that the swap device might have held

-and the possibility that it might hold no pages at all. This means

-that frontswap cannot contain more pages than the total of swapon'd

-swap devices. For example, if NO swap device is configured on some

-installation, frontswap is useless. Swapless portable devices

-can still use frontswap but a backend for such devices must configure

-some kind of "ghost" swap device and ensure that it is never used.

-* Why this weird definition about "duplicate stores"? If a page

- has been previously successfully stored, can't it always be

- successfully overwritten?

-Nearly always it can, but no, sometimes it cannot. Consider an example

-where data is compressed and the original 4K page has been compressed

-to 1K. Now an attempt is made to overwrite the page with data that

-is non-compressible and so would take the entire 4K. But the backend

-has no more space. In this case, the store must be rejected. Whenever

-frontswap rejects a store that would overwrite, it also must invalidate

-the old data and ensure that it is no longer accessible. Since the

-swap subsystem then writes the new data to the read swap device,

-this is the correct course of action to ensure coherency.

-* Why does the frontswap patch create the new include file swapfile.h?

-The frontswap code depends on some swap-subsystem-internal data

-structures that have, over the years, moved back and forth between

-static and global. This seemed a reasonable compromise: Define

-them as global but declare them in a new include file that isn't

-included by the large number of source files that include swap.h.

-Dan Magenheimer, last updated April 9, 2012

-* kmap_local_page(). This function is used to require short term mappings.

- It can be invoked from any context (including interrupts) but the mappings

- can only be used in the context which acquired them.

- This function should always be used, whereas kmap_atomic() and kmap() have

- kmap_local_page() always returns a valid virtual address and it is assumed

- that kunmap_local() will never fail.

- On CONFIG_HIGHMEM=n kernels and for low memory pages this returns the

- always safe to use kmap_local_page() / kunmap_local().

- While it is significantly faster than kmap(), for the highmem case it

- comes with restrictions about the pointers validity. Contrary to kmap()

- kmap_local_page().

-like a CPU page fault.

-Both functions copy CPU page table entries into their pfns array argument. Each

-entry in that array corresponds to an address in the virtual range. HMM

-provides a set of flags to help the driver identify special CPU page table

-Locking within the sync_cpu_device_pagetables() callback is the most important

-aspect the driver must respect in order to keep things properly synchronized.

-The usage pattern is::

-guranteed to last until the driver drops the page lock and page reference, at

-Huge page freeing is performed by the routine free_huge_page(). This routine

-is the destructor for hugetlbfs compound pages. As a result, it is only

-passed a pointer to the page struct. When a huge page is freed, reservation

-accounting may need to be performed. This would be the case if the page was

-associated with a subpool that contained reserves, or the page is being freed

-on an error path where a global reserve count must be restored.

-time (before instantiation and clearing of PagePrivate), then free_huge_page

-memory failures too. The expection is that near all applications

- to be split. After splitting, a migration retry was used for it's sub-pages.

-required is done by pgtable_pte_page_ctor() and pgtable_pte_page_dtor(), which

-PMD split lock enabling requires pgtable_pmd_page_ctor() call on PMD table

-allocation and pgtable_pmd_page_dtor() on freeing.

-NOTE: pgtable_pte_page_ctor() and pgtable_pmd_page_ctor() can fail -- it must

-The spinlock_t allocated in pgtable_pte_page_ctor() for PTE table and in

-pgtable_pmd_page_ctor() for PMD table.

-The mmaped area will still have properties of the locked area - pages will not

-default, there is a one-to-one mapping from a page frame to it's corresponding

-consists of 512 base pages and a 1GB HugeTLB page consists of 4096 base pages.

- description: Name of the define for the verion of the family.

- enum: [ strict, dump ]

- description: Name of the define for the verion of the family.

- enum: [ strict, dump ]

- request: &select_attrs

- XDP feautues set supported by all drivers

-to describe network interface configuration, most notably Debian and it's

diff --git a/Documentation/networking/device_drivers/ethernet/amd/pds_vfio_pci.rst b/Documentation/networking/device_drivers/ethernet/amd/pds_vfio_pci.rst
new file mode 100644
index 000000000000..7a6bc848a2b2
--- /dev/null
+++ b/Documentation/networking/device_drivers/ethernet/amd/pds_vfio_pci.rst

diff --git a/Documentation/networking/device_drivers/ethernet/google/gve.rst b/Documentation/networking/device_drivers/ethernet/google/gve.rst
index 6d73ee78f3d7..31d621bca82e 100644
--- a/Documentation/networking/device_drivers/ethernet/google/gve.rst
+++ b/Documentation/networking/device_drivers/ethernet/google/gve.rst

diff --git a/Documentation/networking/device_drivers/ethernet/index.rst b/Documentation/networking/device_drivers/ethernet/index.rst
index 94ecb67c0885..9827e816084b 100644
--- a/Documentation/networking/device_drivers/ethernet/index.rst
+++ b/Documentation/networking/device_drivers/ethernet/index.rst

diff --git a/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst b/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst
index bfd233cfac35..1e196cb9ce25 100644
--- a/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst
+++ b/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst

diff --git a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst
index a395df9c2751..f69ee1ebee01 100644
--- a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst
+++ b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst

- * - `rx[i]_xsk_arfs_err`

- - aRFS (accelerated Receive Flow Steering) does not occur in the XSK RQ

- context, so this counter should never increment.

diff --git a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/devlink.rst b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/devlink.rst
deleted file mode 100644
index a4edf908b707..000000000000
--- a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/devlink.rst
+++ /dev/null

-.. SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB

-.. include:: <isonum.txt>

-- `Health reporters`_

-The devlink info reports the running and stored firmware versions on device.

-It also prints the device PSID which represents the HCA board type ID.

-User command example::

- $ devlink dev info pci/0000:00:06.0

- fw.psid MT_0000000009

- fw.version 16.26.0100

-flow_steering_mode: Device flow steering mode

----------------------------------------------

-The flow steering mode parameter controls the flow steering mode of the driver.

-Two modes are supported:

-1. 'dmfs' - Device managed flow steering.

-2. 'smfs' - Software/Driver managed flow steering.

-In DMFS mode, the HW steering entities are created and managed through the

-In SMFS mode, the HW steering entities are created and managed though by

-the driver directly into hardware without firmware intervention.

-SMFS mode is faster and provides better rule insertion rate compared to default DMFS mode.

-User command examples:

-- Set SMFS flow steering mode::

- $ devlink dev param set pci/0000:06:00.0 name flow_steering_mode value "smfs" cmode runtime

-- Read device flow steering mode::

- $ devlink dev param show pci/0000:06:00.0 name flow_steering_mode

- name flow_steering_mode type driver-specific

- cmode runtime value smfs

-enable_roce: RoCE enablement state

-----------------------------------

-If the device supports RoCE disablement, RoCE enablement state controls device

-support for RoCE capability. Otherwise, the control occurs in the driver stack.

-When RoCE is disabled at the driver level, only raw ethernet QPs are supported.

-To change RoCE enablement state, a user must change the driverinit cmode value

-and run devlink reload.

-User command examples:

- $ devlink dev param set pci/0000:06:00.0 name enable_roce value false cmode driverinit

- $ devlink dev reload pci/0000:06:00.0

-- Read RoCE enablement state::

- $ devlink dev param show pci/0000:06:00.0 name enable_roce

- name enable_roce type generic

- cmode driverinit value true

-esw_port_metadata: Eswitch port metadata state

-----------------------------------------------

-When applicable, disabling eswitch metadata can increase packet rate

-up to 20% depending on the use case and packet sizes.

-Eswitch port metadata state controls whether to internally tag packets with

-metadata. Metadata tagging must be enabled for multi-port RoCE, failover

-between representors and stacked devices.

-By default metadata is enabled on the supported devices in E-switch.

-Metadata is applicable only for E-switch in switchdev mode and

-users may disable it when NONE of the below use cases will be in use:

-1. HCA is in Dual/multi-port RoCE mode.

-2. VF/SF representor bonding (Usually used for Live migration)

-When metadata is disabled, the above use cases will fail to initialize if

-users try to enable them.

-- Show eswitch port metadata::

- $ devlink dev param show pci/0000:06:00.0 name esw_port_metadata

- name esw_port_metadata type driver-specific

- cmode runtime value true

-- Disable eswitch port metadata::

- $ devlink dev param set pci/0000:06:00.0 name esw_port_metadata value false cmode runtime

-- Change eswitch mode to switchdev mode where after choosing the metadata value::

- $ devlink dev eswitch set pci/0000:06:00.0 mode switchdev

-hairpin_num_queues: Number of hairpin queues

---------------------------------------------

-We refer to a TC NIC rule that involves forwarding as "hairpin".

-Hairpin queues are mlx5 hardware specific implementation for hardware

-forwarding of such packets.

-- Show the number of hairpin queues::

- $ devlink dev param show pci/0000:06:00.0 name hairpin_num_queues

- name hairpin_num_queues type driver-specific

- cmode driverinit value 2

-- Change the number of hairpin queues::

- $ devlink dev param set pci/0000:06:00.0 name hairpin_num_queues value 4 cmode driverinit

-hairpin_queue_size: Size of the hairpin queues

-----------------------------------------------

-Control the size of the hairpin queues.

-- Show the size of the hairpin queues::

- $ devlink dev param show pci/0000:06:00.0 name hairpin_queue_size

- name hairpin_queue_size type driver-specific

- cmode driverinit value 1024

-- Change the size (in packets) of the hairpin queues::

- $ devlink dev param set pci/0000:06:00.0 name hairpin_queue_size value 512 cmode driverinit

-The tx reporter is responsible for reporting and recovering of the following two error scenarios:

- Report on kernel tx timeout detection.

- Recover by searching lost interrupts.

-- tx error completion

- Report on error tx completion.

- Recover by flushing the tx queue and reset it.

-tx reporter also support on demand diagnose callback, on which it provides

-real time information of its send queues status.

-User commands examples:

-- Diagnose send queues status::

- $ devlink health diagnose pci/0000:82:00.0 reporter tx

- This command has valid output only when interface is up, otherwise the command has empty output.

-- Show number of tx errors indicated, number of recover flows ended successfully,

- is autorecover enabled and graceful period from last recover::

- $ devlink health show pci/0000:82:00.0 reporter tx

-The rx reporter is responsible for reporting and recovering of the following two error scenarios:

-- rx queues' initialization (population) timeout

- Population of rx queues' descriptors on ring initialization is done

- in napi context via triggering an irq. In case of a failure to get

- the minimum amount of descriptors, a timeout would occur, and

- descriptors could be recovered by polling the EQ (Event Queue).

-- rx completions with errors (reported by HW on interrupt context)

- Report on rx completion error.

- Recover (if needed) by flushing the related queue and reset it.

-rx reporter also supports on demand diagnose callback, on which it

-provides real time information of its receive queues' status.

-- Diagnose rx queues' status and corresponding completion queue::

- $ devlink health diagnose pci/0000:82:00.0 reporter rx

-NOTE: This command has valid output only when interface is up. Otherwise, the command has empty output.

-- Show number of rx errors indicated, number of recover flows ended successfully,

- is autorecover enabled, and graceful period from last recover::

- $ devlink health show pci/0000:82:00.0 reporter rx

-The fw reporter implements `diagnose` and `dump` callbacks.

-It follows symptoms of fw error such as fw syndrome by triggering

-fw core dump and storing it into the dump buffer.

-The fw reporter diagnose command can be triggered any time by the user to check

-User commands examples:

-- Check fw heath status::

- $ devlink health diagnose pci/0000:82:00.0 reporter fw

-- Read FW core dump if already stored or trigger new one::

- $ devlink health dump show pci/0000:82:00.0 reporter fw

- This command can run only on the PF which has fw tracer ownership,

- running it on other PF or any VF will return "Operation not permitted".

-The fw fatal reporter implements `dump` and `recover` callbacks.

-It follows fatal errors indications by CR-space dump and recover flow.

-The CR-space dump uses vsc interface which is valid even if the FW command

-interface is not functional, which is the case in most FW fatal errors.

-The recover function runs recover flow which reloads the driver and triggers fw

-On firmware error, the health buffer is dumped into the dmesg. The log

-level is derived from the error's severity (given in health buffer).

-User commands examples:

-- Run fw recover flow manually::

- $ devlink health recover pci/0000:82:00.0 reporter fw_fatal

-- Read FW CR-space dump if already stored or trigger new one::

- $ devlink health dump show pci/0000:82:00.1 reporter fw_fatal

- This command can run only on PF.

-The vnic reporter implements only the `diagnose` callback.

-It is responsible for querying the vnic diagnostic counters from fw and displaying

-Description of the vnic counters:

-- total_q_under_processor_handle

- number of queues in an error state due to

- an async error or errored command.

-- send_queue_priority_update_flow

- number of QP/SQ priority/SL update events.

- number of times CQ entered an error state due to an overflow.

- number of times an EQ mapped to async events was overrun.

- comp_eq_overrun number of times an EQ mapped to completion events was

-- quota_exceeded_command

- number of commands issued and failed due to quota exceeded.

- number of commands issued and failed dues to any reason other than quota

-- nic_receive_steering_discard

- number of packets that completed RX flow

- steering but were discarded due to a mismatch in flow table.

-- generated_pkt_steering_fail

- number of packets generated by the VNIC experiencing unexpected steering

- failure (at any point in steering flow).

-- handled_pkt_steering_fail

- number of packets handled by the VNIC experiencing unexpected steering

- failure (at any point in steering flow owned by the VNIC, including the FDB

- for the eswitch owner).

-User commands examples:

-- Diagnose PF/VF vnic counters::

- $ devlink health diagnose pci/0000:82:00.1 reporter vnic

-- Diagnose representor vnic counters (performed by supplying devlink port of the

- representor, which can be obtained via devlink port command)::

- $ devlink health diagnose pci/0000:82:00.1/65537 reporter vnic

- This command can run over all interfaces such as PF/VF and representor ports.

diff --git a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/index.rst b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/index.rst
index 3fdcd6b61ccf..581a91caa579 100644
--- a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/index.rst
+++ b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/index.rst

diff --git a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/kconfig.rst b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/kconfig.rst
index 43b1f7e87ec4..0a42c3395ffa 100644
--- a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/kconfig.rst
+++ b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/kconfig.rst

-| Enables `Data Center Bridging (DCB) Support <https://community.mellanox.com/s/article/howto-auto-config-pfc-and-ets-on-connectx-4-via-lldp-dcbx>`_.

-| https://community.mellanox.com/s/article/howto-configure-arfs-on-connectx-4

-| Enables `IPSec XFRM cryptography-offload acceleration <https://support.mellanox.com/s/article/ConnectX-6DX-Bluefield-2-IPsec-HW-Full-Offload-Configuration-Guide>`_.

-| 1) `Legacy SRIOV mode (L2 mac vlan steering based) <https://community.mellanox.com/s/article/howto-configure-sr-iov-for-connectx-4-connectx-5-with-kvm--ethernet-x>`_.

-| 2) `Switchdev mode (eswitch offloads) <https://www.mellanox.com/related-docs/prod_software/ASAP2_Hardware_Offloading_for_vSwitches_User_Manual_v4.4.pdf>`_.

-| Provides low-level InfiniBand/RDMA and `RoCE <https://community.mellanox.com/s/article/recommended-network-configuration-examples-for-roce-deployment>`_ support.

-| MPFs is required for when `Multi-Host <http://www.mellanox.com/page/multihost>`_ configuration is enabled to allow passing

diff --git a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/switchdev.rst b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/switchdev.rst
index 6e3f5ee8b0d0..b617e93d7c2c 100644
--- a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/switchdev.rst
+++ b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/switchdev.rst

- BW relative to it's siblings. Values are relative like a percentage

-#. Select the winner node, and continue arbitration flow among it's children,

- netconsole=[+][src-port]@[src-ip]/[<dev>],[tgt-port]@<tgt-ip>/[tgt-macaddr]

-sizes by doing it's own memory management. It is based on blocks where polling

-The page_pool allocator is optimized for the XDP mode that uses one frame

-per-page, but it can fallback on the regular page allocator APIs.

-Basic use involves replacing alloc_pages() calls with the

-page_pool_alloc_pages() call. Drivers should use page_pool_dev_alloc_pages()

-replacing dev_alloc_pages().

-API keeps track of in-flight pages, in order to let API user know

-when it is safe to free a page_pool object. Thus, API users

-must run page_pool_release_page() when a page is leaving the page_pool or

-call page_pool_put_page() where appropriate in order to maintain correct

-API user must call page_pool_put_page() once on a page, as it

-will either recycle the page, or in case of refcnt > 1, it will

-release the DMA mapping and in-flight state accounting.

-* page_pool_create(): Create a pool.

- * flags: PP_FLAG_DMA_MAP, PP_FLAG_DMA_SYNC_DEV

- * order: 2^order pages on allocation

- * pool_size: size of the ptr_ring

- * nid: preferred NUMA node for allocation

- * dev: struct device. Used on DMA operations

- * dma_dir: DMA direction

- * max_len: max DMA sync memory size

- * offset: DMA address offset

-* page_pool_put_page(): The outcome of this depends on the page refcnt. If the

- driver bumps the refcnt > 1 this will unmap the page. If the page refcnt is 1

- the allocator owns the page and will try to recycle it in one of the pool

- caches. If PP_FLAG_DMA_SYNC_DEV is set, the page will be synced for_device

- using dma_sync_single_range_for_device().

-* page_pool_put_full_page(): Similar to page_pool_put_page(), but will DMA sync

- for the entire memory area configured in area pool->max_len.

-* page_pool_recycle_direct(): Similar to page_pool_put_full_page() but caller

- must guarantee safe context (e.g NAPI), since it will recycle the page

- directly into the pool fast cache.

-* page_pool_release_page(): Unmap the page (if mapped) and account for it on

- in-flight counters.

-* page_pool_dev_alloc_pages(): Get a page from the page allocator or page_pool

-* page_pool_get_dma_addr(): Retrieve the stored DMA address.

-* page_pool_get_dma_dir(): Retrieve the stored DMA direction.

-* page_pool_put_page_bulk(): Tries to refill a number of pages into the

- ptr_ring cache holding ptr_ring producer lock. If the ptr_ring is full,

- page_pool_put_page_bulk() will release leftover pages to the page allocator.

- page_pool_put_page_bulk() is suitable to be run inside the driver NAPI tx

- completion loop for the XDP_REDIRECT use case.

- Please note the caller must not use data area after running

- page_pool_put_page_bulk(), as this function overwrites it.

-* page_pool_get_stats(): Retrieve statistics about the page_pool. This API

- is only available if the kernel has been configured with

- ``CONFIG_PAGE_POOL_STATS=y``. A pointer to a caller allocated ``struct

- page_pool_stats`` structure is passed to this API which is filled in. The

- caller can then report those stats to the user (perhaps via ethtool,

- debugfs, etc.). See below for an example usage of this API.

-``page_pool_get_stats()`` and structures described below are available. It

-takes a pointer to a ``struct page_pool`` and a pointer to a ``struct

-page_pool_stats`` allocated by the caller.

-The API will fill in the provided ``struct page_pool_stats`` with

-The stats structure has the following fields::

- struct page_pool_stats {

- struct page_pool_alloc_stats alloc_stats;

- struct page_pool_recycle_stats recycle_stats;

-The ``struct page_pool_alloc_stats`` has the following fields:

- * ``fast``: successful fast path allocations

- * ``slow``: slow path order-0 allocations

- * ``slow_high_order``: slow path high order allocations

- * ``empty``: ptr ring is empty, so a slow path allocation was forced.

- * ``refill``: an allocation which triggered a refill of the cache

- * ``waive``: pages obtained from the ptr ring that cannot be added to

- the cache due to a NUMA mismatch.

-The ``struct page_pool_recycle_stats`` has the following fields:

- * ``cached``: recycling placed page in the page pool cache

- * ``cache_full``: page pool cache was full

- * ``ring``: page placed into the ptr ring

- * ``ring_full``: page released from page pool because the ptr ring was full

- * ``released_refcnt``: page released (and not recycled) because refcnt > 1

- page_pool_release_page(page_pool, page);

-The 'advanced' EM gets it's name due to the fact that the driver is allowed

-formula in the framework (like it's in 'simple' EM case). It can better reflect

-support for DSCR, related kernel objects, it's functionalities and exported

-To avoid this limitiation, the KASAN shadow would have to be placed inside the

-that is hypervisor priviledged [3]_ or for other services managed by the

-1. PTRACE_PPC_GETHWDEBUGINFO

-2. PTRACE_SETHWDEBUG

-watchpoint just created. This integer will be used in the PTRACE_DELHWDEBUG

-3. PTRACE_DELHWDEBUG

-the QE library and available to any driver that calles qe_get_firmware_info().

-library and available to any driver that calles qe_get_firmware_info().

-established connection or send window by closing the file descriptior

- siginfo.si_addr = CSB adress;

- end, once the generic interface comes around you'll end up maintainer two

-Rust (optional) 1.68.2 rustc --version

-bindgen (optional) 0.56.0 bindgen --version

-- <http://jfs.sourceforge.net/>

-- <http://sourceforge.net/projects/linuxquota/>

-- <http://www.mcelog.org/>

-- <http://sourceforge.net/project/showfiles.php?group_id=14>

-- <http://oprofile.sf.net/download/>

-- <http://nfs.sourceforge.net/>

- bar = vmalloc(array_size(count, size));

- periodically retire resources as they become obsolte or outdated; with

- https://patchwork.hopto.org/net-next.html

-patch. Patches are indexed by the ``Message-ID`` header of the emails

- https://patchwork.hopto.org/pw-bot.html

-add any new warnings. For RISC-V, as it has the advantage of being a newer

-architecture, ``make dtbs_check W=1`` is required to not add any new warnings.

- - It must fix only one thing.

- - It must fix a real bug that bothers people (not a, "This could be a

- problem..." type thing).

- - It must fix a problem that causes a build error (but not for things

- marked CONFIG_BROKEN), an oops, a hang, data corruption, a real

- security issue, or some "oh, that's not good" issue. In short, something

- - Serious issues as reported by a user of a distribution kernel may also

- be considered if they fix a notable performance or interactivity issue.

- As these fixes are not as obvious and have a higher risk of a subtle

- regression they should only be submitted by a distribution kernel

- maintainer and include an addendum linking to a bugzilla entry if it

- exists and additional information on the user-visible impact.

- - New device IDs and quirks are also accepted.

- - No "theoretical race condition" issues, unless an explanation of how the

- race can be exploited is also provided.

- - It cannot contain any "trivial" fixes in it (spelling changes,

- whitespace cleanups, etc).

- - It or an equivalent fix must already exist in Linus' tree (upstream).

-For all other submissions, choose one of the following procedures

------------------------------------------------------------------

-To have the patch automatically included in the stable tree, add the tag

-in the sign-off area. Once the patch is merged it will be applied to

-the stable tree without anything else needing to be done by the author

-or subsystem maintainer.

-After the patch has been merged to Linus' tree, send an email to

-stable@vger.kernel.org containing the subject of the patch, the commit ID,

-why you think it should be applied, and what kernel version you wish it to

-Send the patch, after verifying that it follows the above rules, to

-stable@vger.kernel.org. You must note the upstream commit ID in the

-changelog of your submission, as well as the kernel version you wish

-it to be applied to.

-:ref:`option_1` is **strongly** preferred, is the easiest and most common.

-:ref:`option_2` and :ref:`option_3` are more useful if the patch isn't deemed

-worthy at the time it is applied to a public git tree (for instance, because

-it deserves more regression testing first). :ref:`option_3` is especially

-useful if the original upstream patch needs to be backported (for example

-the backport needs some special handling due to e.g. API changes).

-Note that for :ref:`option_3`, if the patch deviates from the original

-upstream patch (for example because it had to be backported) this must be very

-clearly documented and justified in the patch description.

-The upstream commit ID must be specified with a separate line above the commit

-.. code-block:: none

- commit <sha1> upstream.

-.. code-block:: none

- [ Upstream commit <sha1> ]

-Additionally, some patches submitted via :ref:`option_1` may have additional

-patch prerequisites which can be cherry-picked. This can be specified in the

-following format in the sign-off area:

-.. code-block:: none

- Cc: <stable@vger.kernel.org> # 3.3.x: a1f84a3: sched: Check for idle

- Cc: <stable@vger.kernel.org> # 3.3.x: 1b9508f: sched: Rate-limit newidle

- Cc: <stable@vger.kernel.org> # 3.3.x: fd21073: sched: Fix affinity logic

- Cc: <stable@vger.kernel.org> # 3.3.x

- Signed-off-by: Ingo Molnar <mingo@elte.hu>

-The tag sequence has the meaning of:

-.. code-block:: none

- git cherry-pick a1f84a3

- git cherry-pick 1b9508f

- git cherry-pick fd21073

- git cherry-pick <this commit>

-Also, some patches may have kernel version prerequisites. This can be

-specified in the following format in the sign-off area:

- Cc: <stable@vger.kernel.org> # 3.3.x

-The tag has the meaning of:

- git cherry-pick <this commit>

-For each "-stable" tree starting with the specified version.

-Following the submission:

- - The sender will receive an ACK when the patch has been accepted into the

- queue, or a NAK if the patch is rejected. This response might take a few

- days, according to the developer's schedules.

- - If accepted, the patch will be added to the -stable queue, for review by

- other developers and by the relevant subsystem maintainer.

- Write a complete booting guide.

-- This header can also be reused to support EFI stub for RISC-V in future. EFI

- specification needs PE/COFF image header in the beginning of the kernel image

- in order to load it as an EFI application. In order to support EFI stub,

- code0 should be replaced with "MZ" magic string and res3(at offset 0x3c) should

- point to the rest of the PE/COFF header.

- * :c:macro:`RISCV_HWPROBE_MISALIGNED_SLOW`: Misaligned accesses are supported

- in hardware, but are slower than the cooresponding aligned accesses

- * :c:macro:`RISCV_HWPROBE_MISALIGNED_FAST`: Misaligned accesses are supported

- in hardware and are faster than the cooresponding aligned accesses

-for processes running under its domain. Calling thess interfaces is not

-Otherwise, fetch a standalone installer from:

-Otherwise, if a standalone installer is used, the Rust repository may be cloned

-into the installation folder of the toolchain::

- git clone --recurse-submodules \

- --branch $(scripts/min-tool-version.sh rustc) \

- https://github.com/rust-lang/rust \

- $(rustc --print sysroot)/lib/rustlib/src/rust

-updating this clone.

- cargo install --locked --version $(scripts/min-tool-version.sh bindgen) bindgen

-can be generated by the ``rust-analyzer`` Make target.

- wait_for_completion(&setup_done); complete(setup_done);

-propensity to throttle these applications while simultanously using less than

- /sys/kernel/debug/sched/min_granularity_ns

-for futher details about performance domains).

-much that can be done by the scheduler to save energy without severly harming

- * Make sure there's a space between every if and it's (.

- - an LLD should set this signed integer to the requested

- underruns (overruns should be rare). If possible an LLD

-of the key: 5D2B05FC633EE3E8 in the example bellow.

- operation. The KDF implemenation complies with SP800-56A as well

-``KVM_SEV_LAUNCH_SECRET`` command (see [sev]_). The strucutre of the injected

-This control is used to attenuate samples for left and right front PCM FX-bus

-samples for 5.1 playback. The result samples are forwarded to the front DAC PCM

-slots of the Philips DAC.

-This control is used to attenuate samples for left and right surround PCM FX-bus

-samples for 5.1 playback. The result samples are forwarded to the surround DAC PCM

-slots of the Philips DAC.

-This control is used to attenuate samples for center PCM FX-bus accumulator.

-ALSA uses accumulator 6 for center PCM sample for 5.1 playback. The result sample

-is forwarded to the center DAC PCM slot of the Philips DAC.

-ALSA uses accumulator 7 for LFE PCM sample for 5.1 playback. The result sample

-is forwarded to the LFE DAC PCM slot of the Philips DAC.

-This control is used to attenuate samples for left and right PCM FX-bus

-stereo playback. The result samples are forwarded to the front DAC PCM slots

-of the Philips DAC.

-This control is used to attenuate samples for left and right PCM FX-bus

-accumulator. ALSA uses accumulators 0 and 1 for left and right PCM.

-The result is forwarded to the ADC capture FIFO (thus to the standard capture

-This control is used to attenuate samples for left and right MIDI FX-bus

-The result samples are forwarded to the front DAC PCM slots of the AC97 codec.

-These controls are used to attenuate samples for left and right MIDI FX-bus

-accumulator. ALSA uses accumulators 4 and 5 for left and right PCM.

-The result is forwarded to the ADC capture FIFO (thus to the standard capture

-This control is used to attenuate samples for left and right Mic input.

-For Mic input is used AC97 codec. The result samples are forwarded to

-the front DAC PCM slots of the Philips DAC. Samples are forwarded to Mic

-capture FIFO (device 1 - 16bit/8KHz mono) too without volume control.

-This control is used to attenuate samples for left and right Mic input.

-The result is forwarded to the ADC capture FIFO (thus to the standard capture

-forwarded to the front DAC PCM slots of the Philips DAC.

-digital inputs (usually used by a CDROM drive). The result samples are

-forwarded to the ADC capture FIFO (thus to the standard capture PCM device).

-digital input. The result samples are forwarded to the front DAC PCM slots

-of the Philips DAC.

-digital inputs. The result samples are forwarded to the ADC capture FIFO

-(thus to the standard capture PCM device).

-inputs (on the AudigyDrive). The result samples are forwarded to the front

-DAC PCM slots of the Philips DAC.

-inputs (on the AudigyDrive). The result samples are forwarded to the ADC

-capture FIFO (thus to the standard capture PCM device).

-inputs from Philips ADC. The result samples are forwarded to the front

-DAC PCM slots of the Philips DAC. This contains mix from analog sources

-like CD, Line In, Aux, ....

-inputs Philips ADC. The result samples are forwarded to the ADC

-capture FIFO (thus to the standard capture PCM device).

-inputs (on the AudigyDrive). The result samples are forwarded to the front

-DAC PCM slots of the Philips DAC.

-inputs (on the AudigyDrive). The result samples are forwarded to the ADC

-capture FIFO (thus to the standard capture PCM device).

-All stereo signals are mixed together and mirrored to surround, center and LFE.

-This control is used to attenuate samples for left and right front speakers of

-All stereo signals are mixed together and mirrored to surround, center and LFE.

-This control is used to attenuate samples for left and right surround speakers of

-All stereo signals are mixed together and mirrored to surround, center and LFE.

-This control is used to attenuate sample for center speaker of this mix.

-All stereo signals are mixed together and mirrored to surround, center and LFE.

-This control is used to attenuate sample for LFE speaker of this mix.

-This control turns the tone control on or off. The samples for front, rear

-and center / LFE outputs are affected.

-This control is used to attenuate samples for front, surround, center and

-ftp://opensource.creative.com/pub/doc

--------------------------------------

-Note that the site is defunct, but the documents are available

-from various other locations.

- The EMU10K1 Digital Audio Processor

- FX8010 - A DSP Chip Architecture for Audio Effects

- Audio Effects Processor with multiple asynchronous streams

- Processor with Instruction Set for Audio Effects (Jan. 14, 1999)

- Audio Effects Processor having Decoupled Instruction

- Execution and Audio Data Sequencing (Jan. 14, 1999)

-US Patents (https://www.uspto.gov/)

------------------------------------

- Digital Sampling Instrument employing cache memory (Jul. 20, 1999)

- Audio Effects Processor integrated on a single chip

- with a multiport memory onto which multiple asynchronous

- digital sound samples can be concurrently loaded

- Processor with Instruction Set for Audio Effects (Jul. 27, 1999)

- Memory initialization circuit (Tram) (Feb. 29, 2000)

- Interpolation looping of audio samples in cache connected to

- system bus with prioritization and modification of bus transfers

- in accordance with loop ends and minimum block sizes

- Method for conserving memory storage using a

- pool of short term memory registers

- Interrupt control for multiple programs communicating with

- a common interrupt by associating programs to GP registers,

- defining interrupt register, polling GP registers, and invoking

- callback routine associated with defined interrupt register

-This control is used to attenuate samples for left and right PCM FX-bus

-These controls are used to attenuate samples for left and right PCM FX-bus

-This control is used to attenuate samples for left and right MIDI FX-bus

-These controls are used to attenuate samples for left and right MIDI FX-bus

-accumulator. ALSA uses accumulators 4 and 5 for left and right PCM.

-This control is used to attenuate samples for left and right rear PCM FX-bus

-These controls are used to attenuate samples for left and right rear PCM FX-bus

-This control is used to attenuate samples for left and right front ADC PCM slots

diff --git a/Documentation/sound/kernel-api/writing-an-alsa-driver.rst b/Documentation/sound/kernel-api/writing-an-alsa-driver.rst
index 4335c98b3d82..cd421856409e 100644
--- a/Documentation/sound/kernel-api/writing-an-alsa-driver.rst
+++ b/Documentation/sound/kernel-api/writing-an-alsa-driver.rst

-copy_user, copy_kernel and fill_silence ops

-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

-efficient. You need to define the ``copy_user`` and ``copy_kernel``

-callbacks for the data transfer, in addition to the ``fill_silence``

-``copy_user``, ``copy_kernel`` and ``fill_silence`` callbacks as well,

-The implementation of the ``copy_user``, ``copy_kernel`` and

-interleaved or non-interleaved samples. The ``copy_user`` callback is

- static int playback_copy_user(struct snd_pcm_substream *substream,

- void __user *src, unsigned long count);

- static int capture_copy_user(struct snd_pcm_substream *substream,

- void __user *dst, unsigned long count);

- my_memcpy_from_user(my_buffer + pos, src, count);

- my_memcpy_to_user(dst, my_buffer + pos, count);

-Here the functions are named ``from_user`` and ``to_user`` because

-it's the user-space buffer that is passed to these callbacks. That

-is, the callback is supposed to copy data from/to the user-space

-directly to/from the hardware buffer.

-The above callbacks are the copies from/to the user-space buffer. There

-are some cases where we want to copy from/to the kernel-space buffer

-instead. In such a case, the ``copy_kernel`` callback is called. It'd

- static int playback_copy_kernel(struct snd_pcm_substream *substream,

- int channel, unsigned long pos,

- void *src, unsigned long count);

- static int capture_copy_kernel(struct snd_pcm_substream *substream,

- int channel, unsigned long pos,

- void *dst, unsigned long count);

-As found easily, the only difference is that the buffer pointer is

-without a ``__user`` prefix; that is, a kernel-buffer pointer is passed

-in the fourth argument. Correspondingly, the implementation would be

-a version without the user-copy, such as::

- my_memcpy(my_buffer + pos, src, count);

-The meanings of arguments are the same as in the ``copy_user`` and

-``copy_kernel`` callbacks, although there is no buffer pointer

-no meaning, as for the ``copy_*`` callbacks.

- # This is a function-like macro, it's arguments are typeless!

-hand, the transistor is cut off and the voltage tied to it's collector is

-threads' priority. That is generally not needed because these threads hava

diff --git a/Documentation/trace/coresight/coresight-etm4x-reference.rst b/Documentation/trace/coresight/coresight-etm4x-reference.rst
index 70e34b8c81c1..89ac4e6fc96f 100644
--- a/Documentation/trace/coresight/coresight-etm4x-reference.rst
+++ b/Documentation/trace/coresight/coresight-etm4x-reference.rst

- feature is only inteded to be used for debugging purposes or with a 3rd party tool.

-of the event and the probe location should be specfied along with one

-subystem for creating the corresponding trace events.

-add a string as-is, with no spaces, delimeters, or arg check.

- pointer of @regs is set to the currect return address.

-example, the ``count`` is unsigned long, and the ``pos`` is a pointer. Thus, both

-are converted to 64bit unsigned long, but only ``pos`` has "%Lx" print-format as

-BTF also affects the ``$retval``. If user doesn't set any type, the retval type is

-automatically picked from the BTF. If the function returns ``void``, ``$retval``

-traceprobe event, you can trace it as below.

- # echo 't sched_switch comm=+1896(next):string start_time=+1728(next):u64' > dynamic_events

-Currently, to find the offset of a specific field in the data structure,

-you need to build kernel with debuginfo and run `perf probe` command with

- # perf probe -D "__probestub_sched_switch next->comm:string next->start_time"

- p:probe/__probestub_sched_switch __probestub_sched_switch+0 comm=+1896(%cx):string start_time=+1728(%cx):u64

-And replace the ``%cx`` with the ``next``.

-can be verfy helpful to quickly locate the function that first

-even know that they are occuring. SMIs are instead set up by BIOS code

-The starting point for the application of runtime verification (RV) technics

-This model is borken, the reason is that a task can be running

-trace, as depicted bellow::

- (\*3) Unlike kprobe event, "u" prefix will just be ignored, becuse uprobe

-future to change the subsystem name per-process to accomodate event isolation.

diff --git a/Documentation/translations/sp_SP/process/contribution-maturity-model.rst b/Documentation/translations/sp_SP/process/contribution-maturity-model.rst
new file mode 100644
index 000000000000..cc052ae8183d
--- /dev/null
+++ b/Documentation/translations/sp_SP/process/contribution-maturity-model.rst

diff --git a/Documentation/translations/sp_SP/process/researcher-guidelines.rst b/Documentation/translations/sp_SP/process/researcher-guidelines.rst
new file mode 100644
index 000000000000..462b3290b7b8
--- /dev/null
+++ b/Documentation/translations/sp_SP/process/researcher-guidelines.rst

- ../loongarch/index

diff --git a/Documentation/translations/zh_CN/loongarch/booting.rst b/Documentation/translations/zh_CN/arch/loongarch/booting.rst
index fb6440c438f0..d2f55872904e 100644
--- a/Documentation/translations/zh_CN/loongarch/booting.rst
+++ b/Documentation/translations/zh_CN/arch/loongarch/booting.rst

-.. include:: ../disclaimer-zh_CN.rst

-:Original: Documentation/loongarch/booting.rst

diff --git a/Documentation/translations/zh_CN/loongarch/features.rst b/Documentation/translations/zh_CN/arch/loongarch/features.rst
index 3886e635ec06..82bfac180bdc 100644
--- a/Documentation/translations/zh_CN/loongarch/features.rst
+++ b/Documentation/translations/zh_CN/arch/loongarch/features.rst

-.. include:: ../disclaimer-zh_CN.rst

-:Original: Documentation/loongarch/features.rst

diff --git a/Documentation/translations/zh_CN/loongarch/index.rst b/Documentation/translations/zh_CN/arch/loongarch/index.rst
index 0273a08342f7..4bd24f5ffed1 100644
--- a/Documentation/translations/zh_CN/loongarch/index.rst
+++ b/Documentation/translations/zh_CN/arch/loongarch/index.rst

-.. include:: ../disclaimer-zh_CN.rst

-:Original: Documentation/loongarch/index.rst

diff --git a/Documentation/translations/zh_CN/loongarch/introduction.rst b/Documentation/translations/zh_CN/arch/loongarch/introduction.rst
index 470c38ae2caf..cba04befc950 100644
--- a/Documentation/translations/zh_CN/loongarch/introduction.rst
+++ b/Documentation/translations/zh_CN/arch/loongarch/introduction.rst

-.. include:: ../disclaimer-zh_CN.rst

-:Original: Documentation/loongarch/introduction.rst

diff --git a/Documentation/translations/zh_CN/loongarch/irq-chip-model.rst b/Documentation/translations/zh_CN/arch/loongarch/irq-chip-model.rst
index fb5d23b49ed5..f1e9ab18206c 100644
--- a/Documentation/translations/zh_CN/loongarch/irq-chip-model.rst
+++ b/Documentation/translations/zh_CN/arch/loongarch/irq-chip-model.rst

-.. include:: ../disclaimer-zh_CN.rst

-:Original: Documentation/loongarch/irq-chip-model.rst

diff --git a/Documentation/translations/zh_CN/mips/booting.rst b/Documentation/translations/zh_CN/arch/mips/booting.rst
index e0bbd3f20862..485b57e0ca0b 100644
--- a/Documentation/translations/zh_CN/mips/booting.rst
+++ b/Documentation/translations/zh_CN/arch/mips/booting.rst

-.. include:: ../disclaimer-zh_CN.rst

-:Original: Documentation/mips/booting.rst

diff --git a/Documentation/translations/zh_CN/mips/features.rst b/Documentation/translations/zh_CN/arch/mips/features.rst
index b61dab06ceaf..da1b956e4a40 100644
--- a/Documentation/translations/zh_CN/mips/features.rst
+++ b/Documentation/translations/zh_CN/arch/mips/features.rst

-.. include:: ../disclaimer-zh_CN.rst

-:Original: Documentation/mips/features.rst

-.. include:: ../disclaimer-zh_CN.rst

-:Original: Documentation/mips/index.rst

diff --git a/Documentation/translations/zh_CN/mips/ingenic-tcu.rst b/Documentation/translations/zh_CN/arch/mips/ingenic-tcu.rst
index ddbe149c517b..3d599a36b571 100644
--- a/Documentation/translations/zh_CN/mips/ingenic-tcu.rst
+++ b/Documentation/translations/zh_CN/arch/mips/ingenic-tcu.rst

-.. include:: ../disclaimer-zh_CN.rst

-:Original: Documentation/mips/ingenic-tcu.rst

diff --git a/Documentation/translations/zh_CN/dev-tools/kasan.rst b/Documentation/translations/zh_CN/dev-tools/kasan.rst
index 05ef904dbcfb..8fdb20c9665b 100644
--- a/Documentation/translations/zh_CN/dev-tools/kasan.rst
+++ b/Documentation/translations/zh_CN/dev-tools/kasan.rst

-在x86_64、arm、arm64、powerpc、riscv、s390和xtensa上支持通用KASAN，

diff --git a/Documentation/translations/zh_CN/dev-tools/testing-overview.rst b/Documentation/translations/zh_CN/dev-tools/testing-overview.rst
index af65e7e93c02..69e7e4cb2002 100644
--- a/Documentation/translations/zh_CN/dev-tools/testing-overview.rst
+++ b/Documentation/translations/zh_CN/dev-tools/testing-overview.rst

-:Translator: 胡皓文 Hu Haowen <src.res@email.cn>

-:Original: Documentation/mm/frontswap.rst

- 司延腾 Yanteng Si <siyanteng@loongson.cn>

-Frontswap为交换页提供了一个 “transcendent memory” 的接口。在一些环境中，由

-于交换页被保存在RAM（或类似RAM的设备）中，而不是交换磁盘，因此可以获得巨大的性能

-节省（提高）。

-.. _Transcendent memory in a nutshell: https://lwn.net/Articles/454795/

-Frontswap之所以这么命名，是因为它可以被认为是与swap设备的“back”存储相反。存

-储器被认为是一个同步并发安全的面向页面的“伪RAM设备”，符合transcendent memory

-（如Xen的“tmem”，或内核内压缩内存，又称“zcache”，或未来的类似RAM的设备）的要

-求；这个伪RAM设备不能被内核直接访问或寻址，其大小未知且可能随时间变化。驱动程序通过

-调用frontswap_register_ops将自己与frontswap链接起来，以适当地设置frontswap_ops

-的功能，它提供的功能必须符合某些策略，如下所示:

-一个 “init” 将设备准备好接收与指定的交换设备编号（又称“类型”）相关的frontswap

-交换页。一个 “store” 将把该页复制到transcendent memory，并与该页的类型和偏移

-量相关联。一个 “load” 将把该页，如果找到的话，从transcendent memory复制到内核

-内存，但不会从transcendent memory中删除该页。一个 “invalidate_page” 将从

-transcendent memory中删除该页，一个 “invalidate_area” 将删除所有与交换类型

-相关的页（例如，像swapoff）并通知 “device” 拒绝进一步存储该交换类型。

-一旦一个页面被成功存储，在该页面上的匹配加载通常会成功。因此，当内核发现自己处于需

-要交换页面的情况时，它首先尝试使用frontswap。如果存储的结果是成功的，那么数据就已

-经成功的保存到了transcendent memory中，并且避免了磁盘写入，如果后来再读回数据，

-也避免了磁盘读取。如果存储返回失败，transcendent memory已经拒绝了该数据，且该页

-可以像往常一样被写入交换空间。

-请注意，如果一个页面被存储，而该页面已经存在于transcendent memory中（一个 “重复”

-的存储），要么存储成功，数据被覆盖，要么存储失败，该页面被废止。这确保了旧的数据永远

-不会从frontswap中获得。

-如果配置正确，对frontswap的监控是通过 `/sys/kernel/debug/frontswap` 目录下的

-debugfs完成的。frontswap的有效性可以通过以下方式测量（在所有交换设备中）:

- 有多少次存储的尝试是失败的

- 尝试了多少次加载（应该全部成功）

- 有多少次存储的尝试是成功的

- 尝试了多少次作废

-后台实现可以提供额外的指标。

-经常问到的问题

-当一个工作负载开始交换时，性能就会下降。Frontswap通过提供一个干净的、动态的接口来

-读取和写入交换页到 “transcendent memory”，从而大大增加了许多这样的工作负载的性

-能，否则内核是无法直接寻址的。当数据被转换为不同的形式和大小（比如压缩）或者被秘密

-移动（对于一些类似RAM的设备来说，这可能对写平衡很有用）时，这个接口是理想的。交换

-页（和被驱逐的页面缓存页）是这种比RAM慢但比磁盘快得多的“伪RAM设备”的一大用途。

-Frontswap对内核的影响相当小，为各种系统配置中更动态、更灵活的RAM利用提供了巨大的

-在单一内核的情况下，又称“zcache”，页面被压缩并存储在本地内存中，从而增加了可以安

-全保存在RAM中的匿名页面总数。Zcache本质上是用压缩/解压缩的CPU周期换取更好的内存利

-用率。Benchmarks测试显示，当内存压力较低时，几乎没有影响，而在高内存压力下的一些

-工作负载上，则有明显的性能改善（25%以上）。

-“RAMster” 在zcache的基础上增加了对集群系统的 “peer-to-peer” transcendent memory

-的支持。Frontswap页面像zcache一样被本地压缩，但随后被“remotified” 到另一个系

-统的RAM。这使得RAM可以根据需要动态地来回负载平衡，也就是说，当系统A超载时，它可以

-交换到系统B，反之亦然。RAMster也可以被配置成一个内存服务器，因此集群中的许多服务器

-可以根据需要动态地交换到配置有大量内存的单一服务器上......而不需要预先配置每个客户

-有多少内存可用

-在虚拟情况下，虚拟化的全部意义在于统计地将物理资源在多个虚拟机的不同需求之间进行复

-用。对于RAM来说，这真的很难做到，而且在不改变内核的情况下，要做好这一点的努力基本上

-是失败的（除了一些广为人知的特殊情况下的工作负载）。具体来说，Xen Transcendent Memory

-后端允许管理器拥有的RAM “fallow”，不仅可以在多个虚拟机之间进行“time-shared”，

-而且页面可以被压缩和重复利用，以优化RAM的利用率。当客户操作系统被诱导交出未充分利用

-的RAM时（如 “selfballooning”），突然出现的意外内存压力可能会导致交换；frontswap

-允许这些页面被交换到管理器RAM中或从管理器RAM中交换（如果整体主机系统内存条件允许），

-从而减轻计划外交换可能带来的可怕的性能影响。

-一个KVM的实现正在进行中，并且已经被RFC'ed到lkml。而且，利用frontswap，对NVM作为

-内存扩展技术的调查也在进行中。

-* 当然，在某些情况下可能有性能上的优势，但frontswap的空间/时间开销是多少？

-如果 CONFIG_FRONTSWAP 被禁用，每个 frontswap 钩子都会编译成空，唯一的开销是每

-个 swapon'ed swap 设备的几个额外字节。如果 CONFIG_FRONTSWAP 被启用，但没有

-frontswap的 “backend” 寄存器，每读或写一个交换页就会有一个额外的全局变量，而不

-是零。如果 CONFIG_FRONTSWAP 被启用，并且有一个frontswap的backend寄存器，并且

-后端每次 “store” 请求都失败（即尽管声称可能，但没有提供内存），CPU 的开销仍然可以

-忽略不计 - 因为每次frontswap失败都是在交换页写到磁盘之前，系统很可能是 I/O 绑定

-的，无论如何使用一小部分的 CPU 都是不相关的。

-至于空间，如果CONFIG_FRONTSWAP被启用，并且有一个frontswap的backend注册，那么

-每个交换设备的每个交换页都会被分配一个比特。这是在内核已经为每个交换设备的每个交换

-页分配的8位（在2.6.34之前是16位）上增加的。(Hugh Dickins观察到，frontswap可能

-会偷取现有的8个比特，但是我们以后再来担心这个小的优化问题)。对于标准的4K页面大小的

-非常大的交换盘（这很罕见），这是每32GB交换盘1MB开销。

-当交换页存储在transcendent memory中而不是写到磁盘上时，有一个副作用，即这可能会

-产生更多的内存压力，有可能超过其他的优点。一个backend，比如zcache，必须实现策略

-来仔细（但动态地）管理内存限制，以确保这种情况不会发生。

-* 好吧，那就用内核骇客能理解的术语来快速概述一下这个frontswap补丁的作用如何？

-我们假设在内核初始化过程中，一个frontswap 的 “backend” 已经注册了；这个注册表

-明这个frontswap 的 “backend” 可以访问一些不被内核直接访问的“内存”。它到底提

-供了多少内存是完全动态和随机的。

-每当一个交换设备被交换时，就会调用frontswap_init()，把交换设备的编号（又称“类

-型”）作为一个参数传给它。这就通知了frontswap，以期待 “store” 与该号码相关的交

-每当交换子系统准备将一个页面写入交换设备时（参见swap_writepage()），就会调用

-frontswap_store。Frontswap与frontswap backend协商，如果backend说它没有空

-间，frontswap_store返回-1，内核就会照常把页换到交换设备上。注意，来自frontswap

-backend的响应对内核来说是不可预测的；它可能选择从不接受一个页面，可能接受每九个

-页面，也可能接受每一个页面。但是如果backend确实接受了一个页面，那么这个页面的数

-据已经被复制并与类型和偏移量相关联了，而且backend保证了数据的持久性。在这种情况

-下，frontswap在交换设备的“frontswap_map” 中设置了一个位，对应于交换设备上的

-页面偏移量，否则它就会将数据写入该设备。

-当交换子系统需要交换一个页面时（swap_readpage()），它首先调用frontswap_load()，

-检查frontswap_map，看这个页面是否早先被frontswap backend接受。如果是，该页

-的数据就会从frontswap后端填充，换入就完成了。如果不是，正常的交换代码将被执行，

-以便从真正的交换设备上获得这一页的数据。

-所以每次frontswap backend接受一个页面时，交换设备的读取和（可能）交换设备的写

-入都被 “frontswap backend store” 和（可能）“frontswap backend loads”

-所取代，这可能会快得多。

-* frontswap不能被配置为一个 “特殊的” 交换设备，它的优先级要高于任何真正的交换

- 设备（例如像zswap，或者可能是swap-over-nbd/NFS）？

-首先，现有的交换子系统不允许有任何种类的交换层次结构。也许它可以被重写以适应层次

-结构，但这将需要相当大的改变。即使它被重写，现有的交换子系统也使用了块I/O层，它

-假定交换设备是固定大小的，其中的任何页面都是可线性寻址的。Frontswap几乎没有触

-及现有的交换子系统，而是围绕着块I/O子系统的限制，提供了大量的灵活性和动态性。

-例如，frontswap backend对任何交换页的接受是完全不可预测的。这对frontswap backend

-的定义至关重要，因为它赋予了backend完全动态的决定权。在zcache中，人们无法预

-先知道一个页面的可压缩性如何。可压缩性 “差” 的页面会被拒绝，而 “差” 本身也可

-以根据当前的内存限制动态地定义。

-此外，frontswap是完全同步的，而真正的交换设备，根据定义，是异步的，并且使用

-块I/O。块I/O层不仅是不必要的，而且可能进行 “优化”，这对面向RAM的设备来说是

-不合适的，包括将一些页面的写入延迟相当长的时间。同步是必须的，以确保后端的动

-态性，并避免棘手的竞争条件，这将不必要地大大增加frontswap和/或块I/O子系统的

-复杂性。也就是说，只有最初的 “store” 和 “load” 操作是需要同步的。一个独立

-的异步线程可以自由地操作由frontswap存储的页面。例如，RAMster中的 “remotification”

-线程使用标准的异步内核套接字，将压缩的frontswap页面移动到远程机器。同样，

-KVM的客户方实现可以进行客户内压缩，并使用 “batched” hypercalls。

-在虚拟化环境中，动态性允许管理程序（或主机操作系统）做“intelligent overcommit”。

-例如，它可以选择只接受页面，直到主机交换可能即将发生，然后强迫客户机做他们

-transcendent memory规格的frontswap有一个坏处。因为任何 “store” 都可

-能失败，所以必须在一个真正的交换设备上有一个真正的插槽来交换页面。因此，

-frontswap必须作为每个交换设备的 “影子” 来实现，它有可能容纳交换设备可能

-容纳的每一个页面，也有可能根本不容纳任何页面。这意味着frontswap不能包含比

-swap设备总数更多的页面。例如，如果在某些安装上没有配置交换设备，frontswap

-就没有用。无交换设备的便携式设备仍然可以使用frontswap，但是这种设备的

-backend必须配置某种 “ghost” 交换设备，并确保它永远不会被使用。

-* 为什么会有这种关于 “重复存储” 的奇怪定义？如果一个页面以前被成功地存储过，

- 难道它不能总是被成功地覆盖吗？

-几乎总是可以的，不，有时不能。考虑一个例子，数据被压缩了，原来的4K页面被压

-缩到了1K。现在，有人试图用不可压缩的数据覆盖该页，因此会占用整个4K。但是

-backend没有更多的空间了。在这种情况下，这个存储必须被拒绝。每当frontswap

-拒绝一个会覆盖的存储时，它也必须使旧的数据作废，并确保它不再被访问。因为交

-换子系统会把新的数据写到读交换设备上，这是确保一致性的正确做法。

-* 为什么frontswap补丁会创建新的头文件swapfile.h？

-frontswap代码依赖于一些swap子系统内部的数据结构，这些数据结构多年来一直

-在静态和全局之间来回移动。这似乎是一个合理的妥协：将它们定义为全局，但在一

-个新的包含文件中声明它们，该文件不被包含swap.h的大量源文件所包含。

-Dan Magenheimer，最后更新于2012年4月9日

diff --git a/Documentation/translations/zh_CN/mm/hugetlbfs_reserv.rst b/Documentation/translations/zh_CN/mm/hugetlbfs_reserv.rst
index b7a0544224ad..20947f8bd065 100644
--- a/Documentation/translations/zh_CN/mm/hugetlbfs_reserv.rst
+++ b/Documentation/translations/zh_CN/mm/hugetlbfs_reserv.rst

-巨页释放是由函数free_huge_page()执行的。这个函数是hugetlbfs复合页的析构器。因此，它只传

- a) 如果操作能够成功，regi_add()将被调用，以实际修改先前传递给regi_chg()的相同范围

-行更改。在这种情况下，regi_add()的返回值将与regi_chg()的返回值不符。在这种情况下，全局计数

-（在实例化和清除PagePrivate之前），那么free_huge_page将增加全局预留计数。然而，预留映射

diff --git a/Documentation/translations/zh_CN/mm/split_page_table_lock.rst b/Documentation/translations/zh_CN/mm/split_page_table_lock.rst
index 4fb7aa666037..a2c288670a24 100644
--- a/Documentation/translations/zh_CN/mm/split_page_table_lock.rst
+++ b/Documentation/translations/zh_CN/mm/split_page_table_lock.rst

-没有必要特别启用PTE分页表锁：所有需要的东西都由pgtable_pte_page_ctor()

-和pgtable_pte_page_dtor()完成，它们必须在PTE表分配/释放时被调用。

-启用PMD分页锁需要在PMD表分配时调用pgtable_pmd_page_ctor()，在释放时调

-用pgtable_pmd_page_dtor()。

-注意：pgtable_pte_page_ctor()和pgtable_pmd_page_ctor()可能失败--必

-PTE表的spinlock_t分配在pgtable_pte_page_ctor()中，PMD表的spinlock_t

-分配在pgtable_pmd_page_ctor()中。

-Traditional Chinese maintainer: Hu Haowen <src.res@email.cn>

-繁體中文版維護者：胡皓文 Hu Haowen <src.res@email.cn>

-繁體中文版翻譯者：胡皓文 Hu Haowen <src.res@email.cn>

-繁體中文版校譯者：胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/admin-guide/README.rst b/Documentation/translations/zh_TW/admin-guide/README.rst
index 6ce97edbab37..7fc56e1e3348 100644
--- a/Documentation/translations/zh_TW/admin-guide/README.rst
+++ b/Documentation/translations/zh_TW/admin-guide/README.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/admin-guide/bug-bisect.rst b/Documentation/translations/zh_TW/admin-guide/bug-bisect.rst
index 41a39aebb8d6..b448dbf5ac87 100644
--- a/Documentation/translations/zh_TW/admin-guide/bug-bisect.rst
+++ b/Documentation/translations/zh_TW/admin-guide/bug-bisect.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/admin-guide/bug-hunting.rst b/Documentation/translations/zh_TW/admin-guide/bug-hunting.rst
index 4d813aec77d2..9a3de3bff5e7 100644
--- a/Documentation/translations/zh_TW/admin-guide/bug-hunting.rst
+++ b/Documentation/translations/zh_TW/admin-guide/bug-hunting.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/admin-guide/clearing-warn-once.rst b/Documentation/translations/zh_TW/admin-guide/clearing-warn-once.rst
index bdc1a22046cf..bd0c08aab8ea 100644
--- a/Documentation/translations/zh_TW/admin-guide/clearing-warn-once.rst
+++ b/Documentation/translations/zh_TW/admin-guide/clearing-warn-once.rst

-:Translator: 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/admin-guide/cpu-load.rst b/Documentation/translations/zh_TW/admin-guide/cpu-load.rst
index be087cef1967..9e04aeac1a5c 100644
--- a/Documentation/translations/zh_TW/admin-guide/cpu-load.rst
+++ b/Documentation/translations/zh_TW/admin-guide/cpu-load.rst

-:Translator: 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/admin-guide/index.rst b/Documentation/translations/zh_TW/admin-guide/index.rst
index 293c20245783..2804d619201d 100644
--- a/Documentation/translations/zh_TW/admin-guide/index.rst
+++ b/Documentation/translations/zh_TW/admin-guide/index.rst

-:Translator: 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/admin-guide/init.rst b/Documentation/translations/zh_TW/admin-guide/init.rst
index 32cdf134948f..db3fdf611080 100644
--- a/Documentation/translations/zh_TW/admin-guide/init.rst
+++ b/Documentation/translations/zh_TW/admin-guide/init.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/admin-guide/reporting-issues.rst b/Documentation/translations/zh_TW/admin-guide/reporting-issues.rst
index 27638e199f13..ea51342879c0 100644
--- a/Documentation/translations/zh_TW/admin-guide/reporting-issues.rst
+++ b/Documentation/translations/zh_TW/admin-guide/reporting-issues.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/admin-guide/security-bugs.rst b/Documentation/translations/zh_TW/admin-guide/security-bugs.rst
index 15f8e9005071..65c8dd24c96d 100644
--- a/Documentation/translations/zh_TW/admin-guide/security-bugs.rst
+++ b/Documentation/translations/zh_TW/admin-guide/security-bugs.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/admin-guide/tainted-kernels.rst b/Documentation/translations/zh_TW/admin-guide/tainted-kernels.rst
index d7b3c4276417..ebe3812ead82 100644
--- a/Documentation/translations/zh_TW/admin-guide/tainted-kernels.rst
+++ b/Documentation/translations/zh_TW/admin-guide/tainted-kernels.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/admin-guide/unicode.rst b/Documentation/translations/zh_TW/admin-guide/unicode.rst
index 720875be5ef8..7908b369b85b 100644
--- a/Documentation/translations/zh_TW/admin-guide/unicode.rst
+++ b/Documentation/translations/zh_TW/admin-guide/unicode.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/arch/arm64/booting.txt b/Documentation/translations/zh_TW/arch/arm64/booting.txt
index 24817b8b70cd..3cc8f593e006 100644
--- a/Documentation/translations/zh_TW/arch/arm64/booting.txt
+++ b/Documentation/translations/zh_TW/arch/arm64/booting.txt

-zh_TW: Hu Haowen <src.res@email.cn>

-繁體中文版校譯者：胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/arch/arm64/elf_hwcaps.rst b/Documentation/translations/zh_TW/arch/arm64/elf_hwcaps.rst
index fca3c6ff7b93..ca7ff749a67b 100644
--- a/Documentation/translations/zh_TW/arch/arm64/elf_hwcaps.rst
+++ b/Documentation/translations/zh_TW/arch/arm64/elf_hwcaps.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/arch/arm64/hugetlbpage.rst b/Documentation/translations/zh_TW/arch/arm64/hugetlbpage.rst
index 10feb329dfb8..a17858c978d6 100644
--- a/Documentation/translations/zh_TW/arch/arm64/hugetlbpage.rst
+++ b/Documentation/translations/zh_TW/arch/arm64/hugetlbpage.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/arch/arm64/index.rst b/Documentation/translations/zh_TW/arch/arm64/index.rst
index 68befee14b99..a62b5f06b66c 100644
--- a/Documentation/translations/zh_TW/arch/arm64/index.rst
+++ b/Documentation/translations/zh_TW/arch/arm64/index.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/arch/arm64/legacy_instructions.txt b/Documentation/translations/zh_TW/arch/arm64/legacy_instructions.txt
index 3c915df9836c..c2d02cd5017d 100644
--- a/Documentation/translations/zh_TW/arch/arm64/legacy_instructions.txt
+++ b/Documentation/translations/zh_TW/arch/arm64/legacy_instructions.txt

-Traditional Chinese maintainer: Hu Haowen <src.res@email.cn>

-繁體中文版校譯者：胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/arch/arm64/memory.txt b/Documentation/translations/zh_TW/arch/arm64/memory.txt
index 2437380a26d8..0280200e791f 100644
--- a/Documentation/translations/zh_TW/arch/arm64/memory.txt
+++ b/Documentation/translations/zh_TW/arch/arm64/memory.txt

-Traditional Chinese maintainer: Hu Haowen <src.res@email.cn>

-繁體中文版校譯者：胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/arch/arm64/perf.rst b/Documentation/translations/zh_TW/arch/arm64/perf.rst
index 3b39997a52eb..645f3944a0f4 100644
--- a/Documentation/translations/zh_TW/arch/arm64/perf.rst
+++ b/Documentation/translations/zh_TW/arch/arm64/perf.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/arch/arm64/silicon-errata.txt b/Documentation/translations/zh_TW/arch/arm64/silicon-errata.txt
index 66c3a3506458..f6f41835a54a 100644
--- a/Documentation/translations/zh_TW/arch/arm64/silicon-errata.txt
+++ b/Documentation/translations/zh_TW/arch/arm64/silicon-errata.txt

-zh_TW: Hu Haowen <src.res@email.cn>

-繁體中文版校譯者：胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/arch/arm64/tagged-pointers.txt b/Documentation/translations/zh_TW/arch/arm64/tagged-pointers.txt
index b7f683f20ed1..c0be1d1e0d01 100644
--- a/Documentation/translations/zh_TW/arch/arm64/tagged-pointers.txt
+++ b/Documentation/translations/zh_TW/arch/arm64/tagged-pointers.txt

-Traditional Chinese maintainer: Hu Haowen <src.res@email.cn>

-繁體中文版校譯者：胡皓文 Hu Haowen <src.res@email.cn>

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/cpu-freq/cpu-drivers.rst b/Documentation/translations/zh_TW/cpu-freq/cpu-drivers.rst
index 2bb8197cd320..671b1bf0e2c5 100644
--- a/Documentation/translations/zh_TW/cpu-freq/cpu-drivers.rst
+++ b/Documentation/translations/zh_TW/cpu-freq/cpu-drivers.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/cpu-freq/cpufreq-stats.rst b/Documentation/translations/zh_TW/cpu-freq/cpufreq-stats.rst
index d80bfed50e8c..49088becd5fa 100644
--- a/Documentation/translations/zh_TW/cpu-freq/cpufreq-stats.rst
+++ b/Documentation/translations/zh_TW/cpu-freq/cpufreq-stats.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/disclaimer-zh_TW.rst b/Documentation/translations/zh_TW/disclaimer-zh_TW.rst
index f4cf87d03dc5..0d0ffb1ca4e8 100644
--- a/Documentation/translations/zh_TW/disclaimer-zh_TW.rst
+++ b/Documentation/translations/zh_TW/disclaimer-zh_TW.rst

- 或者發送電子郵件給胡皓文以獲取幫助：<src.res@email.cn>。

diff --git a/Documentation/translations/zh_TW/filesystems/debugfs.rst b/Documentation/translations/zh_TW/filesystems/debugfs.rst
index 270dd94fddf1..ddf801943c92 100644
--- a/Documentation/translations/zh_TW/filesystems/debugfs.rst
+++ b/Documentation/translations/zh_TW/filesystems/debugfs.rst

- 繁體中文版校譯者: 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/filesystems/index.rst b/Documentation/translations/zh_TW/filesystems/index.rst
index 4e5dde0dca3c..789e742fa3c5 100644
--- a/Documentation/translations/zh_TW/filesystems/index.rst
+++ b/Documentation/translations/zh_TW/filesystems/index.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/filesystems/sysfs.txt b/Documentation/translations/zh_TW/filesystems/sysfs.txt
index 280824cc7e5d..a84eba2af9d3 100644
--- a/Documentation/translations/zh_TW/filesystems/sysfs.txt
+++ b/Documentation/translations/zh_TW/filesystems/sysfs.txt

-繁體中文版校譯者：胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/filesystems/tmpfs.rst b/Documentation/translations/zh_TW/filesystems/tmpfs.rst
index 8d753a34785b..2c8439b2b77e 100644
--- a/Documentation/translations/zh_TW/filesystems/tmpfs.rst
+++ b/Documentation/translations/zh_TW/filesystems/tmpfs.rst

-and Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/filesystems/virtiofs.rst b/Documentation/translations/zh_TW/filesystems/virtiofs.rst
index 2b05e84375dd..086fce5839dd 100644
--- a/Documentation/translations/zh_TW/filesystems/virtiofs.rst
+++ b/Documentation/translations/zh_TW/filesystems/virtiofs.rst

- 繁體中文版校譯者：胡皓文 Hu Haowen <src.res@email.cn>

-Traditional Chinese maintainer: Hu Haowen <src.res@email.cn>

-繁體中文版維護者：胡皓文 Hu Haowen <src.res@email.cn>

-繁體中文版翻譯者：胡皓文 Hu Haowen <src.res@email.cn>

-繁體中文版校譯者：胡皓文 Hu Haowen <src.res@email.cn>

- 作，歡迎提交補丁給胡皓文 <src.res@email.cn>。

-下面的文檔介紹了Linux內核原始碼的許可證（GPLv2）、如何在原始碼樹中正確標記

-單個文件的許可證、以及指向完整許可證文本的連結。

-Documentation/translations/zh_TW/process/license-rules.rst

-下面的手冊是爲內核用戶編寫的——即那些試圖讓它在給定系統上以最佳方式工作的

-下列文檔描述了內核需要的平台固件相關信息。

-* firmware-guide/index

-應用程式開發人員文檔

---------------------

-用戶空間API手冊涵蓋了描述應用程式開發人員可見內核接口方面的文檔。

-* userspace-api/index

-這些手冊包含有關如何開發內核的整體信息。內核社區非常龐大，一年下來有數千名

-開發人員做出貢獻。與任何大型社區一樣，知道如何完成任務將使得更改合併的過程

-變得更加容易。

-以下手冊從內核開發人員的角度詳細介紹了特定的內核子系統是如何工作的。這裡的

-大部分信息都是直接從內核原始碼獲取的，並根據需要添加補充材料（或者至少是在

-我們設法添加的時候——可能不是所有的都是有需要的）。

-* misc-devices/index

-體系結構無關文檔

-特定體系結構文檔

-有幾份未排序的文檔似乎不適合放在文檔的其他部分，或者可能需要進行一些調整和/或

-Traditional Chinese maintainer: Hu Haowen <src.res@email.cn>

-繁體中文版維護者：胡皓文 Hu Haowen <src.res@email.cn>

-繁體中文版翻譯者：胡皓文 Hu Haowen <src.res@email.cn>

-繁體中文版校譯者：胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/1.Intro.rst b/Documentation/translations/zh_TW/process/1.Intro.rst
index ca2b931be6c5..f236fe95a6c6 100644
--- a/Documentation/translations/zh_TW/process/1.Intro.rst
+++ b/Documentation/translations/zh_TW/process/1.Intro.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/2.Process.rst b/Documentation/translations/zh_TW/process/2.Process.rst
index 9d465df1f6c3..17bb4e07d171 100644
--- a/Documentation/translations/zh_TW/process/2.Process.rst
+++ b/Documentation/translations/zh_TW/process/2.Process.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/3.Early-stage.rst b/Documentation/translations/zh_TW/process/3.Early-stage.rst
index 076873ca0905..636e506fd196 100644
--- a/Documentation/translations/zh_TW/process/3.Early-stage.rst
+++ b/Documentation/translations/zh_TW/process/3.Early-stage.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/4.Coding.rst b/Documentation/translations/zh_TW/process/4.Coding.rst
index 7fc0344ed16b..adb5339aab6a 100644
--- a/Documentation/translations/zh_TW/process/4.Coding.rst
+++ b/Documentation/translations/zh_TW/process/4.Coding.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/5.Posting.rst b/Documentation/translations/zh_TW/process/5.Posting.rst
index 280a8832ecc0..27015622ad63 100644
--- a/Documentation/translations/zh_TW/process/5.Posting.rst
+++ b/Documentation/translations/zh_TW/process/5.Posting.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/6.Followthrough.rst b/Documentation/translations/zh_TW/process/6.Followthrough.rst
index 4af782742db3..5073b6e77c1c 100644
--- a/Documentation/translations/zh_TW/process/6.Followthrough.rst
+++ b/Documentation/translations/zh_TW/process/6.Followthrough.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/7.AdvancedTopics.rst b/Documentation/translations/zh_TW/process/7.AdvancedTopics.rst
index 4fbc104a37ca..2cbd16bfed29 100644
--- a/Documentation/translations/zh_TW/process/7.AdvancedTopics.rst
+++ b/Documentation/translations/zh_TW/process/7.AdvancedTopics.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/8.Conclusion.rst b/Documentation/translations/zh_TW/process/8.Conclusion.rst
index 044fcc118bef..1207991d1570 100644
--- a/Documentation/translations/zh_TW/process/8.Conclusion.rst
+++ b/Documentation/translations/zh_TW/process/8.Conclusion.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/code-of-conduct-interpretation.rst b/Documentation/translations/zh_TW/process/code-of-conduct-interpretation.rst
index 949d831aaf6c..920bb0f36974 100644
--- a/Documentation/translations/zh_TW/process/code-of-conduct-interpretation.rst
+++ b/Documentation/translations/zh_TW/process/code-of-conduct-interpretation.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/code-of-conduct.rst b/Documentation/translations/zh_TW/process/code-of-conduct.rst
index 716e5843b6e9..e3087112f0bc 100644
--- a/Documentation/translations/zh_TW/process/code-of-conduct.rst
+++ b/Documentation/translations/zh_TW/process/code-of-conduct.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/coding-style.rst b/Documentation/translations/zh_TW/process/coding-style.rst
index 61e614aad6a7..83862e4d3b64 100644
--- a/Documentation/translations/zh_TW/process/coding-style.rst
+++ b/Documentation/translations/zh_TW/process/coding-style.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/development-process.rst b/Documentation/translations/zh_TW/process/development-process.rst
index 45e6385647cd..f4cf5c2bbc82 100644
--- a/Documentation/translations/zh_TW/process/development-process.rst
+++ b/Documentation/translations/zh_TW/process/development-process.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/email-clients.rst b/Documentation/translations/zh_TW/process/email-clients.rst
index 4ba543d06f3b..ae63e41d9cee 100644
--- a/Documentation/translations/zh_TW/process/email-clients.rst
+++ b/Documentation/translations/zh_TW/process/email-clients.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/embargoed-hardware-issues.rst b/Documentation/translations/zh_TW/process/embargoed-hardware-issues.rst
index fbde3e26eda5..8e4db8baa0d1 100644
--- a/Documentation/translations/zh_TW/process/embargoed-hardware-issues.rst
+++ b/Documentation/translations/zh_TW/process/embargoed-hardware-issues.rst

- Hu Haowen <src.res@email.cn>

- 胡皓文 Hu Haowen <src.res@email.cn>

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/kernel-driver-statement.rst b/Documentation/translations/zh_TW/process/kernel-driver-statement.rst
index 8f225379b12c..963ecece3db1 100644
--- a/Documentation/translations/zh_TW/process/kernel-driver-statement.rst
+++ b/Documentation/translations/zh_TW/process/kernel-driver-statement.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/kernel-enforcement-statement.rst b/Documentation/translations/zh_TW/process/kernel-enforcement-statement.rst
index 99e21d22800d..2861f4a15721 100644
--- a/Documentation/translations/zh_TW/process/kernel-enforcement-statement.rst
+++ b/Documentation/translations/zh_TW/process/kernel-enforcement-statement.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/license-rules.rst b/Documentation/translations/zh_TW/process/license-rules.rst
index ad2b80f97123..503b6701bde4 100644
--- a/Documentation/translations/zh_TW/process/license-rules.rst
+++ b/Documentation/translations/zh_TW/process/license-rules.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/magic-number.rst b/Documentation/translations/zh_TW/process/magic-number.rst
index c9e3db12c3f9..5657d5cd18d4 100644
--- a/Documentation/translations/zh_TW/process/magic-number.rst
+++ b/Documentation/translations/zh_TW/process/magic-number.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/management-style.rst b/Documentation/translations/zh_TW/process/management-style.rst
index dce248470063..e9d29024f4c9 100644
--- a/Documentation/translations/zh_TW/process/management-style.rst
+++ b/Documentation/translations/zh_TW/process/management-style.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/programming-language.rst b/Documentation/translations/zh_TW/process/programming-language.rst
index 144bdaf81a41..e33389676eed 100644
--- a/Documentation/translations/zh_TW/process/programming-language.rst
+++ b/Documentation/translations/zh_TW/process/programming-language.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/stable-api-nonsense.rst b/Documentation/translations/zh_TW/process/stable-api-nonsense.rst
index 22caa5b8d422..33fc85c2cc51 100644
--- a/Documentation/translations/zh_TW/process/stable-api-nonsense.rst
+++ b/Documentation/translations/zh_TW/process/stable-api-nonsense.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/stable-kernel-rules.rst b/Documentation/translations/zh_TW/process/stable-kernel-rules.rst
index 9bb0d9b4f3ac..29d9a70a1868 100644
--- a/Documentation/translations/zh_TW/process/stable-kernel-rules.rst
+++ b/Documentation/translations/zh_TW/process/stable-kernel-rules.rst

- - 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/submit-checklist.rst b/Documentation/translations/zh_TW/process/submit-checklist.rst
index ff2f89cba83f..12bf6f5ca5c6 100644
--- a/Documentation/translations/zh_TW/process/submit-checklist.rst
+++ b/Documentation/translations/zh_TW/process/submit-checklist.rst

- Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/submitting-patches.rst b/Documentation/translations/zh_TW/process/submitting-patches.rst
index 3f77ef5d48a0..0746809c31a2 100644
--- a/Documentation/translations/zh_TW/process/submitting-patches.rst
+++ b/Documentation/translations/zh_TW/process/submitting-patches.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

diff --git a/Documentation/translations/zh_TW/process/volatile-considered-harmful.rst b/Documentation/translations/zh_TW/process/volatile-considered-harmful.rst
index 097fe80352cb..469cb5b3a07c 100644
--- a/Documentation/translations/zh_TW/process/volatile-considered-harmful.rst
+++ b/Documentation/translations/zh_TW/process/volatile-considered-harmful.rst

- 胡皓文 Hu Haowen <src.res@email.cn>

-Traditional Chinese maintainer: Hu Haowen <src.res@email.cn>

-繁體中文版維護者：胡皓文 Hu Haowen <src.res@email.cn>

-繁體中文版翻譯者：胡皓文 Hu Haowen <src.res@email.cn>

- http://www.kernel.org/pub/linux/kernel/people/josh/sparse/

- git://git.kernel.org/pub/scm/linux/kernel/git/josh/sparse.git

-By default, Wired USB devices are authorized by default to

-connect. Wireless USB hosts deauthorize by default all new connected

-devices (this is so because we need to do an authentication phase

-before authorizing). Writing "2" to the authorized_default attribute

-causes kernel to only authorize by default devices connected to internal

-Format descriptors that follow. This and similar operations are acheived in

diff --git a/Documentation/userspace-api/media/v4l/dev-decoder.rst b/Documentation/userspace-api/media/v4l/dev-decoder.rst
index 675bc2c3c6b8..ef8e8cf31f90 100644
--- a/Documentation/userspace-api/media/v4l/dev-decoder.rst
+++ b/Documentation/userspace-api/media/v4l/dev-decoder.rst

- * **Return fields:**

diff --git a/Documentation/userspace-api/media/v4l/dev-encoder.rst b/Documentation/userspace-api/media/v4l/dev-encoder.rst
index aa338b9624b0..6c523c69bdce 100644
--- a/Documentation/userspace-api/media/v4l/dev-encoder.rst
+++ b/Documentation/userspace-api/media/v4l/dev-encoder.rst

- format in :c:type:`v4l2_frmsizeenum` ``pixel_format`` and the resolution

- in :c:type:`v4l2_frmsizeenum` ``width`` and :c:type:`v4l2_frmsizeenum`

- * **Return fields:**

- * ** Required fields:**

- * **Return fields:**

- * ** Required fields:**

- * **Return fields:**

diff --git a/Documentation/userspace-api/media/v4l/dev-stateless-decoder.rst b/Documentation/userspace-api/media/v4l/dev-stateless-decoder.rst
index 4a26646eeec5..35ed05f2695e 100644
--- a/Documentation/userspace-api/media/v4l/dev-stateless-decoder.rst
+++ b/Documentation/userspace-api/media/v4l/dev-stateless-decoder.rst

- * **Return fields:**

diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst
index 81e60f4002c8..786127b1e206 100644
--- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst
+++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst

-AV1 Loop Restauration as described in section 6.10.15 "Loop restoration params

diff --git a/Documentation/userspace-api/media/v4l/metafmt-d4xx.rst b/Documentation/userspace-api/media/v4l/metafmt-d4xx.rst
index 541836074f94..0686413b16b2 100644
--- a/Documentation/userspace-api/media/v4l/metafmt-d4xx.rst
+++ b/Documentation/userspace-api/media/v4l/metafmt-d4xx.rst

-The "Laser mode" __u32 fiels has been split into: ::

diff --git a/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst b/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst
index 58f6ae25b2e7..296ad2025e8d 100644
--- a/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst
+++ b/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst

diff --git a/Documentation/userspace-api/media/v4l/vidioc-subdev-g-routing.rst b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-routing.rst
index 2d6e3bbdd040..72677a280cd6 100644
--- a/Documentation/userspace-api/media/v4l/vidioc-subdev-g-routing.rst
+++ b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-routing.rst

- pads of different types (ie. the sink_pad identifiers refers to a source pad)

- or the sink or source stream identifiers reference a non-existing stream on

- the sink or source pad.

diff --git a/Documentation/userspace-api/netlink/genetlink-legacy.rst b/Documentation/userspace-api/netlink/genetlink-legacy.rst
index 802875a37a27..40b82ad5d54a 100644
--- a/Documentation/userspace-api/netlink/genetlink-legacy.rst
+++ b/Documentation/userspace-api/netlink/genetlink-legacy.rst

-The spec is a work in progress, some of the quirks are just documented

-for future reference.

-Specification (defined)

-=======================

-Other quirks (todo)

-===================

-``definitions`` and referenced in operations or attributes. Note that

-structures defined in YAML are implicitly packed according to C

-Each object would also have it's own fixed metadata shared by all request

-appying the scale and offset to get the constant 10 MHz clock.

-Queues an external interrupt to be injected into the virutal CPU. This ioctl

-RISC-V core registers represent the general excution state of a Guest VCPU

-:Architectures: arm64, mips

- previous protected VM had been prepared for asynchonous teardown with

- Indicates thats the struct contain valid PDPTR values.

-requires a guest to interact with host userpace.

-machine (KVM_VM_S390_UNCONTROL) on it's host page table that cannot be

-more priveleged enclave attributes. args[0] must hold a file handle to a valid

-compatibilty, KVM initializes this msr to KVM's internal vcpu index. When this

-mmaped into userspace; there is one dirty ring per vcpu.

-``struct kvm_dirty_gfn``. Each dirty entry it's defined as::

-To harvest the dirty pages, userspace accesses the mmaped ring buffer

-the RUNSTATE feature above, but not thie RUNSTATE_UPDATE_FLAG feature, will

-currently implmented Hyper-V features are provided unconditionally when

-tracks VFIO groups in use by the VM and features of those groups

-important to the correctness and acceleration of the VM. As groups

-are enabled and disabled for use by the VM, KVM should be updated

-about their presence. When registered with KVM, a reference to the

-VFIO-group is held by KVM.

- KVM_DEV_VFIO_GROUP

-KVM_DEV_VFIO_GROUP attributes:

- KVM_DEV_VFIO_GROUP_ADD: Add a VFIO group to VFIO-KVM device tracking

- kvm_device_attr.addr points to an int32_t file descriptor

- for the VFIO group.

- KVM_DEV_VFIO_GROUP_DEL: Remove a VFIO group from VFIO-KVM device tracking

- kvm_device_attr.addr points to an int32_t file descriptor

- for the VFIO group.

-The GROUP_ADD operation above should be invoked prior to accessing the

-are not handled by KVM need to by imlemented in the VM driver code.

- pages exposed to the guest should accommadate this change.

-dependant. In the event that no wakeup source arrives during the polling

- pages that may be unsynchronized. Used to quickly locate all unsychronized

diff --git a/Documentation/virt/kvm/x86/running-nested-guests.rst b/Documentation/virt/kvm/x86/running-nested-guests.rst
index 71136fe1723b..87326413d5c7 100644
--- a/Documentation/virt/kvm/x86/running-nested-guests.rst
+++ b/Documentation/virt/kvm/x86/running-nested-guests.rst

- with the ``nested`` paramter — i.e. to be able to enable

-If such functionality is desireable for a particular application

-it's current resolution. Default conversion time is set by the driver according

-w1_master_timeout_us (ro) the delay in microseconds beetwen searches

-only connector header and w1_netlink_msg strucutre with "len" field

- additional information about the watchdog timer itself. (Like it's unique name)

-Returns a buffer usually containg 12 blocks of analytics data.

-Returns a buffer containg fan sensor entries, terminated

-F: drivers/platform/x86/amd/pmc.c

-M: Shijie Qin <shijie.qin@nxp.com>

-F: Documentation/process/maintainer-soc.rst

-ARM/OXNAS platform support

-M: Neil Armstrong <neil.armstrong@linaro.org>

-L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

-L: linux-oxnas@groups.io (moderated for non-subscribers)

-F: arch/arm/boot/dts/ox8*.dts*

-F: arch/arm/mach-oxnas/

-F: drivers/power/reset/oxnas-restart.c

-F: arch/arm/boot/dts/arm/vexpress*

-F: drivers/clk/versatile/clk-vexpress-osc.c

-F: Documentation/bpf/instruction-set.rst

-R: Yonghong Song <yhs@fb.com>

-M: Yonghong Song <yhs@fb.com>

-BPF [NETWORKING] (tc BPF, sock_addr)

-F: drivers/soc/bcm/bcm63xx

-F: Documentation/devicetree/bindings/spi/spi-bcm63xx.txt

-F: Documentation/devicetree/bindings/gpio/brcm,kona-gpio.txt

-F: drivers/soc/bcm/bcm63xx/bcm-pmb.c

-F: Documentation/devicetree/bindings/regulator/slg51000.txt

-L: cluster-devel@redhat.com

-R: Liam Mark <lmark@codeaurora.org>

-R: Laura Abbott <labbott@redhat.com>

-DONGWOON DW9768 LENS VOICE COIL DRIVER

-M: Dongchun Zhu <dongchun.zhu@mediatek.com>

-M: Tomi Valkeinen <tomba@kernel.org>

-R: Tomi Valkeinen <tomba@kernel.org>

-M: Tomi Valkeinen <tomba@kernel.org>

-F: include/linux/fs_enet_pd.h

-M: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>

-L: linux-kernel@vger.kernel.org

-F: include/linux/frontswap.h

-L: cluster-devel@redhat.com

-M: Guangbin Huang <huangguangbin2@huawei.com>

-M: Shaokun Zhang <zhangshaokun@hisilicon.com>

-M: Shawn Tu <shawnx.tu@intel.com>

-F: Documentation/loongarch/

-F: Documentation/translations/zh_CN/loongarch/

-MEDIA DRIVERS FOR FREESCALE IMX7

-F: Documentation/mips/

-M: Simon Horman <simon.horman@corigine.com>

-F: include/linux/net_mm.h

-M: Shawn Tu <shawnx.tu@intel.com>

-M: Dongchun Zhu <dongchun.zhu@mediatek.com>

-R: Shawn Tu <shawnx.tu@intel.com>

-M: Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com>

-M: Shawn Tu <shawnx.tu@intel.com>

-M: Wenyou Yang <wenyou.yang@microchip.com>

-F: include/net/page_pool.h

-F: Documentation/devicetree/bindings/pps/pps-gpio.txt

-M: Sergey Senozhatsky <senozhatsky@chromium.org>

-F: drivers/soc/qcom/cpr.c

-F: include/linux/platform_data/rtc-*

-F: Documentation/s390/

-F: Documentation/s390/pci.rst

-F: Documentation/s390/vfio-ap*

-F: Documentation/s390/vfio-ccw.rst

-R: Mike Travis <mike.travis@hpe.com>

-SMM665 HARDWARE MONITOR DRIVER

-M: Guenter Roeck <linux@roeck-us.net>

-L: linux-hwmon@vger.kernel.org

-F: Documentation/hwmon/smm665.rst

-F: drivers/hwmon/smm665.c

-F: drivers/soc/starfive/jh71xx_pmu.c

-M: Baojun Xu <x1077012@ti.com>

-F: drivers/soc/ti/ti_sci_pm_domains.c

-M: Hu Haowen <src.res@email.cn>

-L: linux-doc-tw-discuss@lists.sourceforge.net (moderated for non-subscribers)

-M: David Rheinsberg <david.rheinsberg@gmail.com>

-M: Sergey Senozhatsky <senozhatsky@chromium.org>

-M: David Rheinsberg <david.rheinsberg@gmail.com>

-L: platform-drivers-x86@vger.kernel.org

-R: Mike Travis <mike.travis@hpe.com>

-M: Darrick J. Wong <djwong@kernel.org>

- headers_install modules_install kernelrelease image_name

-no-sync-config-targets := $(no-dot-config-targets) %install kernelrelease \

-KBUILD_CFLAGS += -Wall

-KBUILD_CFLAGS += -Wundef

-KBUILD_CFLAGS += -Werror=implicit-function-declaration

-KBUILD_CFLAGS += -Werror=implicit-int

-KBUILD_CFLAGS += -Werror=return-type

-KBUILD_CFLAGS += -Werror=strict-prototypes

-KBUILD_CFLAGS += -Wno-format-security

-KBUILD_CFLAGS += -Wno-trigraphs

-KBUILD_CFLAGS += $(call cc-disable-warning,frame-address,)

-KBUILD_CFLAGS += $(call cc-disable-warning, format-truncation)

-KBUILD_CFLAGS += $(call cc-disable-warning, format-overflow)

-KBUILD_CFLAGS += $(call cc-disable-warning, address-of-packed-member)

-ifneq ($(CONFIG_FRAME_WARN),0)

-KBUILD_CFLAGS += -Wframe-larger-than=$(CONFIG_FRAME_WARN)

-KBUILD_CPPFLAGS-$(CONFIG_WERROR) += -Werror

-KBUILD_CPPFLAGS += $(KBUILD_CPPFLAGS-y)

-KBUILD_CFLAGS-$(CONFIG_CC_NO_ARRAY_BOUNDS) += -Wno-array-bounds

-ifdef CONFIG_CC_IS_CLANG

-# The kernel builds with '-std=gnu11' so use of GNU extensions is acceptable.

-KBUILD_CFLAGS += -Wno-gnu

-# gcc inanely warns about local variables called 'main'

-KBUILD_CFLAGS += -Wno-main

-# These warnings generated too much noise in a regular build.

-# Use make W=1 to enable them (see scripts/Makefile.extrawarn)

-KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable)

-KBUILD_CFLAGS += $(call cc-disable-warning, unused-const-variable)

-# These result in bogus false positives

-KBUILD_CFLAGS += $(call cc-disable-warning, dangling-pointer)

-# Variable Length Arrays (VLAs) should not be used anywhere in the kernel

-KBUILD_CFLAGS += -Wvla

-# disable pointer signed / unsigned warnings in gcc 4.0

-KBUILD_CFLAGS += -Wno-pointer-sign

-# In order to make sure new function cast mismatches are not introduced

-# in the kernel (to avoid tripping CFI checking), the kernel should be

-# globally built with -Wcast-function-type.

-KBUILD_CFLAGS += $(call cc-option, -Wcast-function-type)

-# disable stringop warnings in gcc 8+

-KBUILD_CFLAGS += $(call cc-disable-warning, stringop-truncation)

-# We'll want to enable this eventually, but it's not going away for 5.7 at least

-KBUILD_CFLAGS += $(call cc-disable-warning, stringop-overflow)

-# Another good warning that we'll want to enable eventually

-KBUILD_CFLAGS += $(call cc-disable-warning, restrict)

-# Enabled with W=2, disabled by default as noisy

-ifdef CONFIG_CC_IS_GCC

-KBUILD_CFLAGS += -Wno-maybe-uninitialized

-# The allocators already balk at large sizes, so silence the compiler

-# warnings for bounds checks involving those possible values. While

-# -Wno-alloc-size-larger-than would normally be used here, earlier versions

-# of gcc (<9.1) weirdly don't handle the option correctly when _other_

-# warnings are produced (?!). Using -Walloc-size-larger-than=SIZE_MAX

-# doesn't work (as it is documented to), silently resolving to "0" prior to

-# version 9.1 (and producing an error more recently). Numeric values larger

-# than PTRDIFF_MAX also don't work prior to version 9.1, which are silently

-# ignored, continuing to default to PTRDIFF_MAX. So, left with no other

-# choice, we must perform a versioned check to disable this warning.

-# https://lore.kernel.org/lkml/20210824115859.187f272f@canb.auug.org.au

-KBUILD_CFLAGS-$(call gcc-min-version, 90100) += -Wno-alloc-size-larger-than

-KBUILD_CFLAGS += $(KBUILD_CFLAGS-y) $(CONFIG_CC_IMPLICIT_FALLTHROUGH)

-# Prohibit date/time macros, which would make the build non-deterministic

-KBUILD_CFLAGS += -Werror=date-time

-# enforce correct pointer usage

-KBUILD_CFLAGS += $(call cc-option,-Werror=incompatible-pointer-types)

-# Require designated initializers for all marked structures

-KBUILD_CFLAGS += $(call cc-option,-Werror=designated-init)

- $(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh -v

-export modules_sign_only :=

-ifeq ($(CONFIG_MODULE_SIG),y)

-PHONY += modules_sign

-modules_sign: modules_install

-# modules_sign is a subset of modules_install.

-# 'make modules_install modules_sign' is equivalent to 'make modules_install'.

-ifeq ($(filter modules_install,$(MAKECMDGOALS)),)

-modules_sign_only := y

-ifneq ($(filter modules_install,$(MAKECMDGOALS)),)

-modinst_pre := __modinst_pre

-modules_install: $(modinst_pre)

-PHONY += __modinst_pre

- @rm -rf $(MODLIB)/kernel

- @rm -f $(MODLIB)/source

- @mkdir -p $(MODLIB)

-ifdef CONFIG_MODULES

- @ln -s $(abspath $(srctree)) $(MODLIB)/source

- @if [ ! $(objtree) -ef $(MODLIB)/build ]; then \

- rm -f $(MODLIB)/build ; \

- ln -s $(CURDIR) $(MODLIB)/build ; \

- @sed 's:^$.*$\.o$$:kernel/\1.ko:' modules.order > $(MODLIB)/modules.order

- @cp -f modules.builtin $(MODLIB)/

- @cp -f $(objtree)/modules.builtin.modinfo $(MODLIB)/

-CLEAN_FILES += include/ksym vmlinux.symvers modules-only.symvers \

- @echo 'Configuration targets:'

- $(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh -v && echo "Rust is available!"

-# IDE support targets

-PHONY += rust-analyzer

- $(Q)$(MAKE) $(build)=rust $@

-PHONY += modules modules_install modules_prepare

-quiet_cmd_depmod = DEPMOD $(MODLIB)

- cmd_depmod = $(CONFIG_SHELL) $(srctree)/scripts/depmod.sh $(DEPMOD) \

- $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modinst

- $(call cmd,depmod)

-# Modules not configured

-# ---------------------------------------------------------------------------

-PHONY += __external_modules_error

-modules modules_install: __external_modules_error

-config HAVE_IMA_KEXEC

- depends on !KASAN || KASAN_HW_TAGS

-generic-y += export.h

-/* This is used only in __do_fault and do_swap_page. */

-#define flush_icache_page(vma, page) \

- flush_icache_user_page((vma), (page), 0, 0)

-extern int pci_create_resource_files(struct pci_dev *dev);

-extern void pci_remove_resource_files(struct pci_dev *dev);

-#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)

-#define pte_pfn(pte) (pte_val(pte) >> 32)

-extern inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) &= ~_PAGE_FOW; return pte; }

-static void sysrq_reboot_handler(int unused)

-srmcons_write(struct tty_struct *tty,

- const unsigned char *buf, int count)

-#include <asm/export.h>

- bool "Dedicate Register r25 for current_task pointer"

- This reserved Register R25 to point to Current Task in

- kernel mode. This saves memory access for each such access

-# any kernel headers, and missing the r25 global register

-cflags-$(disable_small_data) += -mno-sdata -fcall-used-gp

-#define ARC_REG_MUL_BCR 0x7b

-struct bcr_uarch_build_arcv2 {

- *******************************************************************

- * Generic structures to hold build configuration used at runtime

-struct cpuinfo_arc_mmu {

- unsigned int ver:4, pg_sz_k:8, s_pg_sz_m:8, pad:10, sasid:1, pae:1;

- unsigned int sets:12, ways:4, u_dtlb:8, u_itlb:8;

-struct cpuinfo_arc_cache {

- unsigned int sz_k:14, line_len:8, assoc:4, alias:1, vipt:1, pad:4;

-struct cpuinfo_arc_bpu {

- unsigned int ver, full, num_cache, num_pred, ret_stk;

-struct cpuinfo_arc_ccm {

- unsigned int base_addr, sz;

-struct cpuinfo_arc {

- struct cpuinfo_arc_cache icache, dcache, slc;

- struct cpuinfo_arc_mmu mmu;

- struct cpuinfo_arc_bpu bpu;

- struct bcr_identity core;

- struct bcr_isa_arcv2 isa;

- const char *release, *name;

- unsigned int vec_base;

- struct cpuinfo_arc_ccm iccm, dccm;

- unsigned int swap:1, norm:1, minmax:1, barrel:1, crc:1, swape:1, pad1:2,

- fpu_sp:1, fpu_dp:1, dual:1, dual_enb:1, pad2:4,

- ap_num:4, ap_full:1, smart:1, rtt:1, pad3:1,

- timer0:1, timer1:1, rtc:1, gfrc:1, pad4:4;

- struct bcr_mpy extn_mpy;

-extern struct cpuinfo_arc cpuinfo_arc700[];

- : "cc"); /* memory clobber comes from smp_mb() */ \

- * Semantically we need this because icache doesn't snoop dcache/dma.

- * However ARC Cache flush requires paddr as well as vaddr, latter not available

- * in the flush_icache_page() API. So we no-op it but do the equivalent work

- * in update_mmu_cache()

-#define flush_icache_page(vma, page)

-void __inv_icache_page(phys_addr_t paddr, unsigned long vaddr);

-void __flush_dcache_page(phys_addr_t paddr, unsigned long vaddr);

-register struct task_struct *curr_arc asm("r25");

-#define CFI_STARTPROC .cfi_startproc

-#define CFI_ENDPROC .cfi_endproc

-#define CFI_DEF_CFA .cfi_def_cfa

-#define CFI_REGISTER .cfi_register

-#define CFI_REL_OFFSET .cfi_rel_offset

-#define CFI_UNDEFINED .cfi_undefined

-#define CFI_STARTPROC CFI_IGNORE

-#define CFI_ENDPROC CFI_IGNORE

-#define CFI_DEF_CFA CFI_IGNORE

-#define CFI_REGISTER CFI_IGNORE

-#define CFI_REL_OFFSET CFI_IGNORE

-#define CFI_UNDEFINED CFI_IGNORE

- ; (A) Before jumping to Interrupt Vector, hardware micro-ops did following:

- ; 4. Auto save: (optional) r0-r11, blink, LPE,LPS,LPC, JLI,LDI,EI

- ; (B) Manually saved some regs: r12,r25,r30, sp,fp,gp, ACCL pair

-.macro EXCEPTION_PROLOGUE

- ; (A) Before jumping to Exception Vector, hardware micro-ops did following:

- ; (B) Manually save the complete reg file below

- sub sp, sp, SZ_PT_REGS ; carve pt_regs

- ST2 gp, fp, PT_r26 ; gp (r26), fp (r27)

- st r12, [sp, PT_sp + 4]

- st r30, [sp, PT_sp + 8]

- add.nz r10, r10, SZ_PT_REGS ; K mode SP

-#ifdef CONFIG_ARC_CURR_IN_REG

- st r25, [sp, PT_user_r25]

- GET_CURR_TASK_ON_CPU r25

- LD2 gp, fp, PT_r26 ; gp (r26), fp (r27)

- ld r12, [sp, PT_r12]

-#ifdef CONFIG_ARC_CURR_IN_REG

- ld r25, [sp, PT_user_r25]

- ld r10, [sp, PT_event + 4]

- bic r9, r9, STATUS_AE_MASK

- or r9, r9, STATUS_IE_MASK

-.macro EXCEPTION_PROLOGUE

-#ifdef CONFIG_ARC_CURR_IN_REG

- /* Treat r25 as scratch reg (save on stack) and load with "current" */

- GET_CURR_TASK_ON_CPU r25

- st r10, [sp, PT_event] /* EV_Trap expects r10 to have ECR */

-#ifdef CONFIG_ARC_CURR_IN_REG

- /* orig_r0, ECR, user_r25 skipped automatically */

-#ifdef CONFIG_ARC_CURR_IN_REG

- /* Treat r25 as scratch reg (save on stack) and load with "current" */

- GET_CURR_TASK_ON_CPU r25

-#ifdef CONFIG_ARC_CURR_IN_REG

- ld sp, [sp] /* restore original sp */

- /* orig_r0, ECR, user_r25 skipped automatically */

-.macro SAVE_R13_TO_R24

-.macro RESTORE_R24_TO_R13

-/*--------------------------------------------------------------

- * Collect User Mode callee regs as struct callee_regs - needed by

- * fork/do_signal/unaligned-access-emulation.

- * (By default only scratch regs are saved on entry to kernel)

- * Special handling for r25 if used for caching Task Pointer.

- * It would have been saved in task->thread.user_r25 already, but to keep

- * the interface same it is copied into regular r25 placeholder in

- * struct callee_regs.

- *-------------------------------------------------------------*/

- mov r12, sp ; save SP as ref to pt_regs

-#ifdef CONFIG_ARC_CURR_IN_REG

- ; Retrieve orig r25 and save it with rest of callee_regs

- ld r12, [r12, PT_user_r25]

-/*--------------------------------------------------------------

- * Save kernel Mode callee regs at the time of Contect Switch.

- * Special handling for r25 if used for caching Task Pointer.

- * Kernel simply skips saving it since it will be loaded with

- * incoming task pointer anyways

- *-------------------------------------------------------------*/

-#ifdef CONFIG_ARC_CURR_IN_REG

-/*--------------------------------------------------------------

- * Opposite of SAVE_CALLEE_SAVED_KERNEL

- *-------------------------------------------------------------*/

-#ifdef CONFIG_ARC_CURR_IN_REG

- add sp, sp, 4 /* skip usual r25 placeholder */

- RESTORE_R24_TO_R13

-/*--------------------------------------------------------------

- * Opposite of SAVE_CALLEE_SAVED_USER

- * ptrace tracer or unaligned-access fixup might have changed a user mode

- * callee reg which is saved back to usual r25 storage location

- *-------------------------------------------------------------*/

-.macro RESTORE_CALLEE_SAVED_USER

-#ifdef CONFIG_ARC_CURR_IN_REG

- RESTORE_R24_TO_R13

- ; SP is back to start of pt_regs

-#ifdef CONFIG_ARC_CURR_IN_REG

- st r12, [sp, PT_user_r25]

-/*-------------------------------------------------

- * 1. Determine curr CPU id.

- * 2. Use it to index into _current_task[ ]

-/* ------------------------------------------------------------------

- * -Uses r25 for Current task ptr if that is enabled

- add \reg, r25, \off

-#define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))

-extern void __iomem *ioremap_prot(phys_addr_t paddr, unsigned long size,

- unsigned long flags);

-extern void iounmap(const volatile void __iomem *addr);

-#define ARCH_PFN_OFFSET virt_to_pfn(CONFIG_LINUX_RAM_BASE)

-PTE_BIT_FUNC(mkwrite, |= (_PAGE_WRITE));

-static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,

- pte_t *ptep, pte_t pteval)

- set_pte(ptep, pteval);

-void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,

- unsigned long ksp; /* kernel mode stack pointer */

-#define INIT_THREAD { \

- .ksp = sizeof(init_stack) + (unsigned long) init_stack, \

-#define TSK_K_ESP(tsk) (tsk->thread.ksp)

-#ifdef CONFIG_CPU_BIG_ENDIAN

- unsigned long state:8, ecr_vec:8,

- ecr_cause:8, ecr_param:8;

- unsigned long ecr_param:8, ecr_cause:8,

- ecr_vec:8, state:8;

- unsigned long event;

- unsigned long user_r25;

-#define MAX_REG_OFFSET offsetof(struct pt_regs, user_r25)

-#ifdef CONFIG_CPU_BIG_ENDIAN

- unsigned long state:8, ecr_vec:8,

- ecr_cause:8, ecr_param:8;

- unsigned long ecr_param:8, ecr_cause:8,

- ecr_vec:8, state:8;

- unsigned long event;

- unsigned long bta; /* bta_l1, bta_l2, erbta */

- unsigned long user_r25;

- unsigned long r26; /* gp */

- unsigned long sp; /* user/kernel sp depending on where we came from */

- unsigned long r12, r30;

-#define in_syscall(regs) ((regs->ecr_vec == ECR_V_TRAP) && !regs->ecr_param)

-#define in_brkpt_trap(regs) ((regs->ecr_vec == ECR_V_TRAP) && regs->ecr_param)

-#define syscall_wont_restart(reg) (reg->state |= STATE_SCALL_RESTARTED)

-#define syscall_restartable(reg) !(reg->state & STATE_SCALL_RESTARTED)

-extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len);

-extern void read_decode_mmu_bcr(void);

-extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len);

-extern void read_decode_cache_bcr(void);

- struct task_struct *task; /* main task structure */

- __u32 cpu; /* current CPU */

- * macros/functions for gaining access to the thread information structure

- * preempt_count needs to be 1 initially, until the scheduler is functional.

- if (((unsigned long)to & 0x3) || ((unsigned long)from & 0x3)) {

-static inline unsigned long __arc_clear_user(void __user *to, unsigned long n)

-#ifndef CONFIG_CC_OPTIMIZE_FOR_SIZE

-#define __clear_user(d, n) __arc_clear_user(d, n)

-extern unsigned long arc_clear_user_noinline(void __user *to,

-#define __clear_user(d, n) arc_clear_user_noinline(d, n)

-ifdef CONFIG_ARC_DW2_UNWIND

-CFLAGS_ctx_sw.o += -fno-omit-frame-pointer

-obj-y += ctx_sw_asm.o

- DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));

- DEFINE(PT_event, offsetof(struct pt_regs, event));

- DEFINE(PT_user_r25, offsetof(struct pt_regs, user_r25));

- DEFINE(SZ_CALLEE_REGS, sizeof(struct callee_regs));

- DEFINE(SZ_PT_REGS, sizeof(struct pt_regs));

-// SPDX-License-Identifier: GPL-2.0-only

- * Vineetg: Aug 2009

- * -"C" version of lowest level context switch asm macro called by schedular

- * gcc doesn't generate the dward CFI info for hand written asm, hence can't

- * backtrace out of it (e.g. tasks sleeping in kernel).

- * So we cheat a bit by writing almost similar code in inline-asm.

- * -This is a hacky way of doing things, but there is no other simple way.

- * I don't want/intend to extend unwinding code to understand raw asm

-#include <asm/asm-offsets.h>

-#include <linux/sched.h>

-#include <linux/sched/debug.h>

-#define KSP_WORD_OFF ((TASK_THREAD + THREAD_KSP) / 4)

-struct task_struct *__sched

-__switch_to(struct task_struct *prev_task, struct task_struct *next_task)

- unsigned int prev = (unsigned int)prev_task;

- unsigned int next = (unsigned int)next_task;

- __asm__ __volatile__(

- /* FP/BLINK save generated by gcc (standard function prologue */

- "st.a r13, [sp, -4] \n\t"

- "st.a r14, [sp, -4] \n\t"

- "st.a r15, [sp, -4] \n\t"

- "st.a r16, [sp, -4] \n\t"

- "st.a r17, [sp, -4] \n\t"

- "st.a r18, [sp, -4] \n\t"

- "st.a r19, [sp, -4] \n\t"

- "st.a r20, [sp, -4] \n\t"

- "st.a r21, [sp, -4] \n\t"

- "st.a r22, [sp, -4] \n\t"

- "st.a r23, [sp, -4] \n\t"

- "st.a r24, [sp, -4] \n\t"

-#ifndef CONFIG_ARC_CURR_IN_REG

- "st.a r25, [sp, -4] \n\t"

- "sub sp, sp, 4 \n\t" /* usual r25 placeholder */

- /* set ksp of outgoing task in tsk->thread.ksp */

-#if KSP_WORD_OFF <= 255

- "st.as sp, [%3, %1] \n\t"

- * Workaround for NR_CPUS=4k

- * %1 is bigger than 255 (S9 offset for st.as)

- "add2 r24, %3, %1 \n\t"

- "st sp, [r24] \n\t"

- * setup _current_task with incoming tsk.

- * optionally, set r25 to that as well

- * For SMP extra work to get to &_current_task[cpu]

- * (open coded SET_CURR_TASK_ON_CPU)

- "st %2, [@_current_task] \n\t"

- "lr r24, [identity] \n\t"

- "lsr r24, r24, 8 \n\t"

- "bmsk r24, r24, 7 \n\t"

- "add2 r24, @_current_task, r24 \n\t"

- "st %2, [r24] \n\t"

-#ifdef CONFIG_ARC_CURR_IN_REG

- "mov r25, %2 \n\t"

- /* get ksp of incoming task from tsk->thread.ksp */

- "ld.as sp, [%2, %1] \n\t"

- /* start loading it's CALLEE reg file */

-#ifndef CONFIG_ARC_CURR_IN_REG

- "ld.ab r25, [sp, 4] \n\t"

- "add sp, sp, 4 \n\t"

- "ld.ab r24, [sp, 4] \n\t"

- "ld.ab r23, [sp, 4] \n\t"

- "ld.ab r22, [sp, 4] \n\t"

- "ld.ab r21, [sp, 4] \n\t"

- "ld.ab r20, [sp, 4] \n\t"

- "ld.ab r19, [sp, 4] \n\t"

- "ld.ab r18, [sp, 4] \n\t"

- "ld.ab r17, [sp, 4] \n\t"

- "ld.ab r16, [sp, 4] \n\t"

- "ld.ab r15, [sp, 4] \n\t"

- "ld.ab r14, [sp, 4] \n\t"

- "ld.ab r13, [sp, 4] \n\t"

- /* last (ret value) = prev : although for ARC it mov r0, r0 */

- /* FP/BLINK restore generated by gcc (standard func epilogue */

- : "n"(KSP_WORD_OFF), "r"(next), "r"(prev)

- return (struct task_struct *)tmp;

-#define KSP_WORD_OFF ((TASK_THREAD + THREAD_KSP) / 4)

-;################### Low Level Context Switch ##########################

- .global __switch_to

- .type __switch_to, @function

- /* Save regs on kernel mode stack of task */

- st.a blink, [sp, -4]

- SAVE_CALLEE_SAVED_KERNEL

- /* Save the now KSP in task->thread.ksp */

-#if KSP_WORD_OFF <= 255

- st.as sp, [r0, KSP_WORD_OFF]

- /* Workaround for NR_CPUS=4k as ST.as can only take s9 offset */

- add2 r24, r0, KSP_WORD_OFF

- * Return last task in r0 (return reg)

- * On ARC, Return reg = First Arg reg = r0.

- * Since we already have last task in r0,

- * don't need to do anything special to return it

- * switch to new task, contained in r1

- * Temp reg r3 is required to get the ptr to store val

- SET_CURR_TASK_ON_CPU r1, r3

- /* reload SP with kernel mode stack pointer in task->thread.ksp */

- ld.as sp, [r1, (TASK_THREAD + THREAD_KSP)/4]

- /* restore the registers */

- ld.ab blink, [sp, 4]

- FAKE_RET_FROM_EXCPN

- lr r0, [efa] ; Faulting Data address

- FAKE_RET_FROM_EXCPN

- lr r0, [efa] ; Faulting Data address

- mov r1, sp ; pt_regs

- FAKE_RET_FROM_EXCPN

- EXCEPTION_PROLOGUE

- mov r2, r10 ; ECR set into r10 already

- lr r0, [efa] ; Faulting Data address (not part of pt_regs saved above)

- ; Exception auto-disables further Intr/exceptions.

- ; Re-enable them by pretending to return from exception

- ; (so rest of handler executes in pure K mode)

- FAKE_RET_FROM_EXCPN

- mov r1, sp ; Handle to pt_regs

- bbit1 r2, ECR_C_BIT_PROTV_MISALIG_DATA, 4f

- lr r0, [efa] ; Faulting Data address

- FAKE_RET_FROM_EXCPN

- EXCEPTION_PROLOGUE

- FAKE_RET_FROM_EXCPN

- ; save EFA in case tracer wants the PC of traced task

- ; using ERET won't work since next-PC has already committed

- ; PRE Sys Call Ptrace hook

- mov r0, sp ; pt_regs needed

- bl @syscall_trace_entry

- ; Validate the Sys Call number

- jl [r9] ; Entry into Sys Call Handler

- st r0, [sp, PT_r0] ; sys call return value in pt_regs

- ;POST Sys Call Ptrace Hook

- b ret_from_exception ; NOT ret_from_system_call at is saves r0 which

- ; we'd done before calling post hook above

- ; Save callee regs in case gdb wants to have a look

- ; SP will grow up by size of CALLEE Reg-File

- ; NOTE: clobbers r12

- ; save location of saved Callee Regs @ thread_struct->pc

- ; Call the trap handler

- ; unwind stack to discard Callee saved Regs

- EXCEPTION_PROLOGUE

- ;============ TRAP 1 :breakpoints

- ; Check ECR for trap with arg (PROLOGUE ensures r10 has ECR)

- ;============ TRAP (no param): syscall top level

- ; If syscall tracing ongoing, invoke pre-post-hooks

- ; syscall num shd not exceed the total system calls avail

- ; Offset into the syscall_table and call handler

- jl [r9] ; Entry into Sys Call Handler

- SAVE_CALLEE_SAVED_USER ; clobbers r12

-void arcv2_irq_enable(struct irq_data *data)

- if (regs->ecr_param == 3)

- cpuinfo_arc700[0].extn.gfrc = mp.gfrc;

- * | r25 | <==== top of Stack (thread.ksp)

- * __switch_to() uses thread.ksp to start unwinding stack

- p->thread.ksp = (unsigned long)c_callee; /* THREAD_KSP */

-#ifdef CONFIG_ARC_CURR_IN_REG

- * setup usermode thread pointer #2:

- * however for this special use of r25 in kernel, __switch_to() sets

- * r25 for kernel needs and only in the final return path is usermode

- * r25 setup, from pt_regs->user_r25. So set that up as well

- c_regs->user_r25 = c_callee->r25;

- REG_OFFSET_NAME(event),

- REG_OFFSET_NAME(user_r25),

- REG_OFFSET_NAME(event),

- REG_OFFSET_NAME(user_r25),

-asmlinkage int syscall_trace_entry(struct pt_regs *regs)

-struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];

-static const struct id_to_str arc_legacy_rel[] = {

-#ifdef CONFIG_ISA_ARCOMPACT

-static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)

- if (is_isa_arcompact()) {

- struct bcr_iccm_arcompact iccm;

- struct bcr_dccm_arcompact dccm;

- READ_BCR(ARC_REG_ICCM_BUILD, iccm);

- cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */

- cpu->iccm.base_addr = iccm.base << 16;

- READ_BCR(ARC_REG_DCCM_BUILD, dccm);

- unsigned long base;

- cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */

- base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);

- cpu->dccm.base_addr = base & ~0xF;

- struct bcr_iccm_arcv2 iccm;

- struct bcr_dccm_arcv2 dccm;

- unsigned long region;

- READ_BCR(ARC_REG_ICCM_BUILD, iccm);

- cpu->iccm.sz = 256 << iccm.sz00; /* 512B to 16M */

- if (iccm.sz00 == 0xF && iccm.sz01 > 0)

- cpu->iccm.sz <<= iccm.sz01;

- region = read_aux_reg(ARC_REG_AUX_ICCM);

- cpu->iccm.base_addr = region & 0xF0000000;

- READ_BCR(ARC_REG_DCCM_BUILD, dccm);

- cpu->dccm.sz = 256 << dccm.sz0;

- if (dccm.sz0 == 0xF && dccm.sz1 > 0)

- cpu->dccm.sz <<= dccm.sz1;

- region = read_aux_reg(ARC_REG_AUX_DCCM);

- cpu->dccm.base_addr = region & 0xF0000000;

-static void decode_arc_core(struct cpuinfo_arc *cpu)

- struct bcr_uarch_build_arcv2 uarch;

- const struct id_to_str *tbl;

- if (cpu->core.family < 0x54) { /* includes arc700 */

- for (tbl = &arc_legacy_rel[0]; tbl->id != 0; tbl++) {

- if (cpu->core.family == tbl->id) {

- cpu->release = tbl->str;

- if (is_isa_arcompact())

- cpu->name = "ARC700";

- else if (tbl->str)

- cpu->name = "HS38";

- cpu->name = cpu->release = "Unknown";

- * Initial HS cores bumped AUX IDENTITY.ARCVER for each release until

- * ARCVER 0x54 which introduced AUX MICRO_ARCH_BUILD and subsequent

- * releases only update it.

- READ_BCR(ARC_REG_MICRO_ARCH_BCR, uarch);

- if (uarch.prod == 4) {

- cpu->name = "HS48";

- cpu->extn.dual = 1;

- cpu->name = "HS38";

- for (tbl = &arc_hs_ver54_rel[0]; tbl->id != 0xFF; tbl++) {

- if (uarch.maj == tbl->id) {

- cpu->release = tbl->str;

-static void read_arc_build_cfg_regs(void)

- struct bcr_timer timer;

- struct bcr_generic bcr;

- struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];

- struct bcr_actionpoint ap;

- READ_BCR(AUX_IDENTITY, cpu->core);

- decode_arc_core(cpu);

- READ_BCR(ARC_REG_TIMERS_BCR, timer);

- cpu->extn.timer0 = timer.t0;

- cpu->extn.timer1 = timer.t1;

- cpu->extn.rtc = timer.rtc;

- cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);

- READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);

- /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */

- read_decode_ccm_bcr(cpu);

- read_decode_mmu_bcr();

- read_decode_cache_bcr();

- if (is_isa_arcompact()) {

- struct bcr_fp_arcompact sp, dp;

- struct bcr_bpu_arcompact bpu;

- READ_BCR(ARC_REG_FP_BCR, sp);

- READ_BCR(ARC_REG_DPFP_BCR, dp);

- cpu->extn.fpu_sp = sp.ver ? 1 : 0;

- cpu->extn.fpu_dp = dp.ver ? 1 : 0;

- READ_BCR(ARC_REG_BPU_BCR, bpu);

- cpu->bpu.ver = bpu.ver;

- cpu->bpu.full = bpu.fam ? 1 : 0;

- cpu->bpu.num_cache = 256 << (bpu.ent - 1);

- cpu->bpu.num_pred = 256 << (bpu.ent - 1);

- struct bcr_fp_arcv2 spdp;

- struct bcr_bpu_arcv2 bpu;

- READ_BCR(ARC_REG_FP_V2_BCR, spdp);

- cpu->extn.fpu_sp = spdp.sp ? 1 : 0;

- cpu->extn.fpu_dp = spdp.dp ? 1 : 0;

- READ_BCR(ARC_REG_BPU_BCR, bpu);

- cpu->bpu.ver = bpu.ver;

- cpu->bpu.full = bpu.ft;

- cpu->bpu.num_cache = 256 << bpu.bce;

- cpu->bpu.num_pred = 2048 << bpu.pte;

- cpu->bpu.ret_stk = 4 << bpu.rse;

- /* if dual issue hardware, is it enabled ? */

- if (cpu->extn.dual) {

- cpu->extn.dual_enb = !(exec_ctrl & 1);

- READ_BCR(ARC_REG_AP_BCR, ap);

- cpu->extn.ap_num = 2 << ap.num;

- cpu->extn.ap_full = !ap.min;

- READ_BCR(ARC_REG_SMART_BCR, bcr);

- cpu->extn.smart = bcr.ver ? 1 : 0;

- READ_BCR(ARC_REG_RTT_BCR, bcr);

- cpu->extn.rtt = bcr.ver ? 1 : 0;

- /* some hacks for lack of feature BCR info in old ARC700 cores */

- if (is_isa_arcompact()) {

- if (!isa.ver) /* ISA BCR absent, use Kconfig info */

- cpu->isa.atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);

- /* ARC700_BUILD only has 2 bits of isa info */

- struct bcr_generic bcr = *(struct bcr_generic *)&isa;

- cpu->isa.atomic = bcr.info & 1;

- cpu->isa.be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);

- /* there's no direct way to distinguish 750 vs. 770 */

- if (unlikely(cpu->core.family < 0x34 || cpu->mmu.ver < 3))

- cpu->name = "ARC750";

-static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)

- struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];

- struct bcr_identity *core = &cpu->core;

- n += scnprintf(buf + n, len - n,

- "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",

- core->family, core->cpu_id, core->chip_id);

- n += scnprintf(buf + n, len - n, "processor [%d]\t: %s %s (%s ISA) %s%s%s\n",

- cpu_id, cpu->name, cpu->release,

- is_isa_arcompact() ? "ARCompact" : "ARCv2",

- IS_AVAIL1(cpu->isa.be, "[Big-Endian]"),

- IS_AVAIL3(cpu->extn.dual, cpu->extn.dual_enb, " Dual-Issue "));

- n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s%s%s\nISA Extn\t: ",

- IS_AVAIL1(cpu->extn.timer0, "Timer0 "),

- IS_AVAIL1(cpu->extn.timer1, "Timer1 "),

- IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_TIMERS_64BIT),

- IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_TIMERS_64BIT));

- if (cpu->extn_mpy.ver) {

- if (is_isa_arcompact()) {

- scnprintf(mpy_opt, 16, "mpy");

- int opt = 2; /* stock MPY/MPYH */

- if (cpu->extn_mpy.dsp) /* OPT 7-9 */

- opt = cpu->extn_mpy.dsp + 6;

- scnprintf(mpy_opt, 16, "mpy[opt %d] ", opt);

- n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",

- IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),

- IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),

- IS_AVAIL2(cpu->isa.unalign, "unalign ", CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS),

- IS_AVAIL1(cpu->extn_mpy.ver, mpy_opt),

- IS_AVAIL1(cpu->isa.div_rem, "div_rem "));

- if (cpu->bpu.ver) {

- n += scnprintf(buf + n, len - n,

- "BPU\t\t: %s%s match, cache:%d, Predict Table:%d Return stk: %d",

- IS_AVAIL1(cpu->bpu.full, "full"),

- IS_AVAIL1(!cpu->bpu.full, "partial"),

- cpu->bpu.num_cache, cpu->bpu.num_pred, cpu->bpu.ret_stk);

- if (is_isa_arcv2()) {

- struct bcr_lpb lpb;

- READ_BCR(ARC_REG_LPB_BUILD, lpb);

- ctl = read_aux_reg(ARC_REG_LPB_CTRL);

- n += scnprintf(buf + n, len - n, " Loop Buffer:%d %s",

- IS_DISABLED_RUN(!ctl));

- n += scnprintf(buf + n, len - n, "\n");

-static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)

- struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];

- n += scnprintf(buf + n, len - n, "Vector Table\t: %#x\n", cpu->vec_base);

- if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)

- n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",

- IS_AVAIL1(cpu->extn.fpu_sp, "SP "),

- IS_AVAIL1(cpu->extn.fpu_dp, "DP "));

- if (cpu->extn.ap_num | cpu->extn.smart | cpu->extn.rtt) {

- IS_AVAIL1(cpu->extn.smart, "smaRT "),

- IS_AVAIL1(cpu->extn.rtt, "RTT "));

- if (cpu->extn.ap_num) {

- cpu->extn.ap_full ? "full":"min");

- if (cpu->dccm.sz || cpu->iccm.sz)

- n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",

- cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),

- cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));

- if (is_isa_arcv2()) {

- /* Error Protection: ECC/Parity */

- struct bcr_erp erp;

- READ_BCR(ARC_REG_ERP_BUILD, erp);

- struct ctl_erp ctl;

- READ_BCR(ARC_REG_ERP_CTRL, ctl);

- /* inverted bits: 0 means enabled */

- n += scnprintf(buf + n, len - n, "Extn [ECC]\t: %s%s%s%s%s%s\n",

- IS_AVAIL3(erp.ic, !ctl.dpi, "IC "),

- IS_AVAIL3(erp.dc, !ctl.dpd, "DC "),

- IS_AVAIL3(erp.mmu, !ctl.mpd, "MMU "));

-static void arc_chk_core_config(void)

- struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];

- if (!cpu->extn.timer0)

- if (!cpu->extn.timer1)

- if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)

- if (CONFIG_ARC_DCCM_SZ * SZ_1K != cpu->dccm.sz)

- if (CONFIG_ARC_ICCM_SZ * SZ_1K != cpu->iccm.sz)

- * FP hardware/software config sanity

- * -If hardware present, kernel needs to save/restore FPU state

- * -If not, it will crash trying to save/restore the non-existant regs

- if (is_isa_arcompact()) {

- /* only DPDP checked since SP has no arch visible regs */

- present = cpu->extn.fpu_dp;

- CHK_OPT_STRICT(CONFIG_ARC_FPU_SAVE_RESTORE, present);

- /* Accumulator Low:High pair (r58:59) present if DSP MPY or FPU */

- present = cpu->extn_mpy.dsp | cpu->extn.fpu_sp | cpu->extn.fpu_dp;

- CHK_OPT_STRICT(CONFIG_ARC_HAS_ACCL_REGS, present);

- dsp_config_check();

- int cpu_id = smp_processor_id();

- read_arc_build_cfg_regs();

- pr_info("%s", arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));

- pr_info("%s", arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));

- pr_info("%s", arc_platform_smp_cpuinfo());

- arc_chk_core_config();

- seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));

- seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));

- seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));

- seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));

-#include <asm/processor.h>

-#include <asm/setup.h>

-irqreturn_t do_IPI(int irq, void *dev_id)

- unsigned int param = regs->ecr_param;

- vec = regs->ecr_vec;

- cause_code = regs->ecr_cause;

- if (regs->ecr_param == 5)

- pr_info("ECR: 0x%08lx EFA: 0x%08lx ERET: 0x%08lx\nSTAT: 0x%08lx",

- regs->event, current->thread.fault_address, regs->ret,

- PREFETCHW_INSTR r0, 0 ; Prefetch the first write location

-char *arc_cache_mumbojumbo(int c, char *buf, int len)

- struct cpuinfo_arc_cache *p;

-#define PR_CACHE(p, cfg, str) \

- if (!(p)->line_len) \

- n += scnprintf(buf + n, len - n, str"\t\t: N/A\n"); \

- n += scnprintf(buf + n, len - n, \

- str"\t\t: %uK, %dway/set, %uB Line, %s%s%s\n", \

- (p)->sz_k, (p)->assoc, (p)->line_len, \

- (p)->vipt ? "VIPT" : "PIPT", \

- (p)->alias ? " aliasing" : "", \

- IS_USED_CFG(cfg));

- PR_CACHE(&cpuinfo_arc700[c].icache, CONFIG_ARC_HAS_ICACHE, "I-Cache");

- PR_CACHE(&cpuinfo_arc700[c].dcache, CONFIG_ARC_HAS_DCACHE, "D-Cache");

- p = &cpuinfo_arc700[c].slc;

- n += scnprintf(buf + n, len - n,

- "SLC\t\t: %uK, %uB Line%s\n",

- p->sz_k, p->line_len, IS_USED_RUN(slc_enable));

- n += scnprintf(buf + n, len - n, "Peripherals\t: %#lx%s%s\n",

- IS_AVAIL3(ioc_exists, ioc_enable, ", IO-Coherency (per-device) "));

- * Read the Cache Build Confuration Registers, Decode them and save into

- * the cpuinfo structure for later use.

- * No Validation done here, simply read/convert the BCRs

-static void read_decode_cache_bcr_arcv2(int cpu)

- struct cpuinfo_arc_cache *p_slc = &cpuinfo_arc700[cpu].slc;

- struct bcr_slc_cfg {

-#ifdef CONFIG_CPU_BIG_ENDIAN

- unsigned int pad:24, way:2, lsz:2, sz:4;

- unsigned int sz:4, lsz:2, way:2, pad:24;

- struct bcr_clust_cfg {

-#ifdef CONFIG_CPU_BIG_ENDIAN

- unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;

- unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7;

- struct bcr_volatile {

-#ifdef CONFIG_CPU_BIG_ENDIAN

- unsigned int start:4, limit:4, pad:22, order:1, disable:1;

- unsigned int disable:1, order:1, pad:22, limit:4, start:4;

- if (cpuinfo_arc700[cpu].core.family > 0x51) {

- if (cpuinfo_arc700[cpu].core.family > 0x52)

-void read_decode_cache_bcr(void)

- struct cpuinfo_arc_cache *p_ic, *p_dc;

- unsigned int cpu = smp_processor_id();

- struct bcr_cache {

-#ifdef CONFIG_CPU_BIG_ENDIAN

- unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;

- unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;

- p_ic = &cpuinfo_arc700[cpu].icache;

- if (ibcr.ver <= 3) {

- p_ic->assoc = 2; /* Fixed to 2w set assoc */

- } else if (ibcr.ver >= 4) {

- p_ic->assoc = 1 << ibcr.config; /* 1,2,4,8 */

- p_ic->alias = p_ic->sz_k/p_ic->assoc/TO_KB(PAGE_SIZE) > 1;

- p_dc = &cpuinfo_arc700[cpu].dcache;

- if (dbcr.ver <= 3) {

- p_dc->assoc = 4; /* Fixed to 4w set assoc */

- p_dc->alias = p_dc->sz_k/p_dc->assoc/TO_KB(PAGE_SIZE) > 1;

- } else if (dbcr.ver >= 4) {

- p_dc->assoc = 1 << dbcr.config; /* 1,2,4,8 */

- p_dc->alias = 0; /* PIPT so can't VIPT alias */

- read_decode_cache_bcr_arcv2(cpu);

-noinline void slc_op_rgn(phys_addr_t paddr, unsigned long sz, const int op)

-noinline void slc_op_line(phys_addr_t paddr, unsigned long sz, const int op)

-void flush_dcache_page(struct page *page)

- clear_bit(PG_dc_clean, &page->flags);

- mapping = page_mapping_file(page);

- clear_bit(PG_dc_clean, &page->flags);

- } else if (page_mapcount(page)) {

- phys_addr_t paddr = (unsigned long)page_address(page);

- unsigned long vaddr = page->index << PAGE_SHIFT;

- __flush_dcache_page(paddr, vaddr);

-void __inv_icache_page(phys_addr_t paddr, unsigned long vaddr)

- __ic_line_inv_vaddr(paddr, vaddr, PAGE_SIZE);

-void __flush_dcache_page(phys_addr_t paddr, unsigned long vaddr)

- __dc_line_op(paddr, vaddr & PAGE_MASK, PAGE_SIZE, OP_FLUSH_N_INV);

- __flush_dcache_page(paddr, u_vaddr);

- __inv_icache_page(paddr, u_vaddr);

- __flush_dcache_page((phys_addr_t)page_address(page), u_vaddr);

- __flush_dcache_page((phys_addr_t)page_address(page),

- (phys_addr_t)page_address(page));

- __flush_dcache_page((unsigned long)kfrom, u_vaddr);

- clear_bit(PG_dc_clean, &to->flags);

- __flush_dcache_page((unsigned long)kfrom, (unsigned long)kfrom);

- set_bit(PG_dc_clean, &from->flags);

- clear_bit(PG_dc_clean, &from->flags);

- clear_bit(PG_dc_clean, &page->flags);

-noinline void __init arc_ioc_setup(void)

-void __init arc_cache_init_master(void)

- unsigned int __maybe_unused cpu = smp_processor_id();

- struct cpuinfo_arc_cache *ic = &cpuinfo_arc700[cpu].icache;

- if (is_isa_arcv2() && ic->alias)

- struct cpuinfo_arc_cache *dc = &cpuinfo_arc700[cpu].dcache;

- int num_colors = dc->sz_k/dc->assoc/TO_KB(PAGE_SIZE);

- if (CACHE_COLORS_NUM != num_colors)

- } else if (!dc->alias && handled) {

- pr_info("%s", arc_cache_mumbojumbo(0, str, sizeof(str)));

-#ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE

-unsigned long arc_clear_user_noinline(void __user *to,

- return __arc_clear_user(to, n);

-EXPORT_SYMBOL(arc_clear_user_noinline);

- if (regs->ecr_cause & ECR_C_PROTV_STORE) /* ST/EX */

- else if ((regs->ecr_vec == ECR_V_PROTV) &&

- (regs->ecr_cause == ECR_C_PROTV_INST_FETCH))

-#include <linux/slab.h>

- /* Don't allow wraparound or zero size */

- end = paddr + size - 1;

- if (!size || (end < paddr))

-void __iomem *ioremap_prot(phys_addr_t paddr, unsigned long size,

- unsigned long vaddr;

- struct vm_struct *area;

- /* Don't allow wraparound, zero size */

- end = paddr + size - 1;

- if ((!size) || (end < paddr))

- /* An early platform driver might end up here */

- if (!slab_is_available())

- prot = pgprot_noncached(prot);

- /* Mappings have to be page-aligned */

- off = paddr & ~PAGE_MASK;

- paddr &= PAGE_MASK_PHYS;

- size = PAGE_ALIGN(end + 1) - paddr;

- area = get_vm_area(size, VM_IOREMAP);

- area->phys_addr = paddr;

- vaddr = (unsigned long)area->addr;

- if (ioremap_page_range(vaddr, vaddr + size, paddr, prot)) {

- vunmap((void __force *)vaddr);

- return (void __iomem *)(off + (char __iomem *)vaddr);

-void iounmap(const volatile void __iomem *addr)

- vfree((void *)(PAGE_MASK & (unsigned long __force)addr));

-static int __read_mostly pae_exists;

- struct cpuinfo_arc_mmu *mmu = &cpuinfo_arc700[smp_processor_id()].mmu;

-void create_tlb(struct vm_area_struct *vma, unsigned long vaddr, pte_t *ptep)

-void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr_unaligned,

- int dirty = !test_and_set_bit(PG_dc_clean, &page->flags);

- __flush_dcache_page(paddr, paddr);

- __inv_icache_page(paddr, vaddr);

- update_mmu_cache(vma, addr, &pte);

-void read_decode_mmu_bcr(void)

- struct cpuinfo_arc_mmu *mmu = &cpuinfo_arc700[smp_processor_id()].mmu;

- struct bcr_mmu_3 {

-#ifdef CONFIG_CPU_BIG_ENDIAN

- unsigned int ver:8, ways:4, sets:4, res:3, sasid:1, pg_sz:4,

- u_itlb:4, u_dtlb:4;

- unsigned int u_dtlb:4, u_itlb:4, pg_sz:4, sasid:1, res:3, sets:4,

- struct bcr_mmu_4 {

-#ifdef CONFIG_CPU_BIG_ENDIAN

- unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1,

- n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3;

- /* DTLB ITLB JES JE JA */

- unsigned int u_dtlb:3, u_itlb:3, n_super:2, n_entry:2, n_ways:2,

- pae:1, res:2, sz0:4, sz1:4, sasid:1, ver:8;

- tmp = read_aux_reg(ARC_REG_MMU_BCR);

- mmu->ver = (tmp >> 24);

- mmu3 = (struct bcr_mmu_3 *)&tmp;

- mmu->u_dtlb = mmu3->u_dtlb;

- mmu->u_itlb = mmu3->u_itlb;

- mmu->sasid = mmu3->sasid;

- mmu4 = (struct bcr_mmu_4 *)&tmp;

- mmu->u_dtlb = mmu4->u_dtlb * 4;

- mmu->u_itlb = mmu4->u_itlb * 4;

- mmu->sasid = mmu4->sasid;

- pae_exists = mmu->pae = mmu4->pae;

-char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len)

- struct cpuinfo_arc_mmu *p_mmu = &cpuinfo_arc700[cpu_id].mmu;

- char super_pg[64] = "";

- if (p_mmu->s_pg_sz_m)

- scnprintf(super_pg, 64, "%dM Super Page %s",

- IS_USED_CFG(CONFIG_TRANSPARENT_HUGEPAGE));

- "MMU [v%x]\t: %dk PAGE, %s, swalk %d lvl, JTLB %d (%dx%d), uDTLB %d, uITLB %d%s%s\n",

- p_mmu->ver, p_mmu->pg_sz_k, super_pg, CONFIG_PGTABLE_LEVELS,

- p_mmu->sets * p_mmu->ways, p_mmu->sets, p_mmu->ways,

- p_mmu->u_dtlb, p_mmu->u_itlb,

- IS_AVAIL2(p_mmu->pae, ", PAE40 ", CONFIG_ARC_HAS_PAE40));

- return pae_exists && !is_pae40_enabled();

- struct cpuinfo_arc_mmu *mmu = &cpuinfo_arc700[smp_processor_id()].mmu;

- pr_info("%s", arc_mmu_mumbojumbo(0, str, sizeof(str)));

- struct cpuinfo_arc_mmu *mmu = &cpuinfo_arc700[smp_processor_id()].mmu;

-#include <linux/of_platform.h>

- bool "Patch physical to virtual translations at runtime" if EMBEDDED

- bool "Kexec system call (EXPERIMENTAL)"

- depends on (!SMP || PM_SLEEP_SMP)

- kexec is a system call that implements the ability to shutdown your

- current kernel, and to start another kernel. It is like a reboot

- but it is independent of the system firmware. And like a reboot

- you can start any kernel with it, not just Linux.

- It is an ongoing process to be certain the hardware in a machine

- is properly shutdown, so do not be surprised if this code does not

- initially work for you.

- bool "Build kdump crash kernel (EXPERIMENTAL)"

- Generate crash dump after being started by kexec. This should

- be normally only set in special crash dump kernels which are

- loaded in the main kernel with kexec-tools into a specially

- reserved region and then later executed after a crash by

- kdump/kexec. The crash dump kernel must be compiled to a

- memory address not used by the main kernel

- For more details see Documentation/admin-guide/kdump/kdump.rst

diff --git a/arch/arm/boot/dts/allwinner/sun8i-t113s-mangopi-mq-r-t113.dts b/arch/arm/boot/dts/allwinner/sun8i-t113s-mangopi-mq-r-t113.dts
index 94e24b5926dd..8b3a75383816 100644
--- a/arch/arm/boot/dts/allwinner/sun8i-t113s-mangopi-mq-r-t113.dts
+++ b/arch/arm/boot/dts/allwinner/sun8i-t113s-mangopi-mq-r-t113.dts

-// SPDX-License-Identifier: (GPL-2.0+ or MIT)

diff --git a/arch/arm/boot/dts/allwinner/sunxi-d1s-t113-mangopi-mq-r.dtsi b/arch/arm/boot/dts/allwinner/sunxi-d1s-t113-mangopi-mq-r.dtsi
index e9bc749488bb..a415c4a78a70 100644
--- a/arch/arm/boot/dts/allwinner/sunxi-d1s-t113-mangopi-mq-r.dtsi
+++ b/arch/arm/boot/dts/allwinner/sunxi-d1s-t113-mangopi-mq-r.dtsi

-// SPDX-License-Identifier: (GPL-2.0+ or MIT)

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
index 1e0e88465254..0715cb9ab30c 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts

- io-channels = <&adc0 0>;

- io-channels = <&adc0 1>;

- io-channels = <&adc0 2>;

- io-channels = <&adc0 3>;

- io-channels = <&adc0 4>;

- io-channels = <&adc0 5>;

- io-channels = <&adc0 6>;

- io-channels = <&adc0 7>;

- io-channels = <&adc1 0>;

- io-channels = <&adc1 1>;

- io-channels = <&adc1 2>;

- io-channels = <&adc1 3>;

- io-channels = <&adc1 4>;

- io-channels = <&adc1 5>;

- io-channels = <&adc1 6>;

- io-channels = <&adc1 7>;

- io-channels = <&adc0mux 0>, <&adc0mux 1>,

- <&adc1mux 0>, <&adc1mux 1>,

- <&adc2mux 0>, <&adc2mux 1>,

- <&adc3mux 0>, <&adc3mux 1>,

- <&adc4mux 0>, <&adc4mux 1>,

- <&adc5mux 0>, <&adc5mux 1>,

- <&adc6mux 0>, <&adc6mux 1>,

- <&adc7mux 0>, <&adc7mux 1>,

- <&adc8mux 0>, <&adc8mux 1>,

- <&adc9mux 0>, <&adc9mux 1>,

- <&adc10mux 0>, <&adc10mux 1>,

- <&adc11mux 0>, <&adc11mux 1>,

- <&adc12mux 0>, <&adc12mux 1>,

- <&adc13mux 0>, <&adc13mux 1>,

- <&adc14mux 0>, <&adc14mux 1>,

- <&adc15mux 0>, <&adc15mux 1>,

- <&adc_i2c 0>, <&adc_i2c 1>,

- <&adc_i2c 2>, <&adc_i2c 3>,

- <&adc_i2c 4>, <&adc_i2c 5>,

- <&adc_i2c 6>, <&adc_i2c 7>,

- <&adc_i2c 8>, <&adc_i2c 9>,

- <&adc_i2c 10>, <&adc_i2c 11>,

- <&adc_i2c 12>, <&adc_i2c 13>,

- <&adc_i2c 14>, <&adc_i2c 15>;

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-bytedance-g220a.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-bytedance-g220a.dts
index f75cad41ae6f..3f03a198a1a8 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-bytedance-g220a.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-bytedance-g220a.dts

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cloudripper.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cloudripper.dts
index 5cd060029ea9..d49328fa487a 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cloudripper.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cloudripper.dts

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cmm.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cmm.dts
index 90a3f485c67a..24153868cc00 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cmm.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cmm.dts

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts
index b5cd4c7800b0..74f3c67e0eff 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts
index 6b319f34a9b9..f23c26a3441d 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minipack.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minipack.dts
index 230d16cd9967..aafd1042b6e5 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minipack.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minipack.dts

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-tiogapass.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-tiogapass.dts
index b6b16356f571..704ee684e0fb 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-tiogapass.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-tiogapass.dts

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge100.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge100.dts
index 584efa528450..97cd11c3d9a5 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge100.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge100.dts

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts
index ed305948386f..a677c827e758 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts

- io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>;

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yamp.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yamp.dts
index 5e6105874217..98fe0d6c8188 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yamp.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yamp.dts

- i2c100 = &cfam0_i2c0;

- i2c101 = &cfam0_i2c1;

- i2c110 = &cfam0_i2c10;

- i2c111 = &cfam0_i2c11;

- i2c112 = &cfam0_i2c12;

- i2c113 = &cfam0_i2c13;

- i2c114 = &cfam0_i2c14;

- i2c115 = &cfam0_i2c15;

- i2c202 = &cfam1_i2c2;

- i2c203 = &cfam1_i2c3;

- i2c210 = &cfam1_i2c10;

- i2c211 = &cfam1_i2c11;

- i2c214 = &cfam1_i2c14;

- i2c215 = &cfam1_i2c15;

- i2c216 = &cfam1_i2c16;

- i2c217 = &cfam1_i2c17;

- spi10 = &cfam0_spi0;

- spi11 = &cfam0_spi1;

- spi12 = &cfam0_spi2;

- spi13 = &cfam0_spi3;

- spi20 = &cfam1_spi0;

- spi21 = &cfam1_spi1;

- spi22 = &cfam1_spi2;

- spi23 = &cfam1_spi3;

- #address-cells = <2>;

- #size-cells = <0>;

- cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;

- #address-cells = <1>;

- #size-cells = <1>;

- compatible = "ibm,fsi2pib";

- reg = <0x1000 0x400>;

- compatible = "ibm,fsi-i2c-master";

- reg = <0x1800 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam0_i2c0: i2c-bus@0 {

- reg = <0>; /* OMI01 */

- cfam0_i2c1: i2c-bus@1 {

- reg = <1>; /* OMI23 */

- cfam0_i2c10: i2c-bus@a {

- reg = <10>; /* OP3A */

- cfam0_i2c11: i2c-bus@b {

- reg = <11>; /* OP3B */

- cfam0_i2c12: i2c-bus@c {

- reg = <12>; /* OP4A */

- cfam0_i2c13: i2c-bus@d {

- reg = <13>; /* OP4B */

- cfam0_i2c14: i2c-bus@e {

- reg = <14>; /* OP5A */

- cfam0_i2c15: i2c-bus@f {

- reg = <15>; /* OP5B */

- compatible = "ibm,fsi2spi";

- reg = <0x1c00 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam0_spi0: spi@0 {

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam0_spi1: spi@20 {

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam0_spi2: spi@40 {

- compatible = "ibm,fsi2spi-restricted";

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam0_spi3: spi@60 {

- compatible = "ibm,fsi2spi-restricted";

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- compatible = "ibm,p9-sbefifo";

- reg = <0x2400 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- compatible = "ibm,p10-occ";

- compatible = "ibm,p10-occ-hwmon";

- ibm,no-poll-on-init;

- fsi_hub0: hub@3400 {

- compatible = "fsi-master-hub";

- reg = <0x3400 0x400>;

- #address-cells = <2>;

- #size-cells = <0>;

- #address-cells = <1>;

- #size-cells = <1>;

- compatible = "ibm,fsi2pib";

- reg = <0x1000 0x400>;

- compatible = "ibm,fsi-i2c-master";

- reg = <0x1800 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam1_i2c2: i2c-bus@2 {

- reg = <2>; /* OMI45 */

- cfam1_i2c3: i2c-bus@3 {

- reg = <3>; /* OMI67 */

- cfam1_i2c10: i2c-bus@a {

- reg = <10>; /* OP3A */

- cfam1_i2c11: i2c-bus@b {

- reg = <11>; /* OP3B */

- cfam1_i2c14: i2c-bus@e {

- reg = <14>; /* OP5A */

- cfam1_i2c15: i2c-bus@f {

- reg = <15>; /* OP5B */

- cfam1_i2c16: i2c-bus@10 {

- reg = <16>; /* OP6A */

- cfam1_i2c17: i2c-bus@11 {

- reg = <17>; /* OP6B */

- compatible = "ibm,fsi2spi";

- reg = <0x1c00 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam1_spi0: spi@0 {

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam1_spi1: spi@20 {

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam1_spi2: spi@40 {

- compatible = "ibm,fsi2spi-restricted";

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam1_spi3: spi@60 {

- compatible = "ibm,fsi2spi-restricted";

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- compatible = "ibm,p9-sbefifo";

- reg = <0x2400 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- compatible = "ibm,p10-occ";

- compatible = "ibm,p10-occ-hwmon";

- ibm,no-poll-on-init;

- fsi_hub1: hub@3400 {

- compatible = "fsi-master-hub";

- reg = <0x3400 0x400>;

- #address-cells = <2>;

- #size-cells = <0>;

- i2c100 = &cfam0_i2c0;

- i2c101 = &cfam0_i2c1;

- i2c110 = &cfam0_i2c10;

- i2c111 = &cfam0_i2c11;

- i2c112 = &cfam0_i2c12;

- i2c113 = &cfam0_i2c13;

- i2c114 = &cfam0_i2c14;

- i2c115 = &cfam0_i2c15;

- i2c202 = &cfam1_i2c2;

- i2c203 = &cfam1_i2c3;

- i2c210 = &cfam1_i2c10;

- i2c211 = &cfam1_i2c11;

- i2c214 = &cfam1_i2c14;

- i2c215 = &cfam1_i2c15;

- i2c216 = &cfam1_i2c16;

- i2c217 = &cfam1_i2c17;

- i2c300 = &cfam2_i2c0;

- i2c301 = &cfam2_i2c1;

- i2c310 = &cfam2_i2c10;

- i2c311 = &cfam2_i2c11;

- i2c312 = &cfam2_i2c12;

- i2c313 = &cfam2_i2c13;

- i2c314 = &cfam2_i2c14;

- i2c315 = &cfam2_i2c15;

- i2c402 = &cfam3_i2c2;

- i2c403 = &cfam3_i2c3;

- i2c410 = &cfam3_i2c10;

- i2c411 = &cfam3_i2c11;

- i2c414 = &cfam3_i2c14;

- i2c415 = &cfam3_i2c15;

- i2c416 = &cfam3_i2c16;

- i2c417 = &cfam3_i2c17;

- spi10 = &cfam0_spi0;

- spi11 = &cfam0_spi1;

- spi12 = &cfam0_spi2;

- spi13 = &cfam0_spi3;

- spi20 = &cfam1_spi0;

- spi21 = &cfam1_spi1;

- spi22 = &cfam1_spi2;

- spi23 = &cfam1_spi3;

- spi30 = &cfam2_spi0;

- spi31 = &cfam2_spi1;

- spi32 = &cfam2_spi2;

- spi33 = &cfam2_spi3;

- spi40 = &cfam3_spi0;

- spi41 = &cfam3_spi1;

- spi42 = &cfam3_spi2;

- spi43 = &cfam3_spi3;

- #address-cells = <2>;

- #size-cells = <0>;

- * CFAM Reset is supposed to be active low but pass1 hardware is wired

- cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;

- cfam@0,0 { /* DCM0_C0 */

- #address-cells = <1>;

- #size-cells = <1>;

- compatible = "ibm,fsi2pib";

- reg = <0x1000 0x400>;

- compatible = "ibm,fsi-i2c-master";

- reg = <0x1800 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam0_i2c0: i2c-bus@0 {

- reg = <0>; /* OMI01 */

- cfam0_i2c1: i2c-bus@1 {

- reg = <1>; /* OMI23 */

- cfam0_i2c10: i2c-bus@a {

- reg = <10>; /* OP3A */

- cfam0_i2c11: i2c-bus@b {

- reg = <11>; /* OP3B */

- cfam0_i2c12: i2c-bus@c {

- reg = <12>; /* OP4A */

- cfam0_i2c13: i2c-bus@d {

- reg = <13>; /* OP4B */

- cfam0_i2c14: i2c-bus@e {

- reg = <14>; /* OP5A */

- cfam0_i2c15: i2c-bus@f {

- reg = <15>; /* OP5B */

- compatible = "ibm,fsi2spi";

- reg = <0x1c00 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam0_spi0: spi@0 {

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam0_spi1: spi@20 {

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam0_spi2: spi@40 {

- compatible = "ibm,fsi2spi-restricted";

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam0_spi3: spi@60 {

- compatible = "ibm,fsi2spi-restricted";

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- compatible = "ibm,p9-sbefifo";

- reg = <0x2400 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- compatible = "ibm,p10-occ";

- compatible = "ibm,p10-occ-hwmon";

- ibm,no-poll-on-init;

- fsi_hub0: hub@3400 {

- compatible = "fsi-master-hub";

- reg = <0x3400 0x400>;

- #address-cells = <2>;

- #size-cells = <0>;

- cfam@1,0 { /* DCM0_C1 */

- cfam1_i2c2: i2c-bus@2 {

- reg = <2>; /* OMI45 */

- cfam1_i2c3: i2c-bus@3 {

- reg = <3>; /* OMI67 */

- cfam1_i2c10: i2c-bus@a {

- reg = <10>; /* OP3A */

- cfam1_i2c11: i2c-bus@b {

- reg = <11>; /* OP3B */

- cfam1_i2c14: i2c-bus@e {

- reg = <14>; /* OP5A */

- cfam1_i2c15: i2c-bus@f {

- reg = <15>; /* OP5B */

- cfam1_i2c16: i2c-bus@10 {

- reg = <16>; /* OP6A */

- cfam1_i2c17: i2c-bus@11 {

- reg = <17>; /* OP6B */

- compatible = "ibm,fsi2spi";

- reg = <0x1c00 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam1_spi0: spi@0 {

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam1_spi1: spi@20 {

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam1_spi2: spi@40 {

- compatible = "ibm,fsi2spi-restricted";

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam1_spi3: spi@60 {

- compatible = "ibm,fsi2spi-restricted";

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- compatible = "ibm,p9-sbefifo";

- reg = <0x2400 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- compatible = "ibm,p10-occ";

- compatible = "ibm,p10-occ-hwmon";

- ibm,no-poll-on-init;

- fsi_hub1: hub@3400 {

- compatible = "fsi-master-hub";

- reg = <0x3400 0x400>;

- #address-cells = <2>;

- #size-cells = <0>;

- cfam@2,0 { /* DCM1_C0 */

- #address-cells = <1>;

- #size-cells = <1>;

- compatible = "ibm,fsi2pib";

- reg = <0x1000 0x400>;

- compatible = "ibm,fsi-i2c-master";

- reg = <0x1800 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam2_i2c0: i2c-bus@0 {

- reg = <0>; /* OM01 */

- cfam2_i2c1: i2c-bus@1 {

- reg = <1>; /* OM23 */

- cfam2_i2c10: i2c-bus@a {

- reg = <10>; /* OP3A */

- cfam2_i2c11: i2c-bus@b {

- reg = <11>; /* OP3B */

- cfam2_i2c12: i2c-bus@c {

- reg = <12>; /* OP4A */

- cfam2_i2c13: i2c-bus@d {

- reg = <13>; /* OP4B */

- cfam2_i2c14: i2c-bus@e {

- reg = <14>; /* OP5A */

- cfam2_i2c15: i2c-bus@f {

- reg = <15>; /* OP5B */

- cfam2_spi0: spi@0 {

- cfam2_spi1: spi@20 {

- cfam2_spi2: spi@40 {

- compatible = "ibm,fsi2spi-restricted";

- cfam2_spi3: spi@60 {

- compatible = "ibm,fsi2spi-restricted";

- fsi_hub2: hub@3400 {

- cfam@3,0 { /* DCM1_C1 */

- cfam3_i2c2: i2c-bus@2 {

- cfam3_i2c3: i2c-bus@3 {

- reg = <3>; /* OM67 */

- cfam3_i2c10: i2c-bus@a {

- reg = <10>; /* OP3A */

- cfam3_i2c11: i2c-bus@b {

- reg = <11>; /* OP3B */

- cfam3_i2c14: i2c-bus@e {

- reg = <14>; /* OP5A */

- cfam3_i2c15: i2c-bus@f {

- reg = <15>; /* OP5B */

- cfam3_i2c16: i2c-bus@10 {

- reg = <16>; /* OP6A */

- cfam3_i2c17: i2c-bus@11 {

- reg = <17>; /* OP6B */

- compatible = "ibm,fsi2spi";

- reg = <0x1c00 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam3_spi0: spi@0 {

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam3_spi1: spi@20 {

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam3_spi2: spi@40 {

- compatible = "ibm,fsi2spi-restricted";

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam3_spi3: spi@60 {

- compatible = "ibm,fsi2spi-restricted";

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- compatible = "ibm,p9-sbefifo";

- reg = <0x2400 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- compatible = "ibm,p10-occ";

- compatible = "ibm,p10-occ-hwmon";

- ibm,no-poll-on-init;

- fsi_hub3: hub@3400 {

- compatible = "fsi-master-hub";

- reg = <0x3400 0x400>;

- #address-cells = <2>;

- #size-cells = <0>;

- cfam@4,0 { /* DCM2_C0 */

- #address-cells = <1>;

- #size-cells = <1>;

- compatible = "ibm,fsi2pib";

- reg = <0x1000 0x400>;

- compatible = "ibm,fsi-i2c-master";

- reg = <0x1800 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam4_i2c0: i2c-bus@0 {

- reg = <0>; /* OM01 */

- cfam4_i2c1: i2c-bus@1 {

- reg = <1>; /* OM23 */

- cfam4_i2c10: i2c-bus@a {

- reg = <10>; /* OP3A */

- cfam4_i2c11: i2c-bus@b {

- cfam4_i2c12: i2c-bus@c {

- reg = <12>; /* OP4A */

- cfam4_i2c13: i2c-bus@d {

- reg = <13>; /* OP4B */

- cfam4_i2c14: i2c-bus@e {

- reg = <14>; /* OP5A */

- cfam4_i2c15: i2c-bus@f {

- reg = <15>; /* OP5B */

- compatible = "ibm,fsi2spi";

- reg = <0x1c00 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam4_spi0: spi@0 {

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam4_spi1: spi@20 {

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam4_spi2: spi@40 {

- compatible = "ibm,fsi2spi-restricted";

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam4_spi3: spi@60 {

- compatible = "ibm,fsi2spi-restricted";

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- compatible = "ibm,p9-sbefifo";

- reg = <0x2400 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- compatible = "ibm,p10-occ";

- compatible = "ibm,p10-occ-hwmon";

- ibm,no-poll-on-init;

- fsi_hub4: hub@3400 {

- compatible = "fsi-master-hub";

- reg = <0x3400 0x400>;

- #address-cells = <2>;

- #size-cells = <0>;

- cfam@5,0 { /* DCM2_C1 */

- #address-cells = <1>;

- #size-cells = <1>;

- compatible = "ibm,fsi2pib";

- reg = <0x1000 0x400>;

- compatible = "ibm,fsi-i2c-master";

- reg = <0x1800 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam5_i2c2: i2c-bus@2 {

- reg = <2>; /* OM45 */

- cfam5_i2c3: i2c-bus@3 {

- reg = <3>; /* OM67 */

- cfam5_i2c10: i2c-bus@a {

- reg = <10>; /* OP3A */

- cfam5_i2c11: i2c-bus@b {

- reg = <11>; /* OP3B */

- cfam5_i2c14: i2c-bus@e {

- reg = <14>; /* OP5A */

- cfam5_i2c15: i2c-bus@f {

- reg = <15>; /* OP5B */

- cfam5_i2c16: i2c-bus@10 {

- reg = <16>; /* OP6A */

- cfam5_i2c17: i2c-bus@11 {

- reg = <17>; /* OP6B */

- compatible = "ibm,fsi2spi-restricted";

- memory-region = <&flash_memory>;

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_rmii3_default>;

- clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>,

- <&syscon ASPEED_CLK_MAC3RCLK>;

- clock-names = "MACCLK", "RCLK";

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_rmii4_default>;

- clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>,

- <&syscon ASPEED_CLK_MAC4RCLK>;

- clock-names = "MACCLK", "RCLK";

- aspeed,reset-type = "none";

- aspeed,external-signal;

- aspeed,ext-push-pull;

- aspeed,ext-active-high;

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_wdtrst1_default>;

- memory-region = <&vga_memory>;

- aspeed,lpc-io-reg = <0xca8 0xcac>;

- aspeed,lpc-io-reg = <0xca2>;

- aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>;

- i2c100 = &cfam0_i2c0;

- i2c101 = &cfam0_i2c1;

- i2c110 = &cfam0_i2c10;

- i2c111 = &cfam0_i2c11;

- i2c112 = &cfam0_i2c12;

- i2c113 = &cfam0_i2c13;

- i2c114 = &cfam0_i2c14;

- i2c115 = &cfam0_i2c15;

- i2c202 = &cfam1_i2c2;

- i2c203 = &cfam1_i2c3;

- i2c210 = &cfam1_i2c10;

- i2c211 = &cfam1_i2c11;

- i2c214 = &cfam1_i2c14;

- i2c215 = &cfam1_i2c15;

- i2c216 = &cfam1_i2c16;

- i2c217 = &cfam1_i2c17;

- i2c300 = &cfam2_i2c0;

- i2c301 = &cfam2_i2c1;

- i2c310 = &cfam2_i2c10;

- i2c311 = &cfam2_i2c11;

- i2c312 = &cfam2_i2c12;

- i2c313 = &cfam2_i2c13;

- i2c314 = &cfam2_i2c14;

- i2c315 = &cfam2_i2c15;

- i2c402 = &cfam3_i2c2;

- i2c403 = &cfam3_i2c3;

- i2c410 = &cfam3_i2c10;

- i2c411 = &cfam3_i2c11;

- i2c414 = &cfam3_i2c14;

- i2c415 = &cfam3_i2c15;

- i2c416 = &cfam3_i2c16;

- i2c417 = &cfam3_i2c17;

- spi10 = &cfam0_spi0;

- spi11 = &cfam0_spi1;

- spi12 = &cfam0_spi2;

- spi13 = &cfam0_spi3;

- spi20 = &cfam1_spi0;

- spi21 = &cfam1_spi1;

- spi22 = &cfam1_spi2;

- spi23 = &cfam1_spi3;

- spi30 = &cfam2_spi0;

- spi31 = &cfam2_spi1;

- spi32 = &cfam2_spi2;

- spi33 = &cfam2_spi3;

- spi40 = &cfam3_spi0;

- spi41 = &cfam3_spi1;

- spi42 = &cfam3_spi2;

- spi43 = &cfam3_spi3;

- #address-cells = <2>;

- #size-cells = <0>;

- * CFAM Reset is supposed to be active low but pass1 hardware is wired

- cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;

- #address-cells = <1>;

- #size-cells = <1>;

- compatible = "ibm,fsi2pib";

- reg = <0x1000 0x400>;

- compatible = "ibm,fsi-i2c-master";

- reg = <0x1800 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam0_i2c0: i2c-bus@0 {

- reg = <0>; /* OMI01 */

- cfam0_i2c1: i2c-bus@1 {

- reg = <1>; /* OMI23 */

- cfam0_i2c10: i2c-bus@a {

- reg = <10>; /* OP3A */

- cfam0_i2c11: i2c-bus@b {

- reg = <11>; /* OP3B */

- cfam0_i2c12: i2c-bus@c {

- reg = <12>; /* OP4A */

- cfam0_i2c13: i2c-bus@d {

- reg = <13>; /* OP4B */

- cfam0_i2c14: i2c-bus@e {

- reg = <14>; /* OP5A */

- cfam0_i2c15: i2c-bus@f {

- reg = <15>; /* OP5B */

- compatible = "ibm,fsi2spi";

- reg = <0x1c00 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam0_spi0: spi@0 {

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam0_spi1: spi@20 {

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam0_spi2: spi@40 {

- compatible = "ibm,fsi2spi-restricted";

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam0_spi3: spi@60 {

- compatible = "ibm,fsi2spi-restricted";

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- compatible = "ibm,p9-sbefifo";

- reg = <0x2400 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- compatible = "ibm,p10-occ";

- compatible = "ibm,p10-occ-hwmon";

- ibm,no-poll-on-init;

- fsi_hub0: hub@3400 {

- compatible = "fsi-master-hub";

- reg = <0x3400 0x400>;

- #address-cells = <2>;

- #size-cells = <0>;

- #address-cells = <1>;

- #size-cells = <1>;

- compatible = "ibm,fsi2pib";

- reg = <0x1000 0x400>;

- compatible = "ibm,fsi-i2c-master";

- reg = <0x1800 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam1_i2c2: i2c-bus@2 {

- reg = <2>; /* OMI45 */

- cfam1_i2c3: i2c-bus@3 {

- reg = <3>; /* OMI67 */

- cfam1_i2c10: i2c-bus@a {

- reg = <10>; /* OP3A */

- cfam1_i2c11: i2c-bus@b {

- reg = <11>; /* OP3B */

- cfam1_i2c14: i2c-bus@e {

- reg = <14>; /* OP5A */

- cfam1_i2c15: i2c-bus@f {

- reg = <15>; /* OP5B */

- cfam1_i2c16: i2c-bus@10 {

- reg = <16>; /* OP6A */

- cfam1_i2c17: i2c-bus@11 {

- reg = <17>; /* OP6B */

- compatible = "ibm,fsi2spi";

- reg = <0x1c00 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam1_spi0: spi@0 {

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam1_spi1: spi@20 {

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam1_spi2: spi@40 {

- compatible = "ibm,fsi2spi-restricted";

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam1_spi3: spi@60 {

- compatible = "ibm,fsi2spi-restricted";

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- compatible = "ibm,p9-sbefifo";

- reg = <0x2400 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- compatible = "ibm,p10-occ";

- compatible = "ibm,p10-occ-hwmon";

- ibm,no-poll-on-init;

- fsi_hub1: hub@3400 {

- compatible = "fsi-master-hub";

- reg = <0x3400 0x400>;

- #address-cells = <2>;

- #size-cells = <0>;

- #address-cells = <1>;

- #size-cells = <1>;

- compatible = "ibm,fsi2pib";

- reg = <0x1000 0x400>;

- compatible = "ibm,fsi-i2c-master";

- reg = <0x1800 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam2_i2c0: i2c-bus@0 {

- reg = <0>; /* OM01 */

- cfam2_i2c1: i2c-bus@1 {

- reg = <1>; /* OM23 */

- cfam2_i2c10: i2c-bus@a {

- reg = <10>; /* OP3A */

- cfam2_i2c11: i2c-bus@b {

- reg = <11>; /* OP3B */

- cfam2_i2c12: i2c-bus@c {

- reg = <12>; /* OP4A */

- cfam2_i2c13: i2c-bus@d {

- reg = <13>; /* OP4B */

- cfam2_i2c14: i2c-bus@e {

- reg = <14>; /* OP5A */

- cfam2_i2c15: i2c-bus@f {

- reg = <15>; /* OP5B */

- compatible = "ibm,fsi2spi";

- reg = <0x1c00 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam2_spi0: spi@0 {

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam2_spi1: spi@20 {

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam2_spi2: spi@40 {

- compatible = "ibm,fsi2spi-restricted";

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam2_spi3: spi@60 {

- compatible = "ibm,fsi2spi-restricted";

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- compatible = "ibm,p9-sbefifo";

- reg = <0x2400 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- compatible = "ibm,p10-occ";

- compatible = "ibm,p10-occ-hwmon";

- ibm,no-poll-on-init;

- fsi_hub2: hub@3400 {

- compatible = "fsi-master-hub";

- reg = <0x3400 0x400>;

- #address-cells = <2>;

- #size-cells = <0>;

- #address-cells = <1>;

- #size-cells = <1>;

- compatible = "ibm,fsi2pib";

- reg = <0x1000 0x400>;

- compatible = "ibm,fsi-i2c-master";

- reg = <0x1800 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam3_i2c2: i2c-bus@2 {

- reg = <2>; /* OM45 */

- cfam3_i2c3: i2c-bus@3 {

- reg = <3>; /* OM67 */

- cfam3_i2c10: i2c-bus@a {

- reg = <10>; /* OP3A */

- cfam3_i2c11: i2c-bus@b {

- reg = <11>; /* OP3B */

- cfam3_i2c14: i2c-bus@e {

- reg = <14>; /* OP5A */

- cfam3_i2c15: i2c-bus@f {

- reg = <15>; /* OP5B */

- cfam3_i2c16: i2c-bus@10 {

- reg = <16>; /* OP6A */

- cfam3_i2c17: i2c-bus@11 {

- reg = <17>; /* OP6B */

- compatible = "ibm,fsi2spi";

- reg = <0x1c00 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- cfam3_spi0: spi@0 {

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam3_spi1: spi@20 {

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam3_spi2: spi@40 {

- compatible = "ibm,fsi2spi-restricted";

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- cfam3_spi3: spi@60 {

- compatible = "ibm,fsi2spi-restricted";

- #address-cells = <1>;

- #size-cells = <0>;

- at25,byte-len = <0x80000>;

- at25,addr-mode = <4>;

- at25,page-size = <256>;

- compatible = "atmel,at25";

- spi-max-frequency = <1000000>;

- compatible = "ibm,p9-sbefifo";

- reg = <0x2400 0x400>;

- #address-cells = <1>;

- #size-cells = <0>;

- compatible = "ibm,p10-occ";

- compatible = "ibm,p10-occ-hwmon";

- ibm,no-poll-on-init;

- fsi_hub3: hub@3400 {

- compatible = "fsi-master-hub";

- reg = <0x3400 0x400>;

- #address-cells = <2>;

- #size-cells = <0>;

-/* Legacy OCC numbering (to get rid of when userspace is fixed) */

- compatible = "nuvoton,npct75x";

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-fp5280g2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-fp5280g2.dts
index 208b0f094ed9..0dea014e4f30 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-fp5280g2.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-fp5280g2.dts

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-nf5280m6.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-nf5280m6.dts
index b3c1e3ba5831..92b9b3987c92 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-nf5280m6.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-inspur-nf5280m6.dts

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-inventec-transformers.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-inventec-transformers.dts
index caf66651e5b5..c713cb7a6187 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-inventec-transformers.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-inventec-transformers.dts

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr630.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr630.dts
index 8f543cca7c21..ddbcbc64e235 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr630.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr630.dts

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr855xg2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr855xg2.dts
index bcc1820f5c07..6045b60b80da 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr855xg2.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-lenovo-hr855xg2.dts

- compatible = "nxp,pca9545";

- compatible = "nxp,pca9543";

- compatible = "nxp,pca9545";

- compatible = "nxp,pca9543";

diff --git a/arch/arm/boot/dts/aspeed/ast2500-facebook-netbmc-common.dtsi b/arch/arm/boot/dts/aspeed/ast2500-facebook-netbmc-common.dtsi
index c0c43b8644ee..7f1ae3f4df9d 100644
--- a/arch/arm/boot/dts/aspeed/ast2500-facebook-netbmc-common.dtsi
+++ b/arch/arm/boot/dts/aspeed/ast2500-facebook-netbmc-common.dtsi

- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;

- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;

- <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;

- <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;

- <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;

- dma: dma@7e007000 {

- clock-frequency = <400000>;

- clock-frequency = <100000>;

- sdio2: mmc@3f190000 {

- max-frequency = <48000000>;

- vmmc-supply = <&camldo1_reg>;

- vqmmc-supply = <&iosr1_reg>;

- sdio4: mmc@3f1b0000 {

- max-frequency = <48000000>;

- cd-gpios = <&gpio 14 GPIO_ACTIVE_LOW>;

- vmmc-supply = <&sdldo_reg>;

- vqmmc-supply = <&sdxldo_reg>;

- pwm: pwm@3e01a000 {

- usbotg: usb@3f120000 {

- vusb_d-supply = <&usbldo_reg>;

- vusb_a-supply = <&iosr1_reg>;

- usbphy: usb-phy@3f130000 {

- dma: dma@7e007000 {

- pinctrl-names = "default";

diff --git a/arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts b/arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts
index f1412ba83def..0454423fe166 100644
--- a/arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts

- reg = <0x00000000 0x08000000>;

diff --git a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts
index 4d5747aa5dc8..fd344b55087e 100644
--- a/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac88u.dts

-#include "bcm47094.dtsi"

-#include "bcm5301x-nand-cs0-bch8.dtsi"

- model = "Asus RT-AC88U";

- bootargs = "earlycon";

- device_type = "memory";

- reg = <0x00000000 0x08000000>,

- <0x88000000 0x18000000>;

- compatible = "brcm,nvram";

- reg = <0x1c080000 0x00180000>;

- compatible = "gpio-leds";

- label = "white:power";

- gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;

- linux,default-trigger = "default-on";

- label = "red:wan";

- gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;

- label = "white:lan";

- gpios = <&chipcommon 21 GPIO_ACTIVE_LOW>;

- label = "white:usb2";

- gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>;

- trigger-sources = <&ehci_port2>;

- linux,default-trigger = "usbport";

- label = "white:usb3";

- gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;

- trigger-sources = <&ehci_port1>, <&xhci_port1>;

- linux,default-trigger = "usbport";

- label = "white:wps";

- gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>;

- compatible = "gpio-keys";

- linux,code = <KEY_WPS_BUTTON>;

- gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>;

- linux,code = <KEY_RESTART>;

- gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;

- linux,code = <KEY_RFKILL>;

- gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>;

- label = "Backlight";

- linux,code = <KEY_BRIGHTNESS_ZERO>;

- gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;

- compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";

- vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>;

- compatible = "fixed-partitions";

- #address-cells = <1>;

- #size-cells = <1>;

- reg = <0x00000000 0x00080000>;

- reg = <0x00080000 0x00180000>;

- partition@200000 {

- label = "firmware";

- reg = <0x00200000 0x07e00000>;

- compatible = "brcm,trx";

diff --git a/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-885l.dts b/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-885l.dts
index 51ce510b3e3a..c914569ddd5e 100644
--- a/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-885l.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-885l.dts

diff --git a/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-890l.dts b/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-890l.dts
index 60744f82c2b7..f050acbea0b2 100644
--- a/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-890l.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-dlink-dir-890l.dts

diff --git a/arch/arm/boot/dts/broadcom/bcm47094-linksys-panamera.dts b/arch/arm/boot/dts/broadcom/bcm47094-linksys-panamera.dts
index 8036c04d81cb..2b5c80d835e9 100644
--- a/arch/arm/boot/dts/broadcom/bcm47094-linksys-panamera.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-linksys-panamera.dts

diff --git a/arch/arm/boot/dts/broadcom/bcm47094-luxul-xap-1610.dts b/arch/arm/boot/dts/broadcom/bcm47094-luxul-xap-1610.dts
index 6875625869d9..afc635c8cdeb 100644
--- a/arch/arm/boot/dts/broadcom/bcm47094-luxul-xap-1610.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-luxul-xap-1610.dts

diff --git a/arch/arm/boot/dts/broadcom/bcm47094-luxul-xwr-3150-v1.dts b/arch/arm/boot/dts/broadcom/bcm47094-luxul-xwr-3150-v1.dts
index 789dd2a3d226..e28f7a350117 100644
--- a/arch/arm/boot/dts/broadcom/bcm47094-luxul-xwr-3150-v1.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-luxul-xwr-3150-v1.dts

diff --git a/arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dts b/arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dts
index 0734aa249b8e..ac44c745bdf8 100644
--- a/arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dts

- linux,default-trigger = "default-off";

diff --git a/arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-810.dts b/arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-810.dts
index e6fb6cbe6963..fd071da26cfa 100644
--- a/arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-810.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-810.dts

- linux,default-trigger = "default-off";

- ethernet = <&gmac0>;

- /* ports are defined in board DTS */

- gpio-sck = <&chipcommon 21 0>;

- gpio-miso = <&chipcommon 22 0>;

- gpio-mosi = <&chipcommon 23 0>;

- status = "disable";

diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi
index 72c55e5187ca..f36063c57c7f 100644
--- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi

- reset-names = "stmmaceth", "stmmaceth-ocp";

diff --git a/arch/arm/boot/dts/marvell/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/marvell/armada-370-dlink-dns327l.dts
index 561195b749eb..d4c4efabd254 100644
--- a/arch/arm/boot/dts/marvell/armada-370-dlink-dns327l.dts
+++ b/arch/arm/boot/dts/marvell/armada-370-dlink-dns327l.dts

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- usb_power: regulator@1 {

- compatible = "regulator-fixed";

- pinctrl-0 = <&xhci_pwr_pin>;

- pinctrl-names = "default";

- regulator-name = "USB3.0 Port Power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- enable-active-high;

- regulator-boot-on;

- regulator-always-on;

- gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;

- sata_r_power: regulator@2 {

- compatible = "regulator-fixed";

- pinctrl-0 = <&sata_r_pwr_pin>;

- pinctrl-names = "default";

- regulator-name = "SATA-R Power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- startup-delay-us = <2000000>;

- enable-active-high;

- regulator-always-on;

- regulator-boot-on;

- gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;

- sata_l_power: regulator@3 {

- compatible = "regulator-fixed";

- pinctrl-0 = <&sata_l_pwr_pin>;

- pinctrl-names = "default";

- regulator-name = "SATA-L Power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- startup-delay-us = <4000000>;

- enable-active-high;

- regulator-always-on;

- regulator-boot-on;

- gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm/boot/dts/marvell/armada-370-seagate-nas-4bay.dts b/arch/arm/boot/dts/marvell/armada-370-seagate-nas-4bay.dts
index 9cb69999b1db..370ca9c43247 100644
--- a/arch/arm/boot/dts/marvell/armada-370-seagate-nas-4bay.dts
+++ b/arch/arm/boot/dts/marvell/armada-370-seagate-nas-4bay.dts

- compatible = "regulator-fixed";

- regulator-name = "SATA2 power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- enable-active-high;

- regulator-always-on;

- regulator-boot-on;

- gpio = <&pca9554 6 GPIO_ACTIVE_HIGH>;

- compatible = "regulator-fixed";

- regulator-name = "SATA3 power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- enable-active-high;

- regulator-always-on;

- regulator-boot-on;

- gpio = <&pca9554 7 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm/boot/dts/marvell/armada-370-seagate-nas-xbay.dtsi b/arch/arm/boot/dts/marvell/armada-370-seagate-nas-xbay.dtsi
index 822f10734946..ffb3179033e7 100644
--- a/arch/arm/boot/dts/marvell/armada-370-seagate-nas-xbay.dtsi
+++ b/arch/arm/boot/dts/marvell/armada-370-seagate-nas-xbay.dtsi

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- pinctrl-names = "default";

- compatible = "regulator-fixed";

- regulator-name = "SATA0 power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- enable-active-high;

- regulator-always-on;

- regulator-boot-on;

- gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;

- compatible = "regulator-fixed";

- regulator-name = "SATA1 power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- enable-active-high;

- regulator-always-on;

- regulator-boot-on;

- gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm/boot/dts/marvell/armada-370-seagate-personal-cloud-2bay.dts b/arch/arm/boot/dts/marvell/armada-370-seagate-personal-cloud-2bay.dts
index 5ee572dc9242..45d8ec5dfeb7 100644
--- a/arch/arm/boot/dts/marvell/armada-370-seagate-personal-cloud-2bay.dts
+++ b/arch/arm/boot/dts/marvell/armada-370-seagate-personal-cloud-2bay.dts

- compatible = "regulator-fixed";

- regulator-name = "SATA1 power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- enable-active-high;

- regulator-always-on;

- regulator-boot-on;

- gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm/boot/dts/marvell/armada-370-seagate-personal-cloud.dtsi b/arch/arm/boot/dts/marvell/armada-370-seagate-personal-cloud.dtsi
index 124a8ba279e3..054124857235 100644
--- a/arch/arm/boot/dts/marvell/armada-370-seagate-personal-cloud.dtsi
+++ b/arch/arm/boot/dts/marvell/armada-370-seagate-personal-cloud.dtsi

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- compatible = "regulator-fixed";

- regulator-name = "USB Power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- regulator-always-on;

- regulator-boot-on;

- gpio = <&gpio1 27 GPIO_ACTIVE_LOW>;

- compatible = "regulator-fixed";

- regulator-name = "SATA0 power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- enable-active-high;

- regulator-always-on;

- regulator-boot-on;

- gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm/boot/dts/marvell/armada-370-synology-ds213j.dts b/arch/arm/boot/dts/marvell/armada-370-synology-ds213j.dts
index f0893cc06607..b07d11d1f124 100644
--- a/arch/arm/boot/dts/marvell/armada-370-synology-ds213j.dts
+++ b/arch/arm/boot/dts/marvell/armada-370-synology-ds213j.dts

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin>;

- sata1_regulator: sata1-regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "SATA1 Power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- startup-delay-us = <2000000>;

- enable-active-high;

- regulator-always-on;

- regulator-boot-on;

- gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;

- sata2_regulator: sata2-regulator@2 {

- compatible = "regulator-fixed";

- regulator-name = "SATA2 Power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- startup-delay-us = <4000000>;

- enable-active-high;

- regulator-always-on;

- regulator-boot-on;

- gpio = <&gpio1 30 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm/boot/dts/marvell/armada-382-rd-ac3x-48g4x2xl.dts b/arch/arm/boot/dts/marvell/armada-382-rd-ac3x-48g4x2xl.dts
index 584f0d0398a5..6ab65d21861a 100644
--- a/arch/arm/boot/dts/marvell/armada-382-rd-ac3x-48g4x2xl.dts
+++ b/arch/arm/boot/dts/marvell/armada-382-rd-ac3x-48g4x2xl.dts

diff --git a/arch/arm/boot/dts/marvell/armada-xp-synology-ds414.dts b/arch/arm/boot/dts/marvell/armada-xp-synology-ds414.dts
index 5551bac1962c..1b65059794bf 100644
--- a/arch/arm/boot/dts/marvell/armada-xp-synology-ds414.dts
+++ b/arch/arm/boot/dts/marvell/armada-xp-synology-ds414.dts

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin

- &sata3_pwr_pin &sata4_pwr_pin>;

- sata1_regulator: sata1-regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "SATA1 Power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- startup-delay-us = <2000000>;

- enable-active-high;

- regulator-always-on;

- regulator-boot-on;

- gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;

- sata2_regulator: sata2-regulator@2 {

- compatible = "regulator-fixed";

- regulator-name = "SATA2 Power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- startup-delay-us = <4000000>;

- enable-active-high;

- regulator-always-on;

- regulator-boot-on;

- gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;

- sata3_regulator: sata3-regulator@3 {

- compatible = "regulator-fixed";

- regulator-name = "SATA3 Power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- startup-delay-us = <6000000>;

- enable-active-high;

- regulator-always-on;

- regulator-boot-on;

- gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;

- sata4_regulator: sata4-regulator@4 {

- compatible = "regulator-fixed";

- regulator-name = "SATA4 Power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- startup-delay-us = <8000000>;

- enable-active-high;

- regulator-always-on;

- regulator-boot-on;

- gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- wifi_power: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "WiFi Power";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio2 7 GPIO_ACTIVE_HIGH>;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- usb_power: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "USB Power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- enable-active-high;

- regulator-always-on;

- regulator-boot-on;

- gpio = <&gpio0 1 0>;

- pinctrl-0 = <&pmx_gpio_1>;

- pinctrl-names = "default";

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- usb_power: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "USB Power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- enable-active-high;

- regulator-always-on;

- regulator-boot-on;

- gpio = <&gpio0 8 0>;

- pinctrl-0 = <&pmx_gpio_8>;

- pinctrl-names = "default";

- usb0_power: regulator@2 {

- compatible = "regulator-fixed";

- regulator-name = "USB Power";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio_ext 0 GPIO_ACTIVE_HIGH>;

- mmc_power: regulator@3 {

- compatible = "regulator-fixed";

- regulator-name = "MMC Power";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio_ext 13 GPIO_ACTIVE_HIGH>;

- gpio2: gpio-expander@20{

- gpio3: gpio-expander@21{

- soc_clocks: clocks{

-# Enables support for device-tree overlays

-DTC_FLAGS_at91-sam9x60_curiosity := -@

-DTC_FLAGS_at91-sam9x60ek := -@

-# Enables support for device-tree overlays

-DTC_FLAGS_at91-sama5d27_som1_ek := -@

-DTC_FLAGS_at91-sama5d27_wlsom1_ek := -@

-DTC_FLAGS_at91-sama5d2_icp := -@

-DTC_FLAGS_at91-sama5d2_ptc_ek := -@

-DTC_FLAGS_at91-sama5d2_xplained := -@

-DTC_FLAGS_at91-sama5d3_eds := -@

-DTC_FLAGS_at91-sama5d3_xplained := -@

-DTC_FLAGS_at91-sama5d4_xplained := -@

-# Enables support for device-tree overlays

-DTC_FLAGS_at91-sama7g5ek := -@

diff --git a/arch/arm/boot/dts/microchip/at91-sama5d3_ksz9477_evb.dts b/arch/arm/boot/dts/microchip/at91-sama5d3_ksz9477_evb.dts
index 14af1fd6d247..b66570080894 100644
--- a/arch/arm/boot/dts/microchip/at91-sama5d3_ksz9477_evb.dts
+++ b/arch/arm/boot/dts/microchip/at91-sama5d3_ksz9477_evb.dts

- status = "disable";

- interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0

- 18 IRQ_TYPE_LEVEL_HIGH 0

- 19 IRQ_TYPE_LEVEL_HIGH 0>;

- interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0

- 21 IRQ_TYPE_LEVEL_HIGH 0

- 22 IRQ_TYPE_LEVEL_HIGH 0>;

- adc_op_clk: adc_op_clk{

- interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0

- 18 IRQ_TYPE_LEVEL_HIGH 0

- 19 IRQ_TYPE_LEVEL_HIGH 0>;

- interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0

- 27 IRQ_TYPE_LEVEL_HIGH 0

- 28 IRQ_TYPE_LEVEL_HIGH 0>;

- usart2: serial@fffb8000{

- adc_op_clk: adc_op_clk{

- spi0: spi@fffa4000{

- adc_op_clk: adc_op_clk{

- pins = "GPIO_28", "GPIO_29";

- interrupts = <5 IRQ_TYPE_LEVEL_HIGH 3 /* Queue 0 */

- 66 IRQ_TYPE_LEVEL_HIGH 3 /* Queue 1 */

- 67 IRQ_TYPE_LEVEL_HIGH 3>; /* Queue 2 */

- adc_op_clk: adc_op_clk{

- interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;

- interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;

- interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;

- interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;

- interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;

- interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;

- interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;

- interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;

- * linux/arch/arm/boot/nspire-classic.dts

- * linux/arch/arm/boot/nspire-clp.dts

- 0x0000001c 0x0001001c 0x00020039

- 0x0004002c 0x00050034 0x00060015

- 0x0007000b 0x0008002d 0x01000033

- 0x0101004e 0x01020011 0x01030004

- 0x0104002f 0x01050003 0x01060016

- 0x01070002 0x01080014 0x02000062

- 0x0201000c 0x0202001f 0x02030007

- 0x02040013 0x02050006 0x02060010

- 0x02070005 0x02080019 0x03000027

- 0x03010037 0x03020018 0x0303000a

- 0x03040031 0x03050009 0x03060032

- 0x03070008 0x03080026 0x04000028

- 0x04010035 0x04020025 0x04040024

- 0x04060017 0x04080023 0x05000028

- 0x05020022 0x0503001b 0x05040021

- 0x0505001a 0x05060012 0x0507006f

- 0x05080020 0x0509002a 0x0601001c

- 0x0602002e 0x06030068 0x06040030

- 0x0605006d 0x0606001e 0x06070001

- 0x0608002b 0x0609000f 0x07000067

- 0x0702006a 0x0704006c 0x07060069

- 0x0707000e 0x0708001d 0x070a000d

- * linux/arch/arm/boot/nspire-cx.dts

- clock-names = "uart_clk", "apb_pclk";

- 0x0000001c 0x0001001c 0x00040039

- 0x0005002c 0x00060015 0x0007000b

- 0x0008000f 0x0100002d 0x01010011

- 0x0102002f 0x01030004 0x01040016

- 0x01050014 0x0106001f 0x01070002

- 0x010a006a 0x02000013 0x02010010

- 0x02020019 0x02030007 0x02040018

- 0x02050031 0x02060032 0x02070005

- 0x02080028 0x0209006c 0x03000026

- 0x03010025 0x03020024 0x0303000a

- 0x03040017 0x03050023 0x03060022

- 0x03070008 0x03080035 0x03090069

- 0x04000021 0x04010012 0x04020020

- 0x0404002e 0x04050030 0x0406001e

- 0x0407000d 0x04080037 0x04090067

- 0x05010038 0x0502000c 0x0503001b

- 0x05040034 0x0505001a 0x05060006

- 0x05080027 0x0509000e 0x050a006f

- 0x0600002b 0x0602004e 0x06030068

- 0x06040003 0x0605006d 0x06060009

- 0x06070001 0x0609000f 0x0708002a

- 0x0709001d 0x070a0033 >;

- * linux/arch/arm/boot/nspire-tp.dts

- 0x0000001c 0x0001001c 0x00040039

- 0x0005002c 0x00060015 0x0007000b

- 0x0008000f 0x0100002d 0x01010011

- 0x0102002f 0x01030004 0x01040016

- 0x01050014 0x0106001f 0x01070002

- 0x010a006a 0x02000013 0x02010010

- 0x02020019 0x02030007 0x02040018

- 0x02050031 0x02060032 0x02070005

- 0x02080028 0x0209006c 0x03000026

- 0x03010025 0x03020024 0x0303000a

- 0x03040017 0x03050023 0x03060022

- 0x03070008 0x03080035 0x03090069

- 0x04000021 0x04010012 0x04020020

- 0x0404002e 0x04050030 0x0406001e

- 0x0407000d 0x04080037 0x04090067

- 0x05010038 0x0502000c 0x0503001b

- 0x05040034 0x0505001a 0x05060006

- 0x05080027 0x0509000e 0x050a006f

- 0x0600002b 0x0602004e 0x06030068

- 0x06040003 0x0605006d 0x06060009

- 0x06070001 0x0609000f 0x0708002a

- 0x0709001d 0x070a0033 >;

- * linux/arch/arm/boot/nspire.dtsi

- device = "memory";

- reg = <0xa4000000 0x20000>;

- regulator-type = "voltage";

diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
index c7b5ef15b716..868454ae6bde 100644
--- a/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
+++ b/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi

diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts b/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts
index 87359ab05db3..209fa3400317 100644
--- a/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts
+++ b/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts

- reset-names = "serial";

diff --git a/arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts b/arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts
index f4521fd15f6a..d13b8d25ca6a 100644
--- a/arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts
+++ b/arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts

- reset-names = "serial";

diff --git a/arch/arm/boot/dts/nvidia/tegra20-acer-a500-picasso.dts b/arch/arm/boot/dts/nvidia/tegra20-acer-a500-picasso.dts
index 08b42952f4de..486fd244291e 100644
--- a/arch/arm/boot/dts/nvidia/tegra20-acer-a500-picasso.dts
+++ b/arch/arm/boot/dts/nvidia/tegra20-acer-a500-picasso.dts

diff --git a/arch/arm/boot/dts/nvidia/tegra20-colibri-eval-v3.dts b/arch/arm/boot/dts/nvidia/tegra20-colibri-eval-v3.dts
index 612f4e54cb20..be2ead4147f2 100644
--- a/arch/arm/boot/dts/nvidia/tegra20-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/nvidia/tegra20-colibri-eval-v3.dts

- reg = <0x7000c500 0x100>;

- interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;

- #address-cells = <1>;

- #size-cells = <0>;

- clocks = <&tegra_car TEGRA20_CLK_I2C3>,

- <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;

- clock-names = "div-clk", "fast-clk";

- resets = <&tegra_car 67>;

- reset-names = "i2c";

- reset-names = "serial";

diff --git a/arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts b/arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts
index ca277bf1df78..9d08e2b094b4 100644
--- a/arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts
+++ b/arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts

diff --git a/arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-common.dtsi b/arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-common.dtsi
index c0062353c1f1..a9342e04b14b 100644
--- a/arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-common.dtsi
+++ b/arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-common.dtsi

- * Nexus 7 supports two compatible panel models:

- * 1. hydis,hv070wx2-1e0

- * 2. chunghwa,claa070wp03xg

- * We want to use timing which is optimized for Nexus 7,

- * hence we need to customize the timing.

- compatible = "panel-lvds";

diff --git a/arch/arm/boot/dts/nvidia/tegra30-asus-transformer-common.dtsi b/arch/arm/boot/dts/nvidia/tegra30-asus-transformer-common.dtsi
index bdb898ad6262..ead95306840f 100644
--- a/arch/arm/boot/dts/nvidia/tegra30-asus-transformer-common.dtsi
+++ b/arch/arm/boot/dts/nvidia/tegra30-asus-transformer-common.dtsi

diff --git a/arch/arm/boot/dts/nvidia/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/nvidia/tegra30-colibri-eval-v3.dts
index 36615c5fda2c..1990bf8e122d 100644
--- a/arch/arm/boot/dts/nvidia/tegra30-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/nvidia/tegra30-colibri-eval-v3.dts

diff --git a/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts b/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts
index 8d10eb8b48b9..4012f9c799a8 100644
--- a/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts
+++ b/arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts

- compatible = "panel-lvds";

- reset-names = "serial";

diff --git a/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts b/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts
index 7d4301b22b90..fc8a502fc957 100644
--- a/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_lcd_3v3: regulator@0 {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_reg_lcd_3v3>;

- regulator-name = "lcd-3v3";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;

- enable-active-high;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_fec_phy: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "fec-phy";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio4 9 0>;

- enable-active-high;

- MX25_PAD_UART1_TXD__UART1_TXD 0x80000000

- MX25_PAD_UART1_RXD__UART1_RXD 0x80000000

- MX25_PAD_UART1_CTS__UART1_CTS 0x80000000

- MX25_PAD_UART1_RTS__UART1_RTS 0x80000000

- MX25_PAD_D11__GPIO_4_9 0x80000000 /* FEC PHY power on pin */

- MX25_PAD_D13__GPIO_4_7 0x80000000 /* FEC reset */

- MX25_PAD_FEC_MDC__FEC_MDC 0x80000000

- MX25_PAD_FEC_MDIO__FEC_MDIO 0x80000000

- MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000

- MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000

- MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000

- MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000

- MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x80000000

- MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000

- MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x80000000

- MX25_PAD_NF_CE0__NF_CE0 0x80000000

- MX25_PAD_NFRB__NFRB 0x80000000

- MX25_PAD_D7__D7 0x80000000

- MX25_PAD_D6__D6 0x80000000

- MX25_PAD_D5__D5 0x80000000

- MX25_PAD_D4__D4 0x80000000

- MX25_PAD_D3__D3 0x80000000

- MX25_PAD_D2__D2 0x80000000

- MX25_PAD_D1__D1 0x80000000

- MX25_PAD_D0__D0 0x80000000

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_fec_3v3: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "fec-3v3";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio2 3 0>;

- enable-active-high;

- reg_2p5v: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "2P5V";

- regulator-min-microvolt = <2500000>;

- regulator-max-microvolt = <2500000>;

- reg_3p3v: regulator@2 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- reg_can_3v3: regulator@3 {

- compatible = "regulator-fixed";

- regulator-name = "can-3v3";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio4 6 0>;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_max5821: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "max5821-reg";

- regulator-min-microvolt = <2500000>;

- regulator-max-microvolt = <2500000>;

- regulator-always-on;

diff --git a/arch/arm/boot/dts/nxp/imx/imx27-eukrea-mbimxsd27-baseboard.dts b/arch/arm/boot/dts/nxp/imx/imx27-eukrea-mbimxsd27-baseboard.dts
index 9c3ec82ec7e5..145e459625b3 100644
--- a/arch/arm/boot/dts/nxp/imx/imx27-eukrea-mbimxsd27-baseboard.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx27-eukrea-mbimxsd27-baseboard.dts

- #address-cells = <1>;

- #size-cells = <0>;

- compatible = "simple-bus";

- reg_lcd: regulator@0 {

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_lcdreg>;

- compatible = "regulator-fixed";

- regulator-name = "LCD";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio1 25 GPIO_ACTIVE_HIGH>;

- enable-active-high;

diff --git a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-rdk.dts b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-rdk.dts
index 188639738dc3..25442eba21c1 100644
--- a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-rdk.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-rdk.dts

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_3v3: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "3V3";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

diff --git a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts
index 344e77790152..7f0cd4d3ec2d 100644
--- a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_csien>;

- regulator-name = "CSI_EN";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;

- regulator-always-on;

diff --git a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-som.dtsi
index 3d10273177e9..7191e10712b9 100644
--- a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-som.dtsi

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_3v3: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "3V3";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- reg_5v0: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "5V0";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- clks: ccm@10027000{

- clks: ccm@53f80000{

- enable-gpio = <&gpio4 12 GPIO_ACTIVE_LOW>;

- clks: ccm@53fd4000{

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_hub_reset: regulator@0 {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_usbotgreg>;

- regulator-name = "hub_reset";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;

- enable-active-high;

diff --git a/arch/arm/boot/dts/nxp/imx/imx51-eukrea-mbimxsd51-baseboard.dts b/arch/arm/boot/dts/nxp/imx/imx51-eukrea-mbimxsd51-baseboard.dts
index b6d931e96a8f..aff380e999c7 100644
--- a/arch/arm/boot/dts/nxp/imx/imx51-eukrea-mbimxsd51-baseboard.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx51-eukrea-mbimxsd51-baseboard.dts

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_can: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "CAN_RST";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;

- startup-delay-us = <20000>;

- enable-active-high;

- clks: ccm@73fd4000{

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_3p3v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_3p2v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "3P2V";

- regulator-min-microvolt = <3200000>;

- regulator-max-microvolt = <3200000>;

- regulator-always-on;

- reg_backlight: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "lcd-supply";

- regulator-min-microvolt = <3200000>;

- regulator-max-microvolt = <3200000>;

- regulator-always-on;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_usbh1_vbus: regulator@3 {

- compatible = "regulator-fixed";

- regulator-name = "vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio1 2 0>;

- reg_usb_otg_vbus: regulator@4 {

- compatible = "regulator-fixed";

- regulator-name = "usb_otg_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio1 4 0>;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_backlight: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "lcd-supply";

- gpio = <&gpio2 5 0>;

- startup-delay-us = <5000>;

- reg_3p2v: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "3P2V";

- regulator-min-microvolt = <3200000>;

- regulator-max-microvolt = <3200000>;

- regulator-always-on;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_3p2v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "3P2V";

- regulator-min-microvolt = <3200000>;

- regulator-max-microvolt = <3200000>;

- regulator-always-on;

- reg_usb_vbus: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "usb_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio7 8 0>;

- enable-active-high;

- compatible = "st,m25p32", "st,m25p", "jedec,spi-nor";

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_3p3v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_3p3v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- reg_usb_vbus: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "usb_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio3 31 0>; /* PEN */

- enable-active-high;

- clks: ccm@53fd4000{

-// SPDX-License-Identifier: GPL-2.0 or MIT

- simple-audio-card,audio-routing = "Ext Spk", "LINE";

-// SPDX-License-Identifier: GPL-2.0 or MIT

-// SPDX-License-Identifier: (GPL-2.0 or MIT)

-// SPDX-License-Identifier: GPL-2.0 or MIT

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_3p3v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- reg_usb_otg_vbus: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "usb_otg_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio3 22 0>;

- enable-active-high;

- compatible = "regulator-fixed";

- compatible = "st,m25p", "jedec,spi-nor";

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_3p3v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- reg_usb_otg_switch: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "usb_otg_switch";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio7 12 0>;

- regulator-boot-on;

- regulator-always-on;

- reg_usb_host1: regulator@2 {

- compatible = "regulator-fixed";

- regulator-name = "usb_host1_en";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio3 31 0>;

- enable-active-high;

-// SPDX-License-Identifier: (GPL-2.0 or MIT)

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_3p3v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_1p0v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "1P0V";

- regulator-min-microvolt = <1000000>;

- regulator-max-microvolt = <1000000>;

- regulator-always-on;

- reg_3p3v: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- reg_usb_h1_vbus: regulator@2 {

- compatible = "regulator-fixed";

- regulator-name = "usb_h1_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- regulator-always-on;

- reg_usb_otg_vbus: regulator@3 {

- compatible = "regulator-fixed";

- regulator-name = "usb_otg_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;

- enable-active-high;

diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi
index 6b64b2fc3995..db1bc511e71f 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi

- id-gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; /* SODIMM 137 / USBC_DET */

diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-dfi-fs700-m60.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-dfi-fs700-m60.dtsi
index 2c1d6f28e695..0a6c3a092b34 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-dfi-fs700-m60.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-dfi-fs700-m60.dtsi

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- dummy_reg: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "dummy-supply";

- reg_usb_otg_vbus: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "usb_otg_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio3 22 0>;

- enable-active-high;

-// SPDX-License-Identifier: (GPL-2.0 or MIT)

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_1p0v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "1P0V";

- regulator-min-microvolt = <1000000>;

- regulator-max-microvolt = <1000000>;

- regulator-always-on;

- reg_3p3v: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- reg_can1_stby: regulator-can1-stby {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_reg_can1>;

- regulator-name = "can1_stby";

- gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- reg_usb_h1_vbus: regulator@2 {

- compatible = "regulator-fixed";

- regulator-name = "usb_h1_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- regulator-always-on;

- reg_usb_otg_vbus: regulator@3 {

- compatible = "regulator-fixed";

- regulator-name = "usb_otg_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;

- enable-active-high;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_2p5v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "2P5V";

- regulator-min-microvolt = <2500000>;

- regulator-max-microvolt = <2500000>;

- regulator-always-on;

- reg_3p3v: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- reg_usb_otg_vbus: regulator@2 {

- compatible = "regulator-fixed";

- regulator-name = "usb_otg_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;

- enable-active-high;

- reg_wlan_vmmc: regulator@3 {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_wlan_vmmc>;

- regulator-name = "reg_wlan_vmmc";

- regulator-min-microvolt = <1800000>;

- regulator-max-microvolt = <1800000>;

- gpio = <&gpio6 7 GPIO_ACTIVE_HIGH>;

- startup-delay-us = <70000>;

- enable-active-high;

diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi
index 81a9a302aec1..763831dc0e24 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_1p8v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "1P8V";

- regulator-min-microvolt = <1800000>;

- regulator-max-microvolt = <1800000>;

- regulator-always-on;

- reg_2p5v: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "2P5V";

- regulator-min-microvolt = <2500000>;

- regulator-max-microvolt = <2500000>;

- regulator-always-on;

- reg_3p3v: regulator@2 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- reg_usb_otg_vbus: regulator@3 {

- compatible = "regulator-fixed";

- regulator-name = "usb_otg_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;

- enable-active-high;

- reg_usb_h1_vbus: regulator@4 {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_usbh1>;

- regulator-name = "usb_h1_vbus";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;

- enable-active-high;

- reg_wlan_vmmc: regulator@5 {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_wlan_vmmc>;

- regulator-name = "reg_wlan_vmmc";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;

- startup-delay-us = <70000>;

- enable-active-high;

- reg_can_xcvr: regulator@6 {

- compatible = "regulator-fixed";

- regulator-name = "CAN XCVR";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_can_xcvr>;

- gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;

diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi
index 000e9dc97b1a..414196b75991 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_2p5v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "2P5V";

- regulator-min-microvolt = <2500000>;

- regulator-max-microvolt = <2500000>;

- regulator-always-on;

- reg_3p3v: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- reg_usb_otg_vbus: regulator@2 {

- compatible = "regulator-fixed";

- regulator-name = "usb_otg_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio3 22 0>;

- enable-active-high;

- reg_can_xcvr: regulator@3 {

- compatible = "regulator-fixed";

- regulator-name = "CAN XCVR";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_can_xcvr>;

- gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;

- reg_wlan_vmmc: regulator@4 {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_wlan_vmmc>;

- regulator-name = "reg_wlan_vmmc";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;

- startup-delay-us = <70000>;

- enable-active-high;

- reg_usb_h1_vbus: regulator@5 {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_usbh1>;

- regulator-name = "usb_h1_vbus";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;

- enable-active-high;

diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pbab01.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pbab01.dtsi
index a41e47c06ef4..e40041871b28 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pbab01.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pbab01.dtsi

- sound_1v8: regulator@2 {

- compatible = "regulator-fixed";

- regulator-name = "i2s-audio-1v8";

- regulator-min-microvolt = <1800000>;

- regulator-max-microvolt = <1800000>;

- sound_3v3: regulator@3 {

- compatible = "regulator-fixed";

- regulator-name = "i2s-audio-3v3";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi
index 80adb2a02cc9..113974520d54 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_usb_otg_vbus: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "usb_otg_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio4 15 0>;

- enable-active-high;

- reg_usb_h1_vbus: regulator@1 {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_usbh1_vbus>;

- regulator-name = "usb_h1_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio1 0 0>;

- enable-active-high;

diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi
index 28a805384668..86b4269e0e01 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_3p3v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- reg_usbh1_vbus: regulator@1 {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- regulator-name = "usbh1_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;

- enable-active-high;

- reg_usb_otg_vbus: regulator@2 {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- regulator-name = "usb_otg_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;

- enable-active-high;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_2p5v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "2P5V";

- regulator-min-microvolt = <2500000>;

- regulator-max-microvolt = <2500000>;

- regulator-always-on;

- reg_3p3v: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- reg_usb_otg_vbus: regulator@2 {

- compatible = "regulator-fixed";

- regulator-name = "usb_otg_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio3 22 0>;

- enable-active-high;

- reg_can_xcvr: regulator@3 {

- compatible = "regulator-fixed";

- regulator-name = "CAN XCVR";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_can_xcvr>;

- gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;

- reg_1p5v: regulator@4 {

- compatible = "regulator-fixed";

- regulator-name = "1P5V";

- regulator-min-microvolt = <1500000>;

- regulator-max-microvolt = <1500000>;

- regulator-always-on;

- reg_1p8v: regulator@5 {

- compatible = "regulator-fixed";

- regulator-name = "1P8V";

- regulator-min-microvolt = <1800000>;

- regulator-max-microvolt = <1800000>;

- regulator-always-on;

- reg_2p8v: regulator@6 {

- compatible = "regulator-fixed";

- regulator-name = "2P8V";

- regulator-min-microvolt = <2800000>;

- regulator-max-microvolt = <2800000>;

- regulator-always-on;

- reg_usb_h1_vbus: regulator@7 {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_usbh1>;

- regulator-name = "usb_h1_vbus";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;

- enable-active-high;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_usb_h1_vbus: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "usb_h1_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- enable-active-high;

- startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */

- gpio = <&gpio7 12 0>;

- reg_panel: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "lcd_panel";

- enable-active-high;

- gpio = <&gpio1 2 0>;

- clock-names = "slow";

- gpmi: nand-controller@1806000{

- pinctrl_flexcan1: flexcan1grp{

- pinctrl_flexcan2: flexcan2grp{

diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcexpress.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcexpress.dts
index 3792679c0c90..ad7f63ca521a 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcexpress.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcexpress.dts

- pinctrl_flexcan1: flexcan1grp{

- pinctrl_flexcan2: flexcan2grp{

- pinctrl_goodix_touch: goodixgrp{

- compatible = "regulator-fixed";

- clock-names = "mclk";

diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi
index 43868311f48a..33d5f27285a4 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi

- pinctrl_flexcan2: flexcan2grp{

diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-mainboard.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-mainboard.dts
index 92ac0edcb608..ef76ece21010 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-mainboard.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-mainboard.dts

- #size-cells = <1>;

- regulator-type = "voltage";

- id-gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>; /* SODIMM 137 / USBC_DET */

- pinctrl_pwm4: pwm4grp{

- gpmi: nand-controller@33002000{

- interrupt-controller;

- stmpe_touchscreen {

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_usb0_vbus: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "usb0_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- enable-active-high;

- startup-delay-us = <300>; /* LAN9215 requires a POR of 200us minimum */

- gpio = <&gpio0 17 0>;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_vddio_sd0: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "vddio-sd0";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio1 29 0>;

- interrupts = <0 14 20 0

- interrupts = <7 5 9 26

- interrupts = <53 54>;

- interrupts = <46 45>;

- interrupts = <36 37 38 39 40 41 42 43 44>;

- interrupts = <28 29 30 31>;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_usb0_vbus: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "usb0_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio1 23 1>;

- enable-active-high;

- reg_can0_vcc: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "can0_vcc";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_usb1_vbus: regulator@0 {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&usb_pins_cfa10037>;

- regulator-name = "usb1_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio0 7 1>;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_usb1_vbus: regulator@0 {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&usb_pins_cfa10049>;

- regulator-name = "usb1_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio0 7 1>;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_usb1_vbus: regulator@0 {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&usb_pins_cfa10057>;

- regulator-name = "usb1_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio0 7 1>;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_usb1_vbus: regulator@0 {

- pinctrl-names = "default";

- pinctrl-0 = <&usb_pins_cfa10058>;

- compatible = "regulator-fixed";

- regulator-name = "usb1_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio0 7 1>;

diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx283lc.dts b/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx283lc.dts
index 29f8a3a245d4..7ae2d4ca8ef0 100644
--- a/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx283lc.dts
+++ b/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx283lc.dts

diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx28lc.dtsi b/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx28lc.dtsi
index b285a946e2c2..6633cde305e5 100644
--- a/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx28lc.dtsi
+++ b/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx28lc.dtsi

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_3p3v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- reg_lcd_3v3: regulator@1 {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&reg_lcd_3v3_pins_mbmx28lc>;

- regulator-name = "lcd-3v3";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;

- enable-active-high;

- reg_usb0_vbus: regulator@2 {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&reg_usb0_vbus_pins_mbmx28lc>;

- regulator-name = "usb0_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;

- enable-active-high;

- reg_usb1_vbus: regulator@3 {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&reg_usb1_vbus_pins_mbmx28lc>;

- regulator-name = "usb1_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio1 19 GPIO_ACTIVE_HIGH>;

- enable-active-high;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_3p3v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_3p3v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- reg_vddio_sd0: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "vddio-sd0";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio3 29 0>;

- reg_vddio_sd1: regulator@2 {

- compatible = "regulator-fixed";

- regulator-name = "vddio-sd1";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio2 19 0>;

- reg_usb1_vbus: regulator@3 {

- compatible = "regulator-fixed";

- regulator-name = "usb1_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio3 8 0>;

- enable-active-high;

- reg_vddio_sd0: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "vddio-sd0";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio3 28 0>;

- reg_usb0_vbus: regulator@2 {

- compatible = "regulator-fixed";

- regulator-name = "usb0_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio3 12 0>;

- reg_usb1_vbus: regulator@3 {

- compatible = "regulator-fixed";

- regulator-name = "usb1_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio3 13 0>;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_usb0_vbus: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "usb0_vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- gpio = <&gpio3 9 0>;

- interrupts = <82 83 84 85

- interrupts = <78 79 66 0

- interrupts = <52 53 54>;

- interrupts = <10 14 15 16 17 18 19

- 20 21 22 23 24 25>;

- interrupts = <48 49 50 51>;

- compatible = "simple-bus";

- #address-cells = <1>;

- #size-cells = <0>;

- reg_3p3v: regulator@0 {

- compatible = "regulator-fixed";

- regulator-name = "3P3V";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- reg_vcc_3v3_mcu: regulator@1 {

- compatible = "regulator-fixed";

- regulator-name = "vcc_3v3_mcu";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- esdhc0: esdhc@400b1000 {

- esdhc1: esdhc@400b2000 {

- compatible = "qcom,smd";

- interrupts = <0 37 IRQ_TYPE_EDGE_RISING>;

- qcom,ipc = <&l2cc 8 3>;

- qcom,smd-edge = <0>;

- status = "disabled";

- interrupts = <0 90 IRQ_TYPE_EDGE_RISING>;

- qcom,ipc = <&l2cc 8 15>;

- qcom,smd-edge = <1>;

- status = "disabled";

- interrupts = <0 138 IRQ_TYPE_EDGE_RISING>;

- qcom,ipc = <&sps_sic_non_secure 0x4080 0>;

- qcom,smd-edge = <3>;

- status = "disabled";

- interrupts = <0 198 IRQ_TYPE_EDGE_RISING>;

- qcom,ipc = <&l2cc 8 25>;

- qcom,smd-edge = <6>;

- status = "disabled";

- compatible = "qcom,smd";

- phys = <&usb3_hs_phy>;

- phy-names = "usb2-phy";

- clocks = <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_APPS_CLK>,

- <&gcc GCC_DCD_XO_CLK>;

- clock-names = "iface", "core", "xo";

- reg = <0x40000000 0xf1d

- 0x40100000 0x1000>;

- interrupt-names = "msi0", "msi1", "msi2", "msi3",

- "msi4", "msi5", "msi6", "msi7",

- "msi8", "msi9", "msi10", "msi11",

- interrupt-names = "msi0", "msi1", "msi2", "msi3",

- "msi4", "msi5", "msi6", "msi7",

- "msi8", "msi9", "msi10", "msi11",

- usb3_ss_phy: ssphy@9a000 {

- usb3_hs_phy: hsphy@a6000 {

- usb3: usb3@8af8800 {

- usb2_hs_phy: hsphy@a8000 {

- usb2: usb2@60f8800 {

- spi-max-frequency = <50000000>;

- #address-cells = <1>;

- #size-cells = <1>;

- smem_region: smem@3000000 {

- reg = <0x3000000 0x100000>;

- adsp_region: adsp@dc00000 {

- reg = <0x0dc00000 0x1900000>;

- compatible = "qcom,smd";

- spi-max-frequency = <24000000>;

- compatible = "qcom,smd";

- interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;

- qcom,ipc = <&apcs 8 0>;

- qcom,smd-edge = <15>;

- rpm_requests: rpm-requests {

- compatible = "qcom,rpm-msm8974";

- qcom,smd-channels = "rpm_requests";

- rpmcc: clock-controller {

- compatible = "qcom,rpmcc-msm8974", "qcom,rpmcc";

- #clock-cells = <1>;

- clocks = <&xo_board>;

- clock-names = "xo";

diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-fairphone-fp2.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-fairphone-fp2.dts
index f531d2679f6c..42d253b75dad 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974pro-fairphone-fp2.dts
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-fairphone-fp2.dts

- pins = "gpio36", "gpio37", "gpio38", "gpio39", "gpio40";

diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
index 154639d56f35..11468d1409f7 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts

- syna,nosleep = <1>;

- syna,f11-flip-x = <1>;

- compatible = "qcom,pm8941-pwrkey";

- interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;

- debounce = <15625>;

- usb_dwc3: dwc3@a600000 {

-#include <arm64/qcom/pm8150b.dtsi>

diff --git a/arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts
index fa09295052c6..d21e00e1f401 100644
--- a/arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts
+++ b/arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts

- enable-gpio = <&pfc 74 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts
index 3340fc3f0739..3d587602e13a 100644
--- a/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts
+++ b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts

- vcc5v0_sys: vcc5v0-sys-regulator {

- compatible = "regulator-fixed";

- regulator-name = "vcc5v0_sys";

- regulator-always-on;

- regulator-boot-on;

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_rstnout>;

- panel-width-mm = <90>;

- panel-height-mm = <154>;

- reg = <0x40000000 0x10000000

- 0x50000000 0x10000000

- 0x60000000 0x10000000

- 0x70000000 0x10000000>;

diff --git a/arch/arm/boot/dts/samsung/exynos4210-universal_c210.dts b/arch/arm/boot/dts/samsung/exynos4210-universal_c210.dts
index c84af3d27c1c..bdc30f8cf748 100644
--- a/arch/arm/boot/dts/samsung/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/samsung/exynos4210-universal_c210.dts

- reg = <0x40000000 0x10000000

- 0x50000000 0x10000000>;

- dr_mode = "peripheral";

- assigned-clock-parents = <&clock CLK_XUSBXTI>;

diff --git a/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi b/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi
index c82e2762e07c..65b000df176e 100644
--- a/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi
+++ b/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi

- #address-cells = <1>;

- #size-cells = <0>;

- our-claim-gpio = <&gpf0 3 GPIO_ACTIVE_LOW>;

- reg = <0x18000000 0x2 0x18000004 0x2>;

- samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7",

- "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3",

- "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7",

- "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",

- "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7",

- "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";

- reg = <0xA8000000 0x2 0xA8000002 0x2>;

- interrupts = <0 98 0x4

- interrupts = <0 100 0x4

- interrupts = <0 6 0x04

- interrupts = <0 20 0x4

- interrupts = <0 33 0x4

- interrupts = <0 10 0x4

- interrupts = <0 26 0x4

- enable-gpio = <&gpio2 14 GPIO_ACTIVE_HIGH>;

- enable-gpio = <&tc3589x_gpio 17 GPIO_ACTIVE_HIGH>;

- enable-gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;

- enable-gpio = <&gpio6 25 GPIO_ACTIVE_HIGH>;

-#include <dt-bindings/input/input.h>

- mmc_vcard: mmc_vcard {

- regulator-name = "mmc_vcard";

- vmmc-supply = <&mmc_vcard>;

- shmem = <&scmi_shm>;

- /* PWR 1v1, 1v8 and 3v3 regulators defined as fixed, waiting for SCMI */

- compatible = "regulator-fixed";

- regulator-name = "reg11";

- regulator-min-microvolt = <1100000>;

- regulator-max-microvolt = <1100000>;

- compatible = "regulator-fixed";

- regulator-name = "reg18";

- regulator-min-microvolt = <1800000>;

- regulator-max-microvolt = <1800000>;

- compatible = "regulator-fixed";

- regulator-name = "usb33";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- scmi_sram: sram@2ffff000 {

- compatible = "mmio-sram";

- reg = <0x2ffff000 0x1000>;

- #address-cells = <1>;

- #size-cells = <1>;

- ranges = <0 0x2ffff000 0x1000>;

- scmi_shm: scmi-sram@0 {

- compatible = "arm,scmi-shmem";

- usb33d-supply = <&usb33>;

- vdda1v1-supply = <&reg11>;

- vdda1v8-supply = <&reg18>;

- v3v3_sw: v3v3-sw {

- compatible = "regulator-fixed";

- regulator-name = "v3v3_sw";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- vdd_adc: vdd-adc {

- compatible = "regulator-fixed";

- regulator-name = "vdd_adc";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- compatible = "regulator-fixed";

- regulator-name = "vdd_sd";

- regulator-min-microvolt = <2900000>;

- regulator-max-microvolt = <2900000>;

- regulator-always-on;

- vdd_usb: vdd-usb {

- compatible = "regulator-fixed";

- regulator-name = "vdd_usb";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- regulator-always-on;

- vdda-supply = <&vdd_adc>;

- vref-supply = <&vdd_adc>;

- vmmc-supply = <&vdd_sd>;

- vdd-supply = <&v3v3_sw>;

- phy-supply = <&vdd_usb>;

- shmem = <&scmi_shm>;

- scmi_reg11: reg11@0 {

- scmi_reg18: reg18@1 {

- voltd-name = "reg18";

- scmi_usb33: usb33@2 {

- scmi_sram: sram@2ffff000 {

- compatible = "mmio-sram";

- reg = <0x2ffff000 0x1000>;

- #address-cells = <1>;

- #size-cells = <1>;

- ranges = <0 0x2ffff000 0x1000>;

- scmi_shm: scmi-sram@0 {

- compatible = "arm,scmi-shmem";

diff --git a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts
index 4279b26547df..df97e03d2a5a 100644
--- a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts
+++ b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts

- phy-dsi-supply = <&reg18>;

- #address-cells = <1>;

- #size-cells = <0>;

- dsi_in: endpoint {

- remote-endpoint = <&ltdc_ep0_out>;

- dsi_out: endpoint {

- remote-endpoint = <&bridge_in>;

diff --git a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts
index efba54289820..f8e404346396 100644
--- a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts
+++ b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1-edimm2.2.dts

- phy-dsi-supply = <&reg18>;

- #address-cells = <1>;

- #size-cells = <0>;

- dsi_in_ltdc: endpoint {

- remote-endpoint = <&ltdc_out_dsi>;

- dsi_out_bridge: endpoint {

- remote-endpoint = <&bridge_in_dsi>;

- remote-endpoint = <&dsi_out_bridge>;

- remote-endpoint = <&dsi_in_ltdc>;

- phy-dsi-supply = <&reg18>;

- #address-cells = <1>;

- #size-cells = <0>;

- dsi_in: endpoint {

- remote-endpoint = <&ltdc_ep1_out>;

- dsi_out: endpoint {

- remote-endpoint = <&panel_in>;

-// SPDX-License-Identifier: (GPL-2.0 or MIT)

- regulator-over-current-protection;

- regulator-active-discharge;

- mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;

- mbox-names = "vq0", "vq1", "shutdown";

- phy-dsi-supply = <&reg18>;

- #address-cells = <1>;

- #size-cells = <0>;

- dsi_in: endpoint {

- remote-endpoint = <&ltdc_ep0_out>;

- dsi_out: endpoint {

- remote-endpoint = <&dsi_panel_in>;

- mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;

- mbox-names = "vq0", "vq1", "shutdown";

- mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;

- mbox-names = "vq0", "vq1", "shutdown";

- mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;

- mbox-names = "vq0", "vq1", "shutdown";

- mcasp0_pins: pinmux_mcasp0_pins {

- nand_pins: nand_pins {

- mcasp0_pins: pinmux_mcasp0_pins {

- nand_pins: nand_pins {

- ev3_lcd_pins: pinmux_lcd {

- serial0_rtscts_pins: pinmux_serial0_rtscts_pins {

- serial0_rxtx_pins: pinmux_serial0_rxtx_pins {

- serial1_rtscts_pins: pinmux_serial1_rtscts_pins {

- serial1_rxtx_pins: pinmux_serial1_rxtx_pins {

- serial2_rtscts_pins: pinmux_serial2_rtscts_pins {

- serial2_rxtx_pins: pinmux_serial2_rxtx_pins {

- i2c0_pins: pinmux_i2c0_pins {

- i2c1_pins: pinmux_i2c1_pins {

- mmc0_pins: pinmux_mmc_pins {

- ehrpwm0a_pins: pinmux_ehrpwm0a_pins {

- ehrpwm0b_pins: pinmux_ehrpwm0b_pins {

- ehrpwm1a_pins: pinmux_ehrpwm1a_pins {

- ehrpwm1b_pins: pinmux_ehrpwm1b_pins {

- ecap0_pins: pinmux_ecap0_pins {

- ecap1_pins: pinmux_ecap1_pins {

- ecap2_pins: pinmux_ecap2_pins {

- spi0_pins: pinmux_spi0_pins {

- spi0_cs0_pin: pinmux_spi0_cs0 {

- spi0_cs3_pin: pinmux_spi0_cs3_pin {

- spi1_pins: pinmux_spi1_pins {

- spi1_cs0_pin: pinmux_spi1_cs0 {

- mdio_pins: pinmux_mdio_pins {

- mii_pins: pinmux_mii_pins {

- lcd_pins: pinmux_lcd_pins {

- vpif_capture_pins: vpif_capture_pins {

- vpif_display_pins: vpif_display_pins {

- interrupts = <11 12>;

- interrupts = <93 94>;

- interrupts = <42 43 44 45 46 47 48 49 50>;

- dfesync_rp1_pins: dfesync-rp1-pins{

- oppnitro-1000000000 {

diff --git a/arch/arm/boot/dts/ti/omap/am335x-osd335x-common.dtsi b/arch/arm/boot/dts/ti/omap/am335x-osd335x-common.dtsi
index 9863bf499a39..93a3af83feac 100644
--- a/arch/arm/boot/dts/ti/omap/am335x-osd335x-common.dtsi
+++ b/arch/arm/boot/dts/ti/omap/am335x-osd335x-common.dtsi

- oppnitro-1000000000 {

- interrupts = <40 41 42 43>;

- interrupts = <20 21 22 23 24 25 26 27>;

- opp100-275000000 {

- opp100-300000000 {

- opp100-500000000 {

- opp100-600000000 {

- opp120-600000000 {

- opp120-720000000 {

- oppturbo-720000000 {

- oppturbo-800000000 {

- oppnitro-1000000000 {

- opp100-600000000 {

- opp120-720000000 {

- oppturbo-800000000 {

- oppnitro-1000000000 {

- v1_8dreg: fixed-regulator-v1_8dreg{

- v1_8d: fixed-regulator-v1_8d{

- v1_5dreg: fixed-regulator-v1_5dreg{

- v1_5d: fixed-regulator-v1_5d{

- opp100-600000000 {

- interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;

- interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH

- GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;

- opp_slow-500000000 {

- opp_nom-1000000000 {

- opp_od-1176000000 {

- opp_high@1500000000 {

- opp_plus@1800000000 {

diff --git a/arch/arm/boot/dts/ti/omap/motorola-mapphone-common.dtsi b/arch/arm/boot/dts/ti/omap/motorola-mapphone-common.dtsi
index 091ba310053e..d2d516d113ba 100644
--- a/arch/arm/boot/dts/ti/omap/motorola-mapphone-common.dtsi
+++ b/arch/arm/boot/dts/ti/omap/motorola-mapphone-common.dtsi

- assigned-clock-parents = <&sys_clkin_ck>;

- thermal-sensors = <&bandgap 0>;

- opp100-600000000 {

- opp130-800000000 {

- opp1g-1000000000 {

- opp_supply_mpu_iva: opp_supply {

- interrupts = <18 0

- * locomo_probe - probe for a single LoCoMo chip.

- * @phys_addr: physical address of device.

- * Probe for a LoCoMo chip. This must be called

- * before any other locomo-specific code.

- * %-ENODEV device not found.

- * %-EBUSY physical address already marked in-use.

-vivt_flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)

- __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags);

-#define flush_cache_page(vma,addr,pfn) \

- vivt_flush_cache_page(vma,addr,pfn)

-extern void flush_cache_mm(struct mm_struct *mm);

-extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end);

-extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn);

-extern void flush_dcache_page(struct page *);

- * We don't appear to need to do anything here. In fact, if we did, we'd

- * duplicate cache flushing elsewhere performed by flush_dcache_page().

-#define flush_icache_page(vma,page) do { } while (0)

-/* SPDX-License-Identifier: GPL-2.0 */

- * arch/arm/include/asm/ide.h

- * This file contains the ARM architecture specific IDE code.

-#ifndef __ASMARM_IDE_H

-#define __ASMARM_IDE_H

-#define __ide_mm_insw(port,addr,len) readsw(port,addr,len)

-#define __ide_mm_insl(port,addr,len) readsl(port,addr,len)

-#define __ide_mm_outsw(port,addr,len) writesw(port,addr,len)

-#define __ide_mm_outsl(port,addr,len) writesl(port,addr,len)

-#endif /* __KERNEL__ */

-#endif /* __ASMARM_IDE_H */

- bool exclude_self);

-PMD_BIT_FUNC(mkwrite, &= ~L_PMD_SECT_RDONLY);

-void set_pte_at(struct mm_struct *mm, unsigned long addr,

- pte_t *ptep, pte_t pteval);

-static inline pte_t pte_mkwrite(pte_t pte)

- __u8 used_cp[16]; /* thread used copro */

- pgtable_pte_page_dtor(pte);

- tlb_remove_table(tlb, pte);

- struct page *page = virt_to_page(pmdp);

- pgtable_pmd_page_dtor(page);

- tlb_remove_table(tlb, page);

- * the set_pte_at() function.

-extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,

-static inline void update_mmu_cache(struct vm_area_struct *vma,

- unsigned long addr, pte_t *ptep)

-void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs);

- DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp));

- @ r2 = regs->ARM_pc, which is either 2 or 4 bytes ahead of the

- @ faulting instruction depending on Thumb mode.

- @ r3 = regs->ARM_cpsr

- @ The emulation code returns using r9 if it has emulated the

- @ instruction, or the more conventional lr if we are to treat

- @ this as a real undefined instruction

- badr r9, ret_from_exception

- tst r3, #PSR_T_BIT @ Thumb mode?

- bne __und_usr_thumb

- sub r4, r2, #4 @ ARM instr at LR - 4

- ARM_BE8(rev r0, r0) @ little endian instruction

- uaccess_disable ip

- @ r0 = 32-bit ARM instruction which caused the exception

- @ r2 = PC value for the following instruction (:= regs->ARM_pc)

- @ r4 = PC value for the faulting instruction

- @ lr = 32-bit undefined instruction function

- badr lr, __und_usr_fault_32

- @ Thumb instruction

- sub r4, r2, #2 @ First half of thumb instr at LR - 2

-#if CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7

- * Thumb-2 instruction handling. Note that because pre-v6 and >= v6 platforms

- * can never be supported in a single kernel, this code is not applicable at

- * all when __LINUX_ARM_ARCH__ < 6. This allows simplifying assumptions to be

- * made about .arch directives.

-#if __LINUX_ARM_ARCH__ < 7

-/* If the target CPU may not be Thumb-2-capable, a run-time check is needed: */

- ldr_va r5, cpu_architecture

- cmp r5, #CPU_ARCH_ARMv7

- blo __und_usr_fault_16 @ 16bit undefined instruction

- * The following code won't get run unless the running CPU really is v7, so

- * coding round the lack of ldrht on older arches is pointless. Temporarily

- * override the assembler target arch with the minimum required instead:

-ARM_BE8(rev16 r5, r5) @ little endian instruction

- cmp r5, #0xe800 @ 32bit instruction if xx != 0

- blo __und_usr_fault_16_pan @ 16bit undefined instruction

-ARM_BE8(rev16 r0, r0) @ little endian instruction

- add r2, r2, #2 @ r2 is PC + 2, make it PC + 4

- str r2, [sp, #S_PC] @ it's a 2x16bit instr, update

- orr r0, r0, r5, lsl #16

- badr lr, __und_usr_fault_32

- @ r0 = the two 16-bit Thumb instructions which caused the exception

- @ r2 = PC value for the following Thumb instruction (:= regs->ARM_pc)

- @ r4 = PC value for the first 16-bit Thumb instruction

- @ lr = 32bit undefined instruction function

-#if __LINUX_ARM_ARCH__ < 7

-/* If the target arch was overridden, change it back: */

-#ifdef CONFIG_CPU_32v6K

-#endif /* __LINUX_ARM_ARCH__ < 7 */

-#else /* !(CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7) */

- b __und_usr_fault_16

- * The out of line fixup for the ldrt instructions above.

- .pushsection .text.fixup, "ax"

-4: str r4, [sp, #S_PC] @ retry current instruction

- .pushsection __ex_table,"a"

-#if CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7

- * Check whether the instruction is a co-processor instruction.

- * If yes, we need to call the relevant co-processor handler.

- * Note that we don't do a full check here for the co-processor

- * instructions; all instructions with bit 27 set are well

- * defined. The only instructions that should fault are the

- * co-processor instructions. However, we have to watch out

- * for the ARM6/ARM7 SWI bug.

- * NEON is a special case that has to be handled here. Not all

- * NEON instructions are co-processor instructions, so we have

- * to make a special case of checking for them. Plus, there's

- * five groups of them, so we have a table of mask/opcode pairs

- * to check against, and if any match then we branch off into the

- * NEON handler code.

- * Emulators may wish to make use of the following registers:

- * r0 = instruction opcode (32-bit ARM or two 16-bit Thumb)

- * r2 = PC value to resume execution after successful emulation

- * r9 = normal "successful" return address

- * r10 = this threads thread_info structure

- * lr = unrecognised instruction return address

- * IRQs enabled, FIQs enabled.

- @ Fall-through from Thumb-2 __und_usr

- get_thread_info r10 @ get current thread

- adr r6, .LCneon_thumb_opcodes

- get_thread_info r10 @ get current thread

- adr r6, .LCneon_arm_opcodes

-2: ldr r5, [r6], #4 @ mask value

- ldr r7, [r6], #4 @ opcode bits matching in mask

- cmp r5, #0 @ end mask?

- cmp r8, r7 @ NEON instruction?

- strb r7, [r10, #TI_USED_CP + 10] @ mark CP#10 as used

- strb r7, [r10, #TI_USED_CP + 11] @ mark CP#11 as used

- b do_vfp @ let VFP handler handle this

- tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27

- tstne r0, #0x04000000 @ bit 26 set on both ARM and Thumb-2

- and r8, r0, #0x00000f00 @ mask out CP number

- add r6, r10, r8, lsr #8 @ add used_cp[] array offset first

- strb r7, [r6, #TI_USED_CP] @ set appropriate used_cp[]

-#ifdef CONFIG_IWMMXT

- @ Test if we need to give access to iWMMXt coprocessors

- ldr r5, [r10, #TI_FLAGS]

- rsbs r7, r8, #(1 << 8) @ CP 0 or 1 only

- movscs r7, r5, lsr #(TIF_USING_IWMMXT + 1)

- bcs iwmmxt_task_enable

- ARM( add pc, pc, r8, lsr #6 )

- THUMB( lsr r8, r8, #6 )

- THUMB( add pc, r8 )

- W(b) do_fpe @ CP#1 (FPE)

- W(b) do_fpe @ CP#2 (FPE)

- W(b) do_vfp @ CP#10 (VFP)

- W(b) do_vfp @ CP#11 (VFP)

- ret.w lr @ CP#10 (VFP)

- ret.w lr @ CP#11 (VFP)

- ret.w lr @ CP#14 (Debug)

- ret.w lr @ CP#15 (Control)

-.LCneon_arm_opcodes:

- .word 0xfe000000 @ mask

- .word 0xf2000000 @ opcode

- .word 0xff100000 @ mask

- .word 0xf4000000 @ opcode

- .word 0x00000000 @ mask

- .word 0x00000000 @ opcode

-.LCneon_thumb_opcodes:

- .word 0xef000000 @ mask

- .word 0xef000000 @ opcode

- .word 0xff100000 @ mask

- .word 0xf9000000 @ opcode

- .word 0x00000000 @ mask

- .word 0x00000000 @ opcode

- add r10, r10, #TI_FPSTATE @ r10 = workspace

- ldr_va pc, fp_enter, tmp=r4 @ Call FP module USR entry point

- * The FP module is called with these registers set:

- * r0 = instruction

- * r9 = normal "successful" return address

- * r10 = FP workspace

- * lr = unrecognised FP instruction return address

- .pushsection .data

-__und_usr_fault_32:

-__und_usr_fault_16_pan:

- uaccess_disable ip

-__und_usr_fault_16:

- badr lr, ret_from_exception

-ENDPROC(__und_usr_fault_32)

-ENDPROC(__und_usr_fault_16)

- if (is_default_overflow_handler(bp)) {

- if (!is_default_overflow_handler(wp))

- if (is_default_overflow_handler(wp))

- if (is_default_overflow_handler(bp))

- add r0, r10, #TI_IWMMXT_STATE @ get task Concan save area

- ldr r2, [sp, #60] @ current task pc value

- str r0, [r3] @ this task now owns Concan regs

- smp_call_function(machine_crash_nonpanic_core, NULL, false);

- if (strncmp(secstrings + dstsec->sh_name, ".init", 5) != 0)

- memset(thread->used_cp, 0, sizeof(thread->used_cp));

- thread->used_cp[1] = thread->used_cp[2] = 1;

- task_thread_info(child)->abi_syscall = data &

- __NR_SYSCALL_MASK;

-static_assert(NSIGSEGV == 9);

-void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)

- nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_nmi);

-#include <linux/of_platform.h>

-#include <linux/of.h>

-#include <linux/of_platform.h>

-#include <linux/of_address.h>

-#include <linux/slab.h>

-#include <asm/mach/map.h>

-#include <asm/system_misc.h>

-#include "generic.h"

-#include <linux/of_platform.h>

-#include <asm/hardware/cache-l2x0.h>

-#include <linux/of_platform.h>

-#include <linux/init.h>

-#include <linux/io.h>

-#include <linux/kernel.h>

-#include <linux/of_platform.h>

-#include <asm/hardware/cache-l2x0.h>

-#include <linux/of_platform.h>

-#include <linux/of.h>

-#include <linux/of_platform.h>

-#include <asm/mach/map.h>

-#define MX1_AVIC_ADDR 0x00223000

-#include <linux/irq.h>

-#include <linux/of_address.h>

-#include <linux/of_irq.h>

-#include <linux/of_platform.h>

-#include <asm/mach/time.h>

-#include <linux/irq.h>

-#include <linux/of_address.h>

-#include <linux/of_irq.h>

-#include <linux/of_platform.h>

-#include <linux/mm.h>

-#include <asm/mach/time.h>

-#include <linux/irq.h>

-#include <linux/irqdomain.h>

-#include <linux/of_irq.h>

-#include <linux/of_platform.h>

-#include <linux/clk-provider.h>

-#include <linux/clocksource.h>

-#include <asm/mach/time.h>

-#include <asm/hardware/cache-l2x0.h>

-#include <linux/of_platform.h>

-#include <linux/irq.h>

-#include <linux/of_irq.h>

-#include <linux/of_platform.h>

-#include <asm/mach/time.h>

-#include <linux/clk.h>

-#include <linux/clkdev.h>

-#include <linux/err.h>

-#include <linux/io.h>

-#include <linux/irq.h>

-#include <linux/of_irq.h>

-#include <linux/of_platform.h>

-#include <asm/mach/time.h>

-#include <linux/phy.h>

-#include <asm/mach/map.h>

-#include <linux/mfd/syscon.h>

-#include <linux/phy.h>

-#include <linux/regmap.h>

-#include <asm/mach/map.h>

-#include <linux/of_platform.h>

-# PM domain driver for Keystone SOCs

-obj-$(CONFIG_ARCH_KEYSTONE) += pm_domain.o

-#include <linux/of.h>

-#include <linux/of_platform.h>

-#include <linux/of_address.h>

-#include "memory.h"

-#include "keystone.h"

-/* SPDX-License-Identifier: GPL-2.0-only */

- * Cyril Chemparathy <cyril@ti.com>

- * Santosh Shilimkar <santosh.shillimkar@ti.com>

-#ifndef __KEYSTONE_H__

-#define __KEYSTONE_H__

-#ifndef __ASSEMBLER__

-extern int keystone_pm_runtime_init(void);

-#endif /* __ASSEMBLER__ */

-#endif /* __KEYSTONE_H__ */

-/* SPDX-License-Identifier: GPL-2.0-only */

- * Santosh Shilimkar <santosh.shilimkar@ti.com>

-#define KEYSTONE_LOW_PHYS_START 0x80000000ULL

-#define KEYSTONE_LOW_PHYS_SIZE 0x80000000ULL /* 2G */

-#define KEYSTONE_LOW_PHYS_END (KEYSTONE_LOW_PHYS_START + \

- KEYSTONE_LOW_PHYS_SIZE - 1)

-#define KEYSTONE_HIGH_PHYS_START 0x800000000ULL

-#define KEYSTONE_HIGH_PHYS_SIZE 0x400000000ULL /* 16G */

-#define KEYSTONE_HIGH_PHYS_END (KEYSTONE_HIGH_PHYS_START + \

- KEYSTONE_HIGH_PHYS_SIZE - 1)

-#endif /* __MEMORY_H */

-// SPDX-License-Identifier: GPL-2.0-only

- * PM domain driver for Keystone2 devices

- * Santosh Shilimkar <santosh.shillimkar@ti.com>

- * Based on Kevins work on DAVINCI SOCs

- * Kevin Hilman <khilman@linaro.org>

-#include <linux/init.h>

-#include <linux/pm_runtime.h>

-#include <linux/pm_clock.h>

-#include <linux/platform_device.h>

-#include <linux/of.h>

-#include "keystone.h"

-static struct dev_pm_domain keystone_pm_domain = {

- USE_PM_CLK_RUNTIME_OPS

- USE_PLATFORM_PM_SLEEP_OPS

-static struct pm_clk_notifier_block platform_domain_notifier = {

- .pm_domain = &keystone_pm_domain,

- .con_ids = { NULL },

-static const struct of_device_id of_keystone_table[] = {

- {.compatible = "ti,k2hk"},

- {.compatible = "ti,k2e"},

- {.compatible = "ti,k2l"},

- { /* end of list */ },

-int __init keystone_pm_runtime_init(void)

- struct device_node *np;

- np = of_find_matching_node(NULL, of_keystone_table);

- pm_clk_add_notifier(&platform_bus_type, &platform_domain_notifier);

-#include <linux/of_platform.h>

-#include <linux/irqchip.h>

-#include <linux/of_platform.h>

-#include <asm/mach/time.h>

-#include <linux/io.h>

-#include <linux/irqchip.h>

-#include <linux/of_platform.h>

-#include <asm/mach/time.h>

-#include <linux/io.h>

-#include <linux/irqchip.h>

-#include <linux/of_platform.h>

-#include <linux/clk-provider.h>

-#include <linux/of_device.h>

-#include <linux/device.h>

-#include <linux/amba/bus.h>

-#include <linux/platform_device.h>

-#include <linux/slab.h>

-#include <linux/irq.h>

-#include <linux/dma-mapping.h>

-#include <linux/of_irq.h>

-#include <linux/of_address.h>

-#include <linux/of_platform.h>

-#include <asm/mach/time.h>

-#include <asm/cacheflush.h>

-#include <asm/hardware/cache-l2x0.h>

-#include <linux/device.h>

-#include <linux/of_device.h>

-#include <linux/of_platform.h>

-/* SPDX-License-Identifier: GPL-2.0-only */

- * linux/arch/arm/mach-nspire/mmio.h

-#define NSPIRE_MISC_PHYS_BASE 0x900A0000

-#define NSPIRE_MISC_HWRESET 0x08

-#define NSPIRE_PWR_PHYS_BASE 0x900B0000

-#define NSPIRE_PWR_VIRT_BASE 0xFEEB0000

-#define NSPIRE_PWR_BUS_DISABLE1 0x18

-#define NSPIRE_PWR_BUS_DISABLE2 0x20

-#define NSPIRE_LCD_PHYS_BASE 0xC0000000

- * linux/arch/arm/mach-nspire/nspire.c

-#include <linux/init.h>

-#include <linux/of_irq.h>

-#include <linux/of_address.h>

-#include <linux/of_platform.h>

-#include <linux/irqchip.h>

-#include <linux/irqchip/arm-vic.h>

-#include <linux/clkdev.h>

-#include <linux/amba/bus.h>

-#include <asm/mach-types.h>

-#include <asm/mach/map.h>

-static void nspire_restart(enum reboot_mode mode, const char *cmd)

- void __iomem *base = ioremap(NSPIRE_MISC_PHYS_BASE, SZ_4K);

- writel(2, base + NSPIRE_MISC_HWRESET);

- .restart = nspire_restart,

-#include <linux/of_irq.h>

-#include <linux/of_platform.h>

-#include <linux/platform_device.h>

-#include <linux/of_platform.h>

- const __be32 *ranges;

- u32 nr_addr, nr_size;

- ranges = of_get_property(np, "ranges", &len);

- len /= sizeof(*ranges);

- error = of_property_read_u32(np, "#address-cells", &nr_addr);

- error = of_property_read_u32(np, "#size-cells", &nr_size);

- if (nr_addr != 1 || nr_size != 1) {

- pr_err("%s: invalid range for %s->%pOFn\n", __func__,

- base = of_translate_address(np, ranges++);

- size = be32_to_cpup(ranges);

- pr_debug("omap_hwmod: %s %pOFn at 0x%llx size 0x%llx\n",

- oh->name, np, base, size);

- res->start = base;

- res->end = base + size - 1;

- res->flags = IORESOURCE_MEM;

- pr_warn("A possible cause could be an old bootloader - try u-boot >= v2012.07\n");

- pr_warn("OMAP4 PM: u-boot >= v2012.07 is required for full PM support\n");

- if (pwrdm->state != prev)

-#include <linux/irq.h>

-#include <linux/irqdomain.h>

-#include <linux/of_irq.h>

-#include <linux/of_platform.h>

-#include <asm/mach/time.h>

-EXPORT_SYMBOL(sharpsl_battery_kick);

-#include <linux/module.h> /* symbol_get ; symbol_put */

-static void spitz_bl_kick_battery(void)

- void (*kick_batt)(void);

- kick_batt = symbol_get(sharpsl_battery_kick);

- symbol_put(sharpsl_battery_kick);

- .kick_battery = spitz_bl_kick_battery,

-#include <linux/of_platform.h>

-#include <linux/irqchip.h>

-#include <linux/mfd/syscon.h>

-#include <linux/regmap.h>

-#include <asm/hardware/cache-l2x0.h>

-#include <linux/of_platform.h>

-#include <linux/genalloc.h>

-#include <linux/module.h>

-#include <linux/of_platform.h>

-#include <linux/of_irq.h>

-#include <linux/of_platform.h>

-#include <asm/hardware/cache-l2x0.h>

-#include <linux/of_platform.h>

-#include <linux/irq.h>

-#include <linux/of_platform.h>

-obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o

-#include "pm_domains.h"

- /* Initialize ux500 power domains */

- ux500_pm_domains_init();

-/* SPDX-License-Identifier: GPL-2.0-only */

- * Author: Ulf Hansson <ulf.hansson@linaro.org>

-#ifndef __MACH_UX500_PM_DOMAINS_H

-#define __MACH_UX500_PM_DOMAINS_H

-#ifdef CONFIG_PM_GENERIC_DOMAINS

-extern int __init ux500_pm_domains_init(void);

-static inline int ux500_pm_domains_init(void) { return 0; }

-#include <linux/of_platform.h>

-#include <asm/hardware/cache-l2x0.h>

- * uniphier_cache_data - UniPhier outer cache specific data

- if (!test_and_set_bit(PG_dcache_clean, &from->flags))

- __flush_dcache_page(page_mapping_file(from), from);

- if (!test_and_set_bit(PG_dcache_clean, &from->flags))

- __flush_dcache_page(page_mapping_file(from), from);

- if (!test_and_set_bit(PG_dcache_clean, &from->flags))

- __flush_dcache_page(page_mapping_file(from), from);

- unsigned long pfn;

- size_t left = size;

- pfn = page_to_pfn(page) + off / PAGE_SIZE;

- left -= PAGE_SIZE - off;

- while (left >= PAGE_SIZE) {

- page = pfn_to_page(pfn++);

- set_bit(PG_dcache_clean, &page->flags);

- left -= PAGE_SIZE;

- pte = pte_offset_map(pmd, address);

- ptl = pte_lockptr(vma->vm_mm, pmd);

-void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,

- struct page *page;

- page = pfn_to_page(pfn);

- if (page == ZERO_PAGE(0))

- mapping = page_mapping_file(page);

- if (!test_and_set_bit(PG_dcache_clean, &page->flags))

- __flush_dcache_page(mapping, page);

-void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)

- vivt_flush_cache_page(vma, user_addr, pfn);

-void __flush_dcache_page(struct address_space *mapping, struct page *page)

- if (!PageHighMem(page)) {

- __cpuc_flush_dcache_area(page_address(page), page_size(page));

- for (i = 0; i < compound_nr(page); i++) {

- void *addr = kmap_atomic(page + i);

- kunmap_atomic(addr);

- for (i = 0; i < compound_nr(page); i++) {

- void *addr = kmap_high_get(page + i);

- kunmap_high(page + i);

- flush_pfn_alias(page_to_pfn(page),

- page->index << PAGE_SHIFT);

-static void __flush_dcache_aliases(struct address_space *mapping, struct page *page)

- struct vm_area_struct *mpnt;

- pgoff = page->index;

- vma_interval_tree_foreach(mpnt, &mapping->i_mmap, pgoff, pgoff) {

- unsigned long offset;

- if (mpnt->vm_mm != mm)

- if (!(mpnt->vm_flags & VM_MAYSHARE))

- offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;

- flush_cache_page(mpnt, mpnt->vm_start + offset, page_to_pfn(page));

- struct page *page;

- page = pfn_to_page(pfn);

- mapping = page_mapping_file(page);

- if (!test_and_set_bit(PG_dcache_clean, &page->flags))

- __flush_dcache_page(mapping, page);

-void flush_dcache_page(struct page *page)

- if (page == ZERO_PAGE(0))

- if (test_bit(PG_dcache_clean, &page->flags))

- clear_bit(PG_dcache_clean, &page->flags);

- mapping = page_mapping_file(page);

- mapping && !page_mapcount(page))

- clear_bit(PG_dcache_clean, &page->flags);

- __flush_dcache_page(mapping, page);

- __flush_dcache_aliases(mapping, page);

- set_bit(PG_dcache_clean, &page->flags);

-EXPORT_SYMBOL(flush_dcache_page);

-extern void __flush_dcache_page(struct address_space *mapping, struct page *page);

- void *ptr = (void *)__get_free_pages(GFP_PGTABLE_KERNEL, get_order(sz));

- if (!ptr || !pgtable_pte_page_ctor(virt_to_page(ptr)))

- __flush_dcache_page(NULL, empty_zero_page);

-void set_pte_at(struct mm_struct *mm, unsigned long addr,

- pte_t *ptep, pte_t pteval)

- set_pte_ext(ptep, pteval, ext);

-static bool in_range(unsigned long start, unsigned long size,

- if (!in_range(start, size, MODULES_VADDR, MODULES_END) &&

- !in_range(start, size, VMALLOC_START, VMALLOC_END))

-obj-y += vfpmodule.o entry.o vfphw.o vfpsingle.o vfpdouble.o

-/* SPDX-License-Identifier: GPL-2.0-only */

- * linux/arch/arm/vfp/entry.S

- * Written by Deep Blue Solutions Limited.

-#include <linux/init.h>

-#include <linux/linkage.h>

-#include <asm/thread_info.h>

-#include <asm/vfpmacros.h>

-#include <asm/assembler.h>

-#include <asm/asm-offsets.h>

-@ r0 = instruction opcode (32-bit ARM or two 16-bit Thumb)

-@ r2 = PC value to resume execution after successful emulation

-@ r9 = normal "successful" return address

-@ r10 = this threads thread_info structure

-@ lr = unrecognised instruction return address

- str lr, [sp, #-8]!

- * This code is called from the kernel's undefined instruction trap.

- * r1 holds the thread_info pointer

- * r3 holds the return address for successful handling.

- * lr holds the return address for unrecognised instructions.

- * sp points to a struct pt_regs (as defined in include/asm/proc/ptrace.h)

- .macro DBGSTR, str

- stmfd sp!, {r0-r3, ip, lr}

- ldmfd sp!, {r0-r3, ip, lr}

- .pushsection .rodata, "a"

-1: .ascii KERN_DEBUG "VFP: \str\n"

- .macro DBGSTR3, str, arg1, arg2, arg3

- stmfd sp!, {r0-r3, ip, lr}

- ldmfd sp!, {r0-r3, ip, lr}

- .pushsection .rodata, "a"

-1: .ascii KERN_DEBUG "VFP: \str\n"

-@ VFP hardware support entry point.

-@ r0 = instruction opcode (32-bit ARM or two 16-bit Thumb)

-@ r1 = thread_info pointer

-@ r2 = PC value to resume execution after successful emulation

-@ r3 = normal "successful" return address

-@ lr = unrecognised instruction return address

-ENTRY(vfp_support_entry)

- ldr r11, [r1, #TI_CPU] @ CPU number

- add r10, r1, #TI_VFPSTATE @ r10 = workspace

- DBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10

- VFPFMRX r1, FPEXC @ Is the VFP enabled?

- DBGSTR1 "fpexc %08x", r1

- bne look_for_VFP_exceptions @ VFP is already enabled

- DBGSTR1 "enable %x", r10

- ldr r9, vfp_current_hw_state_address

- orr r1, r1, #FPEXC_EN @ user FPEXC has the enable bit set

- ldr r4, [r9, r11, lsl #2] @ vfp_current_hw_state pointer

- bic r5, r1, #FPEXC_EX @ make sure exceptions are disabled

- cmp r4, r10 @ this thread owns the hw context?

- @ For UP, checking that this thread owns the hw context is

- @ sufficient to determine that the hardware state is valid.

- beq vfp_hw_state_valid

- @ On UP, we lazily save the VFP context. As a different

- @ thread wants ownership of the VFP hardware, save the old

- @ state if there was a previous (valid) owner.

- VFPFMXR FPEXC, r5 @ enable VFP, disable any pending

- @ exceptions, so we can get at the

- DBGSTR1 "save old state %p", r4

- cmp r4, #0 @ if the vfp_current_hw_state is NULL

- beq vfp_reload_hw @ then the hw state needs reloading

- VFPFSTMIA r4, r5 @ save the working registers

- VFPFMRX r5, FPSCR @ current status

-#ifndef CONFIG_CPU_FEROCEON

- tst r1, #FPEXC_EX @ is there additional state to save?

- VFPFMRX r6, FPINST @ FPINST (only if FPEXC.EX is set)

- tst r1, #FPEXC_FP2V @ is there an FPINST2 to read?

- VFPFMRX r8, FPINST2 @ FPINST2 if needed (and present)

- stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2

- @ For SMP, if this thread does not own the hw context, then we

- @ need to reload it. No need to save the old state as on SMP,

- @ we always save the state when we switch away from a thread.

- @ This thread has ownership of the current hardware context.

- @ However, it may have been migrated to another CPU, in which

- @ case the saved state is newer than the hardware context.

- @ Check this by looking at the CPU number which the state was

- @ last loaded onto.

- ldr ip, [r10, #VFP_CPU]

- beq vfp_hw_state_valid

- @ We're loading this threads state into the VFP hardware. Update

- @ the CPU number which contains the most up to date VFP context.

- str r11, [r10, #VFP_CPU]

- VFPFMXR FPEXC, r5 @ enable VFP, disable any pending

- @ exceptions, so we can get at the

- DBGSTR1 "load state %p", r10

- str r10, [r9, r11, lsl #2] @ update the vfp_current_hw_state pointer

- VFPFLDMIA r10, r5 @ reload the working registers while

- ldmia r10, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2

-#ifndef CONFIG_CPU_FEROCEON

- tst r1, #FPEXC_EX @ is there additional state to restore?

- VFPFMXR FPINST, r6 @ restore FPINST (only if FPEXC.EX is set)

- tst r1, #FPEXC_FP2V @ is there an FPINST2 to write?

- VFPFMXR FPINST2, r8 @ FPINST2 if needed (and present)

- VFPFMXR FPSCR, r5 @ restore status

-@ The context stored in the VFP hardware is up to date with this thread

-vfp_hw_state_valid:

- bne process_exception @ might as well handle the pending

- @ exception before retrying branch

- @ out before setting an FPEXC that

- @ stops us reading stuff

- VFPFMXR FPEXC, r1 @ Restore FPEXC last

- mov sp, r3 @ we think we have handled things

- sub r2, r2, #4 @ Retry current instruction - if Thumb

- str r2, [sp, #S_PC] @ mode it's two 16-bit instructions,

- @ else it's one 32-bit instruction, so

- @ always subtract 4 from the following

- @ instruction address.

-local_bh_enable_and_ret:

- mov r1, #SOFTIRQ_DISABLE_OFFSET

- b __local_bh_enable_ip @ tail call

-look_for_VFP_exceptions:

- @ Check for synchronous or asynchronous exception

- tst r1, #FPEXC_EX | FPEXC_DEX

- bne process_exception

- @ On some implementations of the VFP subarch 1, setting FPSCR.IXE

- @ causes all the CDP instructions to be bounced synchronously without

- @ setting the FPEXC.EX bit

- tst r5, #FPSCR_IXE

- bne process_exception

- tst r5, #FPSCR_LENGTH_MASK

- orr r1, r1, #FPEXC_DEX

- b process_exception

- @ Fall into hand on to next handler - appropriate coproc instr

- @ not recognised by VFP

- b local_bh_enable_and_ret

- mov sp, r3 @ setup for a return to the user code.

- mov r2, sp @ nothing stacked - regdump is at TOS

- @ Now call the C code to package up the bounce to the support code

- @ r0 holds the trigger instruction

- @ r1 holds the FPEXC value

- @ r2 pointer to register dump

- b VFP_bounce @ we have handled this - the support

- @ code will raise an exception if

- @ required. If not, the user code will

- @ retry the faulted instruction

-ENDPROC(vfp_support_entry)

-vfp_current_hw_state_address:

- .word vfp_current_hw_state

- * Our undef handlers (in entry.S)

-asmlinkage void vfp_support_entry(u32, void *, u32, u32);

-static unsigned int __initdata VFP_arch;

-void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)

-#ifndef CONFIG_CPU_FEROCEON

- local_bh_enable();

- * r0 = instruction opcode (32-bit ARM or two 16-bit Thumb)

- * r1 = thread_info pointer

- * r2 = PC value to resume execution after successful emulation

- * r3 = normal "successful" return address

- * lr = unrecognised instruction return address

-asmlinkage void vfp_entry(u32 trigger, struct thread_info *ti, u32 resume_pc,

- u32 resume_return_address)

- if (unlikely(!have_vfp))

- local_bh_disable();

- vfp_support_entry(trigger, ti, resume_pc, resume_return_address);

-#ifdef CONFIG_KERNEL_MODE_NEON

-static struct undef_hook vfp_kmode_exception_hook[] = {{

- .cpsr_mask = MODE_MASK | PSR_T_BIT,

- .cpsr_val = SVC_MODE,

- .fn = vfp_kmode_exception,

- .cpsr_mask = MODE_MASK | PSR_T_BIT,

- .cpsr_val = SVC_MODE,

- .fn = vfp_kmode_exception,

- .cpsr_mask = MODE_MASK | PSR_T_BIT,

- .cpsr_val = SVC_MODE | PSR_T_BIT,

- .fn = vfp_kmode_exception,

- .cpsr_mask = MODE_MASK | PSR_T_BIT,

- .cpsr_val = SVC_MODE | PSR_T_BIT,

- .fn = vfp_kmode_exception,

- .instr_mask = 0x0c000e00,

- .instr_val = 0x0c000a00,

- .cpsr_mask = MODE_MASK,

- .cpsr_val = SVC_MODE,

- .fn = vfp_kmode_exception,

-static int __init vfp_kmode_exception_hook_init(void)

- for (i = 0; i < ARRAY_SIZE(vfp_kmode_exception_hook); i++)

- register_undef_hook(&vfp_kmode_exception_hook[i]);

-subsys_initcall(vfp_kmode_exception_hook_init);

- (fmrx(MVFR1) & 0x000fff00) == 0x00011100)

- if (!io_tlb_default_mem.nslabs) {

- rc = swiotlb_init_late(swiotlb_size_or_default(),

- xen_swiotlb_gfp(), NULL);

-config ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE

- depends on PM_SLEEP_SMP

- bool "kexec system call"

- kexec is a system call that implements the ability to shutdown your

- current kernel, and to start another kernel. It is like a reboot

- but it is independent of the system firmware. And like a reboot

- you can start any kernel with it, not just Linux.

- bool "kexec file based system call"

- select HAVE_IMA_KEXEC if IMA

- This is new version of kexec system call. This system call is

- file based and takes file descriptors as system call argument

- for kernel and initramfs as opposed to list of segments as

- accepted by previous system call.

- bool "Verify kernel signature during kexec_file_load() syscall"

- Select this option to verify a signature with loaded kernel

- image. If configured, any attempt of loading a image without

- valid signature will fail.

- In addition to that option, you need to enable signature

- verification for the corresponding kernel image type being

- loaded in order for this to work.

-config KEXEC_IMAGE_VERIFY_SIG

- bool "Enable Image signature verification support"

- depends on KEXEC_SIG

- depends on EFI && SIGNED_PE_FILE_VERIFICATION

- Enable Image signature verification support.

-comment "Support for PE file signature verification disabled"

- depends on KEXEC_SIG

- depends on !EFI || !SIGNED_PE_FILE_VERIFICATION

- bool "Build kdump crash kernel"

- Generate crash dump after being started by kexec. This should

- be normally only set in special crash dump kernels which are

- loaded in the main kernel with kexec-tools into a specially

- reserved region and then later executed after a crash by

- For more details see Documentation/admin-guide/kdump/kdump.rst

-config AS_HAS_LDAPR

- def_bool $(as-instr,.arch_extension rcpc)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts
index d34c2bb1079f..f5c5c1464482 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts

-// SPDX-License-Identifier: (GPL-2.0+ or MIT)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts
index 686f58e77004..b710f1a0f53a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts

-// SPDX-License-Identifier: (GPL-2.0+ or MIT)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
index cb8600d0ea1e..d83852e72f06 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts

-// SPDX-License-Identifier: (GPL-2.0+ or MIT)

-#include "sun50i-h616.dtsi"

-#include <dt-bindings/gpio/gpio.h>

-#include <dt-bindings/interrupt-controller/arm-gic.h>

-#include <dt-bindings/leds/common.h>

- ethernet0 = &emac0;

- stdout-path = "serial0:115200n8";

- compatible = "gpio-leds";

- function = LED_FUNCTION_POWER;

- color = <LED_COLOR_ID_RED>;

- gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */

- default-state = "on";

- function = LED_FUNCTION_STATUS;

- color = <LED_COLOR_ID_GREEN>;

- gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */

- reg_vcc5v: vcc5v {

- /* board wide 5V supply directly from the USB-C socket */

- compatible = "regulator-fixed";

- regulator-name = "vcc-5v";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- regulator-always-on;

- reg_usb1_vbus: regulator-usb1-vbus {

- compatible = "regulator-fixed";

- regulator-name = "usb1-vbus";

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- vin-supply = <&reg_vcc5v>;

- enable-active-high;

- gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */

-/* USB 2 & 3 are on headers only. */

- pinctrl-names = "default";

- pinctrl-0 = <&ext_rgmii_pins>;

- phy-mode = "rgmii";

- phy-handle = <&ext_rgmii_phy>;

- allwinner,rx-delay-ps = <3100>;

- allwinner,tx-delay-ps = <700>;

- ext_rgmii_phy: ethernet-phy@1 {

- compatible = "ethernet-phy-ieee802.3-c22";

- cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */

- pinctrl-names = "default";

- pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;

- #address-cells = <1>;

- #size-cells = <1>;

- compatible = "jedec,spi-nor";

- spi-max-frequency = <40000000>;

- pinctrl-names = "default";

- pinctrl-0 = <&uart0_ph_pins>;

- * PHY0 pins are connected to a USB-C socket, but a role switch

- * is not implemented: both CC pins are pulled to GND.

- * The VBUS pins power the device, so a fixed peripheral mode

- * is the best choice.

- * The board can be powered via GPIOs, in this case port0 *can*

- * act as a host (with a cable/adapter ignoring CC), as VBUS is

- * then provided by the GPIOs. Any user of this setup would

- * need to adjust the DT accordingly: dr_mode set to "host",

- * enabling OHCI0 and EHCI0.

- dr_mode = "peripheral";

- usb1_vbus-supply = <&reg_usb1_vbus>;

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
index 07424c28b696..959b6fd18483 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts

-// SPDX-License-Identifier: (GPL-2.0+ or MIT)

- reset-names = "stmmaceth", "stmmaceth-ocp";

- usbphy0: usbphy@0 {

- compatible = "usb-nop-xceiv";

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
index 3037f58057c9..468fcc7da066 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts

- reg = <0x0 0x03FE0000>;

- qspi_rootfs: partition@3FE0000 {

- label = "Root Filesystem - JFFS2";

- reg = <0x03FE0000 0x0C020000>;

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
index f4cf30bac557..532164a6354c 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts

- qspi_rootfs: partition@3FE0000 {

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts
index a8db58573954..ff413f8e3b07 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts

- compatible = "amlogic,meson-gx-uart",

- ao_pinctrl: pinctrl@14 {

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
index cf0a9be83fc4..fcd7e1d8e16f 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts

- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts
index 1b0c3881c6a1..13d478f9c891 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts

- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
index 97e522921b06..995ce10d5c81 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi

- enable-gpio = <&gpio_ao GPIOAO_3 GPIO_OPEN_DRAIN>;

- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
index 83709787eb91..0a6a12808568 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi

- cooling-min-state = <0>;

- cooling-max-state = <3>;

- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts
index afe375fa83ca..6eeedd54ab91 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts
index 29d642e746d4..eed2a23047ca 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts

- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",

- interrupts = <7 IRQ_TYPE_LEVEL_LOW>; /* GPIOAO_7 */

- interrupts = <5 IRQ_TYPE_LEVEL_LOW>; /* GPIOAO_5 */

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
index 24d0442dffb2..91c9769fda20 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi

- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2l.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2l.dts
index 70919f40d597..e26f3e3258e1 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2l.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2l.dts

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts
index 0c7892600d56..098a3af6d381 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts

- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;

diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
index 4e84ab87cc7d..5e7b9273b062 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
index 7d94160f5802..1fd2e56e6b08 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
index 63137ce3cb9d..4aab1ab705b4 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
index 66daf3af34c3..e8303089bff6 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
index 58733017eda8..af9ea32a2876 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
index 505ffcd8eb76..e1b74b174915 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts
index 213a0705ebdc..a29b49f051ae 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
index ff906becd2ab..c0d6eb55100a 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
index 02f81839d4e3..fea65f20523a 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts
index 6c4e68e0e625..2825db91e462 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
index 82bfabfbd39c..27093e6ac9e2 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
index 74897a154891..860f307494c5 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts

diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts
index d1debccdc1c2..9b2eb6e42651 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts

- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;

diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air.dts
index c94f2870b78b..6e34fd80ed71 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air.dts

- interrupts = <3 IRQ_TYPE_EDGE_BOTH>;

- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;

diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts
index 74088e7280fe..846a2d6c20e5 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts

- cooling-min-state = <0>;

- cooling-max-state = <3>;

- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;

- interrupts = <34 IRQ_TYPE_EDGE_BOTH>;

- interrupts = <35 IRQ_TYPE_EDGE_BOTH>;

- interrupts = <2 IRQ_TYPE_EDGE_BOTH>;

- interrupts = <99 IRQ_TYPE_EDGE_BOTH>;

- interrupts = <3 IRQ_TYPE_EDGE_BOTH>;

- interrupts = <95 IRQ_TYPE_LEVEL_HIGH>;

diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-gbit.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-gbit.dts
index 7e1a74046ba5..fc9b961133cd 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-gbit.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-gbit.dts

- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;

-// SPDX-License-Identifier: GPL-2.0 or MIT

- reg = <0x1c010000 0x1000>,

- <0x1c02f000 0x2000>,

- <0x1c04f000 0x1000>,

- <0x1c06f000 0x2000>;

- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |

- IRQ_TYPE_LEVEL_LOW)>,

- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) |

- IRQ_TYPE_LEVEL_LOW)>,

- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) |

- IRQ_TYPE_LEVEL_LOW)>,

- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) |

- IRQ_TYPE_LEVEL_LOW)>;

- reg = <0x0 0x2f000000 0x0 0x10000>,

- <0x0 0x2f100000 0x0 0x200000>,

- <0x0 0x2c000000 0x0 0x2000>,

- <0x0 0x2c010000 0x0 0x2000>,

- <0x0 0x2c02f000 0x0 0x2000>;

- partition@a400000{

diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958802a802x.dts b/arch/arm64/boot/dts/broadcom/stingray/bcm958802a802x.dts
index a41facd7d79b..66471a25e4ac 100644
--- a/arch/arm64/boot/dts/broadcom/stingray/bcm958802a802x.dts
+++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958802a802x.dts

-// SPDX-License-Identifier: (GPL-2.0 or BSD-3-Clause)

diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray-board-base.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray-board-base.dtsi
index 82a24711d0d8..cdd709491f01 100644
--- a/arch/arm64/boot/dts/broadcom/stingray/stingray-board-base.dtsi
+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray-board-base.dtsi

-// SPDX-License-Identifier: (GPL-2.0 or BSD-3-Clause)

diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray-pcie.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray-pcie.dtsi
index 33a472ab17e8..663e51756746 100644
--- a/arch/arm64/boot/dts/broadcom/stingray/stingray-pcie.dtsi
+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray-pcie.dtsi

-// SPDX-License-Identifier: (GPL-2.0 or BSD-3-Clause)

diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray-usb.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray-usb.dtsi
index 5401a646c840..ac4f7b8f9273 100644
--- a/arch/arm64/boot/dts/broadcom/stingray/stingray-usb.dtsi
+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray-usb.dtsi

-// SPDX-License-Identifier: (GPL-2.0 or BSD-3-Clause)

- enet: ethernet@340000{

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
index e4ed788413fe..d163891cd399 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi

- reg = <0x11001000 0x1000>,

- <0x11002000 0x2000>,

- <0x11004000 0x2000>,

- <0x11006000 0x2000>;

- pinctrl_aud: pinctrl@19c60000{

-imx8mm-venice-gw72xx-0x-imx219-dtbs := imx8mm-venice-gw73xx-0x.dtb imx8mm-venice-gw73xx-0x-imx219.dtbo

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dts
index 73eb6061c73e..af9194eca556 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dts

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dts
index 7cd29ab970d9..1f34c7553459 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dts

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dts
index 113b1df74bf8..aac41192caa1 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dts

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts
index 9b5e92fb753e..a4421db3784e 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts
index 4ab17b984b03..8b65af4a7147 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts

- #address-cells=<1>;

- reg = <0x5b130000 0x10000>, /* memory area for HOST registers */

- <0x5b140000 0x10000>, /* memory area for DEVICE registers */

- <0x5b120000 0x10000>; /* memory area for OTG/DRD registers */

- reg-names = "xhci", "dev", "otg";

- #address-cells = <1>;

- #size-cells = <1>;

- fsl,spi-num-chipselects = <1>;

- compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
index bc531175ff76..b10e2a703a44 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi

- pinctrl-names = "default";

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi
index 201325f566cb..f264102bdb27 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi

- clocks = <&osc_32k 0>;

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dts b/arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dts
index b2e8967e9687..c8ff70212602 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dts

-// SPDX-License-Identifier: (GPL-2.0 or MIT)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtsi
index 5028f232b6bd..d897a8527335 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtsi

-// SPDX-License-Identifier: (GPL-2.0 or MIT)

- pinctrl-names = "default";

- regulator-name = "BUCK1";

- regulator-name = "BUCK2";

- regulator-name = "BUCK3";

- regulator-name = "BUCK4";

- regulator-name = "BUCK5";

- regulator-name = "BUCK6";

- regulator-name = "LDO1";

- regulator-name = "LDO2";

- regulator-name = "LDO3";

- regulator-name = "LDO4";

- regulator-name = "LDO6";

- remote-endpoint = <&adv7533_out>;

- reg = <0x3d>, <0x3c>, <0x3e>, <0x3f>;

- reg-names = "main", "cec", "edid", "packet";

- adi,input-depth = <8>;

- adi,input-colorspace = "rgb";

- adi,input-clock = "1x";

- adi,input-style = <1>;

- adi,input-justification = "evenly";

- adv7533_in: endpoint {

- adv7533_out: endpoint {

- remote-endpoint = <&adv7533_in>;

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts
index 479948f8a4b7..92e62fe31929 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts

- pinctrl-names = "default";

- MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x40

- MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x40

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
index 847f08537b48..6069678244f3 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi

- clocks = <&osc_32k 0>;

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x-rpidsi.dtso b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x-rpidsi.dtso
new file mode 100644
index 000000000000..e0768d408c3b
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x-rpidsi.dtso

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rpidsi.dtso b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rpidsi.dtso
new file mode 100644
index 000000000000..e0768d408c3b
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rpidsi.dtso

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
index 0ec2ce3dd721..ed46d4f3e66f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts

- clocks = <&osc_32k 0>;

- pinctrl-names = "default";

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
index 03cd29063312..b318c2d08038 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts

- clocks = <&osc_32k 0>;

- pinctrl-names = "default";

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
index 07b07dc954fd..0e102a12bca4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts

- clocks = <&osc_32k 0>;

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts
index d5b716855812..6afbabc89c02 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts

- clocks = <&osc_32k 0>;

-/* off-board RS232 */

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_uart3>;

- pinctrl_uart3: uart3grp {

- MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140

- MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140

- ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */

- 0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi
index 8a4369d38903..90073b16536f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi

- clocks = <&osc_32k 0>;

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
index 8e100e71b8d2..22a754d438f1 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi

- clocks = <&osc_32k 0>;

- scl-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>;

- sda-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts
index 406a711486da..a7a57442cb81 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts

- interrupts = <11 IRQ_TYPE_LEVEL_LOW>;

- extcon = <&extcon_usbotg1>, <&extcon_usbotg1>;

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts b/arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts
index 2ddba4213001..08746fb82561 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts

- clocks = <&osc_32k 0>;

- pinctrl-names = "default";

- assigned-clocks = <&clk IMX8MP_CLK_SAI3>;

- assigned-clock-rates = <12288000>;

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts b/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts
index b4409349eb3f..28db9349ed62 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts

- clock-frequency = <32768>;

- pinctrl_fec: fecgrp {

- MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3

- MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x3

- MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x91

- MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x91

- MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x91

- MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x91

- MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x91

- MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x91

- MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x1f

- MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x1f

- MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x1f

- MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x1f

- MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x1f

- MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x1f

- MX8MP_IOMUXC_SAI1_RXD1__ENET1_1588_EVENT1_OUT 0x1f

- MX8MP_IOMUXC_SAI1_RXD0__ENET1_1588_EVENT1_IN 0x1f

- MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x19

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts b/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts
index 64d522c71a44..e4215c83ee0f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts

- clock-names = "mclk";

- id-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
index 6aa720bafe28..1e14c4cd3128 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
index ecc4bce6db97..d8df97060e8f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi

- phy-mode = "rgmii-id";

- interrupt-parent = <&gpio1>;

- interrupts = <15 IRQ_TYPE_EDGE_FALLING>;

- ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;

- ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;

- ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;

- enet-phy-lane-no-swap;

- spi-tx-bus-width = <1>;

- sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

- interrupt-parent = <&gpio4>;

- interrupts = <18 IRQ_TYPE_LEVEL_LOW>;

- regulator-min-microvolt = <600000>;

- regulator-max-microvolt = <2187500>;

- regulator-boot-on;

- regulator-min-microvolt = <600000>;

- regulator-max-microvolt = <2187500>;

- regulator-boot-on;

- regulator-always-on;

- regulator-ramp-delay = <3125>;

- regulator-min-microvolt = <600000>;

- regulator-max-microvolt = <3400000>;

- regulator-boot-on;

- regulator-min-microvolt = <600000>;

- regulator-max-microvolt = <3400000>;

- regulator-boot-on;

- regulator-min-microvolt = <600000>;

- regulator-max-microvolt = <3400000>;

- regulator-boot-on;

- regulator-min-microvolt = <1600000>;

- regulator-max-microvolt = <3300000>;

- regulator-boot-on;

- regulator-min-microvolt = <800000>;

- regulator-max-microvolt = <1150000>;

- regulator-always-on;

- regulator-min-microvolt = <800000>;

- regulator-max-microvolt = <3300000>;

- regulator-boot-on;

- regulator-min-microvolt = <800000>;

- regulator-max-microvolt = <3300000>;

- regulator-min-microvolt = <1800000>;

- regulator-max-microvolt = <3300000>;

- regulator-boot-on;

- MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3

- MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x3

- MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x91

- MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x91

- MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x91

- MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x91

- MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x91

- MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x91

- MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0x11

- MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3

- MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c3

- MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0x1e3

- MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0x1e3

- MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x141

- MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190

- MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0

- MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0

- MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0

- MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0

- MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190

- MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194

- MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4

- MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4

- MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4

- MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4

- MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194

- MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196

- MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6

- MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d2

- MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d2

- MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d2

- MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx-rpidsi.dtso b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx-rpidsi.dtso
new file mode 100644
index 000000000000..6a39f43435c2
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx-rpidsi.dtso

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
index 92514b71b5f4..faa370a5885f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts

- pinctrl-0 = <&pinctrl_reg_can>;

- gpio = <&gpio3 19 GPIO_ACTIVE_LOW>;

- "", "", "dio0", "", "dio1", "", "", "",

- "", "", "", "", "", "", "", "",

- "", "", "", "", "", "", "pcie3_wdis#", "",

- "m2_gdis#", "", "", "", "", "", "", "m2_rst#",

- "m2_off#", "", "", "", "", "", "", "",

- "", "", "", "", "", "", "", "",

- "", "", "", "", "m2_wdis#", "", "", "",

- "", "", "", "", "", "", "", "uart_rs485";

- "uart_half", "uart_term", "", "", "", "", "", "",

- compatible = "nxp,pca9450c";

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_pmic>;

- interrupt-parent = <&gpio3>;

- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;

- regulator-name = "BUCK1";

- regulator-min-microvolt = <720000>;

- regulator-max-microvolt = <1000000>;

- regulator-boot-on;

- regulator-always-on;

- regulator-ramp-delay = <3125>;

- regulator-name = "BUCK2";

- regulator-min-microvolt = <720000>;

- regulator-max-microvolt = <1025000>;

- regulator-boot-on;

- regulator-always-on;

- regulator-ramp-delay = <3125>;

- nxp,dvs-run-voltage = <950000>;

- nxp,dvs-standby-voltage = <850000>;

- regulator-name = "BUCK4";

- regulator-min-microvolt = <3000000>;

- regulator-max-microvolt = <3600000>;

- regulator-boot-on;

- regulator-always-on;

- regulator-name = "BUCK5";

- regulator-min-microvolt = <1650000>;

- regulator-max-microvolt = <1950000>;

- regulator-boot-on;

- regulator-always-on;

- regulator-name = "BUCK6";

- regulator-min-microvolt = <1045000>;

- regulator-max-microvolt = <1155000>;

- regulator-boot-on;

- regulator-always-on;

- regulator-name = "LDO1";

- regulator-min-microvolt = <1650000>;

- regulator-max-microvolt = <1950000>;

- regulator-boot-on;

- regulator-always-on;

- regulator-name = "LDO3";

- regulator-min-microvolt = <1710000>;

- regulator-max-microvolt = <1890000>;

- regulator-boot-on;

- regulator-always-on;

- regulator-name = "LDO5";

- regulator-min-microvolt = <1800000>;

- regulator-max-microvolt = <3300000>;

- regulator-boot-on;

- regulator-always-on;

-/* off-board header */

- compatible = "cypress,cyw4373-fmac";

- MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14 0x40000040 /* M2SKT_OFF# */

- MX8MP_IOMUXC_SD2_DATA3__GPIO2_IO18 0x40000150 /* PCIE2_WDIS# */

- MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x40000150 /* M2SKT_WDIS# */

- MX8MP_IOMUXC_NAND_ALE__GPIO3_IO00 0x40000150 /* M2SKT_GDIS# */

- MX8MP_IOMUXC_SD2_DATA2__GPIO2_IO17 0x110

- pinctrl_reg_can: regcangrp {

- pinctrl_sai2: sai2grp {

- MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC 0xd6

- MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00 0xd6

- MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK 0xd6

- MX8MP_IOMUXC_SAI2_MCLK__AUDIOMIX_SAI2_MCLK 0xd6

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi
index 56b0e4b865c9..7e9e4b13b5c5 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi

-/* TODO: Audio Codec */

- /* TODO: Audio Codec */

-/* TODO: Verdin I2S_1 */

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi
index bdfdd4c782f1..a509b2b7fa85 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi

- /* TODO: Audio Codec */

-/* TODO: Verdin I2C_1 with Audio Codec */

- reg = <0x28440000 0x10000>;

- arm,primecell-periphid = <0xbb95d>;

- reg = <0x28540000 0x10000>;

- arm,primecell-periphid = <0xbb95d>;

- reg = <0x28640000 0x10000>;

- arm,primecell-periphid = <0xbb95d>;

- reg = <0x28740000 0x10000>;

- arm,primecell-periphid = <0xbb95d>;

- clocks =<&clk IMX8MP_CLK_VPU_ROOT>;

- ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000>, /* downstream I/O 64KB */

- <0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
index ce7ce2ba855c..8055a2c23035 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts

- reg_usdhc2_vmmc: regulator-usdhc2-vmmc {

- compatible = "regulator-fixed";

- pinctrl-names = "default";

- pinctrl-0 = <&pinctrl_usdhc2_pwr>;

- regulator-name = "VSD_3V3";

- regulator-min-microvolt = <3300000>;

- regulator-max-microvolt = <3300000>;

- gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;

- enable-active-high;

- regulator-always-on;

- mount-matrix = "1", "0", "0",

- pinctrl_usdhc2_pwr: usdhc2pwrgrp {

- vmmc-supply = <&reg_usdhc2_vmmc>;

- power-supply = <&wifi_pwr_en>;

- mount-matrix = "1", "0", "0",

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dtsi
index 7fd0176e4bd3..17f86496f8b0 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dtsi

- mount-matrix = "1", "0", "0",

- proximity-near-level = <5>;

- power-supply = <&reg_vdd_1v8>;

- post-power-on-delay-ms = <1000>;

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts b/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts
index afb3ceb06751..0d8def2766f5 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts

- id-gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;

- snvs_rtc: snvs-rtc-lp{

- ranges = <0x81000000 0 0x00000000 0x27f80000 0 0x00010000>, /* downstream I/O 64KB */

- <0x82000000 0 0x20000000 0x20000000 0 0x07f00000>; /* non-prefetchable memory */

- vpu_core0 = &vpu_core0;

- vpu_core1 = &vpu_core1;

- vpu_core2 = &vpu_core2;

- pinctrl_leds: ledsgrp{

- vpu_core0 = &vpu_core0;

- vpu_core1 = &vpu_core1;

- vpu_core2 = &vpu_core2;

- MX8ULP_PAD_PTD1__SDHC0_CMD 0x43

- MX8ULP_PAD_PTD2__SDHC0_CLK 0x10042

- MX8ULP_PAD_PTD10__SDHC0_D0 0x43

- MX8ULP_PAD_PTD9__SDHC0_D1 0x43

- MX8ULP_PAD_PTD8__SDHC0_D2 0x43

- MX8ULP_PAD_PTD7__SDHC0_D3 0x43

- MX8ULP_PAD_PTD6__SDHC0_D4 0x43

- MX8ULP_PAD_PTD5__SDHC0_D5 0x43

- MX8ULP_PAD_PTD4__SDHC0_D6 0x43

- MX8ULP_PAD_PTD3__SDHC0_D7 0x43

- MX8ULP_PAD_PTD11__SDHC0_DQS 0x10042

- ranges = <0x0 0x0 0x0 0x40000000>;

diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-aster.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri-aster.dtsi
index aab655931cde..bc659066e19a 100644
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri-aster.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-aster.dtsi

diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi
index f8953067bc3b..8d06925a8ebd 100644
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi

- compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";

- fsl,tuning-step= <2>;

- clocks = <&crg HISTB_SDIO0_CIU_CLK>,

- <&crg HISTB_SDIO0_BIU_CLK>;

- i2s0: i2s@f7118000{

- interrupts = <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>;

- reset-names = "stmmaceth", "stmmaceth-ocp";

- #reset-cells = <1>;

- compatible = "altr,stratix10-rst-mgr";

- reg = <0x0 0x03FE0000>;

- qspi_rootfs: partition@3FE0000 {

- label = "Root Filesystem - JFFS2";

- reg = <0x03FE0000 0x0C020000>;

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts
index 51f83f96ec65..0f9020bd0c52 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts

- qspi_rootfs: partition@3FE0000 {

diff --git a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
index 39ce6e25a8ef..48202810bf78 100644
--- a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
+++ b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts

diff --git a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
index e4605d23fdc8..86cedb0bf1a9 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts

- status = "disable";

- mediatek,merge-mute = <1>;

- mediatek,merge-fifo-en = <1>;

- reg = <0x6 0 0x401000>,

- <0x6 0x10004000 0x7fc000>,

- <0x6 0x11010000 0xaf0000>;

- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;

diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
index aa7aac8c3774..ecd171b2feba 100644
--- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
+++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi

- assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;

- assigned-clock-parents = <&bpmp TEGRA194_CLK_PLLA_OUT0>;

- pwm-period = <29334>;

- maxim,disable-etr;

- clock-names = "vic";

- reset-names = "vic";

- assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;

diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
index cd13cf2381dd..4413a9b6da87 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts

-#include <dt-bindings/sound/rt5640.h>

- aconnect@2900000 {

- #address-cells = <1>;

- #size-cells = <0>;

- i2s1_cif: endpoint {

- remote-endpoint = <&xbar_i2s1>;

- i2s1_port: port@1 {

- i2s1_dap: endpoint {

- dai-format = "i2s";

- remote-endpoint = <&rt5640_ep>;

- #address-cells = <1>;

- #size-cells = <0>;

- i2s2_cif: endpoint {

- remote-endpoint = <&xbar_i2s2>;

- i2s2_port: port@1 {

- i2s2_dap: endpoint {

- dai-format = "i2s";

- /* placeholder for external codec */

- #address-cells = <1>;

- #size-cells = <0>;

- i2s4_cif: endpoint {

- remote-endpoint = <&xbar_i2s4>;

- i2s4_port: port@1 {

- i2s4_dap: endpoint {

- dai-format = "i2s";

- /* placeholder for external codec */

- #address-cells = <1>;

- #size-cells = <0>;

- i2s6_cif: endpoint {

- remote-endpoint = <&xbar_i2s6>;

- i2s6_port: port@1 {

- i2s6_dap: endpoint {

- dai-format = "i2s";

- /* placeholder for external codec */

- #address-cells = <1>;

- #size-cells = <0>;

- sfc1_cif_in: endpoint {

- remote-endpoint = <&xbar_sfc1_in>;

- sfc1_out_port: port@1 {

- sfc1_cif_out: endpoint {

- remote-endpoint = <&xbar_sfc1_out>;

- #address-cells = <1>;

- #size-cells = <0>;

- sfc2_cif_in: endpoint {

- remote-endpoint = <&xbar_sfc2_in>;

- sfc2_out_port: port@1 {

- sfc2_cif_out: endpoint {

- remote-endpoint = <&xbar_sfc2_out>;

- #address-cells = <1>;

- #size-cells = <0>;

- sfc3_cif_in: endpoint {

- remote-endpoint = <&xbar_sfc3_in>;

- sfc3_out_port: port@1 {

- sfc3_cif_out: endpoint {

- remote-endpoint = <&xbar_sfc3_out>;

- #address-cells = <1>;

- #size-cells = <0>;

- sfc4_cif_in: endpoint {

- remote-endpoint = <&xbar_sfc4_in>;

- sfc4_out_port: port@1 {

- sfc4_cif_out: endpoint {

- remote-endpoint = <&xbar_sfc4_out>;

- #address-cells = <1>;

- #size-cells = <0>;

- amx1_in1: endpoint {

- remote-endpoint = <&xbar_amx1_in1>;

- amx1_in2: endpoint {

- remote-endpoint = <&xbar_amx1_in2>;

- amx1_in3: endpoint {

- remote-endpoint = <&xbar_amx1_in3>;

- amx1_in4: endpoint {

- remote-endpoint = <&xbar_amx1_in4>;

- amx1_out_port: port@4 {

- amx1_out: endpoint {

- remote-endpoint = <&xbar_amx1_out>;

- #address-cells = <1>;

- #size-cells = <0>;

- amx2_in1: endpoint {

- remote-endpoint = <&xbar_amx2_in1>;

- amx2_in2: endpoint {

- remote-endpoint = <&xbar_amx2_in2>;

- amx2_in3: endpoint {

- remote-endpoint = <&xbar_amx2_in3>;

- amx2_in4: endpoint {

- remote-endpoint = <&xbar_amx2_in4>;

- amx2_out_port: port@4 {

- amx2_out: endpoint {

- remote-endpoint = <&xbar_amx2_out>;

- #address-cells = <1>;

- #size-cells = <0>;

- amx3_in1: endpoint {

- remote-endpoint = <&xbar_amx3_in1>;

- amx3_in2: endpoint {

- remote-endpoint = <&xbar_amx3_in2>;

- amx3_in3: endpoint {

- remote-endpoint = <&xbar_amx3_in3>;

- amx3_in4: endpoint {

- remote-endpoint = <&xbar_amx3_in4>;

- amx3_out_port: port@4 {

- amx3_out: endpoint {

- remote-endpoint = <&xbar_amx3_out>;

- #address-cells = <1>;

- #size-cells = <0>;

- amx4_in1: endpoint {

- remote-endpoint = <&xbar_amx4_in1>;

- amx4_in2: endpoint {

- remote-endpoint = <&xbar_amx4_in2>;

- amx4_in3: endpoint {

- remote-endpoint = <&xbar_amx4_in3>;

- amx4_in4: endpoint {

- remote-endpoint = <&xbar_amx4_in4>;

- amx4_out_port: port@4 {

- amx4_out: endpoint {

- remote-endpoint = <&xbar_amx4_out>;

- #address-cells = <1>;

- #size-cells = <0>;

- adx1_in: endpoint {

- remote-endpoint = <&xbar_adx1_in>;

- adx1_out1_port: port@1 {

- adx1_out1: endpoint {

- remote-endpoint = <&xbar_adx1_out1>;

- adx1_out2_port: port@2 {

- adx1_out2: endpoint {

- remote-endpoint = <&xbar_adx1_out2>;

- adx1_out3_port: port@3 {

- adx1_out3: endpoint {

- remote-endpoint = <&xbar_adx1_out3>;

- adx1_out4_port: port@4 {

- adx1_out4: endpoint {

- remote-endpoint = <&xbar_adx1_out4>;

- #address-cells = <1>;

- #size-cells = <0>;

- adx2_in: endpoint {

- remote-endpoint = <&xbar_adx2_in>;

- adx2_out1_port: port@1 {

- adx2_out1: endpoint {

- remote-endpoint = <&xbar_adx2_out1>;

- adx2_out2_port: port@2 {

- adx2_out2: endpoint {

- remote-endpoint = <&xbar_adx2_out2>;

- adx2_out3_port: port@3 {

- adx2_out3: endpoint {

- remote-endpoint = <&xbar_adx2_out3>;

- adx2_out4_port: port@4 {

- adx2_out4: endpoint {

- remote-endpoint = <&xbar_adx2_out4>;

- #address-cells = <1>;

- #size-cells = <0>;

- adx3_in: endpoint {

- remote-endpoint = <&xbar_adx3_in>;

- adx3_out1_port: port@1 {

- adx3_out1: endpoint {

- remote-endpoint = <&xbar_adx3_out1>;

- adx3_out2_port: port@2 {

- adx3_out2: endpoint {

- remote-endpoint = <&xbar_adx3_out2>;

- adx3_out3_port: port@3 {

- adx3_out3: endpoint {

- remote-endpoint = <&xbar_adx3_out3>;

- adx3_out4_port: port@4 {

- adx3_out4: endpoint {

- remote-endpoint = <&xbar_adx3_out4>;

- #address-cells = <1>;

- #size-cells = <0>;

- adx4_in: endpoint {

- remote-endpoint = <&xbar_adx4_in>;

- adx4_out1_port: port@1 {

- adx4_out1: endpoint {

- remote-endpoint = <&xbar_adx4_out1>;

- adx4_out2_port: port@2 {

- adx4_out2: endpoint {

- remote-endpoint = <&xbar_adx4_out2>;

- adx4_out3_port: port@3 {

- adx4_out3: endpoint {

- remote-endpoint = <&xbar_adx4_out3>;

- adx4_out4_port: port@4 {

- adx4_out4: endpoint {

- remote-endpoint = <&xbar_adx4_out4>;

- #address-cells = <1>;

- #size-cells = <0>;

- dmic3_cif: endpoint {

- remote-endpoint = <&xbar_dmic3>;

- dmic3_port: port@1 {

- dmic3_dap: endpoint {

- /* placeholder for external codec */

- processing-engine@2908000 {

- #address-cells = <1>;

- #size-cells = <0>;

- ope1_cif_in_ep: endpoint {

- remote-endpoint = <&xbar_ope1_in_ep>;

- ope1_out_port: port@1 {

- ope1_cif_out_ep: endpoint {

- remote-endpoint = <&xbar_ope1_out_ep>;

- #address-cells = <1>;

- #size-cells = <0>;

- mvc1_cif_in: endpoint {

- remote-endpoint = <&xbar_mvc1_in>;

- mvc1_out_port: port@1 {

- mvc1_cif_out: endpoint {

- remote-endpoint = <&xbar_mvc1_out>;

- #address-cells = <1>;

- #size-cells = <0>;

- mvc2_cif_in: endpoint {

- remote-endpoint = <&xbar_mvc2_in>;

- mvc2_out_port: port@1 {

- mvc2_cif_out: endpoint {

- remote-endpoint = <&xbar_mvc2_out>;

- #address-cells = <1>;

- #size-cells = <0>;

- mix_in1: endpoint {

- remote-endpoint = <&xbar_mix_in1>;

- mix_in2: endpoint {

- remote-endpoint = <&xbar_mix_in2>;

- mix_in3: endpoint {

- remote-endpoint = <&xbar_mix_in3>;

- mix_in4: endpoint {

- remote-endpoint = <&xbar_mix_in4>;

- mix_in5: endpoint {

- remote-endpoint = <&xbar_mix_in5>;

- mix_in6: endpoint {

- remote-endpoint = <&xbar_mix_in6>;

- mix_in7: endpoint {

- remote-endpoint = <&xbar_mix_in7>;

- mix_in8: endpoint {

- remote-endpoint = <&xbar_mix_in8>;

- mix_in9: endpoint {

- remote-endpoint = <&xbar_mix_in9>;

- mix_in10: endpoint {

- remote-endpoint = <&xbar_mix_in10>;

- mix_out1_port: port@a {

- mix_out1: endpoint {

- remote-endpoint = <&xbar_mix_out1>;

- mix_out2_port: port@b {

- mix_out2: endpoint {

- remote-endpoint = <&xbar_mix_out2>;

- mix_out3_port: port@c {

- mix_out3: endpoint {

- remote-endpoint = <&xbar_mix_out3>;

- mix_out4_port: port@d {

- mix_out4: endpoint {

- remote-endpoint = <&xbar_mix_out4>;

- mix_out5_port: port@e {

- mix_out5: endpoint {

- remote-endpoint = <&xbar_mix_out5>;

- #address-cells = <1>;

- #size-cells = <0>;

- admaif0_port: port@0 {

- admaif0: endpoint {

- remote-endpoint = <&xbar_admaif0>;

- admaif1_port: port@1 {

- admaif1: endpoint {

- remote-endpoint = <&xbar_admaif1>;

- admaif2_port: port@2 {

- admaif2: endpoint {

- remote-endpoint = <&xbar_admaif2>;

- admaif3_port: port@3 {

- admaif3: endpoint {

- remote-endpoint = <&xbar_admaif3>;

- admaif4_port: port@4 {

- admaif4: endpoint {

- remote-endpoint = <&xbar_admaif4>;

- admaif5_port: port@5 {

- admaif5: endpoint {

- remote-endpoint = <&xbar_admaif5>;

- admaif6_port: port@6 {

- admaif6: endpoint {

- remote-endpoint = <&xbar_admaif6>;

- admaif7_port: port@7 {

- admaif7: endpoint {

- remote-endpoint = <&xbar_admaif7>;

- admaif8_port: port@8 {

- admaif8: endpoint {

- remote-endpoint = <&xbar_admaif8>;

- admaif9_port: port@9 {

- admaif9: endpoint {

- remote-endpoint = <&xbar_admaif9>;

- admaif10_port: port@a {

- admaif10: endpoint {

- remote-endpoint = <&xbar_admaif10>;

- admaif11_port: port@b {

- admaif11: endpoint {

- remote-endpoint = <&xbar_admaif11>;

- admaif12_port: port@c {

- admaif12: endpoint {

- remote-endpoint = <&xbar_admaif12>;

- admaif13_port: port@d {

- admaif13: endpoint {

- remote-endpoint = <&xbar_admaif13>;

- admaif14_port: port@e {

- admaif14: endpoint {

- remote-endpoint = <&xbar_admaif14>;

- admaif15_port: port@f {

- admaif15: endpoint {

- remote-endpoint = <&xbar_admaif15>;

- admaif16_port: port@10 {

- admaif16: endpoint {

- remote-endpoint = <&xbar_admaif16>;

- admaif17_port: port@11 {

- admaif17: endpoint {

- remote-endpoint = <&xbar_admaif17>;

- admaif18_port: port@12 {

- admaif18: endpoint {

- remote-endpoint = <&xbar_admaif18>;

- admaif19_port: port@13 {

- admaif19: endpoint {

- remote-endpoint = <&xbar_admaif19>;

- #address-cells = <1>;

- #size-cells = <0>;

- asrc_in1_ep: endpoint {

- remote-endpoint = <&xbar_asrc_in1_ep>;

- asrc_in2_ep: endpoint {

- remote-endpoint = <&xbar_asrc_in2_ep>;

- asrc_in3_ep: endpoint {

- remote-endpoint = <&xbar_asrc_in3_ep>;

- asrc_in4_ep: endpoint {

- remote-endpoint = <&xbar_asrc_in4_ep>;

- asrc_in5_ep: endpoint {

- remote-endpoint = <&xbar_asrc_in5_ep>;

- asrc_in6_ep: endpoint {

- remote-endpoint = <&xbar_asrc_in6_ep>;

- asrc_in7_ep: endpoint {

- remote-endpoint = <&xbar_asrc_in7_ep>;

- asrc_out1_port: port@7 {

- asrc_out1_ep: endpoint {

- remote-endpoint = <&xbar_asrc_out1_ep>;

- asrc_out2_port: port@8 {

- asrc_out2_ep: endpoint {

- remote-endpoint = <&xbar_asrc_out2_ep>;

- asrc_out3_port: port@9 {

- asrc_out3_ep: endpoint {

- remote-endpoint = <&xbar_asrc_out3_ep>;

- asrc_out4_port: port@a {

- asrc_out4_ep: endpoint {

- remote-endpoint = <&xbar_asrc_out4_ep>;

- asrc_out5_port: port@b {

- asrc_out5_ep: endpoint {

- remote-endpoint = <&xbar_asrc_out5_ep>;

- asrc_out6_port: port@c {

- asrc_out6_ep: endpoint {

- remote-endpoint = <&xbar_asrc_out6_ep>;

- #address-cells = <1>;

- #size-cells = <0>;

- xbar_admaif0: endpoint {

- remote-endpoint = <&admaif0>;

- xbar_admaif1: endpoint {

- remote-endpoint = <&admaif1>;

- xbar_admaif2: endpoint {

- remote-endpoint = <&admaif2>;

- xbar_admaif3: endpoint {

- remote-endpoint = <&admaif3>;

- xbar_admaif4: endpoint {

- remote-endpoint = <&admaif4>;

- xbar_admaif5: endpoint {

- remote-endpoint = <&admaif5>;

- xbar_admaif6: endpoint {

- remote-endpoint = <&admaif6>;

- xbar_admaif7: endpoint {

- remote-endpoint = <&admaif7>;

- xbar_admaif8: endpoint {

- remote-endpoint = <&admaif8>;

- xbar_admaif9: endpoint {

- remote-endpoint = <&admaif9>;

- xbar_admaif10: endpoint {

- remote-endpoint = <&admaif10>;

- xbar_admaif11: endpoint {

- remote-endpoint = <&admaif11>;

- xbar_admaif12: endpoint {

- remote-endpoint = <&admaif12>;

- xbar_admaif13: endpoint {

- remote-endpoint = <&admaif13>;

- xbar_admaif14: endpoint {

- remote-endpoint = <&admaif14>;

- xbar_admaif15: endpoint {

- remote-endpoint = <&admaif15>;

- xbar_admaif16: endpoint {

- remote-endpoint = <&admaif16>;

- xbar_admaif17: endpoint {

- remote-endpoint = <&admaif17>;

- xbar_admaif18: endpoint {

- remote-endpoint = <&admaif18>;

- xbar_admaif19: endpoint {

- remote-endpoint = <&admaif19>;

- xbar_i2s1_port: port@14 {

- xbar_i2s1: endpoint {

- remote-endpoint = <&i2s1_cif>;

- xbar_i2s2_port: port@15 {

- xbar_i2s2: endpoint {

- remote-endpoint = <&i2s2_cif>;

- xbar_i2s4_port: port@17 {

- xbar_i2s4: endpoint {

- remote-endpoint = <&i2s4_cif>;

- xbar_i2s6_port: port@19 {

- xbar_i2s6: endpoint {

- remote-endpoint = <&i2s6_cif>;

- xbar_dmic3_port: port@1c {

- xbar_dmic3: endpoint {

- remote-endpoint = <&dmic3_cif>;

- xbar_sfc1_in_port: port@20 {

- xbar_sfc1_in: endpoint {

- remote-endpoint = <&sfc1_cif_in>;

- xbar_sfc1_out: endpoint {

- remote-endpoint = <&sfc1_cif_out>;

- xbar_sfc2_in_port: port@22 {

- xbar_sfc2_in: endpoint {

- remote-endpoint = <&sfc2_cif_in>;

- xbar_sfc2_out: endpoint {

- remote-endpoint = <&sfc2_cif_out>;

- xbar_sfc3_in_port: port@24 {

- xbar_sfc3_in: endpoint {

- remote-endpoint = <&sfc3_cif_in>;

- xbar_sfc3_out: endpoint {

- remote-endpoint = <&sfc3_cif_out>;

- xbar_sfc4_in_port: port@26 {

- xbar_sfc4_in: endpoint {

- remote-endpoint = <&sfc4_cif_in>;

- xbar_sfc4_out: endpoint {

- remote-endpoint = <&sfc4_cif_out>;

- xbar_mvc1_in_port: port@28 {

- xbar_mvc1_in: endpoint {

- remote-endpoint = <&mvc1_cif_in>;

- xbar_mvc1_out: endpoint {

- remote-endpoint = <&mvc1_cif_out>;

- xbar_mvc2_in_port: port@2a {

- xbar_mvc2_in: endpoint {

- remote-endpoint = <&mvc2_cif_in>;

- xbar_mvc2_out: endpoint {

- remote-endpoint = <&mvc2_cif_out>;

- xbar_amx1_in1_port: port@2c {

- xbar_amx1_in1: endpoint {

- remote-endpoint = <&amx1_in1>;

- xbar_amx1_in2_port: port@2d {

- xbar_amx1_in2: endpoint {

- remote-endpoint = <&amx1_in2>;

- xbar_amx1_in3_port: port@2e {

- xbar_amx1_in3: endpoint {

- remote-endpoint = <&amx1_in3>;

- xbar_amx1_in4_port: port@2f {

- xbar_amx1_in4: endpoint {

- remote-endpoint = <&amx1_in4>;

- xbar_amx1_out: endpoint {

- remote-endpoint = <&amx1_out>;

- xbar_amx2_in1_port: port@31 {

- xbar_amx2_in1: endpoint {

- remote-endpoint = <&amx2_in1>;

- xbar_amx2_in2_port: port@32 {

- xbar_amx2_in2: endpoint {

- remote-endpoint = <&amx2_in2>;

- xbar_amx2_in3_port: port@33 {

- xbar_amx2_in3: endpoint {

- remote-endpoint = <&amx2_in3>;

- xbar_amx2_in4_port: port@34 {

- xbar_amx2_in4: endpoint {

- remote-endpoint = <&amx2_in4>;

- xbar_amx2_out: endpoint {

- remote-endpoint = <&amx2_out>;

- xbar_amx3_in1_port: port@36 {

- xbar_amx3_in1: endpoint {

- remote-endpoint = <&amx3_in1>;

- xbar_amx3_in2_port: port@37 {

- xbar_amx3_in2: endpoint {

- remote-endpoint = <&amx3_in2>;

- xbar_amx3_in3_port: port@38 {

- xbar_amx3_in3: endpoint {

- remote-endpoint = <&amx3_in3>;

- xbar_amx3_in4_port: port@39 {

- xbar_amx3_in4: endpoint {

- remote-endpoint = <&amx3_in4>;

- xbar_amx3_out: endpoint {

- remote-endpoint = <&amx3_out>;

- xbar_amx4_in1_port: port@3b {

- xbar_amx4_in1: endpoint {

- remote-endpoint = <&amx4_in1>;

- xbar_amx4_in2_port: port@3c {

- xbar_amx4_in2: endpoint {

- remote-endpoint = <&amx4_in2>;

- xbar_amx4_in3_port: port@3d {

- xbar_amx4_in3: endpoint {

- remote-endpoint = <&amx4_in3>;

- xbar_amx4_in4_port: port@3e {

- xbar_amx4_in4: endpoint {

- remote-endpoint = <&amx4_in4>;

- xbar_amx4_out: endpoint {

- remote-endpoint = <&amx4_out>;

- xbar_adx1_in_port: port@40 {

- xbar_adx1_in: endpoint {

- remote-endpoint = <&adx1_in>;

- xbar_adx1_out1: endpoint {

- remote-endpoint = <&adx1_out1>;

- xbar_adx1_out2: endpoint {

- remote-endpoint = <&adx1_out2>;

- xbar_adx1_out3: endpoint {

- remote-endpoint = <&adx1_out3>;

- xbar_adx1_out4: endpoint {

- remote-endpoint = <&adx1_out4>;

- xbar_adx2_in_port: port@45 {

- xbar_adx2_in: endpoint {

- remote-endpoint = <&adx2_in>;

- xbar_adx2_out1: endpoint {

- remote-endpoint = <&adx2_out1>;

- xbar_adx2_out2: endpoint {

- remote-endpoint = <&adx2_out2>;

- xbar_adx2_out3: endpoint {

- remote-endpoint = <&adx2_out3>;

- xbar_adx2_out4: endpoint {

- remote-endpoint = <&adx2_out4>;

- xbar_adx3_in_port: port@4a {

- xbar_adx3_in: endpoint {

- remote-endpoint = <&adx3_in>;

- xbar_adx3_out1: endpoint {

- remote-endpoint = <&adx3_out1>;

- xbar_adx3_out2: endpoint {

- remote-endpoint = <&adx3_out2>;

- xbar_adx3_out3: endpoint {

- remote-endpoint = <&adx3_out3>;

- xbar_adx3_out4: endpoint {

- remote-endpoint = <&adx3_out4>;

- xbar_adx4_in_port: port@4f {

- xbar_adx4_in: endpoint {

- remote-endpoint = <&adx4_in>;

- xbar_adx4_out1: endpoint {

- remote-endpoint = <&adx4_out1>;

- xbar_adx4_out2: endpoint {

- remote-endpoint = <&adx4_out2>;

- xbar_adx4_out3: endpoint {

- remote-endpoint = <&adx4_out3>;

- xbar_adx4_out4: endpoint {

- remote-endpoint = <&adx4_out4>;

- xbar_mix_in1_port: port@54 {

- xbar_mix_in1: endpoint {

- remote-endpoint = <&mix_in1>;

- xbar_mix_in2_port: port@55 {

- xbar_mix_in2: endpoint {

- remote-endpoint = <&mix_in2>;

- xbar_mix_in3_port: port@56 {

- xbar_mix_in3: endpoint {

- remote-endpoint = <&mix_in3>;

- xbar_mix_in4_port: port@57 {

- xbar_mix_in4: endpoint {

- remote-endpoint = <&mix_in4>;

- xbar_mix_in5_port: port@58 {

- xbar_mix_in5: endpoint {

- remote-endpoint = <&mix_in5>;

- xbar_mix_in6_port: port@59 {

- xbar_mix_in6: endpoint {

- remote-endpoint = <&mix_in6>;

- xbar_mix_in7_port: port@5a {

- xbar_mix_in7: endpoint {

- remote-endpoint = <&mix_in7>;

- xbar_mix_in8_port: port@5b {

- xbar_mix_in8: endpoint {

- remote-endpoint = <&mix_in8>;

- xbar_mix_in9_port: port@5c {

- xbar_mix_in9: endpoint {

- remote-endpoint = <&mix_in9>;

- xbar_mix_in10_port: port@5d {

- xbar_mix_in10: endpoint {

- remote-endpoint = <&mix_in10>;

- xbar_mix_out1: endpoint {

- remote-endpoint = <&mix_out1>;

- xbar_mix_out2: endpoint {

- remote-endpoint = <&mix_out2>;

- xbar_mix_out3: endpoint {

- remote-endpoint = <&mix_out3>;

- xbar_mix_out4: endpoint {

- remote-endpoint = <&mix_out4>;

- xbar_mix_out5: endpoint {

- remote-endpoint = <&mix_out5>;

- xbar_asrc_in1_port: port@63 {

- xbar_asrc_in1_ep: endpoint {

- remote-endpoint = <&asrc_in1_ep>;

- xbar_asrc_out1_ep: endpoint {

- remote-endpoint = <&asrc_out1_ep>;

- xbar_asrc_in2_port: port@65 {

- xbar_asrc_in2_ep: endpoint {

- remote-endpoint = <&asrc_in2_ep>;

- xbar_asrc_out2_ep: endpoint {

- remote-endpoint = <&asrc_out2_ep>;

- xbar_asrc_in3_port: port@67 {

- xbar_asrc_in3_ep: endpoint {

- remote-endpoint = <&asrc_in3_ep>;

- xbar_asrc_out3_ep: endpoint {

- remote-endpoint = <&asrc_out3_ep>;

- xbar_asrc_in4_port: port@69 {

- xbar_asrc_in4_ep: endpoint {

- remote-endpoint = <&asrc_in4_ep>;

- xbar_asrc_out4_ep: endpoint {

- remote-endpoint = <&asrc_out4_ep>;

- xbar_asrc_in5_port: port@6b {

- xbar_asrc_in5_ep: endpoint {

- remote-endpoint = <&asrc_in5_ep>;

- xbar_asrc_out5_ep: endpoint {

- remote-endpoint = <&asrc_out5_ep>;

- xbar_asrc_in6_port: port@6d {

- xbar_asrc_in6_ep: endpoint {

- remote-endpoint = <&asrc_in6_ep>;

- xbar_asrc_out6_ep: endpoint {

- remote-endpoint = <&asrc_out6_ep>;

- xbar_asrc_in7_port: port@6f {

- xbar_asrc_in7_ep: endpoint {

- remote-endpoint = <&asrc_in7_ep>;

- xbar_ope1_in_port: port@70 {

- xbar_ope1_in_ep: endpoint {

- remote-endpoint = <&ope1_cif_in_ep>;

- xbar_ope1_out_ep: endpoint {

- remote-endpoint = <&ope1_cif_out_ep>;

- dma-controller@2930000 {

- interrupt-controller@2a40000 {

- current-speed = <115200>;

- compatible = "realtek,rt5640";

- interrupt-parent = <&gpio>;

- interrupts = <TEGRA234_MAIN_GPIO(AC, 5) GPIO_ACTIVE_HIGH>;

- clocks = <&bpmp TEGRA234_CLK_AUD_MCLK>;

- clock-names = "mclk";

- realtek,dmic1-data-pin = <RT5640_DMIC1_DATA_PIN_NONE>;

- realtek,dmic2-data-pin = <RT5640_DMIC2_DATA_PIN_NONE>;

- realtek,jack-detect-source = <RT5640_JD_SRC_HDA_HEADER>;

- sound-name-prefix = "CVB-RT";

- rt5640_ep: endpoint {

- remote-endpoint = <&i2s1_dap>;

- vddio-pex-ctl-supply = <&vdd_1v8_ao>;

- phys = <&p2u_hsio_3>;

- phy-names = "p2u-0";

- vddio-pex-ctl-supply = <&vdd_1v8_ao>;

- phys = <&p2u_hsio_4>, <&p2u_hsio_5>, <&p2u_hsio_6>,

- phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";

- vddio-pex-ctl-supply = <&vdd_1v8_ls>;

- vpcie3v3-supply = <&vdd_3v3_pcie>;

- vpcie12v-supply = <&vdd_12v_pcie>;

- phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,

- <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,

- <&p2u_nvhs_6>, <&p2u_nvhs_7>;

- phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",

- "p2u-5", "p2u-6", "p2u-7";

- pcie-ep@141a0000 {

- status = "disabled";

- vddio-pex-ctl-supply = <&vdd_1v8_ls>;

- reset-gpios = <&gpio TEGRA234_MAIN_GPIO(AF, 1) GPIO_ACTIVE_LOW>;

- nvidia,refclk-select-gpios = <&gpio_aon

- TEGRA234_AON_GPIO(AA, 4)

- GPIO_ACTIVE_HIGH>;

- phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,

- <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,

- <&p2u_nvhs_6>, <&p2u_nvhs_7>;

- phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",

- "p2u-5", "p2u-6", "p2u-7";

diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3740-0002+p3701-0008.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3740-0002+p3701-0008.dts
index 43d797e5544f..bac611d735c5 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234-p3740-0002+p3701-0008.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra234-p3740-0002+p3701-0008.dts

- vddio-pex-ctl-supply = <&vdd_1v8_ls>;

- phys = <&p2u_gbe_4>, <&p2u_gbe_5>;

- phy-names = "p2u-0", "p2u-1";

- vddio-pex-ctl-supply = <&vdd_1v8_ao>;

- phys = <&p2u_hsio_3>;

- phy-names = "p2u-0";

- vddio-pex-ctl-supply = <&vdd_1v8_ao>;

- phys = <&p2u_hsio_7>, <&p2u_hsio_6>, <&p2u_hsio_5>,

- phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";

- vddio-pex-ctl-supply = <&vdd_1v8_ls>;

- phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,

- <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,

- <&p2u_nvhs_6>, <&p2u_nvhs_7>;

- phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",

- "p2u-5", "p2u-6", "p2u-7";

- vddio-pex-ctl-supply = <&vdd_1v8_ls>;

- phys = <&p2u_gbe_0>, <&p2u_gbe_1>;

- phy-names = "p2u-0", "p2u-1";

- aconnect@2900000 {

- compatible = "nvidia,tegra194-hsuart";

- nvidia,model = "NVIDIA IGX HDA";

- temperature = <74000>;

diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767-0000.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767-0000.dts
index 65e4b51b79c1..e9460aedd47c 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767-0000.dts

- current-speed = <115200>;

- /* C1 - M.2 Key-E */

- vddio-pex-ctl-supply = <&vdd_1v8_ao>;

- phys = <&p2u_hsio_3>;

- phy-names = "p2u-0";

- /* C4 - M.2 Key-M */

- vddio-pex-ctl-supply = <&vdd_1v8_ao>;

- phys = <&p2u_hsio_4>, <&p2u_hsio_5>, <&p2u_hsio_6>,

- phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";

- /* C8 - Ethernet */

- phys = <&p2u_gbe_2>, <&p2u_gbe_3>;

- phy-names = "p2u-0", "p2u-1";

- vddio-pex-ctl-supply = <&vdd_1v8_ao>;

- vpcie3v3-supply = <&vdd_3v3_pcie>;

- /* C7 - M.2 Key-M */

- vddio-pex-ctl-supply = <&vdd_1v8_ao>;

- phys = <&p2u_gbe_0>, <&p2u_gbe_1>;

- phy-names = "p2u-0", "p2u-1";

- cooling-levels = <0 187 255>;

diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767-0005.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767-0005.dts
index 9b86aa6f7dbe..9e9bb9ca8be4 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767-0005.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767-0005.dts

- cooling-levels = <0 187 255>;

- current-speed = <115200>;

- /* C8 - Ethernet */

- phys = <&p2u_gbe_2>, <&p2u_gbe_3>;

- phy-names = "p2u-0", "p2u-1";

- vddio-pex-ctl-supply = <&vdd_1v8_ao>;

- vpcie3v3-supply = <&vdd_3v3_pcie>;

- assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;

- cl0_ch1_opp2: opp-268800000 {

- cl0_ch1_opp3: opp-422400000 {

- cl0_ch1_opp4: opp-576000000 {

- cl0_ch1_opp5: opp-729600000 {

- cl0_ch1_opp6: opp-883200000 {

- cl0_ch1_opp7: opp-1036800000 {

- cl0_ch1_opp8: opp-1190400000 {

- opp-peak-kBps = <816000>;

- cl0_ch1_opp9: opp-1344000000 {

- cl0_ch1_opp10: opp-1497600000 {

- opp-hz = /bits/ 64 <1497600000>;

- cl0_ch1_opp11: opp-1651200000 {

- opp-peak-kBps = <2660000>;

- cl0_ch1_opp12: opp-1804800000 {

- opp-peak-kBps = <2660000>;

- cl0_ch1_opp13: opp-1958400000 {

- cl0_ch1_opp14: opp-2112000000 {

- cl0_ch1_opp15: opp-2201600000 {

- cl1_ch1_opp2: opp-268800000 {

- cl1_ch1_opp3: opp-422400000 {

- cl1_ch1_opp4: opp-576000000 {

- cl1_ch1_opp5: opp-729600000 {

- cl1_ch1_opp6: opp-883200000 {

- cl1_ch1_opp7: opp-1036800000 {

- cl1_ch1_opp8: opp-1190400000 {

- opp-peak-kBps = <816000>;

- cl1_ch1_opp9: opp-1344000000 {

- cl1_ch1_opp10: opp-1497600000 {

- opp-hz = /bits/ 64 <1497600000>;

- cl1_ch1_opp11: opp-1651200000 {

- opp-peak-kBps = <2660000>;

- cl1_ch1_opp12: opp-1804800000 {

- opp-peak-kBps = <2660000>;

- cl1_ch1_opp13: opp-1958400000 {

- cl1_ch1_opp14: opp-2112000000 {

- cl1_ch1_opp15: opp-2201600000 {

- cl2_ch1_opp2: opp-268800000 {

- cl2_ch1_opp3: opp-422400000 {

- cl2_ch1_opp4: opp-576000000 {

- cl2_ch1_opp5: opp-729600000 {

- cl2_ch1_opp6: opp-883200000 {

- cl2_ch1_opp7: opp-1036800000 {

- cl2_ch1_opp8: opp-1190400000 {

- opp-peak-kBps = <816000>;

- cl2_ch1_opp9: opp-1344000000 {

- cl2_ch1_opp10: opp-1497600000 {

- opp-hz = /bits/ 64 <1497600000>;

- cl2_ch1_opp11: opp-1651200000 {

- opp-peak-kBps = <2660000>;

- cl2_ch1_opp12: opp-1804800000 {

- opp-peak-kBps = <2660000>;

- cl2_ch1_opp13: opp-1958400000 {

- cl2_ch1_opp14: opp-2112000000 {

- cl2_ch1_opp15: opp-2201600000 {

- camera_vdddo_1v8: camera-vdddo-1v8 {

- compatible = "regulator-fixed";

- regulator-name = "camera_vdddo";

- regulator-min-microvolt = <1800000>;

- regulator-max-microvolt = <1800000>;

- regulator-always-on;

- camera_vdda_2v8: camera-vdda-2v8 {

- compatible = "regulator-fixed";

- regulator-name = "camera_vdda";

- regulator-min-microvolt = <2800000>;

- regulator-max-microvolt = <2800000>;

- regulator-always-on;

- camera_vddd_1v5: camera-vddd-1v5 {

- compatible = "regulator-fixed";

- regulator-name = "camera_vddd";

- regulator-min-microvolt = <1500000>;

- regulator-max-microvolt = <1500000>;

- regulator-always-on;

- id-gpio = <&tlmm 121 GPIO_ACTIVE_HIGH>;

- /* On Low speed expansion */

- label = "LS-I2C0";

- /* On High speed expansion */

- label = "HS-I2C2";

- /* On Low speed expansion */

- label = "LS-I2C1";

- /* On High speed expansion */

- label = "HS-SPI1";

- /* On Low speed expansion */

- label = "LS-SPI0";

- csiphy0_ep: endpoint {

- data-lanes = <0 2>;

- remote-endpoint = <&ov5640_ep>;

- compatible = "ovti,ov5640";

- enable-gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>;

- reset-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;

- pinctrl-names = "default";

- pinctrl-0 = <&camera_rear_default>;

- clocks = <&gcc GCC_CAMSS_MCLK0_CLK>;

- clock-names = "xclk";

- clock-frequency = <23880000>;

- vdddo-supply = <&camera_vdddo_1v8>;

- vdda-supply = <&camera_vdda_2v8>;

- vddd-supply = <&camera_vddd_1v5>;

- /* No camera mezzanine by default */

- status = "disabled";

- ov5640_ep: endpoint {

- data-lanes = <0 2>;

- remote-endpoint = <&csiphy0_ep>;

- pin-switch-delay-us = <100000>;

- id-gpio = <&pmi8994_gpios 6 GPIO_ACTIVE_HIGH>;

- id-gpio = <&pm8994_gpios 22 GPIO_ACTIVE_HIGH>;

- /* On Low speed expansion */

- label = "LS-I2C0";

- /* On High speed expansion */

- label = "HS-I2C2";

- /* On Low speed expansion */

- label = "LS-I2C1";

- pinctrl-0 = <&mdss_hdmi_hpd_active &mdss_hdmi_ddc_active>;

- pinctrl-1 = <&mdss_hdmi_hpd_suspend &mdss_hdmi_ddc_suspend>;

- mdss_hdmi_hpd_active: mdss_hdmi-hpd-active-state {

- mdss_hdmi_hpd_suspend: mdss_hdmi-hpd-suspend-state {

- mdss_hdmi_ddc_active: mdss_hdmi-ddc-active-state {

- mdss_hdmi_ddc_suspend: mdss_hdmi-ddc-suspend-state {

- mdss_hdmi-dai-link {

-#include "ipq5332.dtsi"

- serial0 = &blsp1_uart0;

- stdout-path = "serial0";

- pinctrl-0 = <&serial_0_pins>;

- pinctrl-names = "default";

- clock-frequency = <32000>;

- clock-frequency = <24000000>;

-#include "ipq5332.dtsi"

- serial0 = &blsp1_uart0;

- stdout-path = "serial0";

- pinctrl-0 = <&serial_0_pins>;

- pinctrl-names = "default";

- clock-frequency = <32000>;

- clock-frequency = <24000000>;

-#include "ipq5332.dtsi"

- serial0 = &blsp1_uart0;

- stdout-path = "serial0";

- pinctrl-0 = <&serial_0_pins>;

- pinctrl-names = "default";

- clock-frequency = <32000>;

- clock-frequency = <24000000>;

-#include <dt-bindings/gpio/gpio.h>

-#include <dt-bindings/input/input.h>

-#include "ipq5332.dtsi"

- serial0 = &blsp1_uart0;

- stdout-path = "serial0";

- compatible = "gpio-keys";

- pinctrl-0 = <&gpio_keys_default_state>;

- pinctrl-names = "default";

- linux,code = <KEY_WPS_BUTTON>;

- gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;

- linux,input-type = <1>;

- debounce-interval = <60>;

- pinctrl-0 = <&serial_0_pins>;

- pinctrl-names = "default";

- clock-frequency = <32000>;

- clock-frequency = <24000000>;

- gpio_keys_default_state: gpio-keys-default-state {

- function = "gpio";

- drive-strength = <8>;

- compatible = "qcom,glink-rpm";

- interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;

- qcom,rpm-msg-ram = <&rpm_msg_ram>;

- mboxes = <&apcs_glb 0>;

- rpm_requests: rpm-requests {

- compatible = "qcom,rpm-ipq6018";

- qcom,glink-channels = "rpm_requests";

- compatible = "qcom,rpm-mp5496-regulators";

- regulator-min-microvolt = <725000>;

- regulator-max-microvolt = <1062500>;

- regulator-always-on;

- reg = <0x10000000 0xf1d>,

- <0x10000f20 0xa8>,

- <0x00088000 0x2000>,

- <0x10100000 0x1000>;

- compatible = "qcom,glink-rpm";

- interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;

- qcom,rpm-msg-ram = <&rpm_msg_ram>;

- mboxes = <&apcs_glb 0>;

- rpm_requests: rpm-requests {

- compatible = "qcom,rpm-ipq9574";

- qcom,glink-channels = "rpm_requests";

- id-gpio = <&tlmm 110 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts b/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts
index 1c43f3d6a0b4..47da738661bf 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts
+++ b/arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts

- id-gpio = <&tlmm 69 GPIO_ACTIVE_HIGH>;

- id-gpio = <&tlmm 110 GPIO_ACTIVE_HIGH>;

- id-gpio = <&tlmm 117 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts
index 97262b8519b3..3892ad4f639a 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts
+++ b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts

- vio-supply = <&pm8916_l6>;

diff --git a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts
index 9757182fba3e..d73294af1a06 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts
+++ b/arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts

- id-gpio = <&tlmm 110 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi
index 0cdd6af7817f..6f65fd4b3ed3 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi

- status = "disabled";

diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi
index 7943bb619116..54d648972d35 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi

- interrupt-names = "INT1";

diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi
index f4fd5d72b28b..cb0e4a7faf91 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi

diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts b/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts
index 15dc246e84e2..eaf877378937 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts
+++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts

- mount-matrix = "0", "1", "0",

diff --git a/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts b/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts
index c94d36b38651..8e238976ab1c 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts
+++ b/arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts

- id-gpio = <&tlmm 110 GPIO_ACTIVE_HIGH>;

- compatible = "qcom,smd";

diff --git a/arch/arm64/boot/dts/qcom/msm8939-sony-xperia-kanuti-tulip.dts b/arch/arm64/boot/dts/qcom/msm8939-sony-xperia-kanuti-tulip.dts
index 8613cf93dac5..89b6aebba404 100644
--- a/arch/arm64/boot/dts/qcom/msm8939-sony-xperia-kanuti-tulip.dts
+++ b/arch/arm64/boot/dts/qcom/msm8939-sony-xperia-kanuti-tulip.dts

- id-gpio = <&tlmm 110 GPIO_ACTIVE_HIGH>;

- compatible ="qcom,idle-state-spc", "arm,idle-state";

- compatible = "qcom,smd";

- interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;

- qcom,ipc = <&apcs1_mbox 8 0>;

- qcom,smd-edge = <15>;

- rpm_requests: rpm-requests {

- compatible = "qcom,rpm-msm8936";

- qcom,smd-channels = "rpm_requests";

- rpmcc: clock-controller {

- compatible = "qcom,rpmcc-msm8936", "qcom,rpmcc";

- #clock-cells = <1>;

- clock-names = "xo";

- clocks = <&xo_board>;

- rpmpd: power-controller {

- compatible = "qcom,msm8939-rpmpd";

- #power-domain-cells = <1>;

- operating-points-v2 = <&rpmpd_opp_table>;

- rpmpd_opp_table: opp-table {

- compatible = "operating-points-v2";

- rpmpd_opp_ret: opp1 {

- rpmpd_opp_svs_krait: opp2 {

- rpmpd_opp_svs_soc: opp3 {

- rpmpd_opp_nom: opp4 {

- rpmpd_opp_turbo: opp5 {

- rpmpd_opp_super_turbo: opp6 {

- #address-cells = <0>;

- #size-cells = <0>;

- clock-names = "iface", "core", "xo";

- clock-names = "core", "iface";

- interrupts = <GIC_SPI 142 1>;

- qcom,board-id= <0x1000b 0x9>;

- interleave_mode = <0>;

- #sound-dai-cells = <1>;

- qcom,board-id= <0x1000b 0x08>;

- interrupts-parent = <&tlmm>;

- compatible = "qcom,smd";

- interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;

- qcom,ipc = <&apcs 8 0>;

- qcom,smd-edge = <15>;

- rpm_requests: rpm-requests {

- compatible = "qcom,rpm-msm8953";

- qcom,smd-channels = "rpm_requests";

- rpmcc: clock-controller {

- compatible = "qcom,rpmcc-msm8953", "qcom,rpmcc";

- clocks = <&xo_board>;

- clock-names = "xo";

- #clock-cells = <1>;

- rpmpd: power-controller {

- compatible = "qcom,msm8953-rpmpd";

- #power-domain-cells = <1>;

- operating-points-v2 = <&rpmpd_opp_table>;

- rpmpd_opp_table: opp-table {

- compatible = "operating-points-v2";

- rpmpd_opp_ret: opp1 {

- opp-level = <RPM_SMD_LEVEL_RETENTION>;

- rpmpd_opp_ret_plus: opp2 {

- opp-level = <RPM_SMD_LEVEL_RETENTION_PLUS>;

- rpmpd_opp_min_svs: opp3 {

- opp-level = <RPM_SMD_LEVEL_MIN_SVS>;

- rpmpd_opp_low_svs: opp4 {

- opp-level = <RPM_SMD_LEVEL_LOW_SVS>;

- rpmpd_opp_svs: opp5 {

- opp-level = <RPM_SMD_LEVEL_SVS>;

- rpmpd_opp_svs_plus: opp6 {

- opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;

- rpmpd_opp_nom: opp7 {

- opp-level = <RPM_SMD_LEVEL_NOM>;

- rpmpd_opp_nom_plus: opp8 {

- opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;

- rpmpd_opp_turbo: opp9 {

- opp-level = <RPM_SMD_LEVEL_TURBO>;

- compatible = "qcom,smd";

- interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;

- qcom,ipc = <&apcs 8 0>;

- qcom,smd-edge = <15>;

- rpm_requests: rpm-requests {

- compatible = "qcom,rpm-msm8976";

- qcom,smd-channels = "rpm_requests";

- rpmcc: clock-controller {

- compatible = "qcom,rpmcc-msm8976", "qcom,rpmcc";

- clocks = <&xo_board>;

- clock-names = "xo";

- #clock-cells = <1>;

- rpmpd: power-controller {

- compatible = "qcom,msm8976-rpmpd";

- #power-domain-cells = <1>;

- operating-points-v2 = <&rpmpd_opp_table>;

- rpmpd_opp_table: opp-table {

- compatible = "operating-points-v2";

- rpmpd_opp_ret: opp1 {

- opp-level = <RPM_SMD_LEVEL_RETENTION>;

- rpmpd_opp_ret_plus: opp2 {

- opp-level = <RPM_SMD_LEVEL_RETENTION_PLUS>;

- rpmpd_opp_min_svs: opp3 {

- opp-level = <RPM_SMD_LEVEL_MIN_SVS>;

- rpmpd_opp_low_svs: opp4 {

- opp-level = <RPM_SMD_LEVEL_LOW_SVS>;

- rpmpd_opp_svs: opp5 {

- opp-level = <RPM_SMD_LEVEL_SVS>;

- rpmpd_opp_svs_plus: opp6 {

- opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;

- rpmpd_opp_nom: opp7 {

- opp-level = <RPM_SMD_LEVEL_NOM>;

- rpmpd_opp_nom_plus: opp8 {

- opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;

- rpmpd_opp_turbo: opp9 {

- opp-level = <RPM_SMD_LEVEL_TURBO>;

- rpmpd_opp_turbo_no_cpr: opp10 {

- opp-level = <RPM_SMD_LEVEL_TURBO_NO_CPR>;

- rpmpd_opp_turbo_high: opp111 {

- opp-level = <RPM_SMD_LEVEL_TURBO_HIGH>;

- interrupts = <0 290 IRQ_TYPE_EDGE_RISING>;

- compatible = "qcom,smd";

- interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;

- qcom,ipc = <&apcs 8 0>;

- qcom,smd-edge = <15>;

- qcom,remote-pid = <6>;

- rpm_requests: rpm-requests {

- compatible = "qcom,rpm-msm8994";

- qcom,smd-channels = "rpm_requests";

- rpmcc: clock-controller {

- compatible = "qcom,rpmcc-msm8994", "qcom,rpmcc";

- #clock-cells = <1>;

- rpmpd: power-controller {

- compatible = "qcom,msm8994-rpmpd";

- #power-domain-cells = <1>;

- operating-points-v2 = <&rpmpd_opp_table>;

- rpmpd_opp_table: opp-table {

- compatible = "operating-points-v2";

- rpmpd_opp_ret: opp1 {

- rpmpd_opp_svs_krait: opp2 {

- rpmpd_opp_svs_soc: opp3 {

- rpmpd_opp_nom: opp4 {

- rpmpd_opp_turbo: opp5 {

- rpmpd_opp_super_turbo: opp6 {

- interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;

diff --git a/arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dts b/arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dts
index 4a0645db0ae1..6374c5f53d9a 100644
--- a/arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dts
+++ b/arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dts

- id-gpio = <&tlmm 24 GPIO_ACTIVE_LOW>;

diff --git a/arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone.dtsi b/arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone.dtsi
index b4b770a9277d..d55e4075040f 100644
--- a/arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone.dtsi

- id-gpio = <&tlmm 25 GPIO_ACTIVE_LOW>;

- label = "NFC_I2C";

- label = "TYPEC_I2C";

- typec: tusb320l@47 {

- label = "MSM_TS_I2C";

- vdda-supply = <&vreg_l6a_1p8>;

- compatible = "qcom,glink-rpm";

- interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;

- qcom,rpm-msg-ram = <&rpm_msg_ram>;

- mboxes = <&apcs_glb 0>;

- rpm_requests: rpm-requests {

- compatible = "qcom,rpm-msm8996";

- qcom,glink-channels = "rpm_requests";

- rpmcc: clock-controller {

- compatible = "qcom,rpmcc-msm8996", "qcom,rpmcc";

- #clock-cells = <1>;

- clocks = <&xo_board>;

- clock-names = "xo";

- rpmpd: power-controller {

- compatible = "qcom,msm8996-rpmpd";

- #power-domain-cells = <1>;

- operating-points-v2 = <&rpmpd_opp_table>;

- rpmpd_opp_table: opp-table {

- compatible = "operating-points-v2";

- rpmpd_opp1: opp1 {

- rpmpd_opp2: opp2 {

- rpmpd_opp3: opp3 {

- rpmpd_opp4: opp4 {

- rpmpd_opp5: opp5 {

- rpmpd_opp6: opp6 {

- interrupts = <0 158 IRQ_TYPE_EDGE_RISING>;

- mdss_hdmi: mdss_hdmi-tx@9a0000 {

- compatible = "qcom,mdss_hdmi-tx-8996";

- reg = <0x009a0000 0x50c>,

- <0x00070000 0x6158>,

- <0x009e0000 0xfff>;

- compatible = "qcom,mdss_hdmi-phy-8996";

- interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>;

- interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;

- interrupts = <0 138 IRQ_TYPE_LEVEL_HIGH>;

- interrupts = <0 164 IRQ_TYPE_LEVEL_HIGH>;

- interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>;

diff --git a/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts b/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts
index 7957c8823f0d..5e3fd1637f44 100644
--- a/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts
+++ b/arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts

- audio-routing = "RX_BIAS", "MCLK";

- id-gpio = <&tlmm 38 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi b/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi
index 687e96068cb2..876c6921ddf0 100644
--- a/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi

- id-gpio = <&tlmm 38 GPIO_ACTIVE_HIGH>;

- vbus-gpio = <&tlmm 128 GPIO_ACTIVE_HIGH>;

- syna,codes = <KEY_BACK KEY_APPSELECT>;

- compatible = "qcom,glink-rpm";

- interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;

- qcom,rpm-msg-ram = <&rpm_msg_ram>;

- mboxes = <&apcs_glb 0>;

- rpm_requests: rpm-requests {

- compatible = "qcom,rpm-msm8998";

- qcom,glink-channels = "rpm_requests";

- rpmcc: clock-controller {

- compatible = "qcom,rpmcc-msm8998", "qcom,rpmcc";

- #clock-cells = <1>;

- rpmpd: power-controller {

- compatible = "qcom,msm8998-rpmpd";

- #power-domain-cells = <1>;

- operating-points-v2 = <&rpmpd_opp_table>;

- rpmpd_opp_table: opp-table {

- compatible = "operating-points-v2";

- rpmpd_opp_ret: opp1 {

- opp-level = <RPM_SMD_LEVEL_RETENTION>;

- rpmpd_opp_ret_plus: opp2 {

- opp-level = <RPM_SMD_LEVEL_RETENTION_PLUS>;

- rpmpd_opp_min_svs: opp3 {

- opp-level = <RPM_SMD_LEVEL_MIN_SVS>;

- rpmpd_opp_low_svs: opp4 {

- opp-level = <RPM_SMD_LEVEL_LOW_SVS>;

- rpmpd_opp_svs: opp5 {

- opp-level = <RPM_SMD_LEVEL_SVS>;

- rpmpd_opp_svs_plus: opp6 {

- opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;

- rpmpd_opp_nom: opp7 {

- opp-level = <RPM_SMD_LEVEL_NOM>;

- rpmpd_opp_nom_plus: opp8 {

- opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;

- rpmpd_opp_turbo: opp9 {

- opp-level = <RPM_SMD_LEVEL_TURBO>;

- rpmpd_opp_turbo_plus: opp10 {

- opp-level = <RPM_SMD_LEVEL_BINNING>;

- reg = <0x01c00000 0x2000>,

- <0x1b000000 0xf1d>,

- <0x1b000f20 0xa8>,

- <0x1b100000 0x100000>;

- interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>;

- <&gcc GPLL0_OUT_MAIN>;

- reg = <0x0800f000 0x1000>,

- <0x08400000 0x1000000>,

- <0x09400000 0x1000000>,

- <0x0a400000 0x220000>,

- <0x0800a000 0x3000>;

- <&rpmcc RPM_SMD_MMAXI_CLK>,

- clock-names = "iface-mm", "iface-smmu",

- "bus-mm", "bus-smmu";

- interrupts = <0x5 0xd8 0x1 IRQ_TYPE_EDGE_RISING>;

- interrupt-names = "ovp";

- ref_gnd: ref_gnd@0 {

- vref_1p25: vref_1p25@1 {

- die_temp: die_temp@6 {

- xo_therm: xo_therm@4c {

- msm_therm: msm_therm@4d {

- emmc_therm: emmc_therm@4e {

- pa_therm0: thermistor0@4f {

- pa_therm1: thermistor1@50 {

- quiet_therm: quiet_therm@51 {

- vadc_vph_pwr: vph_pwr@83 {

- interrupts = <0x3 0xd8 0x1 IRQ_TYPE_EDGE_RISING>;

- interrupt-names = "ovp";

- pm8350_thermal: pm8350c-thermal {

- pm8350b_thermal: pm8350c-thermal {

- interrupts = <0x3 0xd8 0x02 IRQ_TYPE_EDGE_RISING>;

- interrupt-names = "short";

- interrupts = <3 0xd8 0x02 IRQ_TYPE_EDGE_RISING>;

- interrupt-names = "short";

- compatible = "qcom,adc-tm7";

- pmic_die: die-temp@6 {

- xo_therm: xo-temp@76 {

- pa_therm1: thermistor1@77 {

- pa_therm2: thermistor2@78 {

- pa_therm3: thermistor3@79 {

- pmr735a_thermal: pmr735a-thermal {

- pon_1: vph_pwr@131 {

- pa_therm1: thermistor1@77 {

- pa_therm3: thermistor3@79 {

- xo_therm: xo_temp@76 {

- compatible = "qcom,glink-rpm";

- interrupts = <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>;

- qcom,rpm-msg-ram = <&rpm_msg_ram>;

- mboxes = <&apcs_glb 0>;

- rpm_requests: rpm-requests {

- compatible = "qcom,rpm-qcm2290";

- qcom,glink-channels = "rpm_requests";

- rpmcc: clock-controller {

- compatible = "qcom,rpmcc-qcm2290", "qcom,rpmcc";

- clocks = <&xo_board>;

- clock-names = "xo";

- #clock-cells = <1>;

- rpmpd: power-controller {

- compatible = "qcom,qcm2290-rpmpd";

- #power-domain-cells = <1>;

- operating-points-v2 = <&rpmpd_opp_table>;

- rpmpd_opp_table: opp-table {

- compatible = "operating-points-v2";

- rpmpd_opp_min_svs: opp1 {

- opp-level = <RPM_SMD_LEVEL_MIN_SVS>;

- rpmpd_opp_low_svs: opp2 {

- opp-level = <RPM_SMD_LEVEL_LOW_SVS>;

- rpmpd_opp_svs: opp3 {

- opp-level = <RPM_SMD_LEVEL_SVS>;

- rpmpd_opp_svs_plus: opp4 {

- opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;

- rpmpd_opp_nom: opp5 {

- opp-level = <RPM_SMD_LEVEL_NOM>;

- rpmpd_opp_nom_plus: opp6 {

- opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;

- rpmpd_opp_turbo: opp7 {

- opp-level = <RPM_SMD_LEVEL_TURBO>;

- rpmpd_opp_turbo_plus: opp8 {

- opp-level = <RPM_SMD_LEVEL_TURBO_NO_CPR>;

- dma-channels = <10>;

- phys = <&usb_hsphy>;

- phy-names = "usb2-phy";

- compatible = "qcom,glink-rpm";

- interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;

- qcom,rpm-msg-ram = <&rpm_msg_ram>;

- mboxes = <&apcs_glb 0>;

- rpm_requests: rpm-requests {

- compatible = "qcom,rpm-qcs404";

- qcom,glink-channels = "rpm_requests";

- rpmcc: clock-controller {

- compatible = "qcom,rpmcc-qcs404", "qcom,rpmcc";

- #clock-cells = <1>;

- clocks = <&xo_board>;

- clock-names = "xo";

- rpmpd: power-controller {

- compatible = "qcom,qcs404-rpmpd";

- #power-domain-cells = <1>;

- operating-points-v2 = <&rpmpd_opp_table>;

- rpmpd_opp_table: opp-table {

- compatible = "operating-points-v2";

- rpmpd_opp_ret: opp1 {

- rpmpd_opp_ret_plus: opp2 {

- rpmpd_opp_min_svs: opp3 {

- rpmpd_opp_low_svs: opp4 {

- rpmpd_opp_svs: opp5 {

- opp-level = <128>;

- rpmpd_opp_svs_plus: opp6 {

- opp-level = <192>;

- rpmpd_opp_nom: opp7 {

- opp-level = <256>;

- rpmpd_opp_nom_plus: opp8 {

- opp-level = <320>;

- rpmpd_opp_turbo: opp9 {

- opp-level = <384>;

- rpmpd_opp_turbo_no_cpr: opp10 {

- opp-level = <416>;

- rpmpd_opp_turbo_plus: opp11 {

- opp-level = <512>;

- reg = <0x10000000 0xf1d>,

- <0x10000f20 0xa8>,

- <0x07780000 0x2000>,

- <0x10001000 0x2000>;

- skin-msm-therm@4e {

- pm8150l-therm@4f {

- interrupts = <GIC_SPI 567 IRQ_TYPE_LEVEL_HIGH>;

- charger-thermistor@4f {

diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1.dts b/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1.dts
index edfcd47e1a00..03d350dcec96 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1.dts
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1.dts

- /delete-node/ skin-temp-thermistor@4e;

- /delete-node/ charger-thermistor@4f;

- skin-temp-thermistor@4e {

diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi
index b3ba23a88a0b..b27dcd2ec856 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi

- skin-temp-thermistor@4d {

- /delete-node/ charger-thermistor@4f;

diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1.dts b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1.dts
index 8467ff41e6d5..ba222a60c4c6 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1.dts
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r1.dts

- /delete-node/ charger-thermistor@4f;

diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2.dts b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2.dts
index 88cf2246c18a..64d6172bf402 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2.dts
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom-r2.dts

- /delete-node/ charger-thermistor@4f;

- 5v-choke-thermistor@4e {

diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler.dtsi
index 2efa8a4bcda6..2f6a340ddd2a 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler.dtsi

- skin-temp-thermistor@4d {

- charger-thermistor@4f {

- cpu-idle-states = <&LITTLE_CPU_SLEEP_0

- &LITTLE_CPU_SLEEP_1

- &CLUSTER_SLEEP_0>;

- cpu-idle-states = <&LITTLE_CPU_SLEEP_0

- &LITTLE_CPU_SLEEP_1

- &CLUSTER_SLEEP_0>;

- cpu-idle-states = <&LITTLE_CPU_SLEEP_0

- &LITTLE_CPU_SLEEP_1

- &CLUSTER_SLEEP_0>;

- cpu-idle-states = <&LITTLE_CPU_SLEEP_0

- &LITTLE_CPU_SLEEP_1

- &CLUSTER_SLEEP_0>;

- cpu-idle-states = <&LITTLE_CPU_SLEEP_0

- &LITTLE_CPU_SLEEP_1

- &CLUSTER_SLEEP_0>;

- cpu-idle-states = <&LITTLE_CPU_SLEEP_0

- &LITTLE_CPU_SLEEP_1

- &CLUSTER_SLEEP_0>;

- cpu-idle-states = <&BIG_CPU_SLEEP_0

- &CLUSTER_SLEEP_0>;

- cpu-idle-states = <&BIG_CPU_SLEEP_0

- &CLUSTER_SLEEP_0>;

- CLUSTER_SLEEP_0: cluster-sleep-0 {

- compatible = "arm,idle-state";

- arm,psci-suspend-param = <0x40003444>;

- min-residency-us = <9926>;

diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-rt5682-3mic.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-rt5682-3mic.dtsi
index 485f9942e128..a90c70b1b73e 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-rt5682-3mic.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-rt5682-3mic.dtsi

- audio-routing = "VA DMIC0", "vdd-micb",

- pmr735a-die-temp@403 {

- pmk8350-die-temp@3 {

- pmr735a-die-temp@403 {

- power-domains = <&rpmhpd SC7280_LCX>;

- auo_b140han06_in: endpoint {

- remote-endpoint = <&mdss_edp_out>;

- pon: power-on@800 {

- compatible = "qcom,pmc8180-gpio";

- compatible = "qcom,pmc8180c-gpio";

- pmc8180c_lpg: lpg {

- auo_b133han05_in: endpoint {

- remote-endpoint = <&mdss_edp_out>;

- arm,psci-suspend-param = <0x4100c244>;

- compatible="qcom,adreno-gmu-680.1", "qcom,adreno-gmu";

- reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>;

- reg-names = "llcc_base", "llcc_broadcast_base";

- gpu-thermal-bottom {

- regulator-name = "VBL9";

- regulator-name = "VCC3_SSD";

- regulator-name = "VCC3B";

- gpio = <&pmc8280_1_gpios 1 GPIO_ACTIVE_HIGH>;

- regulator-name = "VCC_WLAN_3R9";

- regulator-name = "VCC3B_WAN";

- svid = /bits/ 16 <0xff01>;

diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
index 7cc3028440b6..38edaf51aa34 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts

- svid = /bits/ 16 <0xff01>;

- pmic-die-temp@103 {

- pmic-die-temp@303 {

- pmic-die-temp@403 {

- gpio-reserved-ranges = <70 2>, <74 6>, <83 4>, <125 2>, <128 2>, <154 7>;

- interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>;

- id-gpio = <&tlmm 58 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
index 3033723fc6ff..87d0293c728d 100644
--- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi

- id-gpio = <&tlmm 58 GPIO_ACTIVE_HIGH>;

- compatible = "qcom,glink-rpm";

- interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;

- qcom,rpm-msg-ram = <&rpm_msg_ram>;

- mboxes = <&apcs_glb 0>;

- rpm_requests: rpm-requests {

- compatible = "qcom,rpm-sdm660";

- qcom,glink-channels = "rpm_requests";

- rpmcc: clock-controller {

- compatible = "qcom,rpmcc-sdm660", "qcom,rpmcc";

- #clock-cells = <1>;

- rpmpd: power-controller {

- compatible = "qcom,sdm660-rpmpd";

- #power-domain-cells = <1>;

- operating-points-v2 = <&rpmpd_opp_table>;

- rpmpd_opp_table: opp-table {

- compatible = "operating-points-v2";

- rpmpd_opp_ret: opp1 {

- opp-level = <RPM_SMD_LEVEL_RETENTION>;

- rpmpd_opp_ret_plus: opp2 {

- opp-level = <RPM_SMD_LEVEL_RETENTION_PLUS>;

- rpmpd_opp_min_svs: opp3 {

- opp-level = <RPM_SMD_LEVEL_MIN_SVS>;

- rpmpd_opp_low_svs: opp4 {

- opp-level = <RPM_SMD_LEVEL_LOW_SVS>;

- rpmpd_opp_svs: opp5 {

- opp-level = <RPM_SMD_LEVEL_SVS>;

- rpmpd_opp_svs_plus: opp6 {

- opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;

- rpmpd_opp_nom: opp7 {

- opp-level = <RPM_SMD_LEVEL_NOM>;

- rpmpd_opp_nom_plus: opp8 {

- opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;

- rpmpd_opp_turbo: opp9 {

- opp-level = <RPM_SMD_LEVEL_TURBO>;

- interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>;

- reg = <0x0800f000 0x1000>,

- <0x08400000 0x1000000>,

- <0x09400000 0x1000000>,

- <0x0a400000 0x220000>,

- <0x0800a000 0x3000>;

- interrupts = <0 8 0x4>,

- interrupts = <0 9 0x4>;

- interrupts = <0 10 0x4>;

- interrupts = <0 11 0x4>;

- interrupts = <0 12 0x4>;

- interrupts = <0 13 0x4>;

- interrupts = <0 14 0x4>;

- id-gpio = <&tlmm 58 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts b/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts
index 623a826b18a3..4005e04d998a 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts

- #sound-dai-cells = <1>;

- audio-routing = "RX_BIAS", "MCLK",

- sound-dai = <&max98927_codec 0>;

- interrupts = <125 0x2>;

diff --git a/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi b/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi
index 3bc187a066ae..7ee61b20452e 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi

diff --git a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
index cfbc4fc1eba9..92a812b5f423 100644
--- a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
+++ b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts

- status = "disable";

- drive-strength= <2>;

- compatible = "qcom,glink-rpm";

- interrupts = <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>;

- qcom,rpm-msg-ram = <&rpm_msg_ram>;

- mboxes = <&apcs_glb 0>;

- rpm_requests: rpm-requests {

- compatible = "qcom,rpm-sm6115";

- qcom,glink-channels = "rpm_requests";

- rpmcc: clock-controller {

- compatible = "qcom,rpmcc-sm6115", "qcom,rpmcc";

- clocks = <&xo_board>;

- clock-names = "xo";

- #clock-cells = <1>;

- rpmpd: power-controller {

- compatible = "qcom,sm6115-rpmpd";

- #power-domain-cells = <1>;

- operating-points-v2 = <&rpmpd_opp_table>;

- rpmpd_opp_table: opp-table {

- compatible = "operating-points-v2";

- rpmpd_opp_min_svs: opp1 {

- opp-level = <RPM_SMD_LEVEL_MIN_SVS>;

- rpmpd_opp_low_svs: opp2 {

- opp-level = <RPM_SMD_LEVEL_LOW_SVS>;

- rpmpd_opp_svs: opp3 {

- opp-level = <RPM_SMD_LEVEL_SVS>;

- rpmpd_opp_svs_plus: opp4 {

- opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;

- rpmpd_opp_nom: opp5 {

- opp-level = <RPM_SMD_LEVEL_NOM>;

- rpmpd_opp_nom_plus: opp6 {

- opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;

- rpmpd_opp_turbo: opp7 {

- opp-level = <RPM_SMD_LEVEL_TURBO>;

- rpmpd_opp_turbo_plus: opp8 {

- opp-level = <RPM_SMD_LEVEL_TURBO_NO_CPR>;

- dma-channels = <10>;

- /* HACK: disable until a panel driver is ready to retain simplefb */

- status = "disabled";

- regulator-min-microvolt = <1104000>;

- regulator-max-microvolt = <1312000>;

diff --git a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
index 9f8a9ef398a2..fb4cba004367 100644
--- a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
+++ b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts

- id-gpio = <&tlmm 102 GPIO_ACTIVE_HIGH>;

- msg-size = <0x20000 0x20000>;

- camera-flash-therm@52 {

- emmc-ufs-therm@54 {

diff --git a/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts
index a7f4aeae9c1a..272bc85f1719 100644
--- a/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts
+++ b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts

- msg-size = <0x20000 0x20000>;

- id-gpio = <&tlmm 102 GPIO_ACTIVE_HIGH>;

- compatible = "qcom,glink-rpm";

- interrupts = <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>;

- qcom,rpm-msg-ram = <&rpm_msg_ram>;

- mboxes = <&apcs_glb 0>;

- rpm_requests: rpm-requests {

- compatible = "qcom,rpm-sm6125";

- qcom,glink-channels = "rpm_requests";

- rpmcc: clock-controller {

- compatible = "qcom,rpmcc-sm6125", "qcom,rpmcc";

- #clock-cells = <1>;

- rpmpd: power-controller {

- compatible = "qcom,sm6125-rpmpd";

- #power-domain-cells = <1>;

- operating-points-v2 = <&rpmpd_opp_table>;

- rpmpd_opp_table: opp-table {

- compatible = "operating-points-v2";

- rpmpd_opp_ret: opp1 {

- opp-level = <RPM_SMD_LEVEL_RETENTION>;

- rpmpd_opp_ret_plus: opp2 {

- opp-level = <RPM_SMD_LEVEL_RETENTION_PLUS>;

- rpmpd_opp_min_svs: opp3 {

- opp-level = <RPM_SMD_LEVEL_MIN_SVS>;

- rpmpd_opp_low_svs: opp4 {

- opp-level = <RPM_SMD_LEVEL_LOW_SVS>;

- rpmpd_opp_svs: opp5 {

- opp-level = <RPM_SMD_LEVEL_SVS>;

- rpmpd_opp_svs_plus: opp6 {

- opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;

- rpmpd_opp_nom: opp7 {

- opp-level = <RPM_SMD_LEVEL_NOM>;

- rpmpd_opp_nom_plus: opp8 {

- opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;

- rpmpd_opp_turbo: opp9 {

- opp-level = <RPM_SMD_LEVEL_TURBO>;

- rpmpd_opp_turbo_no_cpr: opp10 {

- opp-level = <RPM_SMD_LEVEL_TURBO_NO_CPR>;

- pil_gpu_mem: memory@8b715400 {

- reg = <0 0x8b715400 0 0x2000>;

- msg-size = <0x20000 0x20000>;

- compatible = "qcom,glink-rpm";

- interrupts-extended = <&ipcc IPCC_CLIENT_AOP

- IPCC_MPROC_SIGNAL_GLINK_QMP

- IRQ_TYPE_EDGE_RISING>;

- qcom,rpm-msg-ram = <&rpm_msg_ram>;

- mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>;

- rpm_requests: rpm-requests {

- compatible = "qcom,rpm-sm6375";

- qcom,glink-channels = "rpm_requests";

- rpmcc: clock-controller {

- compatible = "qcom,rpmcc-sm6375", "qcom,rpmcc";

- clocks = <&xo_board_clk>;

- clock-names = "xo";

- #clock-cells = <1>;

- rpmpd: power-controller {

- compatible = "qcom,sm6375-rpmpd";

- #power-domain-cells = <1>;

- operating-points-v2 = <&rpmpd_opp_table>;

- rpmpd_opp_table: opp-table {

- compatible = "operating-points-v2";

- rpmpd_opp_ret: opp1 {

- opp-level = <RPM_SMD_LEVEL_RETENTION>;

- rpmpd_opp_min_svs: opp2 {

- opp-level = <RPM_SMD_LEVEL_MIN_SVS>;

- rpmpd_opp_low_svs: opp3 {

- opp-level = <RPM_SMD_LEVEL_LOW_SVS>;

- rpmpd_opp_svs: opp4 {

- opp-level = <RPM_SMD_LEVEL_SVS>;

- rpmpd_opp_svs_plus: opp5 {

- opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;

- rpmpd_opp_nom: opp6 {

- opp-level = <RPM_SMD_LEVEL_NOM>;

- rpmpd_opp_nom_plus: opp7 {

- opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;

- rpmpd_opp_turbo: opp8 {

- opp-level = <RPM_SMD_LEVEL_TURBO>;

- rpmpd_opp_turbo_no_cpr: opp9 {

- opp-level = <RPM_SMD_LEVEL_TURBO_NO_CPR>;

diff --git a/arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano.dtsi b/arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano.dtsi
index baafea53770b..ae0ca48b89a5 100644
--- a/arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano.dtsi

- msg-size = <0x20000 0x20000>;

- interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;

- compatible = "qcom,dsi-phy-7nm";

- camera-flash-therm@4d {

- skin-msm-therm@4e {

diff --git a/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo-pdx203.dts b/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo-pdx203.dts
index 356a81698731..b70bf9261ba9 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo-pdx203.dts
+++ b/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo-pdx203.dts

diff --git a/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo-pdx206.dts b/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo-pdx206.dts
index 01fe3974ee72..58a521046f5f 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo-pdx206.dts
+++ b/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo-pdx206.dts

diff --git a/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi b/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi
index 8ab82bacba81..ecdc20bc10f5 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi

- * Camera focus (light press) and camera snapshot (full press)

- * seem not to work properly.. Adding the former one stalls the CPU

- * and the latter kills the volume down key for whatever reason. In any

- * case, they are both on &pm8150b_gpios: camera focus(2), camera snapshot(1).

- msg-size = <0x20000 0x20000>;

- clock-frequency = <400000>;

- /* Dialog SLG51000 CMIC @ 75 */

diff --git a/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi b/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi
index b841ea9192ae..85e5cf3dc91e 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi

- dynamic-power-coefficient = <205>;

- power-domains = <&rpmhpd SM8250_CX>;

- power-domains = <&rpmhpd SM8250_LCX>,

- <&rpmhpd SM8250_LMX>;

- remote-endpoint= <&funnel_merg_out_funnel_swao>;

- power-domains = <&rpmhpd SM8250_CX>;

- <&rpmhpd SM8250_MX>;

- power-domains = <&rpmhpd SM8250_MMCX>;

- interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>;

- power-domains = <&rpmhpd SM8250_LCX>,

- <&rpmhpd SM8250_LMX>;

- svid = /bits/ 16 <0xff01>;

- #address-cells = <1>;

- #size-cells = <0>;

- fsa4480_sbu_mux: endpoint {

- remote-endpoint = <&pmic_glink_sbu>;

- compatible = "qcom,kryo685";

- entry-latency-us = <355>;

- exit-latency-us = <909>;

- entry-latency-us = <241>;

- exit-latency-us = <1461>;

- CLUSTER_SLEEP_0: cluster-sleep-0 {

- domain-idle-states = <&CLUSTER_SLEEP_0>;

- power-domains = <&rpmhpd SM8350_CX>;

- power-domains = <&rpmhpd SM8350_CX>,

- <&rpmhpd SM8350_MSS>;

- power-domains = <&rpmhpd SM8350_LCX>,

- <&rpmhpd SM8350_LMX>;

- power-domains = <&rpmhpd SM8350_CX>;

- power-domains = <&rpmhpd SM8350_MMCX>;

- interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>;

- power-domains = <&rpmhpd SM8350_LCX>,

- <&rpmhpd SM8350_LMX>;

- power-domains = <&rpmhpd SM8350_CX>,

- <&rpmhpd SM8350_MXC>;

-#include "pmr735b.dtsi"

- svid = /bits/ 16 <0xff01>;

- #address-cells = <1>;

- #size-cells = <0>;

- fsa4480_sbu_mux: endpoint {

- remote-endpoint = <&pmic_glink_sbu>;

- power-domains = <&rpmhpd SM8450_CX>;

- power-domains = <&rpmhpd SM8450_LCX>,

- <&rpmhpd SM8450_LMX>;

- power-domains = <&rpmhpd SM8450_LCX>,

- <&rpmhpd SM8450_LMX>;

- power-domains = <&rpmhpd SM8450_CX>,

- <&rpmhpd SM8450_MXC>;

- power-domains = <&rpmhpd SM8450_CX>,

- <&rpmhpd SM8450_MSS>;

- power-domains = <&rpmhpd SM8450_MMCX>;

- <&mmss_noc MASTER_MDP_DISP 0 &mc_virt SLAVE_EBI1_DISP 0>;

- interconnect-names = "mdp0-mem", "mdp1-mem";

- power-domains = <&rpmhpd SM8450_MMCX>;

- interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>;

- reg = <0 0x01d84000 0 0x3000>,

- <0 0x01d88000 0 0x8000>;

- reg-names = "std", "ice";

- "rx_lane1_sync_clk",

- <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>,

- <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;

- <75000000 300000000>;

- crypto: crypto@1de0000 {

- power-domains = <&rpmhpd SM8450_CX>;

- remote-endpoint = <&usb_1_dwc3_ss>;

- remote-endpoint = <&pmic_glink_ss_in>;

- remote-endpoint = <&usb_1_dwc3_ss>;

- remote-endpoint = <&pmic_glink_ss_in>;

- interconnects = <&clk_virt MASTER_QUP_CORE_1 0 &clk_virt SLAVE_QUP_CORE_1 0>,

- power-domains = <&rpmhpd SM8550_CX>,

- <&rpmhpd SM8550_MSS>;

- power-domains = <&rpmhpd SM8550_CX>;

- power-domains = <&rpmhpd SM8550_MMCX>;

- interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 691 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,

- <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>;

- power-domains = <&rpmhpd SM8550_LCX>,

- <&rpmhpd SM8550_LMX>;

- power-domains = <&rpmhpd SM8550_CX>,

- <&rpmhpd SM8550_MXC>,

- <&rpmhpd SM8550_NSP>;

- max9286_in1: endpoint{

- max9286_in5: endpoint{

-// SPDX-License-Identifier: (GPL-2.0 or MIT)

- clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;

diff --git a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
index dd8e0e159526..5cbde8e8fcd5 100644
--- a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi

-// SPDX-License-Identifier: (GPL-2.0 or MIT)

diff --git a/arch/arm64/boot/dts/renesas/r8a779m1-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a779m1-salvator-xs.dts
index 084b75b04680..74b0ac04ffe1 100644
--- a/arch/arm64/boot/dts/renesas/r8a779m1-salvator-xs.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779m1-salvator-xs.dts

-// SPDX-License-Identifier: (GPL-2.0 or MIT)

diff --git a/arch/arm64/boot/dts/renesas/r8a779m3-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a779m3-salvator-xs.dts
index 4ab26fd7233d..e53a6e88ccfa 100644
--- a/arch/arm64/boot/dts/renesas/r8a779m3-salvator-xs.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779m3-salvator-xs.dts

-// SPDX-License-Identifier: (GPL-2.0 or MIT)

diff --git a/arch/arm64/boot/dts/renesas/r8a779m5-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a779m5-salvator-xs.dts
index c0341a88d641..6efc23171a66 100644
--- a/arch/arm64/boot/dts/renesas/r8a779m5-salvator-xs.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779m5-salvator-xs.dts

-// SPDX-License-Identifier: (GPL-2.0 or MIT)

diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi
index 9085d8c76ce1..18c526c7a4cf 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi

- txdv-skew-psec = <0>;

-/* comment the #define statement to disable SCIF2 (SER0) on PMOD1 (CN7) */

-#define PMOD1_SER0 1

diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi
index a78a8def363e..92c64d58349f 100644
--- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi

- txdv-skew-psec = <0>;

- <RZG2L_PORT_PINMUX(26, 1, 1)>; /* ET0_RXD3 */

diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi
index 58923dc83faa..355694fe4af6 100644
--- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi

- txdv-skew-psec = <0>;

diff --git a/arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi b/arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi
index bf10a3d29fca..80db778c9684 100644
--- a/arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi

- enable-gpio = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts b/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts
index d759478e1c84..165d09ccb942 100644
--- a/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts

- enable-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;

- enable-gpio = <&gpio2 2 GPIO_ACTIVE_HIGH>;

- id-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;

-#include "rk3399-opp.dtsi"

- regulator-min-microvolt = <5000000>;

- regulator-max-microvolt = <5000000>;

- vin-supply = <&vcc5v0_sys>;

- /* actually fed by vcc5v0_sys, dependent

- * on pi6c clock generator

- vin-supply = <&vcc3v3_pi6c_05>;

- vpcie3v3-supply = <&vcc3v3_pcie30x1>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a.dtsi
index 38e1a1e25f33..727580aaa105 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a.dtsi

- max-frequency = <200000000>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts
index e9d5a8bab581..9933765e4097 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b.dtsi
index 1c5bcf1280b4..017559bba37f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b.dtsi

- max-frequency = <200000000>;

- compatible = "pwm-fan";

- cooling-levels = <0 95 145 195 255>;

- fan-supply = <&vcc5v0_sys>;

- pwms = <&pwm1 0 50000 0>;

- #cooling-cells = <2>;

- max-frequency = <200000000>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts b/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts
index 1a60a275ddf9..d1503a4b233a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts

- max-frequency = <200000000>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
index 93b4a0c4ed0f..82478a452533 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts

- max-frequency = <200000000>;

- reg = <0x0 0x10400000 0x0 0x10000>, /* GICD */

- <0x0 0x10600000 0x0 0x200000>; /* GICR_RD+GICR_SGI */

- epwm_tbclk: clock@4130 {

- compatible = "ti,am62-epwm-tbclk", "syscon";

- power-domains = <&k3_pds 70 TI_SCI_PD_SHARED>;

- reg =<0x00 0x31000000 0x00 0x50000>;

- reg =<0x00 0x31100000 0x00 0x50000>;

-/* Verdin CAN_2 - Reserved to Cortex-M4 */

- compatible = "beagle,am625-beagleplay", "ti,am625";

- gbe_pmx_obsclk: gbe-pmx-clk-default {

- compatible = "ti,am62-epwm-tbclk", "syscon";

- mboxes= <&secure_proxy_main 12>,

- <&secure_proxy_main 13>;

- reg =<0x00 0x31000000 0x00 0x50000>;

- reg =<0x00 0x31100000 0x00 0x50000>;

- compatible = "ti,am62a7-sk", "ti,am62a7";

- clock-frequency = <400000>;

- main_conf: syscon@43000000 {

- compatible = "syscon", "simple-mfd";

- reg = <0x00 0x43000000 0x00 0x20000>;

- #address-cells = <1>;

- #size-cells = <1>;

- ranges = <0x00 0x00 0x43000000 0x20000>;

- compatible = "ti,am654-chipid";

- reg = <0x00000014 0x4>;

- phy_gmii_sel: phy@4044 {

- compatible = "ti,am654-phy-gmii-sel";

- reg = <0x4044 0x8>;

- epwm_tbclk: clock@4140 {

- compatible = "ti,am64-epwm-tbclk", "syscon";

- reg = <0x4130 0x4>;

- #clock-cells = <1>;

- usbss0: cdns-usb@f900000{

- usb0: usb@f400000{

-#include <dt-bindings/mux/ti-serdes.h>

diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
index 9c418abd29d8..9175e96842d8 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts

-#include <dt-bindings/mux/ti-serdes.h>

- status = "disabled";

diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi
index e73458ca6900..e9419c4fe605 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi

- cp2102n_reset_pin_default: cp2102n-reset-pin-default {

- status = "disabled";

- ehrpwm_tbclk: clock@4140 {

- compatible = "ti,am654-ehrpwm-tbclk", "syscon";

- reg = <0x0 0x3c000000 0x0 0x400000>,

- <0x0 0x38000000 0x0 0x400000>,

- <0x0 0x31120000 0x0 0x100>,

- <0x0 0x33000000 0x0 0x40000>;

- reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";

- reg = <0x0 0x31150000 0x0 0x100>,

- <0x0 0x34000000 0x0 0x100000>,

- <0x0 0x35000000 0x0 0x100000>;

- reg = <0x0 0x04a00000 0x0 0x1000>, /* common */

- <0x0 0x04a02000 0x0 0x1000>, /* vidl1 */

- <0x0 0x04a06000 0x0 0x1000>, /* vid */

- <0x0 0x04a07000 0x0 0x1000>, /* ovr1 */

- <0x0 0x04a08000 0x0 0x1000>, /* ovr2 */

- <0x0 0x04a0a000 0x0 0x1000>, /* vp1 */

- <0x0 0x04a0b000 0x0 0x1000>; /* vp2 */

- reg = <0x0 0x2b800000 0x0 0x400000>,

- <0x0 0x2b000000 0x0 0x400000>,

- <0x0 0x28590000 0x0 0x100>,

- <0x0 0x2a500000 0x0 0x40000>;

- reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";

- reg = <0x0 0x285c0000 0x0 0x100>,

- <0x0 0x2a800000 0x0 0x40000>,

- <0x0 0x2aa00000 0x0 0x40000>;

- fss: fss@47000000 {

- wkup_pca554_default: wkup-pca554-default {

diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts
index cbe44634914f..774eb14ac907 100644
--- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts
+++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts

- main_bkey_pcie_reset: main-bkey-pcie-reset {

- main_m2_pcie_mux_control: main-m2-pcie-mux-control {

-#include <dt-bindings/mux/ti-serdes.h>

- mcu_rpi_header_gpio0_pins0_default: mcu-rpi-header-gpio0-pins0-default {

- mcu_rpi_header_gpio0_pins1_default: mcu-rpi-header-gpio0-pins1-default {

- status = "disabled";

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 3cf288128c3f..cee2b4b0eb87 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts

-#include <dt-bindings/mux/ti-serdes.h>

- status = "disabled";

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-evm-quad-port-eth-exp.dtso b/arch/arm64/boot/dts/ti/k3-j7200-evm-quad-port-eth-exp.dtso
index 34a0747cbe69..32d905235ed7 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-evm-quad-port-eth-exp.dtso
+++ b/arch/arm64/boot/dts/ti/k3-j7200-evm-quad-port-eth-exp.dtso

-#include <dt-bindings/mux/ti-serdes.h>

- reg = <0x00 0x3c000000 0x00 0x400000>,

- <0x00 0x38000000 0x00 0x400000>,

- <0x00 0x31120000 0x00 0x100>,

- <0x00 0x33000000 0x00 0x40000>;

- reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";

- reg = <0x00 0x31150000 0x00 0x100>,

- <0x00 0x34000000 0x00 0x100000>,

- <0x00 0x35000000 0x00 0x100000>;

- reg = <0x00 0x2b800000 0x00 0x400000>,

- <0x00 0x2b000000 0x00 0x400000>,

- <0x00 0x28590000 0x00 0x100>,

- <0x00 0x2a500000 0x00 0x40000>;

- reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";

- reg = <0x00 0x285c0000 0x00 0x100>,

- <0x00 0x2a800000 0x00 0x40000>,

- <0x00 0x2aa00000 0x00 0x40000>;

- status = "disabled";

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index c1cbbae76182..fe5207ac7d85 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts

- status = "disabled";

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-evm-quad-port-eth-exp.dtso b/arch/arm64/boot/dts/ti/k3-j721e-evm-quad-port-eth-exp.dtso
index 6f0adf591b98..d4c51ffc3d6b 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-evm-quad-port-eth-exp.dtso
+++ b/arch/arm64/boot/dts/ti/k3-j721e-evm-quad-port-eth-exp.dtso

-#include <dt-bindings/mux/ti-serdes.h>

- compatible = "ti,am654-ehrpwm-tbclk", "syscon";

- reg = <0x0 0x3c000000 0x0 0x400000>,

- <0x0 0x38000000 0x0 0x400000>,

- <0x0 0x31120000 0x0 0x100>,

- <0x0 0x33000000 0x0 0x40000>;

- reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";

- reg = <0x0 0x31150000 0x0 0x100>,

- <0x0 0x34000000 0x0 0x100000>,

- <0x0 0x35000000 0x0 0x100000>;

- wiz1_cmn_refclk_dig_div: cmn-refclk-dig-div{

- clocks = <&k3_clks 152 0>,

- <&k3_clks 152 13>;

- fss: fss@47000000 {

- reg = <0x0 0x2b800000 0x0 0x400000>,

- <0x0 0x2b000000 0x0 0x400000>,

- <0x0 0x28590000 0x0 0x100>,

- <0x0 0x2a500000 0x0 0x40000>;

- reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";

- reg = <0x0 0x285c0000 0x0 0x100>,

- <0x0 0x2a800000 0x0 0x40000>,

- <0x0 0x2aa00000 0x0 0x40000>;

- status = "disabled";

- pinctrl-names = "default";

- pinctrl-0 = <&wkup_i2c0_pins_default>;

- clock-frequency = <400000>;

- /* CAV24C256WE-GT3 */

- compatible = "atmel,24c256";

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
index 04d4739d7245..c6b85bbf9a17 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts

-#include <dt-bindings/mux/ti-serdes.h>

- J721S2_WKUP_IOPAD(0x040, PIN_OUTPUT, 0) /* (A19) MCU_OSPI1_CLK */

- J721S2_WKUP_IOPAD(0x05c, PIN_OUTPUT, 0) /* (D20) MCU_OSPI1_CSn0 */

- J721S2_WKUP_IOPAD(0x060, PIN_OUTPUT, 0) /* (C21) MCU_OSPI1_CSn1 */

- J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (D21) MCU_OSPI1_D0 */

- J721S2_WKUP_IOPAD(0x050, PIN_INPUT, 0) /* (G20) MCU_OSPI1_D1 */

- J721S2_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (C20) MCU_OSPI1_D2 */

- J721S2_WKUP_IOPAD(0x058, PIN_INPUT, 0) /* (A20) MCU_OSPI1_D3 */

- J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (B19) MCU_OSPI1_DQS */

- J721S2_WKUP_IOPAD(0x044, PIN_INPUT, 0) /* (B20) MCU_OSPI1_LBCLKO */

- status = "disabled";

- <0x0 0x33000000 0x0 0x40000>;

- reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";

- mcu_navss: bus@28380000{

- <0x0 0x2a500000 0x0 0x40000>;

- reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";

- J721S2_WKUP_IOPAD(0x030, PIN_OUTPUT, 0) /* (G17) MCU_OSPI0_CSn1 */

- J721S2_WKUP_IOPAD(0x038, PIN_OUTPUT, 0) /* (F14) MCU_OSPI0_CSn2 */

- J721S2_WKUP_IOPAD(0x03c, PIN_OUTPUT, 0) /* (F17) MCU_OSPI0_CSn3 */

- J784S4_WKUP_IOPAD(0x134, PIN_INPUT, 0) /* (P36) MCU_ADC0_AIN0 */

- J784S4_WKUP_IOPAD(0x138, PIN_INPUT, 0) /* (V36) MCU_ADC0_AIN1 */

- J784S4_WKUP_IOPAD(0x13c, PIN_INPUT, 0) /* (T34) MCU_ADC0_AIN2 */

- J784S4_WKUP_IOPAD(0x140, PIN_INPUT, 0) /* (T36) MCU_ADC0_AIN3 */

- J784S4_WKUP_IOPAD(0x144, PIN_INPUT, 0) /* (P34) MCU_ADC0_AIN4 */

- J784S4_WKUP_IOPAD(0x148, PIN_INPUT, 0) /* (R37) MCU_ADC0_AIN5 */

- J784S4_WKUP_IOPAD(0x14c, PIN_INPUT, 0) /* (R33) MCU_ADC0_AIN6 */

- J784S4_WKUP_IOPAD(0x150, PIN_INPUT, 0) /* (V38) MCU_ADC0_AIN7 */

- J784S4_WKUP_IOPAD(0x154, PIN_INPUT, 0) /* (Y38) MCU_ADC1_AIN0 */

- J784S4_WKUP_IOPAD(0x158, PIN_INPUT, 0) /* (Y34) MCU_ADC1_AIN1 */

- J784S4_WKUP_IOPAD(0x15c, PIN_INPUT, 0) /* (V34) MCU_ADC1_AIN2 */

- J784S4_WKUP_IOPAD(0x160, PIN_INPUT, 0) /* (W37) MCU_ADC1_AIN3 */

- J784S4_WKUP_IOPAD(0x164, PIN_INPUT, 0) /* (AA37) MCU_ADC1_AIN4 */

- J784S4_WKUP_IOPAD(0x168, PIN_INPUT, 0) /* (W33) MCU_ADC1_AIN5 */

- J784S4_WKUP_IOPAD(0x16c, PIN_INPUT, 0) /* (U33) MCU_ADC1_AIN6 */

- J784S4_WKUP_IOPAD(0x170, PIN_INPUT, 0) /* (Y36) MCU_ADC1_AIN7 */

- J784S4_WKUP_IOPAD(0x03c, PIN_OUTPUT, 6) /* (C32) MCU_OSPI0_CSn3.MCU_OSPI0_ECC_FAIL */

- J784S4_WKUP_IOPAD(0x038, PIN_OUTPUT, 6) /* (B34) MCU_OSPI0_CSn2.MCU_OSPI0_RESET_OUT0 */

- J784S4_WKUP_IOPAD(0x040, PIN_OUTPUT, 0) /* (F32) MCU_OSPI1_CLK */

- J784S4_WKUP_IOPAD(0x05c, PIN_OUTPUT, 0) /* (G32) MCU_OSPI1_CSn0 */

- J784S4_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (E35) MCU_OSPI1_D0 */

- J784S4_WKUP_IOPAD(0x050, PIN_INPUT, 0) /* (D31) MCU_OSPI1_D1 */

- J784S4_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (G31) MCU_OSPI1_D2 */

- J784S4_WKUP_IOPAD(0x058, PIN_INPUT, 0) /* (F33) MCU_OSPI1_D3 */

- J784S4_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (F31) MCU_OSPI1_DQS */

- J784S4_WKUP_IOPAD(0x044, PIN_INPUT, 0) /* (C31) MCU_OSPI1_LBCLKO */

- pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;

- ti,interrupt-ranges = <8 360 56>;

- clock-names = "clk_ahb", "clk_xin";

- <0x00 0x33000000 0x00 0x40000>;

- reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";

- ti,interrupt-ranges = <16 928 16>;

- mcu_navss: bus@28380000{

- <0x00 0x2a500000 0x00 0x40000>;

- reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
index 603839c82599..ae1b9b2bdbee 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso

- scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;

- sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
index a91d09e7da4b..b59e48be6465 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso

- scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;

- sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;

- scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;

- sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
index d9d1de5f313c..e821d55d8d5a 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts

- scl-gpios = <&gpio 36 GPIO_ACTIVE_HIGH>;

- sda-gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
index 6503f4985f8d..b59e11316b4b 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts

- scl-gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;

- sda-gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dts
index b1e933b8a2cd..0d2ea9c09a0a 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dts

- scl-gpios = <&gpio 74 GPIO_ACTIVE_HIGH>;

- sda-gpios = <&gpio 75 GPIO_ACTIVE_HIGH>;

- scl-gpios = <&gpio 76 GPIO_ACTIVE_HIGH>;

- sda-gpios = <&gpio 77 GPIO_ACTIVE_HIGH>;

- scl-gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;

- sda-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;

- scl-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;

- sda-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;

- scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;

- sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;

- scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;

- sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;

- scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;

- sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;

- scl-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;

- sda-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;

- scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;

- sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;

- scl-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;

- sda-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;

- scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;

- sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;

- interrupts = <0 35 4>;

- interrupts = <0 143 4>,

- interrupts = <0 35 4>;

- interrupts = <1 13 0xf08>,

- interrupts = <0 23 4>;

- interrupts = <0 24 4>;

- interrupts = <0 123 4>,

- interrupts = <0 124 4>;

- interrupts = <0 125 4>;

- interrupts = <0 126 4>;

- interrupts = <0 127 4>;

- interrupts = <0 128 4>;

- interrupts = <0 129 4>;

- interrupts = <0 130 4>;

- interrupts = <0 131 4>;

- interrupts = <1 9 0xf04>;

- interrupts = <0 132 4>, <0 132 4>, <0 132 4>,

- <0 132 4>, <0 132 4>, <0 132 4>;

- interrupts = <0 77 4>;

- interrupts = <0 78 4>;

- interrupts = <0 79 4>;

- interrupts = <0 80 4>;

- interrupts = <0 81 4>;

- interrupts = <0 82 4>;

- interrupts = <0 83 4>;

- interrupts = <0 84 4>;

- interrupts = <0 112 4>;

- interrupts = <0 14 4>;

- interrupts = <0 57 4>, <0 57 4>;

- interrupts = <0 59 4>, <0 59 4>;

- interrupts = <0 61 4>, <0 61 4>;

- interrupts = <0 63 4>, <0 63 4>;

- interrupts = <0 16 4>;

- interrupts = <0 17 4>;

- interrupts = <0 18 4>;

- interrupts = <0 118 4>,

- <0 115 4>, /* MSI_1 [63...32] */

- <0 114 4>; /* MSI_0 [31...0] */

- interrupts = <0 15 4>;

- interrupts = <0 26 4>, <0 27 4>;

- interrupts = <0 133 4>;

- interrupts = <0 48 4>;

- interrupts = <0 49 4>;

- interrupts = <0 155 4>,

- <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,

- <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;

- interrupts = <0 19 4>;

- interrupts = <0 20 4>;

- interrupts = <0 36 4>, <0 37 4>, <0 38 4>;

- interrupts = <0 39 4>, <0 40 4>, <0 41 4>;

- interrupts = <0 42 4>, <0 43 4>, <0 44 4>;

- interrupts = <0 45 4>, <0 46 4>, <0 47 4>;

- interrupts = <0 21 4>;

- interrupts = <0 22 4>;

- interrupt-names = "dwc_usb3", "otg";

- interrupts = <0 65 4>, <0 69 4>;

- interrupt-names = "dwc_usb3", "otg";

- interrupts = <0 70 4>, <0 74 4>;

- interrupts = <0 113 1>;

- interrupts = <0 52 1>;

- interrupts = <0 56 4>;

- interrupts = <0 122 4>;

- interrupts = <0 119 4>;

-CONFIG_VIDEO_IMX_MEDIA=m

-CONFIG_COMMON_CLK_NPCM8XX=y

-CFLAGS_aes-glue-ce.o := -DUSE_V8_CRYPTO_EXTENSIONS

-$(obj)/aes-glue-%.o: $(src)/aes-glue.c FORCE

- $(call if_changed_rule,cc_o_c)

- * flush_dcache_page is used when the kernel has written to the page

-#define arch_efi_call_virt_setup() \

- efi_virtmap_load(); \

- __efi_fpsimd_begin(); \

- raw_spin_lock(&efi_rt_lock); \

-#define arch_efi_call_virt_teardown() \

- raw_spin_unlock(&efi_rt_lock); \

- __efi_fpsimd_end(); \

- efi_virtmap_unload(); \

-extern raw_spinlock_t efi_rt_lock;

-bool ioremap_allowed(phys_addr_t phys_addr, size_t size, unsigned long prot);

-#define ioremap_allowed ioremap_allowed

- * To make optimal use of block mappings when laying out the linear

- * mapping, round down the base of physical memory to a size that can

- * be mapped efficiently, i.e., either PUD_SIZE (4k granule) or PMD_SIZE

- * (64k granule), or a multiple that can be mapped using contiguous bits

- * in the page tables: 32 * PMD_SIZE (16k granule)

-#if defined(CONFIG_ARM64_4K_PAGES)

-#define ARM64_MEMSTART_SHIFT PUD_SHIFT

-#elif defined(CONFIG_ARM64_16K_PAGES)

-#define ARM64_MEMSTART_SHIFT CONT_PMD_SHIFT

-#define ARM64_MEMSTART_SHIFT PMD_SHIFT

- * sparsemem vmemmap imposes an additional requirement on the alignment of

- * memstart_addr, due to the fact that the base of the vmemmap region

- * has a direct correspondence, and needs to appear sufficiently aligned

- * in the virtual address space.

-#if ARM64_MEMSTART_SHIFT < SECTION_SIZE_BITS

-#define ARM64_MEMSTART_ALIGN (1UL << SECTION_SIZE_BITS)

-#define ARM64_MEMSTART_ALIGN (1UL << ARM64_MEMSTART_SHIFT)

-#define HCR_VIRT_EXCP_MASK (HCR_VSE | HCR_VI | HCR_VF)

- /* Target CPU and feature flags */

-void kvm_vcpu_preferred_target(struct kvm_vcpu_init *init);

-void force_vm_exit(const cpumask_t *mask);

-void kvm_arm_vcpu_ptrauth_trap(struct kvm_vcpu *vcpu);

-void kvm_init_protected_traps(struct kvm_vcpu *vcpu);

-extern void init_mem_pgprot(void);

-void mte_sync_tags(pte_t old_pte, pte_t pte);

-static inline void mte_sync_tags(pte_t old_pte, pte_t pte)

-#define pte_hw_dirty(pte) (pte_write(pte) && !(pte_val(pte) & PTE_RDONLY))

-static inline pte_t pte_mkwrite(pte_t pte)

- pte = pte_mkdirty(pte);

- !pte_special(pte)) {

- pte_t old_pte = READ_ONCE(*ptep);

- * We only need to synchronise if the new PTE has tags enabled

- * or if swapping in (in which case another mapping may have

- * set tags in the past even if this PTE isn't tagged).

- * (!pte_none() && !pte_present()) is an open coded version of

- if (pte_tagged(pte) || (!pte_none(old_pte) && !pte_present(old_pte)))

- mte_sync_tags(old_pte, pte);

-static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,

- pte_t *ptep, pte_t pte)

- page_table_check_pte_set(mm, addr, ptep, pte);

- return __set_pte_at(mm, addr, ptep, pte);

-#define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))

- page_table_check_pmd_set(mm, addr, pmdp, pmd);

- page_table_check_pud_set(mm, addr, pudp, pud);

- pte = pte_mkdirty(pte);

- page_table_check_pte_clear(mm, address, pte);

- page_table_check_pmd_clear(mm, address, pmd);

- page_table_check_pmd_set(vma->vm_mm, address, pmdp, pmd);

-static inline void update_mmu_cache(struct vm_area_struct *vma,

- unsigned long addr, pte_t *ptep)

-#define SYS_HDFGRTR_EL2 sys_reg(3, 4, 3, 1, 4)

-#define SYS_HDFGWTR_EL2 sys_reg(3, 4, 3, 1, 5)

- pgtable_pte_page_dtor(pte);

- tlb_remove_table(tlb, pte);

- struct page *page = virt_to_page(pmdp);

- pgtable_pmd_page_dtor(page);

- tlb_remove_table(tlb, page);

- tlb_remove_table(tlb, virt_to_page(pudp));

-static inline void flush_tlb_page_nosync(struct vm_area_struct *vma,

- unsigned long uaddr)

- addr = __TLBI_VADDR(uaddr, ASID(vma->vm_mm));

- unsigned long asid, addr, pages;

- * When the CPU does not support TLB range operations, flush the TLB

- * entries one by one at the granularity of 'stride'. If the TLB

- * range ops are supported, then:

- * 1. If 'pages' is odd, flush the first page through non-range

- * 2. For remaining pages: the minimum range granularity is decided

- * by 'scale', so multiple range TLBI operations may be required.

- * Start from scale = 0, flush the corresponding number of pages

- * ((num+1)*2^(5*scale+1) starting from 'addr'), then increase it

- * until no pages left.

- * Note that certain ranges can be represented by either num = 31 and

- * scale or num = 0 and scale + 1. The loop below favours the latter

- * since num is limited to 30 by the __TLBI_RANGE_NUM() macro.

- while (pages > 0) {

- if (!system_supports_tlb_range() ||

- addr = __TLBI_VADDR(start, asid);

- __tlbi_level(vale1is, addr, tlb_level);

- __tlbi_user_level(vale1is, addr, tlb_level);

- __tlbi_level(vae1is, addr, tlb_level);

- __tlbi_user_level(vae1is, addr, tlb_level);

- pages -= stride >> PAGE_SHIFT;

- num = __TLBI_RANGE_NUM(pages, scale);

- addr = __TLBI_VADDR_RANGE(start, asid, scale,

- __tlbi(rvale1is, addr);

- __tlbi_user(rvale1is, addr);

- __tlbi(rvae1is, addr);

- __tlbi_user(rvae1is, addr);

- start += __TLBI_RANGE_PAGES(num, scale) << PAGE_SHIFT;

- pages -= __TLBI_RANGE_PAGES(num, scale);

-#define __NR_compat_syscalls 452

- register_sysctl("abi", sysctl);

- ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_HIGHER_SAFE, ID_AA64ISAR2_EL1_BC_SHIFT, 4, 0),

- .sys_reg = SYS_ID_AA64MMFR2_EL1,

- .sign = FTR_UNSIGNED,

- .field_pos = ID_AA64MMFR2_EL1_EVT_SHIFT,

- .min_field_value = ID_AA64MMFR2_EL1_EVT_IMP,

-#include <linux/of.h>

-#include <linux/of_device.h>

-DEFINE_RAW_SPINLOCK(efi_rt_lock);

-#if defined(CONFIG_VMAP_STACK) || defined(CONFIG_SHADOW_CALL_STACK)

- unsigned int vq_max;

- zcr = read_sysreg_s(SYS_ZCR_EL1);

- zcr &= ~(u64)ZCR_ELx_LEN_MASK; /* find sticky 1s outside LEN field */

- vq_max = sve_vq_from_vl(sve_get_vl());

- zcr |= vq_max - 1; /* set LEN field to maximum effective value */

- unsigned int vq_max;

- smcr = read_sysreg_s(SYS_SMCR_EL1);

- smcr &= ~(u64)SMCR_ELx_LEN_MASK; /* Only the LEN field */

- vq_max = sve_vq_from_vl(sme_get_vl());

- smcr |= vq_max - 1; /* set LEN field to maximum effective value */

- tst x0, #0xf << ID_AA64MMFR2_EL1_VARange_SHIFT

- and x0, x0, #(0xf << ID_AA64MMFR2_EL1_VARange_SHIFT)

- if (is_default_overflow_handler(bp))

- int step = is_default_overflow_handler(wp);

- strncpy(buf, cmdline, len);

- if (!str_has_prefix(secstrings + dstsec->sh_name, ".init"))

-static void mte_sync_page_tags(struct page *page, pte_t old_pte,

- bool check_swap, bool pte_is_tagged)

- if (check_swap && is_swap_pte(old_pte)) {

- swp_entry_t entry = pte_to_swp_entry(old_pte);

- if (!non_swap_entry(entry))

- mte_restore_tags(entry, page);

- if (!pte_is_tagged)

- if (try_page_mte_tagging(page)) {

- mte_clear_page_tags(page_address(page));

- set_page_mte_tagged(page);

-void mte_sync_tags(pte_t old_pte, pte_t pte)

- bool check_swap = nr_pages == 1;

- bool pte_is_tagged = pte_tagged(pte);

- /* Early out if there's nothing to do */

- if (!check_swap && !pte_is_tagged)

- for (i = 0; i < nr_pages; i++, page++)

- if (!page_mte_tagged(page))

- mte_sync_page_tags(page, old_pte, check_swap,

-#include <linux/of_pci.h>

-#include <linux/of_platform.h>

-static_assert(NSIGSEGV == 9);

- if (num_other_online_cpus() == 0) {

- sdei_mask_local_cpu();

-#include <asm/daifflags.h>

- local_daif_restore(DAIF_PROCCTX);

- * As per the ABI exit SME streaming mode and clear the SVE state not

- * shared with FPSIMD on syscall entry.

-static inline void fp_user_discard(void)

- * If SME is active then exit streaming mode. If ZA is active

- * then flush the SVE registers but leave userspace access to

- * both SVE and SME enabled, otherwise disable SME for the

- * task and fall through to disabling SVE too. This means

- * that after a syscall we never have any streaming mode

- * register state to track, if this changes the KVM code will

- if (system_supports_sme())

- if (!system_supports_sve())

- if (test_thread_flag(TIF_SVE)) {

- unsigned int sve_vq_minus_one;

- sve_vq_minus_one = sve_vq_from_vl(task_get_sve_vl(current)) - 1;

- sve_flush_live(true, sve_vq_minus_one);

- fp_user_discard();

- __alt_instructions = .;

- __alt_instructions_end = .;

- select HAVE_KVM_ARCH_TLB_FLUSH_ALL

- vcpu->arch.target = -1;

- if (!cpumask_test_cpu(smp_processor_id(), vcpu->kvm->arch.supported_cpus))

- return vcpu->arch.target >= 0;

- vcpu->arch.target = -1;

- return !bitmap_equal(vcpu->arch.features, &features, KVM_VCPU_MAX_FEATURES) ||

- vcpu->arch.target != init->target;

- vcpu->arch.target = init->target;

- vcpu->arch.target = -1;

- if (init->target != kvm_target_cpu())

- if (vcpu->arch.target == -1)

-void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm,

- const struct kvm_memory_slot *memslot)

- kvm_flush_remote_tlbs(kvm);

- struct kvm_vcpu_init init;

- kvm_vcpu_preferred_target(&init);

- unsigned long hyp_addr;

- * Allocate a contiguous HYP private VA range for the stack

- * and guard page. The allocation is also aligned based on

- * the order of its size.

- err = hyp_alloc_private_va_range(PAGE_SIZE * 2, &hyp_addr);

- kvm_err("Cannot allocate hyp stack guard page\n");

- * Since the stack grows downwards, map the stack to the page

- * at the higher address and leave the lower guard page

- * Any valid stack address now has the PAGE_SHIFT bit as 1

- * and addresses corresponding to the guard page have the

- * PAGE_SHIFT bit as 0 - this is used for overflow detection.

- err = __create_hyp_mappings(hyp_addr + PAGE_SIZE, PAGE_SIZE,

- __pa(stack_page), PAGE_HYP);

- params->stack_hyp_va = hyp_addr + (2 * PAGE_SIZE);

-void kvm_vcpu_preferred_target(struct kvm_vcpu_init *init)

- u32 target = kvm_target_cpu();

- memset(init, 0, sizeof(*init));

- * For now, we don't return any features.

- * In future, we might use features to return target

- * specific features available for the preferred

- init->target = (__u32)target;

- kvm_emulate_nested_eret(vcpu);

-static inline bool __hfgxtr_traps_required(void)

- if (cpus_have_final_cap(ARM64_SME))

- if (cpus_have_final_cap(ARM64_WORKAROUND_AMPERE_AC03_CPU_38))

-static inline void __activate_traps_hfgxtr(void)

- sysreg_clear_set_s(SYS_HFGRTR_EL2, r_clr, r_set);

- sysreg_clear_set_s(SYS_HFGWTR_EL2, w_clr, w_set);

-static inline void __deactivate_traps_hfgxtr(void)

- u64 r_clr = 0, w_clr = 0, r_set = 0, w_set = 0, tmp;

- if (cpus_have_final_cap(ARM64_SME)) {

- tmp = HFGxTR_EL2_nSMPRI_EL1_MASK | HFGxTR_EL2_nTPIDR2_EL0_MASK;

- if (cpus_have_final_cap(ARM64_WORKAROUND_AMPERE_AC03_CPU_38))

- w_clr |= HFGxTR_EL2_TCR_EL1_MASK;

- sysreg_clear_set_s(SYS_HFGRTR_EL2, r_clr, r_set);

- sysreg_clear_set_s(SYS_HFGWTR_EL2, w_clr, w_set);

- if (__hfgxtr_traps_required())

- __activate_traps_hfgxtr();

- if (__hfgxtr_traps_required())

- __deactivate_traps_hfgxtr();

- if (cpus_have_final_cap(ARM64_HAS_HCX))

- write_sysreg_s(HCRX_GUEST_FLAGS, SYS_HCRX_EL2);

- if (cpus_have_final_cap(ARM64_HAS_HCX))

- write_sysreg_s(HCRX_HOST_FLAGS, SYS_HCRX_EL2);

-hyp-obj-$(CONFIG_DEBUG_LIST) += list_debug.o

-bool __list_add_valid(struct list_head *new, struct list_head *prev,

- struct list_head *next)

-bool __list_del_entry_valid(struct list_head *entry)

- unsigned long base, addr;

- /* Align the allocation based on the order of its size */

- addr = ALIGN(__io_map_base, PAGE_SIZE << get_order(size));

- /* The allocated size is always a multiple of PAGE_SIZE */

- base = addr + PAGE_ALIGN(size);

- /* Are we overflowing on the vmemmap ? */

- if (!addr || base > __hyp_vmemmap)

- __io_map_base = base;

- unsigned long hyp_addr;

- * Allocate a contiguous HYP private VA range for the stack

- * and guard page. The allocation is also aligned based on

- * the order of its size.

- ret = pkvm_alloc_private_va_range(PAGE_SIZE * 2, &hyp_addr);

- * Since the stack grows downwards, map the stack to the page

- * at the higher address and leave the lower guard page

- * Any valid stack address now has the PAGE_SHIFT bit as 1

- * and addresses corresponding to the guard page have the

- * PAGE_SHIFT bit as 0 - this is used for overflow detection.

- hyp_spin_lock(&pkvm_pgd_lock);

- ret = kvm_pgtable_hyp_map(&pkvm_pgtable, hyp_addr + PAGE_SIZE,

- PAGE_SIZE, params->stack_pa, PAGE_HYP);

- hyp_spin_unlock(&pkvm_pgd_lock);

- /* Update stack_hyp_va to end of the stack's private VA range */

- params->stack_hyp_va = hyp_addr + (2 * PAGE_SIZE);

- vcpu->arch.target = -1;

- kvm_call_hyp(__kvm_tlb_flush_vmid, mmu);

-static void stage2_put_pte(const struct kvm_pgtable_visit_ctx *ctx, struct kvm_s2_mmu *mmu,

- struct kvm_pgtable_mm_ops *mm_ops)

- * Clear the existing PTE, and perform break-before-make with

- * TLB maintenance if it was valid.

- kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu, ctx->addr, ctx->level);

- stage2_put_pte(ctx, mmu, mm_ops);

- return kvm_pgtable_walk(pgt, addr, size, &walker);

- * kvm_flush_remote_tlbs() - flush all VM TLB entries for v7/8

-void kvm_flush_remote_tlbs(struct kvm *kvm)

- ++kvm->stat.generic.remote_tlb_flush_requests;

- * page to allocate our VAs. If not, the check below will

- * kick. A potential alternative would be to detect that

- * overflow and switch to an allocation above the idmap.

- base = io_map_base - PAGE_ALIGN(size);

- /* Align the allocation based on the order of its size */

- base = ALIGN_DOWN(base, PAGE_SIZE << get_order(size));

- * Verify that BIT(VA_BITS - 1) hasn't been flipped by

- * allocating the new area, as it would indicate we've

- * overflowed the idmap/IO address range.

- if ((base ^ io_map_base) & BIT(VA_BITS - 1))

- *haddr = io_map_base = base;

- kvm_flush_remote_tlbs(kvm);

- kvm_set_pfn_accessed(pfn);

- kvm_pfn_t pfn = pte_pfn(range->pte);

- /* Hide ECV, FGT, ExS, Secure Memory */

- val &= ~(GENMASK_ULL(63, 43) |

- val &= (NV_FTR(MMFR1, PAN) |

- val &= ~(NV_FTR(MMFR2, EVT) |

- NV_FTR(MMFR2, BBM) |

-static u32 kvm_pmu_event_mask(struct kvm *kvm)

- unsigned int pmuver;

- pmuver = kvm->arch.arm_pmu->pmuver;

- if (pmu->pmuver == ID_AA64DFR0_EL1_PMUVer_NI ||

- pmu->pmuver == ID_AA64DFR0_EL1_PMUVer_IMP_DEF)

- * Don't advertise STALL_SLOT, as PMMIR_EL0 is handled

- if (vcpu->kvm->arch.arm_pmu->pmuver >= ID_AA64DFR0_EL1_PMUVer_V3P4)

- val &= ~BIT_ULL(ARMV8_PMUV3_PERFCTR_STALL_SLOT - 32);

- nr_events = kvm_pmu_event_mask(kvm) + 1;

- switch (vcpu->arch.target) {

- if (vcpu_el1_is_32bit(vcpu)) {

- pstate = VCPU_RESET_PSTATE_SVC;

- } else if (vcpu_has_nv(vcpu)) {

- pstate = VCPU_RESET_PSTATE_EL2;

- pstate = VCPU_RESET_PSTATE_EL1;

- if (kvm_vcpu_has_pmu(vcpu) && !kvm_arm_support_pmu_v3()) {

-void vgic_v2_set_npie(struct kvm_vcpu *vcpu);

-void vgic_v3_set_npie(struct kvm_vcpu *vcpu);

- if (unlikely(len == 0))

-#ifdef CONFIG_PER_VMA_LOCK

- vma_end_read(vma);

-#endif /* CONFIG_PER_VMA_LOCK */

- struct page *page = pte_page(pte);

- * HugeTLB pages are always fully mapped, so only setting head page's

- * PG_dcache_clean flag is enough.

- if (PageHuge(page))

- page = compound_head(page);

- if (!test_bit(PG_dcache_clean, &page->flags)) {

- sync_icache_aliases((unsigned long)page_address(page),

- (unsigned long)page_address(page) +

- set_bit(PG_dcache_clean, &page->flags);

-void flush_dcache_page(struct page *page)

- * HugeTLB pages are always fully mapped and only head page will be

- * set PG_dcache_clean (see comments in __sync_icache_dcache()).

- if (PageHuge(page))

- page = compound_head(page);

- if (test_bit(PG_dcache_clean, &page->flags))

- clear_bit(PG_dcache_clean, &page->flags);

- pte_clear(mm, addr, ptep);

- dma_pernuma_cma_reserve();

-bool ioremap_allowed(phys_addr_t phys_addr, size_t size, unsigned long prot)

- * folded, and if so pgtable_pmd_page_ctor() becomes nop.

- BUG_ON(!pgtable_pte_page_ctor(phys_to_page(pa)));

- BUG_ON(!pgtable_pmd_page_ctor(phys_to_page(pa)));

- /* page_private contains the swap entry.val set in do_swap_page */

- ret = xa_store(&mte_pages, page_private(page), tag_storage, GFP_KERNEL);

- set_pte(dst_ptep, pte_mkwrite(pte));

- set_pte(dst_ptep, pte_mkpresent(pte_mkwrite(pte)));

- if (BPF_MODE(insn->code) != BPF_PROBE_MEM)

- emit(A64_MOV(is64, dst, src), ctx);

- emit(A64_UDIV(is64, dst, dst, src), ctx);

- emit(A64_UDIV(is64, tmp, dst, src), ctx);

- if (BPF_SRC(code) == BPF_FROM_BE)

- if (BPF_SRC(code) == BPF_FROM_LE)

- emit(A64_UDIV(is64, dst, dst, tmp), ctx);

- emit(A64_UDIV(is64, tmp, dst, tmp2), ctx);

- jmp_offset = bpf2a64_offset(i, off, ctx);

- /* LDX: dst = *(size *)(src + off) */

- emit(A64_LDR32I(dst, src_adj, off_adj), ctx);

- emit(A64_LDR32(dst, src, tmp), ctx);

- emit(A64_LDRHI(dst, src_adj, off_adj), ctx);

- emit(A64_LDRH(dst, src, tmp), ctx);

- emit(A64_LDRBI(dst, src_adj, off_adj), ctx);

- emit(A64_LDRB(dst, src, tmp), ctx);

-void flush_dcache_page(struct page *page)

- if (page == ZERO_PAGE(0))

- mapping = page_mapping_file(page);

- if (mapping && !page_mapcount(page))

- clear_bit(PG_dcache_clean, &page->flags);

- set_bit(PG_dcache_clean, &page->flags);

-void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,

- struct page *page;

- page = pfn_to_page(pfn);

- if (page == ZERO_PAGE(0))

- if (!test_and_set_bit(PG_dcache_clean, &page->flags))

- if (page_mapping_file(page)) {

-#define flush_icache_page(vma, page) do {} while (0);

-void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,

- unsigned long addr;

- struct page *page;

- if (!pfn_valid(pte_pfn(*pte)))

- page = pfn_to_page(pte_pfn(*pte));

- if (page == ZERO_PAGE(0))

- if (test_and_set_bit(PG_dcache_clean, &page->flags))

- addr = (unsigned long) kmap_atomic(page);

- dcache_wb_range(addr, addr + PAGE_SIZE);

- if (vma->vm_flags & VM_EXEC)

- icache_inv_range(addr, addr + PAGE_SIZE);

- kunmap_atomic((void *) addr);

- if (test_bit(PG_dcache_clean, &page->flags))

- clear_bit(PG_dcache_clean, &page->flags);

-#define flush_icache_page(vma, page) do { } while (0)

-#define virt_to_pfn(kaddr) (__pa(kaddr) >> PAGE_SHIFT)

-#define pfn_to_virt(pfn) __va((pfn) << PAGE_SHIFT)

- pgtable_pte_page_dtor(pte); \

- tlb_remove_page(tlb, pte); \

-#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)

-static inline pte_t pte_mkwrite(pte_t pte)

-void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,

-static void inline jsri_2_lrw_jsr(uint32_t *location)

- * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache

-static inline void update_mmu_cache(struct vm_area_struct *vma,

- unsigned long address, pte_t *ptep)

-extern void iounmap(const volatile void __iomem *addr);

-void __iomem *ioremap(unsigned long phys_addr, unsigned long size);

-#define ioremap_uc(X, Y) ioremap((X), (Y))

-#define __pte_free_tlb(tlb, pte, addr) \

- pgtable_pte_page_dtor((pte)); \

- tlb_remove_page((tlb), (pte)); \

-static inline pte_t pte_mkwrite(pte_t pte)

- * set_pte_at - update page table and do whatever magic may be

- * necessary to make the underlying hardware/firmware take note.

- * VM may require a virtual instruction to alert the MMU.

-#define set_pte_at(mm, addr, ptep, pte) set_pte(ptep, pte)

-EXPORT_SYMBOL(iounmap);

-EXPORT_SYMBOL(ioremap);

-obj-y := init.o ioremap.o uaccess.o vm_fault.o cache.o

-// SPDX-License-Identifier: GPL-2.0-only

- * I/O remap functions for Hexagon

-#include <linux/io.h>

-#include <linux/vmalloc.h>

-#include <linux/mm.h>

-void __iomem *ioremap(unsigned long phys_addr, unsigned long size)

- unsigned long last_addr, addr;

- unsigned long offset = phys_addr & ~PAGE_MASK;

- struct vm_struct *area;

- pgprot_t prot = __pgprot(_PAGE_PRESENT|_PAGE_READ|_PAGE_WRITE

- |(__HEXAGON_C_DEV << 6));

- last_addr = phys_addr + size - 1;

- /* Wrapping not allowed */

- if (!size || (last_addr < phys_addr))

- /* Rounds up to next page size, including whole-page offset */

- size = PAGE_ALIGN(offset + size);

- area = get_vm_area(size, VM_IOREMAP);

- addr = (unsigned long)area->addr;

- if (ioremap_page_range(addr, addr+size, phys_addr, prot)) {

- vunmap((void *)addr);

- return (void __iomem *) (offset + addr);

-void iounmap(const volatile void __iomem *addr)

- vunmap((void *) ((unsigned long) addr & PAGE_MASK));

- bool "kexec system call"

- depends on !SMP || HOTPLUG_CPU

- kexec is a system call that implements the ability to shutdown your

- current kernel, and to start another kernel. It is like a reboot

- but it is independent of the system firmware. And like a reboot

- you can start any kernel with it, not just Linux.

- The name comes from the similarity to the exec system call.

- It is an ongoing process to be certain the hardware in a machine

- is properly shutdown, so do not be surprised if this code does not

- initially work for you. As of this writing the exact hardware

- interface is strongly in flux, so no good recommendation can be

- bool "kernel crash dumps"

- depends on IA64_MCA_RECOVERY && (!SMP || HOTPLUG_CPU)

- Generate crash dump after being started by kexec.

-mark_clean (void *addr, size_t size)

- unsigned long pg_addr, end;

- pg_addr = PAGE_ALIGN((unsigned long) addr);

- end = (unsigned long) addr + size;

- while (pg_addr + PAGE_SIZE <= end) {

- struct page *page = virt_to_page((void *)pg_addr);

- set_bit(PG_arch_1, &page->flags);

- pg_addr += PAGE_SIZE;

-generic-y += export.h

-#include <acpi/pdc_intel.h>

-static inline void arch_acpi_set_pdc_bits(u32 *buf)

- buf[2] |= ACPI_PDC_EST_CAPABILITY_SMP;

-#define flush_dcache_page(page) \

- clear_bit(PG_arch_1, &(page)->flags); \

-extern void __iomem * ioremap(unsigned long offset, unsigned long size);

-extern void iounmap (volatile void __iomem *addr);

-static inline void __iomem * ioremap_cache (unsigned long phys_addr, unsigned long size)

- return ioremap(phys_addr, size);

-#define ioremap ioremap

-#define ioremap_cache ioremap_cache

-#define pte_mkwrite(pte) (__pte(pte_val(pte) | _PAGE_AR_RW))

-#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)

-#ifdef CONFIG_IA64_DEBUG_CMPXCHG

-# define CMPXCHG_BUGCHECK_DECL int _cmpxchg_bugcheck_count = 128;

-# define CMPXCHG_BUGCHECK(v) \

- if (_cmpxchg_bugcheck_count-- <= 0) { \

- extern int _printk(const char *fmt, ...); \

- ip = (void *) ia64_getreg(_IA64_REG_IP); \

- _printk("CMPXCHG_BUGCHECK: stuck at %p on word %p\n", ip, (v));\

-#else /* !CONFIG_IA64_DEBUG_CMPXCHG */

-# define CMPXCHG_BUGCHECK_DECL

-# define CMPXCHG_BUGCHECK(v)

-#endif /* !CONFIG_IA64_DEBUG_CMPXCHG */

-#include <asm/export.h>

- do_each_thread (g, t) {

- } while_each_thread (g, t);

-#include <asm/export.h>

- struct page *page;

- page = pte_page(pte);

- addr = (unsigned long) page_address(page);

- if (test_bit(PG_arch_1, &page->flags))

- flush_icache_range(addr, addr + page_size(page));

- set_bit(PG_arch_1, &page->flags); /* mark page as clean */

- * Since DMA is i-cache coherent, any (complete) pages that were written via

- } while (++pfn <= PHYS_PFN(paddr + size - 1));

-ioremap (unsigned long phys_addr, unsigned long size)

- void __iomem *addr;

- struct vm_struct *area;

- unsigned long offset;

- if (efi_mem_attribute(page_base, size) & EFI_MEMORY_WB) {

- prot = PAGE_KERNEL;

- * Mappings have to be page-aligned

- offset = phys_addr & ~PAGE_MASK;

- phys_addr &= PAGE_MASK;

- area = get_vm_area(size, VM_IOREMAP);

- area->phys_addr = phys_addr;

- addr = (void __iomem *) area->addr;

- if (ioremap_page_range((unsigned long) addr,

- (unsigned long) addr + size, phys_addr, prot)) {

- vunmap((void __force *) addr);

- return (void __iomem *) (offset + (char __iomem *)addr);

-EXPORT_SYMBOL(ioremap);

-iounmap (volatile void __iomem *addr)

- select ARCH_WANT_OPTIMIZE_VMEMMAP

- bool "Kexec system call"

- kexec is a system call that implements the ability to shutdown your

- current kernel, and to start another kernel. It is like a reboot

- but it is independent of the system firmware. And like a reboot

- you can start any kernel with it, not just Linux.

- The name comes from the similarity to the exec system call.

- bool "Build kdump crash kernel"

- Generate crash dump after being started by kexec. This should

- be normally only set in special crash dump kernels which are

- loaded in the main kernel with kexec-tools into a specially

- reserved region and then later executed after a crash by

- For more details see Documentation/admin-guide/kdump/kdump.rst

-CONFIG_SYSFS_DEPRECATED=y

-CONFIG_NFT_OBJREF=m

-CONFIG_IP_NF_TARGET_CLUSTERIP=m

- .macro parse_v var val

- .macro parse_r var r

- .error "Unable to parse register name \r"

- stptr.w \tmp, \thread, THREAD_FCSR

- .macro fpu_restore_csr thread tmp

- ldptr.w \tmp, \thread, THREAD_FCSR

- movgr2fcsr fcsr0, \tmp

- fpu_restore_csr \thread, \tmp0

-#define flush_icache_page(vma, page) do { } while (0)

-#define ARCH_HAS_IOREMAP_WC

-void arch_trigger_cpumask_backtrace(const struct cpumask *mask, bool exclude_self);

- typeof(l->a.counter) *__old = (typeof(l->a.counter) *) old;

- return try_cmpxchg_local(&l->a.counter, __old, new);

- * parse_r var, r - Helper assembler macro for parsing register names.

- * This converts the register name in $n form provided in \r to the

- * corresponding register number, which is assigned to the variable \var. It is

- * needed to allow explicit encoding of instructions in inline assembly where

- * registers are chosen by the compiler in $n form, allowing us to avoid using

- * fixed register numbers.

- * It also allows newer instructions (not implemented by the assembler) to be

- * transparently implemented using assembler macros, instead of needing separate

- * cases depending on toolchain support.

- * Simple usage example:

- * __asm__ __volatile__("parse_r addr, %0\n\t"

- * "#invtlb op, 0, %0\n\t"

- * ".word ((0x6498000) | (addr << 10) | (0 << 5) | op)"

- * : "=r" (status);

-/* Match an individual register number and assign to \var */

-#define _IFC_REG(n) \

- ".ifc \\r, $r" #n "\n\t" \

- "\\var = " #n "\n\t" \

-__asm__(".macro parse_r var r\n\t"

- _IFC_REG(0) _IFC_REG(1) _IFC_REG(2) _IFC_REG(3)

- _IFC_REG(4) _IFC_REG(5) _IFC_REG(6) _IFC_REG(7)

- _IFC_REG(8) _IFC_REG(9) _IFC_REG(10) _IFC_REG(11)

- _IFC_REG(12) _IFC_REG(13) _IFC_REG(14) _IFC_REG(15)

- _IFC_REG(16) _IFC_REG(17) _IFC_REG(18) _IFC_REG(19)

- _IFC_REG(20) _IFC_REG(21) _IFC_REG(22) _IFC_REG(23)

- _IFC_REG(24) _IFC_REG(25) _IFC_REG(26) _IFC_REG(27)

- _IFC_REG(28) _IFC_REG(29) _IFC_REG(30) _IFC_REG(31)

- ".error \"Unable to parse register name \\r\"\n\t"

-extern void setup_zero_pages(void);

-#define virt_to_page(kaddr) pfn_to_page(virt_to_pfn(kaddr))

- pgtable_pte_page_dtor(pte); \

- tlb_remove_page((tlb), pte); \

- pg = alloc_page(GFP_KERNEL_ACCOUNT);

- if (!pgtable_pmd_page_ctor(pg)) {

- pmd = (pmd_t *)page_address(pg);

- pud = (pud_t *) __get_free_page(GFP_KERNEL);

-#define _PFN_SHIFT (PAGE_SHIFT - 12 + _PAGE_PFN_SHIFT)

-#define _PFN_MASK (~((_ULCAST_(1) << (_PFN_SHIFT)) - 1) & \

-extern unsigned long empty_zero_page;

-extern unsigned long zero_page_mask;

-#define ZERO_PAGE(vaddr) \

- (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))

-#define __HAVE_COLOR_ZERO_PAGE

- min(PTRS_PER_PGD * PTRS_PER_PUD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE, (1UL << cpu_vabits)) - PMD_SIZE - VMEMMAP_SIZE)

-#define pte_pfn(x) ((unsigned long)(((x).pte & _PFN_MASK) >> _PFN_SHIFT))

-#define pfn_pte(pfn, prot) __pte(((pfn) << _PFN_SHIFT) | pgprot_val(prot))

-#define pfn_pmd(pfn, prot) __pmd(((pfn) << _PFN_SHIFT) | pgprot_val(prot))

-static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,

- pte_t *ptep, pte_t pteval)

- set_pte(ptep, pteval);

- set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));

- set_pte_at(mm, addr, ptep, __pte(0));

-static inline pte_t pte_mkwrite(pte_t pte)

-static inline void update_mmu_cache(struct vm_area_struct *vma,

- unsigned long address, pte_t *ptep)

- __update_tlb(vma, address, ptep);

- return (pmd_val(pmd) & _PFN_MASK) >> _PFN_SHIFT;

-static inline pmd_t pmd_mkwrite(pmd_t pmd)

- unsigned int fcsr;

- /* Scratch registers */

- unsigned long scr0;

- unsigned long scr1;

- unsigned long scr2;

- unsigned long scr3;

- /* Eflags register */

- unsigned long eflags;

-extern void * __init relocate_kernel(void);

- OFFSET(THREAD_SCR0, task_struct, thread.scr0);

- OFFSET(THREAD_SCR1, task_struct, thread.scr1);

- OFFSET(THREAD_SCR2, task_struct, thread.scr2);

- OFFSET(THREAD_SCR3, task_struct, thread.scr3);

- OFFSET(THREAD_EFLAGS, task_struct, thread.eflags);

- _asm_extable .ex\@, fault

- fpu_restore_csr a0 t1

-SYM_FUNC_START(fault)

-SYM_FUNC_END(fault)

- /* relocate_kernel() returns the new kernel entry point */

- if (!is_fpu_owner())

- pgd_t *pgd = pgd_offset_k(addr);

- p4d_t *p4d = p4d_offset(pgd, addr);

- if (p4d_none(*p4d)) {

- new = memblock_alloc(PAGE_SIZE, PAGE_SIZE);

- pgd_populate(&init_mm, pgd, new);

-#ifndef __PAGETABLE_PUD_FOLDED

- pud = pud_offset(p4d, addr);

- if (pud_none(*pud)) {

- new = memblock_alloc(PAGE_SIZE, PAGE_SIZE);

- pud_populate(&init_mm, pud, new);

-#ifndef __PAGETABLE_PMD_FOLDED

- pmd = pmd_offset(pud, addr);

- if (!pmd_present(*pmd)) {

- new = memblock_alloc(PAGE_SIZE, PAGE_SIZE);

- pmd_populate_kernel(&init_mm, pmd, new);

- setup_zero_pages(); /* This comes from node 0 */

- memcpy(dst, src, sizeof(struct task_struct));

-void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)

- nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_backtrace);

-void * __init relocate_kernel(void)

- void *kernel_entry = start_kernel; /* Default to original kernel entry point */

- /* Return the new kernel's entry point */

- kernel_entry = RELOCATED_KASLR(start_kernel);

- return kernel_entry;

- regs = &dummyregs;

- if (task == current) {

- regs->regs[3] = (unsigned long)__builtin_frame_address(0);

- regs->csr_era = (unsigned long)__builtin_return_address(0);

- regs->regs[3] = thread_saved_fp(task);

- regs->csr_era = thread_saved_ra(task);

- regs->regs[1] = 0;

-static void sysrq_handle_tlbdump(int key)

- local_irq_enable();

- force_sig(SIGILL);

- local_irq_disable();

-.irp to, 0, 1, 2, 3, 4, 5, 6, 7

-.L_fixup_handle_\to\():

- addi.d a0, a0, (\to) * (-8)

-.L_fixup_handle_s\to\():

- addi.d a0, a1, -\to

- _asm_extable 1b, .L_fixup_handle_s0

- _asm_extable 0b, .L_fixup_handle_0

- _asm_extable 1b, .L_fixup_handle_0

- _asm_extable 2b, .L_fixup_handle_1

- _asm_extable 3b, .L_fixup_handle_2

- _asm_extable 4b, .L_fixup_handle_3

- _asm_extable 5b, .L_fixup_handle_4

- _asm_extable 6b, .L_fixup_handle_5

- _asm_extable 7b, .L_fixup_handle_6

- _asm_extable 8b, .L_fixup_handle_7

- _asm_extable 9b, .L_fixup_handle_0

- _asm_extable 10b, .L_fixup_handle_1

- _asm_extable 11b, .L_fixup_handle_2

- _asm_extable 12b, .L_fixup_handle_3

- _asm_extable 13b, .L_fixup_handle_0

- _asm_extable 14b, .L_fixup_handle_1

- _asm_extable 15b, .L_fixup_handle_0

- _asm_extable 16b, .L_fixup_handle_0

- _asm_extable 17b, .L_fixup_handle_s0

- _asm_extable 18b, .L_fixup_handle_s0

- _asm_extable 19b, .L_fixup_handle_s0

- _asm_extable 20b, .L_fixup_handle_s2

- _asm_extable 21b, .L_fixup_handle_s0

- _asm_extable 22b, .L_fixup_handle_s0

- _asm_extable 23b, .L_fixup_handle_s4

- _asm_extable 24b, .L_fixup_handle_s0

- _asm_extable 25b, .L_fixup_handle_s4

- _asm_extable 26b, .L_fixup_handle_s0

- _asm_extable 27b, .L_fixup_handle_s4

- _asm_extable 28b, .L_fixup_handle_s0

-.irp to, 0, 1, 2, 3, 4, 5, 6, 7

-.L_fixup_handle_\to\():

- addi.d a0, a0, (\to) * (-8)

-.L_fixup_handle_s\to\():

- addi.d a0, a2, -\to

- _asm_extable 1b, .L_fixup_handle_s0

- _asm_extable 2b, .L_fixup_handle_s0

- _asm_extable 0b, .L_fixup_handle_0

- _asm_extable 1b, .L_fixup_handle_0

- _asm_extable 2b, .L_fixup_handle_0

- _asm_extable 3b, .L_fixup_handle_0

- _asm_extable 4b, .L_fixup_handle_0

- _asm_extable 5b, .L_fixup_handle_0

- _asm_extable 6b, .L_fixup_handle_0

- _asm_extable 7b, .L_fixup_handle_0

- _asm_extable 8b, .L_fixup_handle_0

- _asm_extable 9b, .L_fixup_handle_0

- _asm_extable 10b, .L_fixup_handle_0

- _asm_extable 11b, .L_fixup_handle_1

- _asm_extable 12b, .L_fixup_handle_2

- _asm_extable 13b, .L_fixup_handle_3

- _asm_extable 14b, .L_fixup_handle_4

- _asm_extable 15b, .L_fixup_handle_5

- _asm_extable 16b, .L_fixup_handle_6

- _asm_extable 17b, .L_fixup_handle_7

- _asm_extable 18b, .L_fixup_handle_0

- _asm_extable 19b, .L_fixup_handle_0

- _asm_extable 20b, .L_fixup_handle_0

- _asm_extable 21b, .L_fixup_handle_0

- _asm_extable 22b, .L_fixup_handle_0

- _asm_extable 23b, .L_fixup_handle_1

- _asm_extable 24b, .L_fixup_handle_2

- _asm_extable 25b, .L_fixup_handle_3

- _asm_extable 26b, .L_fixup_handle_0

- _asm_extable 27b, .L_fixup_handle_0

- _asm_extable 28b, .L_fixup_handle_0

- _asm_extable 29b, .L_fixup_handle_1

- _asm_extable 30b, .L_fixup_handle_0

- _asm_extable 31b, .L_fixup_handle_0

- _asm_extable 32b, .L_fixup_handle_0

- _asm_extable 33b, .L_fixup_handle_0

- _asm_extable 34b, .L_fixup_handle_s0

- _asm_extable 35b, .L_fixup_handle_s0

- _asm_extable 36b, .L_fixup_handle_s0

- _asm_extable 37b, .L_fixup_handle_s0

- _asm_extable 38b, .L_fixup_handle_s0

- _asm_extable 39b, .L_fixup_handle_s0

- _asm_extable 40b, .L_fixup_handle_s0

- _asm_extable 41b, .L_fixup_handle_s2

- _asm_extable 42b, .L_fixup_handle_s0

- _asm_extable 43b, .L_fixup_handle_s0

- _asm_extable 44b, .L_fixup_handle_s0

- _asm_extable 45b, .L_fixup_handle_s0

- _asm_extable 46b, .L_fixup_handle_s0

- _asm_extable 47b, .L_fixup_handle_s4

- _asm_extable 48b, .L_fixup_handle_s0

- _asm_extable 49b, .L_fixup_handle_s0

- _asm_extable 50b, .L_fixup_handle_s0

- _asm_extable 51b, .L_fixup_handle_s4

- _asm_extable 52b, .L_fixup_handle_s0

- _asm_extable 53b, .L_fixup_handle_s0

- _asm_extable 54b, .L_fixup_handle_s0

- _asm_extable 55b, .L_fixup_handle_s4

- _asm_extable 56b, .L_fixup_handle_s0

- _asm_extable 57b, .L_fixup_handle_s0

-_ASM_NOKPROBE(memcpy)

- blt a0, a1, memcpy /* dst < src, memcpy */

- blt a1, a0, rmemcpy /* src < dst, rmemcpy */

- jr ra /* dst == src, return */

-_ASM_NOKPROBE(memmove)

-SYM_FUNC_START(rmemcpy)

-SYM_FUNC_END(rmemcpy)

-_ASM_NOKPROBE(rmemcpy)

-_ASM_NOKPROBE(memset)

- shm_align_mask = PAGE_SIZE - 1;

-static void __kprobes no_context(struct pt_regs *regs, unsigned long address)

-static void __kprobes do_out_of_memory(struct pt_regs *regs, unsigned long address)

- no_context(regs, address);

- do_out_of_memory(regs, address);

- * We have up to 8 empty zeroed pages so we can map one of the right colour

- * when needed. Since page is never written to after the initialization we

- * don't have to care about aliases on other CPUs.

-unsigned long empty_zero_page, zero_page_mask;

-EXPORT_SYMBOL(zero_page_mask);

-void setup_zero_pages(void)

- unsigned int order, i;

- struct page *page;

- empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order);

- if (!empty_zero_page)

- panic("Oh boy, that early out of memory?");

- page = virt_to_page((void *)empty_zero_page);

- split_page(page, order);

- for (i = 0; i < (1 << order); i++, page++)

- mark_page_reserved(page);

- zero_page_mask = ((PAGE_SIZE << order) - 1) & PAGE_MASK;

- setup_zero_pages(); /* Setup zeroed pages. */

-static pte_t *fixmap_pte(unsigned long addr)

- pgd = pgd_offset_k(addr);

- p4d = p4d_offset(pgd, addr);

- if (pgd_none(*pgd)) {

- pud_t *new __maybe_unused;

- new = memblock_alloc_low(PAGE_SIZE, PAGE_SIZE);

- pgd_populate(&init_mm, pgd, new);

- pmd_t *new __maybe_unused;

- new = memblock_alloc_low(PAGE_SIZE, PAGE_SIZE);

- pud_populate(&init_mm, pud, new);

- if (pmd_none(*pmd)) {

- pte_t *new __maybe_unused;

- new = memblock_alloc_low(PAGE_SIZE, PAGE_SIZE);

- pmd_populate_kernel(&init_mm, pmd, new);

- ptep = fixmap_pte(addr);

-unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */

-EXPORT_SYMBOL(shm_align_mask);

-#define COLOUR_ALIGN(addr, pgoff) \

- ((((addr) + shm_align_mask) & ~shm_align_mask) + \

- (((pgoff) << PAGE_SHIFT) & shm_align_mask))

- ((addr - (pgoff << PAGE_SHIFT)) & shm_align_mask))

- info.align_mask = do_color_align ? (PAGE_MASK & shm_align_mask) : 0;

- pgd_t *ret, *init;

- ret = (pgd_t *) __get_free_page(GFP_KERNEL);

- pmd_val(pmd) = (page_to_pfn(page) << _PFN_SHIFT) | pgprot_val(prot);

- pr_define("_PFN_SHIFT %d\n", _PFN_SHIFT);

- bool "kexec system call"

- depends on M68KCLASSIC && MMU

- kexec is a system call that implements the ability to shutdown your

- current kernel, and to start another kernel. It is like a reboot

- but it is independent of the system firmware. And like a reboot

- you can start any kernel with it, not just Linux.

- The name comes from the similarity to the exec system call.

- It is an ongoing process to be certain the hardware in a machine

- is properly shutdown, so do not be surprised if this code does not

- initially work for you. As of this writing the exact hardware

- interface is strongly in flux, so no good recommendation can be

-static int __init init_cf_dt_clocksource(void)

-CONFIG_CRYPTO_SHA3=m

-static int nfcon_tty_write(struct tty_struct *tty, const unsigned char *buf,

-static int nfcon_tty_put_char(struct tty_struct *tty, unsigned char ch)

- char temp[2] = { ch, 0 };

-generic-y += export.h

-static inline void __flush_page_to_ram(void *vaddr)

- end = (addr + PAGE_SIZE - 1) & ICACHE_SET_MASK;

- __asm__ __volatile__("nop\n\t"

- "cpushp %%bc,(%0)\n\t"

- : : "a" (__pa(vaddr)));

-#define flush_dcache_page(page) __flush_page_to_ram(page_address(page))

-#define flush_icache_page(vma, page) __flush_page_to_ram(page_address(page))

-/* SPDX-License-Identifier: GPL-2.0 */

-/* Based on the ide driver from 1.2.13pl8 */

- * Credits (alphabetical):

- * - Torsten Ebeling

- * - Thorsten Floeck

- * - Guenther Kelleter

- * - Chris Lawrence

- * - Michael Rausch

- * - Christian Sauer

- * - Michael Schmitz

- * - Geert Uytterhoeven

-#ifndef _M68K_IDE_H

-#define _M68K_IDE_H

-#include <asm/setup.h>

-#include <asm/io.h>

-#include <asm/irq.h>

- * Get rid of defs from io.h - ide has its private and conflicting versions

- * Since so far no single m68k platform uses ISA/PCI I/O space for IDE, we

- * always use the `raw' MMIO versions

-#define readw in_be16

-#define __ide_mm_insw(port, addr, n) raw_insw((u16 *)port, addr, n)

-#define __ide_mm_insl(port, addr, n) raw_insl((u32 *)port, addr, n)

-#define writeb(val, port) out_8(port, val)

-#define writew(val, port) out_be16(port, val)

-#define __ide_mm_outsw(port, addr, n) raw_outsw((u16 *)port, addr, n)

-#define __ide_mm_outsl(port, addr, n) raw_outsl((u32 *)port, addr, n)

-#define __ide_mm_insw(port, addr, n) io_insw((unsigned int)port, addr, n)

-#define __ide_mm_insl(port, addr, n) io_insl((unsigned int)port, addr, n)

-#define __ide_mm_outsw(port, addr, n) io_outsw((unsigned int)port, addr, n)

-#define __ide_mm_outsl(port, addr, n) io_outsl((unsigned int)port, addr, n)

-#endif /* CONFIG_MMU */

-#endif /* __KERNEL__ */

-#endif /* _M68K_IDE_H */

-#include <asm-generic/iomap.h>

-#define ARCH_HAS_IOREMAP_WT

-extern inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)

- free_page((unsigned long) pte);

-extern inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm)

- unsigned long page = __get_free_page(GFP_DMA);

- memset((void *)page, 0, PAGE_SIZE);

- return (pte_t *) (page);

- struct page *page = virt_to_page(pgtable);

- pgtable_pte_page_dtor(page);

- __free_page(page);

- struct page *page = alloc_pages(GFP_DMA, 0);

- if (!pgtable_pte_page_ctor(page)) {

- __free_page(page);

- pte = page_address(page);

- struct page *page = virt_to_page(pgtable);

- pgtable_pte_page_dtor(page);

- __free_page(page);

- free_page((unsigned long) pgd);

- new_pgd = (pgd_t *)__get_free_page(GFP_DMA | __GFP_NOWARN);

-static inline pte_t pte_mkwrite(pte_t pte)

-static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) &= ~_PAGE_RONLY; return pte; }

-#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)

-static inline void update_mmu_cache(struct vm_area_struct *vma,

- unsigned long address, pte_t *ptep)

-#define __pte_free_tlb(tlb,pte,addr) \

- pgtable_pte_page_dtor(pte); \

- tlb_remove_page((tlb), pte); \

-static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= SUN3_PAGE_WRITEABLE; return pte; }

-char *pcibios_setup(char *str)

-#include <asm/export.h>

- __flush_page_to_ram(page);

- pgtable_pte_page_ctor(virt_to_page(page));

- pgtable_pte_page_dtor(virt_to_page((void *)page));

-# define virt_to_pfn(vaddr) (phys_to_pfn((__pa(vaddr))))

-# define pfn_to_virt(pfn) __va(pfn_to_phys((pfn)))

-#define virt_addr_valid(vaddr) (pfn_valid(virt_to_pfn(vaddr)))

-# define __pa(x) __virt_to_phys((unsigned long)(x))

-# define __va(x) ((void *)__phys_to_virt((unsigned long)(x)))

-#define PFN_SHIFT_OFFSET (PAGE_SHIFT)

-#define pte_pfn(x) (pte_val(x) >> PFN_SHIFT_OFFSET)

- __pte(((pte_basic_t)(pfn) << PFN_SHIFT_OFFSET) | pgprot_val(prot))

-static inline pte_t pte_mkwrite(pte_t pte) \

-static inline void set_pte(struct mm_struct *mm, unsigned long addr,

- pte_t *ptep, pte_t pte)

-static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,

- pte_t *ptep, pte_t pte)

-extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);

-#define update_mmu_cache(vma, addr, ptep) do { } while (0)

-#include <linux/of_platform.h>

-void * __ref zalloc_maybe_bootmem(size_t size, gfp_t mask)

- if (mem_init_done) {

- p = kzalloc(size, mask);

- p = memblock_alloc(size, SMP_CACHE_BYTES);

- panic("%s: Failed to allocate %zu bytes\n",

- bool "Kexec system call"

- kexec is a system call that implements the ability to shutdown your

- current kernel, and to start another kernel. It is like a reboot

- but it is independent of the system firmware. And like a reboot

- you can start any kernel with it, not just Linux.

- The name comes from the similarity to the exec system call.

- It is an ongoing process to be certain the hardware in a machine

- is properly shutdown, so do not be surprised if this code does not

- initially work for you. As of this writing the exact hardware

- interface is strongly in flux, so no good recommendation can be

- bool "Kernel crash dumps"

- Generate crash dump after being started by kexec.

- This should be normally only set in special crash dump kernels

- which are loaded in the main kernel with kexec-tools into

- a specially reserved region and then later executed after

- a crash by kdump/kexec. The crash dump kernel must be compiled

- to a memory address not used by the main kernel or firmware using

-cflags-$(CONFIG_CPU_LOONGSON2E) += $(call cc-option,-march=loongson2e) -Wa,--trap

-cflags-$(CONFIG_CPU_LOONGSON2F) += $(call cc-option,-march=loongson2f) -Wa,--trap

-cflags-$(CONFIG_CPU_LOONGSON64) += $(call cc-option,-march=loongson3a,-march=mips64r2) -Wa,--trap

- ifeq ($(KBUILD_SYM32)$(call cc-option-yn,-msym32), yy)

- cflags-y += -msym32 -DKBUILD_64BIT_SYM32

-#include <linux/module.h>

- void (*mmc_cd)(struct mmc_host *, unsigned long);

- /* link against CONFIG_MMC=m */

- mmc_cd = symbol_get(mmc_detect_change);

- mmc_cd(ptr, msecs_to_jiffies(500));

- symbol_put(mmc_detect_change);

-#include <linux/module.h>

- void (*mmc_cd)(struct mmc_host *, unsigned long);

- /* link against CONFIG_MMC=m */

- mmc_cd = symbol_get(mmc_detect_change);

- mmc_cd(ptr, msecs_to_jiffies(200));

- symbol_put(mmc_detect_change);

- void (*mmc_cd)(struct mmc_host *, unsigned long);

- /* link against CONFIG_MMC=m */

- mmc_cd = symbol_get(mmc_detect_change);

- mmc_cd(ptr, msecs_to_jiffies(200));

- symbol_put(mmc_detect_change);

-#include <linux/module.h>

- void (*mmc_cd)(struct mmc_host *, unsigned long);

- /* link against CONFIG_MMC=m. We can only be called once MMC core has

- * initialized the controller, so symbol_get() should always succeed.

- mmc_cd = symbol_get(mmc_detect_change);

- mmc_cd(ptr, msecs_to_jiffies(200));

- symbol_put(mmc_detect_change);

-#define ENTRYLO(x) ((pte_val(pfn_pte((x) >> _PFN_SHIFT, PAGE_KERNEL_UNCACHED)) >> 6) | 1)

-#include <linux/of_platform.h>

-obj-$(CONFIG_USB) += octeon-usb.o

-#include <linux/of_platform.h>

-#include <asm/export.h>

- { .compatible = "cavium,octeon-7130-usb-uctl", },

- ioport_resource.start = MAX_RESOURCE;

-CONFIG_IP_NF_TARGET_CLUSTERIP=m

-generic-y += export.h

-#define Page_dcache_dirty(page) \

- test_bit(PG_dcache_dirty, &(page)->flags)

-#define SetPageDcacheDirty(page) \

- set_bit(PG_dcache_dirty, &(page)->flags)

-#define ClearPageDcacheDirty(page) \

- clear_bit(PG_dcache_dirty, &(page)->flags)

-extern void __flush_dcache_page(struct page *page);

- __flush_dcache_page(page);

- SetPageDcacheDirty(page);

-static inline void flush_icache_page(struct vm_area_struct *vma,

- struct page *page)

-#define ARCH_HAS_IOREMAP_WC

-#include <asm-generic/iomap.h>

- bool exclude_self);

-#define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB

-int kvm_arch_flush_remote_tlb(struct kvm *kvm);

- typeof(l->a.counter) *__old = (typeof(l->a.counter) *) old;

- return try_cmpxchg_local(&l->a.counter, __old, new);

-#include <regs-clk.h>

-#include <regs-rtc.h>

-/* SPDX-License-Identifier: GPL-2.0-or-later */

- * Loongson 1 Clock Register Definitions.

-#ifndef __ASM_MACH_LOONGSON32_REGS_CLK_H

-#define __ASM_MACH_LOONGSON32_REGS_CLK_H

-#define LS1X_CLK_REG(x) \

- ((void __iomem *)KSEG1ADDR(LS1X_CLK_BASE + (x)))

-#define LS1X_CLK_PLL_FREQ LS1X_CLK_REG(0x0)

-#define LS1X_CLK_PLL_DIV LS1X_CLK_REG(0x4)

-#if defined(CONFIG_LOONGSON1_LS1B)

-/* Clock PLL Divisor Register Bits */

-#define DIV_DC_EN BIT(31)

-#define DIV_DC_RST BIT(30)

-#define DIV_CPU_EN BIT(25)

-#define DIV_CPU_RST BIT(24)

-#define DIV_DDR_EN BIT(19)

-#define DIV_DDR_RST BIT(18)

-#define RST_DC_EN BIT(5)

-#define RST_DC BIT(4)

-#define RST_DDR_EN BIT(3)

-#define RST_DDR BIT(2)

-#define RST_CPU_EN BIT(1)

-#define RST_CPU BIT(0)

-#define DIV_DC_SHIFT 26

-#define DIV_CPU_SHIFT 20

-#define DIV_DDR_SHIFT 14

-#define DIV_DC_WIDTH 4

-#define DIV_CPU_WIDTH 4

-#define DIV_DDR_WIDTH 4

-#define BYPASS_DC_SHIFT 12

-#define BYPASS_DDR_SHIFT 10

-#define BYPASS_CPU_SHIFT 8

-#define BYPASS_DC_WIDTH 1

-#define BYPASS_DDR_WIDTH 1

-#define BYPASS_CPU_WIDTH 1

-#elif defined(CONFIG_LOONGSON1_LS1C)

-/* PLL/SDRAM Frequency configuration register Bits */

-#define PLL_VALID BIT(31)

-#define FRAC_N GENMASK(23, 16)

-#define RST_TIME GENMASK(3, 2)

-#define SDRAM_DIV GENMASK(1, 0)

-/* CPU/CAMERA/DC Frequency configuration register Bits */

-#define DIV_DC_EN BIT(31)

-#define DIV_DC GENMASK(30, 24)

-#define DIV_CAM_EN BIT(23)

-#define DIV_CAM GENMASK(22, 16)

-#define DIV_CPU_EN BIT(15)

-#define DIV_CPU GENMASK(14, 8)

-#define DIV_DC_SEL_EN BIT(5)

-#define DIV_DC_SEL BIT(4)

-#define DIV_CAM_SEL_EN BIT(3)

-#define DIV_CAM_SEL BIT(2)

-#define DIV_CPU_SEL_EN BIT(1)

-#define DIV_CPU_SEL BIT(0)

-#define DIV_DC_SHIFT 24

-#define DIV_CAM_SHIFT 16

-#define DIV_CPU_SHIFT 8

-#define DIV_DDR_SHIFT 0

-#define DIV_DC_WIDTH 7

-#define DIV_CAM_WIDTH 7

-#define DIV_CPU_WIDTH 7

-#define DIV_DDR_WIDTH 2

-#endif /* __ASM_MACH_LOONGSON32_REGS_CLK_H */

-/* SPDX-License-Identifier: GPL-2.0-or-later */

- * Loongson 1 RTC timer Register Definitions.

-#ifndef __ASM_MACH_LOONGSON32_REGS_RTC_H

-#define __ASM_MACH_LOONGSON32_REGS_RTC_H

-#define LS1X_RTC_REG(x) \

- ((void __iomem *)KSEG1ADDR(LS1X_RTC_BASE + (x)))

-#define LS1X_RTC_CTRL LS1X_RTC_REG(0x40)

-#define RTC_EXTCLK_OK (BIT(5) | BIT(8))

-#define RTC_EXTCLK_EN BIT(8)

-#endif /* __ASM_MACH_LOONGSON32_REGS_RTC_H */

- free_pages((unsigned long)pgd, PGD_TABLE_ORDER);

-#define __pte_free_tlb(tlb,pte,address) \

- pgtable_pte_page_dtor(pte); \

- tlb_remove_page((tlb), pte); \

- pg = alloc_pages(GFP_KERNEL_ACCOUNT, PMD_TABLE_ORDER);

- if (!pgtable_pmd_page_ctor(pg)) {

- __free_pages(pg, PMD_TABLE_ORDER);

- pmd = (pmd_t *)page_address(pg);

- pud = (pud_t *) __get_free_pages(GFP_KERNEL, PUD_TABLE_ORDER);

-#define pte_pfn(x) (((unsigned long)((x).pte_high >> _PFN_SHIFT)) | (unsigned long)((x).pte_low << _PAGE_PRESENT_SHIFT))

- pte.pte_high = (pfn << _PFN_SHIFT) |

-#define pte_pfn(x) ((unsigned long)((x).pte >> _PFN_SHIFT))

-#define pfn_pte(pfn, prot) __pte(((unsigned long long)(pfn) << _PFN_SHIFT) | pgprot_val(prot))

-#define pfn_pmd(pfn, prot) __pmd(((unsigned long long)(pfn) << _PFN_SHIFT) | pgprot_val(prot))

-#define pte_pfn(x) ((unsigned long)((x).pte >> _PFN_SHIFT))

-#define pfn_pte(pfn, prot) __pte(((pfn) << _PFN_SHIFT) | pgprot_val(prot))

-#define pfn_pmd(pfn, prot) __pmd(((pfn) << _PFN_SHIFT) | pgprot_val(prot))

-# define _PFN_SHIFT PAGE_SHIFT

-# define _PFN_SHIFT (PAGE_SHIFT - 12 + _CACHE_SHIFT + 3)

-#define _PFN_MASK (~((1 << (_PFN_SHIFT)) - 1))

- return pmd_val(pmd) >> _PFN_SHIFT;

-static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,

- pte_t *ptep, pte_t pteval);

- set_pte_at(mm, addr, ptep, null);

- set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));

- set_pte_at(mm, addr, ptep, __pte(0));

-static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,

- pte_t *ptep, pte_t pteval)

- if (!pte_present(pteval))

- goto cache_sync_done;

- if (pte_present(*ptep) && (pte_pfn(*ptep) == pte_pfn(pteval)))

- goto cache_sync_done;

- __update_cache(addr, pteval);

- set_pte(ptep, pteval);

-static inline pte_t pte_mkwrite(pte_t pte)

- set_pte_at(vma->vm_mm, address, ptep, entry);

-static inline void update_mmu_cache(struct vm_area_struct *vma,

- unsigned long address, pte_t *ptep)

- pte_t pte = *ptep;

- __update_tlb(vma, address, pte);

-static inline pmd_t pmd_mkwrite(pmd_t pmd)

-#include <asm/export.h>

-void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)

- nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_backtrace);

-#include <asm/export.h>

-static void sysrq_handle_tlbdump(int key)

- kvm_arch_flush_remote_tlbs_memslot(kvm, slot);

- kvm_arch_flush_remote_tlbs_memslot(kvm, new);

-int kvm_arch_flush_remote_tlb(struct kvm *kvm)

-void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm,

- const struct kvm_memory_slot *memslot)

- kvm_flush_remote_tlbs(kvm);

- pte_t hva_pte = range->pte;

-#include <linux/of_platform.h>

-#include <asm/export.h>

-void __init ls1x_rtc_set_extclk(struct platform_device *pdev)

- u32 val = __raw_readl(LS1X_RTC_CTRL);

- if (!(val & RTC_EXTCLK_OK))

- __raw_writel(val | RTC_EXTCLK_EN, LS1X_RTC_CTRL);

- ipi_set0_regs[0] = (void *)

- ipi_set0_regs[1] = (void *)

- ipi_set0_regs[2] = (void *)

- ipi_set0_regs[3] = (void *)

- ipi_set0_regs[4] = (void *)

- ipi_set0_regs[5] = (void *)

- ipi_set0_regs[6] = (void *)

- ipi_set0_regs[7] = (void *)

- ipi_set0_regs[8] = (void *)

- ipi_set0_regs[9] = (void *)

- ipi_set0_regs[10] = (void *)

- ipi_set0_regs[11] = (void *)

- ipi_set0_regs[12] = (void *)

- ipi_set0_regs[13] = (void *)

- ipi_set0_regs[14] = (void *)

- ipi_set0_regs[15] = (void *)

- ipi_clear0_regs[0] = (void *)

- ipi_clear0_regs[1] = (void *)

- ipi_clear0_regs[2] = (void *)

- ipi_clear0_regs[3] = (void *)

- ipi_clear0_regs[4] = (void *)

- ipi_clear0_regs[5] = (void *)

- ipi_clear0_regs[6] = (void *)

- ipi_clear0_regs[7] = (void *)

- ipi_clear0_regs[8] = (void *)

- ipi_clear0_regs[9] = (void *)

- ipi_clear0_regs[10] = (void *)

- ipi_clear0_regs[11] = (void *)

- ipi_clear0_regs[12] = (void *)

- ipi_clear0_regs[13] = (void *)

- ipi_clear0_regs[14] = (void *)

- ipi_clear0_regs[15] = (void *)

- ipi_status0_regs[0] = (void *)

- ipi_status0_regs[1] = (void *)

- ipi_status0_regs[2] = (void *)

- ipi_status0_regs[3] = (void *)

- ipi_status0_regs[4] = (void *)

- ipi_status0_regs[5] = (void *)

- ipi_status0_regs[6] = (void *)

- ipi_status0_regs[7] = (void *)

- ipi_status0_regs[8] = (void *)

- ipi_status0_regs[9] = (void *)

- ipi_status0_regs[10] = (void *)

- ipi_status0_regs[11] = (void *)

- ipi_status0_regs[12] = (void *)

- ipi_status0_regs[13] = (void *)

- ipi_status0_regs[14] = (void *)

- ipi_status0_regs[15] = (void *)

- ipi_en0_regs[0] = (void *)

- ipi_en0_regs[1] = (void *)

- ipi_en0_regs[2] = (void *)

- ipi_en0_regs[3] = (void *)

- ipi_en0_regs[4] = (void *)

- ipi_en0_regs[5] = (void *)

- ipi_en0_regs[6] = (void *)

- ipi_en0_regs[7] = (void *)

- ipi_en0_regs[8] = (void *)

- ipi_en0_regs[9] = (void *)

- ipi_en0_regs[10] = (void *)

- ipi_en0_regs[11] = (void *)

- ipi_en0_regs[12] = (void *)

- ipi_en0_regs[13] = (void *)

- ipi_en0_regs[14] = (void *)

- ipi_en0_regs[15] = (void *)

- ipi_mailbox_buf[0] = (void *)

- ipi_mailbox_buf[1] = (void *)

- ipi_mailbox_buf[2] = (void *)

- ipi_mailbox_buf[3] = (void *)

- ipi_mailbox_buf[4] = (void *)

- ipi_mailbox_buf[5] = (void *)

- ipi_mailbox_buf[6] = (void *)

- ipi_mailbox_buf[7] = (void *)

- ipi_mailbox_buf[8] = (void *)

- ipi_mailbox_buf[9] = (void *)

- ipi_mailbox_buf[10] = (void *)

- ipi_mailbox_buf[11] = (void *)

- ipi_mailbox_buf[12] = (void *)

- ipi_mailbox_buf[13] = (void *)

- ipi_mailbox_buf[14] = (void *)

- ipi_mailbox_buf[15] = (void *)

- page_mapcount(page) &&

- !Page_dcache_dirty(page));

-void __flush_dcache_page(struct page *page)

- struct address_space *mapping = page_mapping_file(page);

- SetPageDcacheDirty(page);

- if (PageHighMem(page))

- addr = (unsigned long)kmap_atomic(page);

- addr = (unsigned long)page_address(page);

- flush_data_cache_page(addr);

- if (PageHighMem(page))

- kunmap_atomic((void *)addr);

-EXPORT_SYMBOL(__flush_dcache_page);

- if (page_mapcount(page) && !Page_dcache_dirty(page)) {

- struct page *page;

- page = pfn_to_page(pfn);

- if (Page_dcache_dirty(page)) {

- if (PageHighMem(page))

- addr = (unsigned long)kmap_atomic(page);

- addr = (unsigned long)page_address(page);

- if (exec || pages_do_alias(addr, address & PAGE_MASK))

- flush_data_cache_page(addr);

- if (PageHighMem(page))

- kunmap_atomic((void *)addr);

- ClearPageDcacheDirty(page);

- BUG_ON(Page_dcache_dirty(page));

- page_mapcount(from) && !Page_dcache_dirty(from)) {

- page_mapcount(page) && !Page_dcache_dirty(page)) {

- SetPageDcacheDirty(page);

- page_mapcount(page) && !Page_dcache_dirty(page)) {

- SetPageDcacheDirty(page);

- * When _PFN_SHIFT is greater than PAGE_SHIFT we won't have enough PTE

- BUILD_BUG_ON(IS_ENABLED(CONFIG_32BIT) && (_PFN_SHIFT > PAGE_SHIFT));

-#include <asm/export.h>

- pmd_val(pmd) = (page_to_pfn(page) << _PFN_SHIFT) | pgprot_val(prot);

- pgd_t *ret, *init;

- ret = (pgd_t *) __get_free_pages(GFP_KERNEL, PGD_TABLE_ORDER);

-#include <asm/export.h>

- pr_define("_PFN_SHIFT %d\n", _PFN_SHIFT);

-#include <linux/of_platform.h>

-#include <linux/of_irq.h>

- io_tlb_default_mem.start & ~((1ull << 22) - 1);

-#include <linux/of_platform.h>

-#include <linux/of_irq.h>

-#include <linux/of_pci.h>

-#include <linux/of_platform.h>

-#include <linux/of_fdt.h>

-#include <linux/of_platform.h>

- if (early_read_config_word(hose, top_bus, current_bus,

- pci_devfn, PCI_VENDOR_ID, &vid) !=

- PCIBIOS_SUCCESSFUL)

- if (pci_read_config_byte(dev, PCI_BIST, &bist) == PCIBIOS_SUCCESSFUL &&

- (bist & PCI_BIST_CAPABLE)) {

- unsigned long timeout;

- pci_set_power_state(dev, PCI_D0);

- pr_info("PCI: %s BIST...", pci_name(dev));

- pci_write_config_byte(dev, PCI_BIST, PCI_BIST_START);

- timeout = jiffies + HZ * 2; /* timeout after 2 sec */

- pci_read_config_byte(dev, PCI_BIST, &bist);

- if (time_after(jiffies, timeout))

- } while (bist & PCI_BIST_START);

- if (bist & (PCI_BIST_CODE_MASK | PCI_BIST_START))

- pr_cont("failed. (0x%x)\n", bist);

-extern void flush_icache_page(struct vm_area_struct *vma, struct page *page);

-#define __pte_free_tlb(tlb, pte, addr) \

- pgtable_pte_page_dtor(pte); \

- tlb_remove_page((tlb), (pte)); \

-static inline pte_t pte_mkwrite(pte_t pte)

-static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,

- pte_t *ptep, pte_t pteval)

- unsigned long paddr = (unsigned long)page_to_virt(pte_page(pteval));

- flush_dcache_range(paddr, paddr + PAGE_SIZE);

- set_pte(ptep, pteval);

- set_pte_at(mm, addr, ptep, null);

-extern void update_mmu_cache(struct vm_area_struct *vma,

- unsigned long address, pte_t *pte);

-static void flush_aliases(struct address_space *mapping, struct page *page)

- struct vm_area_struct *mpnt;

- pgoff = page->index;

- flush_dcache_mmap_lock(mapping);

- vma_interval_tree_foreach(mpnt, &mapping->i_mmap, pgoff, pgoff) {

- unsigned long offset;

- if (mpnt->vm_mm != mm)

- if (!(mpnt->vm_flags & VM_MAYSHARE))

- offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;

- flush_cache_page(mpnt, mpnt->vm_start + offset,

- page_to_pfn(page));

- flush_dcache_mmap_unlock(mapping);

-void flush_icache_page(struct vm_area_struct *vma, struct page *page)

- unsigned long end = start + PAGE_SIZE;

-void __flush_dcache_page(struct address_space *mapping, struct page *page)

- unsigned long start = (unsigned long)page_address(page);

- __flush_dcache(start, start + PAGE_SIZE);

-void flush_dcache_page(struct page *page)

- if (page == ZERO_PAGE(0))

- mapping = page_mapping_file(page);

- clear_bit(PG_dcache_clean, &page->flags);

- __flush_dcache_page(mapping, page);

- unsigned long start = (unsigned long)page_address(page);

- flush_aliases(mapping, page);

- flush_icache_range(start, start + PAGE_SIZE);

- set_bit(PG_dcache_clean, &page->flags);

-void update_mmu_cache(struct vm_area_struct *vma,

- unsigned long address, pte_t *ptep)

- struct page *page;

- page = pfn_to_page(pfn);

- if (page == ZERO_PAGE(0))

- mapping = page_mapping_file(page);

- if (!test_and_set_bit(PG_dcache_clean, &page->flags))

- __flush_dcache_page(mapping, page);

- flush_aliases(mapping, page);

- flush_icache_page(vma, page);

- clear_bit(PG_dc_clean, &page->flags);

-#define ioremap ioremap

-void __iomem *ioremap(phys_addr_t offset, unsigned long size);

-#define iounmap iounmap

-extern void iounmap(volatile void __iomem *addr);

-#define virt_to_pfn(kaddr) (__pa(kaddr) >> PAGE_SHIFT)

-#define pfn_to_virt(pfn) __va((pfn) << PAGE_SHIFT)

-#define __pte_free_tlb(tlb, pte, addr) \

- pgtable_pte_page_dtor(pte); \

- tlb_remove_page((tlb), (pte)); \

-#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)

-static inline pte_t pte_mkwrite(pte_t pte)

-static inline void update_mmu_cache(struct vm_area_struct *vma,

- unsigned long address, pte_t *pte)

- update_tlb(vma, address, pte);

- update_cache(vma, address, pte);

- extern void show_registers(struct pt_regs *regs);

-int do_signal(struct pt_regs *regs, int syscall)

-static int kstack_depth_to_print = 0x180;

-void nommu_dump_state(struct pt_regs *regs,

- unsigned long ea, unsigned long vector)

- unsigned long addr, stack = regs->sp;

- printk("\n\r[nommu_dump_state] :: ea %lx, vector %lx\n\r", ea, vector);

- printk("CPU #: %d\n"

- " PC: %08lx SR: %08lx SP: %08lx\n",

- 0, regs->pc, regs->sr, regs->sp);

- printk("GPR00: %08lx GPR01: %08lx GPR02: %08lx GPR03: %08lx\n",

- 0L, regs->gpr[1], regs->gpr[2], regs->gpr[3]);

- printk("GPR04: %08lx GPR05: %08lx GPR06: %08lx GPR07: %08lx\n",

- regs->gpr[4], regs->gpr[5], regs->gpr[6], regs->gpr[7]);

- printk("GPR08: %08lx GPR09: %08lx GPR10: %08lx GPR11: %08lx\n",

- regs->gpr[8], regs->gpr[9], regs->gpr[10], regs->gpr[11]);

- printk("GPR12: %08lx GPR13: %08lx GPR14: %08lx GPR15: %08lx\n",

- regs->gpr[12], regs->gpr[13], regs->gpr[14], regs->gpr[15]);

- printk("GPR16: %08lx GPR17: %08lx GPR18: %08lx GPR19: %08lx\n",

- regs->gpr[16], regs->gpr[17], regs->gpr[18], regs->gpr[19]);

- printk("GPR20: %08lx GPR21: %08lx GPR22: %08lx GPR23: %08lx\n",

- regs->gpr[20], regs->gpr[21], regs->gpr[22], regs->gpr[23]);

- printk("GPR24: %08lx GPR25: %08lx GPR26: %08lx GPR27: %08lx\n",

- regs->gpr[24], regs->gpr[25], regs->gpr[26], regs->gpr[27]);

- printk("GPR28: %08lx GPR29: %08lx GPR30: %08lx GPR31: %08lx\n",

- regs->gpr[28], regs->gpr[29], regs->gpr[30], regs->gpr[31]);

- printk(" RES: %08lx oGPR11: %08lx\n",

- regs->gpr[11], regs->orig_gpr11);

- printk("Process %s (pid: %d, stackpage=%08lx)\n",

- ((struct task_struct *)(__pa(current)))->comm,

- ((struct task_struct *)(__pa(current)))->pid,

- (unsigned long)current);

- printk("\nStack: ");

- printk("Stack dump [0x%08lx]:\n", (unsigned long)stack);

- for (i = 0; i < kstack_depth_to_print; i++) {

- if (((long)stack & (THREAD_SIZE - 1)) == 0)

- printk("%lx :: sp + %02d: 0x%08lx\n", stack, i * 4,

- *((unsigned long *)(__pa(stack))));

- printk("Call Trace: ");

- while (((long)stack & (THREAD_SIZE - 1)) != 0) {

- addr = *((unsigned long *)__pa(stack));

- if (kernel_text_address(addr)) {

- if (i && ((i % 6) == 0))

- printk(" [<%08lx>]", addr);

- printk("\nCode: ");

- for (i = -24; i < 24; i++) {

- unsigned long word;

- word = ((unsigned long *)(__pa(regs->pc)))[i];

- print_data(regs->pc, word, i);

- struct page *page = pfn_to_page(pfn);

- int dirty = !test_and_set_bit(PG_dc_clean, &page->flags);

- if ((vma->vm_flags & VM_EXEC) && dirty)

- sync_icache_dcache(page);

-extern void __noreturn die(char *, struct pt_regs *, long);

- extern void tlb_init(void);

-static unsigned int fixmaps_used __initdata;

- * Remap an arbitrary physical address space into the kernel virtual

- * address space. Needed when the kernel wants to access high addresses

- * NOTE! We need to allow non-page-aligned mappings too: we will obviously

- * have to convert them into an offset in a page-aligned mapping, but the

- * caller shouldn't need to know that small detail.

-void __iomem *__ref ioremap(phys_addr_t addr, unsigned long size)

- unsigned long offset, last_addr;

- struct vm_struct *area = NULL;

- /* Don't allow wraparound or zero size */

- last_addr = addr + size - 1;

- if (!size || last_addr < addr)

- * Mappings have to be page-aligned

- offset = addr & ~PAGE_MASK;

- p = addr & PAGE_MASK;

- size = PAGE_ALIGN(last_addr + 1) - p;

- if (likely(mem_init_done)) {

- area = get_vm_area(size, VM_IOREMAP);

- v = (unsigned long)area->addr;

- if ((fixmaps_used + (size >> PAGE_SHIFT)) > FIX_N_IOREMAPS)

- v = fix_to_virt(FIX_IOREMAP_BEGIN + fixmaps_used);

- fixmaps_used += (size >> PAGE_SHIFT);

- if (ioremap_page_range(v, v + size, p,

- __pgprot(pgprot_val(PAGE_KERNEL) | _PAGE_CI))) {

- if (likely(mem_init_done))

- vfree(area->addr);

- fixmaps_used -= (size >> PAGE_SHIFT);

- return (void __iomem *)(offset + (char *)v);

-EXPORT_SYMBOL(ioremap);

-void iounmap(volatile void __iomem *addr)

- /* If the page is from the fixmap pool then we just clear out

- * the fixmap mapping.

- if (unlikely((unsigned long)addr > FIXADDR_START)) {

- /* This is a bit broken... we don't really know

- * how big the area is so it's difficult to know

- * how many fixed pages to invalidate...

- * just flush tlb and hope for the best...

- * consider this a FIXME

- * Really we should be clearing out one or more page

- * table entries for these virtual addresses so that

- * future references cause a page fault... for now, we

- * rely on two things:

- * i) this code never gets called on known boards

- * ii) invalid accesses to the freed areas aren't made

- return vfree((void *)(PAGE_MASK & (unsigned long)addr));

-EXPORT_SYMBOL(iounmap);

-/* called once during VM initialization, from init.c */

-void __init tlb_init(void)

- /* Do nothing... */

- /* invalidate the entire TLB */

- /* flush_tlb_all(); */

-obj-y += mm/ kernel/ math-emu/

- bool "Kexec system call"

- kexec is a system call that implements the ability to shutdown your

- current kernel, and to start another kernel. It is like a reboot

- but it is independent of the system firmware. And like a reboot

- you can start any kernel with it, not just Linux.

- It is an ongoing process to be certain the hardware in a machine

- shutdown, so do not be surprised if this code does not

- initially work for you.

- bool "kexec file based system call"

- This enables the kexec_file_load() System call. This is

- file based and takes file descriptors as system call argument

- for kernel and initramfs as opposed to list of segments as

- accepted by previous system call.

-void flush_dcache_page(struct page *page);

-#define flush_icache_page(vma,page) do { \

- flush_kernel_dcache_page_addr(page_address(page)); \

- flush_kernel_icache_page(page_address(page)); \

- __u64 dummy[2]; /* FIXME: nothing uses these, why waste

-/* SPDX-License-Identifier: GPL-2.0 */

- * linux/include/asm-parisc/ide.h

- * This file contains the PARISC architecture specific IDE code.

-#ifndef __ASM_PARISC_IDE_H

-#define __ASM_PARISC_IDE_H

-/* Generic I/O and MEMIO string operations. */

-#define __ide_insw insw

-#define __ide_insl insl

-#define __ide_outsw outsw

-#define __ide_outsl outsl

-static __inline__ void __ide_mm_insw(void __iomem *port, void *addr, u32 count)

- *(u16 *)addr = __raw_readw(port);

-static __inline__ void __ide_mm_insl(void __iomem *port, void *addr, u32 count)

- *(u32 *)addr = __raw_readl(port);

-static __inline__ void __ide_mm_outsw(void __iomem *port, void *addr, u32 count)

- __raw_writew(*(u16 *)addr, port);

-static __inline__ void __ide_mm_outsl(void __iomem *port, void *addr, u32 count)

- __raw_writel(*(u32 *)addr, port);

-#endif /* __ASM_PARISC_IDE_H */

-void __iomem *ioremap(unsigned long offset, unsigned long size);

-#define ioremap_wc ioremap

-#define ioremap_uc ioremap

-#define pci_iounmap pci_iounmap

-extern void iounmap(const volatile void __iomem *addr);

-#define LED_LAN_TX LED0 /* for LAN transmit activity */

-#define LED_LAN_RCV LED1 /* for LAN receive activity */

-int __init register_led_driver(int model, unsigned long cmd_reg, unsigned long data_reg);

-/* registers the LED regions for procfs */

-void __init register_led_regions(void);

-int lcd_print(const char *str);

-#define lcd_print(str)

-/* main LED initialization function (uses PDC) */

-int __init led_init(void);

-/* SPDX-License-Identifier: GPL-2.0 */

-#ifndef _PARISC_MACHDEP_H

-#define _PARISC_MACHDEP_H

-#include <linux/notifier.h>

-#define MACH_RESTART 1

-#define MACH_HALT 2

-#define MACH_POWER_ON 3

-#define MACH_POWER_OFF 4

-extern struct notifier_block *mach_notifier;

-extern void pa7300lc_init(void);

-extern void (*cpu_lpmc)(int, struct pt_regs *);

-#define set_pte_at(mm, addr, pteptr, pteval) \

- if (pte_present(pteval) && \

- pte_user(pteval)) \

- __update_cache(pteval); \

- *(pteptr) = (pteval); \

- purge_tlb_entries(mm, addr); \

-#define pte_clear(mm, addr, xp) set_pte_at(mm, addr, xp, __pte(0))

-static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_WRITE; return pte; }

-#define update_mmu_cache(vms,addr,ptep) __update_cache(*ptep)

- set_pte_at(vma->vm_mm, addr, ptep, pte_mkold(pte));

- set_pte_at(mm, addr, ptep, __pte(0));

- set_pte_at(mm, addr, ptep, pte_wrprotect(*ptep));

-extern void gsc_init(void);

-extern void ccio_init(void);

-extern void hppb_init(void);

-extern void dino_init(void);

-extern void iosapic_init(void);

-extern void lba_init(void);

-extern void sba_init(void);

-extern void parisc_eisa_init(void);

-extern void *iosapic_register(unsigned long hpa);

-/* declared in arch/parisc/kernel/setup.c */

-extern struct proc_dir_entry * proc_runway_root;

- pa7300lc.o syscall.o entry.o sys_parisc.o firmware.o \

-__update_cache(pte_t pte)

- struct page *page;

- page = pfn_to_page(pfn);

- if (page_mapping_file(page) &&

- test_bit(PG_dcache_dirty, &page->flags)) {

- flush_kernel_dcache_page_addr(pfn_va(pfn));

- clear_bit(PG_dcache_dirty, &page->flags);

- flush_kernel_dcache_page_addr(pfn_va(pfn));

-void flush_dcache_page(struct page *page)

- struct address_space *mapping = page_mapping_file(page);

- struct vm_area_struct *mpnt;

- unsigned long offset;

- unsigned long flags;

- set_bit(PG_dcache_dirty, &page->flags);

- flush_kernel_dcache_page_addr(page_address(page));

- pgoff = page->index;

- vma_interval_tree_foreach(mpnt, &mapping->i_mmap, pgoff, pgoff) {

- offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;

- addr = mpnt->vm_start + offset;

- if (parisc_requires_coherency()) {

- bool needs_flush = false;

- ptep = get_ptep(mpnt->vm_mm, addr);

- needs_flush = pte_needs_flush(*ptep);

- flush_user_cache_page(mpnt, addr);

- flush_tlb_page(mpnt, addr);

- __flush_cache_page(mpnt, addr, page_to_phys(page));

- if (!(mpnt->vm_flags & VM_SHARED))

- old_addr, addr, mpnt->vm_file);

-EXPORT_SYMBOL(flush_dcache_page);

-// SPDX-License-Identifier: GPL-2.0

- * linux/arch/parisc/kernel/pa7300lc.c

- * - PA7300LC-specific functions

-#include <linux/sched.h>

-#include <linux/sched/debug.h>

-#include <linux/smp.h>

-#include <linux/kernel.h>

-#include <asm/io.h>

-#include <asm/ptrace.h>

-#include <asm/machdep.h>

-/* CPU register indices */

-#define MIOC_STATUS 0xf040

-#define MIOC_CONTROL 0xf080

-#define MDERRADD 0xf0e0

-#define DMAERR 0xf0e8

-#define DIOERR 0xf0ec

-#define HIDMAMEM 0xf0f4

-/* this returns the HPA of the CPU it was called on */

-static u32 cpu_hpa(void)

- return 0xfffb0000;

-static void pa7300lc_lpmc(int code, struct pt_regs *regs)

- printk(KERN_WARNING "LPMC on CPU %d\n", smp_processor_id());

- printk(KERN_WARNING

- "MIOC_CONTROL %08x\n" "MIOC_STATUS %08x\n"

- "MDERRADD %08x\n" "DMAERR %08x\n"

- "DIOERR %08x\n" "HIDMAMEM %08x\n",

- gsc_readl(hpa+MIOC_CONTROL), gsc_readl(hpa+MIOC_STATUS),

- gsc_readl(hpa+MDERRADD), gsc_readl(hpa+DMAERR),

- gsc_readl(hpa+DIOERR), gsc_readl(hpa+HIDMAMEM));

-void pa7300lc_init(void)

- cpu_lpmc = pa7300lc_lpmc;

-void (*chassis_power_off)(void);

- /* If there is a registered power off handler, call it. */

- if (chassis_power_off)

- chassis_power_off();

-static inline unsigned long brk_rnd(void)

- return (get_random_u32() & BRK_RND_MASK) << PAGE_SHIFT;

-unsigned long arch_randomize_brk(struct mm_struct *mm)

- unsigned long ret = PAGE_ALIGN(mm->brk + brk_rnd());

- if (ret < mm->brk)

- const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);

- cpuinfo->dev->name : "Unknown");

-#include <asm/machdep.h> /* for pa7300lc_init() proto */

-#ifdef CONFIG_CHASSIS_LCD_LED

- /* initialize the LCD/LED after boot_cpu_data is available ! */

- led_init(); /* LCD/LED initialization */

- /* These are in a non-obvious order, will fix when we have an iotree */

-#if defined(CONFIG_IOSAPIC)

-#if defined(CONFIG_IOMMU_SBA)

-#if defined(CONFIG_PCI_LBA)

- /* CCIO before any potential subdevices */

-#if defined(CONFIG_IOMMU_CCIO)

- * Need to register Asp & Wax before the EISA adapters for the IRQ

- * regions. EISA must come before PCI to be sure it gets IRQ region

-#if defined(CONFIG_GSC_LASI) || defined(CONFIG_GSC_WAX)

- parisc_eisa_init();

-#if defined(CONFIG_HPPB)

-#if defined(CONFIG_GSC_DINO)

-#ifdef CONFIG_CHASSIS_LCD_LED

- register_led_regions(); /* register LED port info in procfs */

- info.low_limit = mm->mmap_legacy_base;

-static int mmap_is_legacy(void)

- if (current->personality & ADDR_COMPAT_LAYOUT)

- /* parisc stack always grows up - so a unlimited stack should

- * not be an indicator to use the legacy memory layout.

- * if (rlimit(RLIMIT_STACK) == RLIM_INFINITY)

- return sysctl_legacy_va_layout;

-static unsigned long mmap_rnd(void)

- unsigned long rnd = 0;

- if (current->flags & PF_RANDOMIZE)

- rnd = get_random_u32() & MMAP_RND_MASK;

- return rnd << PAGE_SHIFT;

-unsigned long arch_mmap_rnd(void)

- return (get_random_u32() & MMAP_RND_MASK) << PAGE_SHIFT;

-static unsigned long mmap_legacy_base(void)

- return TASK_UNMAPPED_BASE + mmap_rnd();

- * This function, called very early during the creation of a new

- * process VM image, sets up which VM layout function to use:

-void arch_pick_mmap_layout(struct mm_struct *mm, struct rlimit *rlim_stack)

- mm->mmap_legacy_base = mmap_legacy_base();

- mm->mmap_base = mmap_upper_limit(rlim_stack);

- if (mmap_is_legacy()) {

- mm->mmap_base = mm->mmap_legacy_base;

- mm->get_unmapped_area = arch_get_unmapped_area;

- mm->get_unmapped_area = arch_get_unmapped_area_topdown;

-void (*cpu_lpmc) (int code, struct pt_regs *regs) __read_mostly = default_trap;

- cpu_lpmc(5, regs);

- unsigned long valh = (val >> 32), vall = (val & 0xffffffffl);

-" mtsp %4, %%sr1\n"

-" zdep %2, 29, 2, %%r19\n"

-" dep %%r0, 31, 2, %3\n"

-"1: ldw 0(%%sr1,%3),%%r20\n"

-"2: ldw 8(%%sr1,%3),%%r21\n"

-" vshd %1, %2, %%r1\n"

-" vshd %2, %%r0, %2\n"

-" or %2, %%r21, %2\n"

-"3: stw %1,0(%%sr1,%3)\n"

-"4: stw %%r1,4(%%sr1,%3)\n"

-"5: stw %2,8(%%sr1,%3)\n"

- : "r" (valh), "r" (vall), "r" (regs->ior), "r" (regs->isr)

- * Generic mapping function (not visible outside):

- * Remap an arbitrary physical address space into the kernel virtual

- * NOTE! We need to allow non-page-aligned mappings too: we will obviously

- * have to convert them into an offset in a page-aligned mapping, but the

- * caller shouldn't need to know that small detail.

-void __iomem *ioremap(unsigned long phys_addr, unsigned long size)

- struct vm_struct *area;

- unsigned long offset, last_addr;

- /* Don't allow wraparound or zero size */

- last_addr = phys_addr + size - 1;

- if (!size || last_addr < phys_addr)

- pgprot = __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY |

- _PAGE_ACCESSED | _PAGE_NO_CACHE);

- * Mappings have to be page-aligned

- offset = phys_addr & ~PAGE_MASK;

- phys_addr &= PAGE_MASK;

- size = PAGE_ALIGN(last_addr + 1) - phys_addr;

- area = get_vm_area(size, VM_IOREMAP);

- addr = (uintptr_t) area->addr;

- if (ioremap_page_range(addr, addr + size, phys_addr, pgprot)) {

- vunmap(area->addr);

- return (void __iomem *) (offset + (char __iomem *)addr);

-EXPORT_SYMBOL(ioremap);

-void iounmap(const volatile void __iomem *io_addr)

- unsigned long addr = (unsigned long)io_addr & PAGE_MASK;

- if (is_vmalloc_addr((void *)addr))

- vunmap((void *)addr);

-EXPORT_SYMBOL(iounmap);

- select HAVE_DYNAMIC_FTRACE_WITH_ARGS if MPROFILE_KERNEL || PPC32

- select HAVE_DYNAMIC_FTRACE_WITH_REGS if MPROFILE_KERNEL || PPC32

- select HAVE_OBJTOOL if PPC32 || MPROFILE_KERNEL

- bool "kexec system call"

- depends on PPC_BOOK3S || PPC_E500 || (44x && !SMP)

- kexec is a system call that implements the ability to shutdown your

- current kernel, and to start another kernel. It is like a reboot

- but it is independent of the system firmware. And like a reboot

- you can start any kernel with it, not just Linux.

- The name comes from the similarity to the exec system call.

- It is an ongoing process to be certain the hardware in a machine

- is properly shutdown, so do not be surprised if this code does not

- initially work for you. As of this writing the exact hardware

- interface is strongly in flux, so no good recommendation can be

- bool "kexec file based system call"

- select HAVE_IMA_KEXEC if IMA

- depends on CRYPTO=y

- depends on CRYPTO_SHA256=y

- This is a new version of the kexec system call. This call is

- file based and takes in file descriptors as system call arguments

- for kernel and initramfs as opposed to a list of segments as is the

- case for the older kexec call.

-config ARCH_HAS_KEXEC_PURGATORY

- bool "Build a dump capture kernel"

- depends on PPC64 || PPC_BOOK3S_32 || PPC_85xx || (44x && !SMP)

- Build a kernel suitable for use as a dump capture kernel.

- The same kernel binary can be used as production kernel and dump

- depends on PCI && 8260

- select PPC_INDIRECT_PCI

-CFLAGS-$(CONFIG_POWERPC64_CPU) += $(call cc-option,-mtune=power10, \

- $(call cc-option,-mtune=power9, \

- $(call cc-option,-mtune=power8)))

- pmc@1000{ // Power Management Controller

-CONFIG_SERIAL_PMACZILOG=m

-CONFIG_IP_NF_TARGET_CLUSTERIP=m

-# CONFIG_UBSAN_MISC is not set \ No newline at end of file

-CONFIG_SLUB_DEBUG_ON=y

-generic-y += export.h

-#include <linux/jump_label.h>

-extern struct static_key_false disable_kuap_key;

-static __always_inline bool kuep_is_disabled(void)

- return !IS_ENABLED(CONFIG_PPC_KUEP);

-#define KUAP_ALL (~1UL)

-static __always_inline bool kuap_is_disabled(void)

- return static_branch_unlikely(&disable_kuap_key);

-static inline void kuap_lock_one(unsigned long addr)

-static inline void kuap_unlock_one(unsigned long addr)

-static inline void kuap_lock_all(void)

- update_user_segments(mfsr(0) | SR_KS);

- isync(); /* Context sync required after mtsr() */

-static inline void kuap_unlock_all(void)

- update_user_segments(mfsr(0) & ~SR_KS);

- isync(); /* Context sync required after mtsr() */

-void kuap_lock_all_ool(void);

-void kuap_unlock_all_ool(void);

-static inline void kuap_lock_addr(unsigned long addr, bool ool)

- if (likely(addr != KUAP_ALL))

- kuap_lock_one(addr);

- kuap_lock_all_ool();

-static inline void kuap_unlock(unsigned long addr, bool ool)

- if (likely(addr != KUAP_ALL))

- kuap_unlock_one(addr);

- kuap_unlock_all();

- kuap_unlock_all_ool();

-static inline void __kuap_lock(void)

-static inline void __kuap_save_and_lock(struct pt_regs *regs)

- kuap_lock_addr(kuap, false);

-static inline void kuap_user_restore(struct pt_regs *regs)

-static inline void __kuap_kernel_restore(struct pt_regs *regs, unsigned long kuap)

- kuap_lock_addr(kuap, false);

- kuap_unlock(regs->kuap, false);

-static inline unsigned long __kuap_get_and_assert_locked(void)

-static __always_inline void __allow_user_access(void __user *to, const void __user *from,

- u32 size, unsigned long dir)

- kuap_unlock_one((__force u32)to);

-static __always_inline void __prevent_user_access(unsigned long dir)

- kuap_lock_addr(kuap, true);

-static inline unsigned long __prevent_user_access_return(void)

- kuap_lock_addr(flags, true);

-static inline void __restore_user_access(unsigned long flags)

- kuap_unlock(flags, true);

- if (!is_write || kuap == KUAP_ALL)

- /* If faulting address doesn't match unlocked segment, unlock all */

- if ((kuap ^ address) & 0xf0000000)

- regs->kuap = KUAP_ALL;

-static inline unsigned long pte_pfn(pte_t pte)

- return pte_val(pte) >> PTE_RPN_SHIFT;

-static inline pte_t pte_mkwrite(pte_t pte)

- * Setting the PTE depends on the MMU type and other factors. It's

- * an horrible mess that I'm not going to try to clean up now but

- * I'm keeping it in one place rather than spread around

-#if defined(CONFIG_SMP) && !defined(CONFIG_PTE_64BIT)

- /* First case is 32-bit Hash MMU in SMP mode with 32-bit PTEs. We use the

- * helper pte_update() which does an atomic update. We need to do that

- * because a concurrent invalidation can clear _PAGE_HASHPTE. If it's a

- * per-CPU PTE such as a kmap_atomic, we do a simple update preserving

- * the hash bits instead (ie, same as the non-SMP case)

- *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE)

- | (pte_val(pte) & ~_PAGE_HASHPTE));

- pte_update(mm, addr, ptep, ~_PAGE_HASHPTE, pte_val(pte), 0);

-#elif defined(CONFIG_PTE_64BIT)

- /* Second case is 32-bit with 64-bit PTE. In this case, we

- * can just store as long as we do the two halves in the right order

- * with a barrier in between. This is possible because we take care,

- * in the hash code, to pre-invalidate if the PTE was already hashed,

- * which synchronizes us with any concurrent invalidation.

- * In the percpu case, we also fallback to the simple update preserving

- *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE)

- | (pte_val(pte) & ~_PAGE_HASHPTE));

- if (pte_val(*ptep) & _PAGE_HASHPTE)

- flush_hash_entry(mm, ptep, addr);

- __asm__ __volatile__("\

- : "=m" (*ptep), "=m" (*((unsigned char *)ptep+4))

- : "r" (pte) : "memory");

- /* Third case is 32-bit hash table in UP mode, we need to preserve

- * the _PAGE_HASHPTE bit since we may not have invalidated the previous

- * translation in the hash yet (done in a subsequent flush_tlb_xxx())

- * and see we need to keep track that this PTE needs invalidating

- *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE)

- | (pte_val(pte) & ~_PAGE_HASHPTE));

- if (mmu_has_feature(MMU_FTR_BOOK3S_KUAP) ||

- END_MMU_FTR_SECTION_NESTED_IFCLR(MMU_FTR_BOOK3S_KUAP, 68)

- END_MMU_FTR_SECTION_NESTED_IFSET(MMU_FTR_BOOK3S_KUAP, 67)

- END_MMU_FTR_SECTION_NESTED_IFCLR(MMU_FTR_PKEY | MMU_FTR_BOOK3S_KUAP, 68)

- END_MMU_FTR_SECTION_NESTED_IFSET(MMU_FTR_BOOK3S_KUAP, 69)

-static inline u64 current_thread_amr(void)

-static inline u64 current_thread_iamr(void)

-static __always_inline bool kuap_is_disabled(void)

- return !mmu_has_feature(MMU_FTR_BOOK3S_KUAP);

-static inline void kuap_user_restore(struct pt_regs *regs)

- if (!mmu_has_feature(MMU_FTR_BOOK3S_KUAP)) {

-static inline void __kuap_kernel_restore(struct pt_regs *regs, unsigned long amr)

-static inline unsigned long __kuap_get_and_assert_locked(void)

-/* Do nothing, book3s/64 does that in ASM */

-static inline void __kuap_lock(void)

-static inline void __kuap_save_and_lock(struct pt_regs *regs)

-static inline unsigned long get_kuap(void)

- if (!mmu_has_feature(MMU_FTR_BOOK3S_KUAP))

-static inline bool __bad_kuap_fault(struct pt_regs *regs, unsigned long address, bool is_write)

-static inline unsigned long get_kuap(void)

-static inline void set_kuap(unsigned long value) { }

-static inline unsigned long prevent_user_access_return(void)

-static inline void restore_user_access(unsigned long flags)

- * memory block size used with radix translation.

-extern unsigned long __ro_after_init radix_mem_block_size;

- atomic_dec(&(mm)->context.active_cpus); \

-static inline unsigned long pte_pfn(pte_t pte)

- return (pte_val(pte) & PTE_RPN_MASK) >> PAGE_SHIFT;

-static inline pte_t pte_mkwrite(pte_t pte)

-#define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))

-static inline int pud_pfn(pud_t pud)

- * Currently all calls to pud_pfn() are gated around a pud_devmap()

- * check so this should never be used. If it grows another user we

- * want to know about it.

-/* Insert a PTE, top-level function is out of line. It uses an inline

- * low level function in the respective pgtable-* files

-extern void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,

-static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)

-static inline void flush_dcache_page(struct page *page)

- if (test_bit(PG_dcache_clean, &page->flags))

- clear_bit(PG_dcache_clean, &page->flags);

-void flush_dcache_icache_page(struct page *page);

- || defined(CONFIG_PPC_83xx) || defined(CONFIG_8260) \

-extern long hcall_vphn(unsigned long cpu, u64 flags, __be32 *associativity);

- * Platform information definitions.

- * 2006 (c) MontaVista Software, Inc.

- * Vitaly Bordug <vbordug@ru.mvista.com>

- * This file is licensed under the terms of the GNU General Public License

- * version 2. This program is licensed "as is" without any warranty of any

- * kind, whether express or implied.

-#include <sysdev/fsl_soc.h>

-#include <asm/time.h>

-#include <asm/cpm2.h>

-#if defined(CONFIG_8260)

-#include <asm/mpc8260.h>

-#define cpm2_map(member) (&cpm2_immr->member)

-#define cpm2_map_size(member, size) (&cpm2_immr->member)

-#define cpm2_unmap(addr) do {} while(0)

-#ifdef CONFIG_PPC_8xx

-#include <asm/8xx_immap.h>

-extern immap_t __iomem *mpc8xx_immr;

-#define immr_map(member) (&mpc8xx_immr->member)

-#define immr_map_size(member, size) (&mpc8xx_immr->member)

-#define immr_unmap(addr) do {} while (0)

-static inline int uart_baudrate(void)

- return get_baudrate();

-static inline int uart_clock(void)

- return ppc_proc_freq;

-#ifdef CONFIG_MPROFILE_KERNEL

-#define FTRACE_MCOUNT_MAX_OFFSET 12

- /* relocation of mcount call site is the same as the address */

-void ftrace_free_init_tramp(void);

-static inline void ftrace_free_init_tramp(void) { }

-/* SPDX-License-Identifier: GPL-2.0 */

- * This file contains the powerpc architecture specific IDE code.

-#ifndef _ASM_POWERPC_IDE_H

-#define _ASM_POWERPC_IDE_H

-#include <linux/compiler.h>

-#include <asm/io.h>

-#define __ide_mm_insw(p, a, c) readsw((void __iomem *)(p), (a), (c))

-#define __ide_mm_insl(p, a, c) readsl((void __iomem *)(p), (a), (c))

-#define __ide_mm_outsw(p, a, c) writesw((void __iomem *)(p), (a), (c))

-#define __ide_mm_outsl(p, a, c) writesl((void __iomem *)(p), (a), (c))

-#endif /* _ASM_POWERPC_IDE_H */

-#define ARCH_HAS_IOREMAP_WC

-#ifdef CONFIG_PPC32

-#define ARCH_HAS_IOREMAP_WT

-#ifdef CONFIG_GENERIC_IOMAP

-#include <asm-generic/iomap.h>

-extern void __iomem *ioremap_prot(phys_addr_t address, unsigned long size,

- unsigned long flags);

-extern void iounmap(volatile void __iomem *addr);

-void __iomem *do_ioremap(phys_addr_t pa, phys_addr_t offset, unsigned long size,

- pgprot_t prot, void *caller);

- bool exclude_self);

- struct page *page = virt_to_page(addr);

-static inline void __kuap_lock(void) { }

-static inline void __kuap_save_and_lock(struct pt_regs *regs) { }

-static inline void kuap_user_restore(struct pt_regs *regs) { }

-static inline void __kuap_kernel_restore(struct pt_regs *regs, unsigned long amr) { }

-static inline unsigned long __kuap_get_and_assert_locked(void)

-static inline void __allow_user_access(void __user *to, const void __user *from,

- unsigned long size, unsigned long dir) { }

-static inline void __prevent_user_access(unsigned long dir) { }

-static inline unsigned long __prevent_user_access_return(void) { return 0UL; }

-static inline void __restore_user_access(unsigned long flags) { }

-static __always_inline void kuap_assert_locked(void)

- if (kuap_is_disabled())

- if (IS_ENABLED(CONFIG_PPC_KUAP_DEBUG))

- __kuap_get_and_assert_locked();

- if (kuap_is_disabled())

- return __kuap_get_and_assert_locked();

-#ifndef CONFIG_PPC_BOOK3S_64

-static __always_inline void allow_user_access(void __user *to, const void __user *from,

- unsigned long size, unsigned long dir)

- if (kuap_is_disabled())

- __allow_user_access(to, from, size, dir);

-static __always_inline void prevent_user_access(unsigned long dir)

- if (kuap_is_disabled())

- __prevent_user_access(dir);

-static __always_inline unsigned long prevent_user_access_return(void)

- if (kuap_is_disabled())

- return __prevent_user_access_return();

-static __always_inline void restore_user_access(unsigned long flags)

- if (kuap_is_disabled())

- __restore_user_access(flags);

-#endif /* CONFIG_PPC_BOOK3S_64 */

- struct page *page;

- page = pfn_to_page(pfn);

- if (!test_bit(PG_dcache_clean, &page->flags)) {

- flush_dcache_icache_page(page);

- set_bit(PG_dcache_clean, &page->flags);

- * The below VPHN macros are outside the __KERNEL__ check since these are

- * used for compiling the vphn selftest in userspace

-/* The H_HOME_NODE_ASSOCIATIVITY h_call returns 6 64-bit registers. */

-#define VPHN_REGISTER_COUNT 6

- * 6 64-bit registers unpacked into up to 24 be32 associativity values. To

- * form the complete property we have to add the length in the first cell.

-#define VPHN_ASSOC_BUFSIZE (VPHN_REGISTER_COUNT*sizeof(u64)/sizeof(u16) + 1)

- * The H_HOME_NODE_ASSOCIATIVITY hcall takes two values for flags:

- * 1 for retrieving associativity information for a guest cpu

- * 2 for retrieving associativity information for a host/hypervisor cpu

-#define VPHN_FLAG_VCPU 1

-#define VPHN_FLAG_PCPU 2

-static inline bool lppaca_shared_proc(struct lppaca *l)

-extern long hcall_vphn(unsigned long cpu, u64 flags, __be32 *associativity);

-#include <linux/of_device.h>

-#define MMU_FTR_BOOK3S_KUAP ASM_CONST(0x00000200)

-#ifdef CONFIG_PPC_E500

-#include <asm/percpu.h>

-DECLARE_PER_CPU(int, next_tlbcam_idx);

- MMU_FTR_BOOK3S_KUAP |

- asm(".section .ftrace.tramp,\"ax\",@nobits; .align 3; .previous");

-# endif /* MODULE */

-/* SPDX-License-Identifier: GPL-2.0 */

- * Since there are many different boards and no standard configuration,

- * we have a unique include file for each. Rather than change every

- * file that has to include MPC8260 configuration, they all include

- * this one and the configuration switching is done here.

-#ifndef __ASM_POWERPC_MPC8260_H__

-#define __ASM_POWERPC_MPC8260_H__

-#define MPC82XX_BCR_PLDP 0x00800000 /* Pipeline Maximum Depth */

-#ifdef CONFIG_PCI_8260

-#include <platforms/82xx/m82xx_pci.h>

-#endif /* CONFIG_8260 */

-#endif /* !__ASM_POWERPC_MPC8260_H__ */

-#endif /* __KERNEL__ */

-#include <linux/jump_label.h>

-extern struct static_key_false disable_kuap_key;

-static __always_inline bool kuap_is_disabled(void)

- return static_branch_unlikely(&disable_kuap_key);

-static inline void __kuap_lock(void)

-static inline void __kuap_save_and_lock(struct pt_regs *regs)

-static inline void kuap_user_restore(struct pt_regs *regs)

-static inline void __kuap_kernel_restore(struct pt_regs *regs, unsigned long kuap)

-static inline unsigned long __kuap_get_and_assert_locked(void)

- unsigned long kuap;

- kuap = mfspr(SPRN_MD_AP);

- if (IS_ENABLED(CONFIG_PPC_KUAP_DEBUG))

- WARN_ON_ONCE(kuap >> 16 != MD_APG_KUAP >> 16);

-static inline void __allow_user_access(void __user *to, const void __user *from,

- unsigned long size, unsigned long dir)

- mtspr(SPRN_MD_AP, MD_APG_INIT);

-static inline void __prevent_user_access(unsigned long dir)

- mtspr(SPRN_MD_AP, MD_APG_KUAP);

-static inline unsigned long __prevent_user_access_return(void)

- mtspr(SPRN_MD_AP, MD_APG_KUAP);

-static inline void __restore_user_access(unsigned long flags)

- mtspr(SPRN_MD_AP, flags);

-#ifndef pte_mkwrite

-static inline pte_t pte_mkwrite(pte_t pte)

- ((unsigned long)(pmd_val(pmd) & ~(PTE_TABLE_SIZE - 1)))

-static inline pte_t pte_mkwrite(pte_t pte)

-#define pte_mkwrite pte_mkwrite

-static inline pte_t pte_mkwrite(pte_t pte)

-#define pmd_page_vaddr(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS)

-#include <linux/jump_label.h>

-extern struct static_key_false disable_kuap_key;

-static __always_inline bool kuap_is_disabled(void)

- return static_branch_unlikely(&disable_kuap_key);

-static inline void __kuap_lock(void)

-static inline void __kuap_save_and_lock(struct pt_regs *regs)

-static inline void kuap_user_restore(struct pt_regs *regs)

-static inline void __kuap_kernel_restore(struct pt_regs *regs, unsigned long kuap)

-static inline unsigned long __kuap_get_and_assert_locked(void)

- unsigned long kuap = mfspr(SPRN_PID);

- if (IS_ENABLED(CONFIG_PPC_KUAP_DEBUG))

- WARN_ON_ONCE(kuap);

-static inline void __allow_user_access(void __user *to, const void __user *from,

- unsigned long size, unsigned long dir)

- mtspr(SPRN_PID, current->thread.pid);

-static inline void __prevent_user_access(unsigned long dir)

- mtspr(SPRN_PID, 0);

-static inline unsigned long __prevent_user_access_return(void)

- mtspr(SPRN_PID, 0);

-static inline void __restore_user_access(unsigned long flags)

- mtspr(SPRN_PID, current->thread.pid);

-static inline unsigned long pte_pfn(pte_t pte) {

- return pte_val(pte) >> PTE_RPN_SHIFT; }

-/* Insert a PTE, top-level function is out of line. It uses an inline

- * low level function in the respective pgtable-* files

-extern void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,

-void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep);

-void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep) {}

-#include <asm/lppaca.h>

-#ifdef CONFIG_PPC_PSERIES

-#define get_lppaca() (get_paca()->lppaca_ptr)

-#define virt_to_pfn(kaddr) (__pa(kaddr) >> PAGE_SHIFT)

-#define virt_to_page(kaddr) pfn_to_page(virt_to_pfn(kaddr))

-#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)

-#define virt_addr_valid(vaddr) ({ \

- unsigned long _addr = (unsigned long)vaddr; \

- _addr >= PAGE_OFFSET && _addr < (unsigned long)high_memory && \

- pfn_valid(virt_to_pfn(_addr)); \

-static inline unsigned long pmd_page_vaddr(pmd_t pmd)

- return ((unsigned long)__va(pmd_val(pmd) & ~PMD_MASKED_BITS));

-#define is_ioremap_addr is_ioremap_addr

-static inline bool is_ioremap_addr(const void *x)

- unsigned long addr = (unsigned long)x;

- return addr >= IOREMAP_BASE && addr < IOREMAP_END;

- * Helps identify source of single-step exception and subsequent

- * hw-breakpoint enablement

- struct perf_event *last_hit_ubp[HBP_NUM_MAX];

-extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);

-static __must_check inline bool user_access_begin(const void __user *ptr, size_t len)

-static __must_check inline bool

-#ifdef CONFIG_MPROFILE_KERNEL

- extern int ppc32_classify_syscall(unsigned);

-#include <asm/export.h>

-static bool single_step_pending(void)

- for (i = 0; i < nr_wp_slots(); i++) {

- if (current->thread.last_hit_ubp[i])

- if (!single_step_pending())

-struct breakpoint {

- struct list_head list;

- struct perf_event *bp;

- * While kernel/events/hw_breakpoint.c does its own synchronization, we cannot

- * rely on it safely synchronizing internals here; however, we can rely on it

- * not requesting more breakpoints than available.

-static DEFINE_SPINLOCK(cpu_bps_lock);

-static DEFINE_PER_CPU(struct breakpoint *, cpu_bps[HBP_NUM_MAX]);

-static DEFINE_SPINLOCK(task_bps_lock);

-static LIST_HEAD(task_bps);

-static struct breakpoint *alloc_breakpoint(struct perf_event *bp)

- struct breakpoint *tmp;

- tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);

- return ERR_PTR(-ENOMEM);

- tmp->ptrace_bp = is_ptrace_bp(bp);

-static bool bp_addr_range_overlap(struct perf_event *bp1, struct perf_event *bp2)

- __u64 bp1_saddr, bp1_eaddr, bp2_saddr, bp2_eaddr;

- bp1_saddr = ALIGN_DOWN(bp1->attr.bp_addr, HW_BREAKPOINT_SIZE);

- bp1_eaddr = ALIGN(bp1->attr.bp_addr + bp1->attr.bp_len, HW_BREAKPOINT_SIZE);

- bp2_saddr = ALIGN_DOWN(bp2->attr.bp_addr, HW_BREAKPOINT_SIZE);

- bp2_eaddr = ALIGN(bp2->attr.bp_addr + bp2->attr.bp_len, HW_BREAKPOINT_SIZE);

- return (bp1_saddr < bp2_eaddr && bp1_eaddr > bp2_saddr);

-static bool alternate_infra_bp(struct breakpoint *b, struct perf_event *bp)

- return is_ptrace_bp(bp) ? !b->ptrace_bp : b->ptrace_bp;

-static bool can_co_exist(struct breakpoint *b, struct perf_event *bp)

- return !(alternate_infra_bp(b, bp) && bp_addr_range_overlap(b->bp, bp));

-static int task_bps_add(struct perf_event *bp)

- struct breakpoint *tmp;

- tmp = alloc_breakpoint(bp);

- return PTR_ERR(tmp);

- spin_lock(&task_bps_lock);

- list_add(&tmp->list, &task_bps);

- spin_unlock(&task_bps_lock);

-static void task_bps_remove(struct perf_event *bp)

- struct list_head *pos, *q;

- spin_lock(&task_bps_lock);

- list_for_each_safe(pos, q, &task_bps) {

- struct breakpoint *tmp = list_entry(pos, struct breakpoint, list);

- if (tmp->bp == bp) {

- list_del(&tmp->list);

- spin_unlock(&task_bps_lock);

- * If any task has breakpoint from alternate infrastructure,

- * return true. Otherwise return false.

-static bool all_task_bps_check(struct perf_event *bp)

- struct breakpoint *tmp;

- spin_lock(&task_bps_lock);

- list_for_each_entry(tmp, &task_bps, list) {

- if (!can_co_exist(tmp, bp)) {

- spin_unlock(&task_bps_lock);

- * If same task has breakpoint from alternate infrastructure,

- * return true. Otherwise return false.

-static bool same_task_bps_check(struct perf_event *bp)

- struct breakpoint *tmp;

- spin_lock(&task_bps_lock);

- list_for_each_entry(tmp, &task_bps, list) {

- if (tmp->bp->hw.target == bp->hw.target &&

- !can_co_exist(tmp, bp)) {

- spin_unlock(&task_bps_lock);

-static int cpu_bps_add(struct perf_event *bp)

- struct breakpoint **cpu_bp;

- struct breakpoint *tmp;

- tmp = alloc_breakpoint(bp);

- return PTR_ERR(tmp);

- spin_lock(&cpu_bps_lock);

- cpu_bp = per_cpu_ptr(cpu_bps, bp->cpu);

- for (i = 0; i < nr_wp_slots(); i++) {

- spin_unlock(&cpu_bps_lock);

-static void cpu_bps_remove(struct perf_event *bp)

- struct breakpoint **cpu_bp;

- spin_lock(&cpu_bps_lock);

- cpu_bp = per_cpu_ptr(cpu_bps, bp->cpu);

- for (i = 0; i < nr_wp_slots(); i++) {

- if (cpu_bp[i]->bp == bp) {

- spin_unlock(&cpu_bps_lock);

-static bool cpu_bps_check(int cpu, struct perf_event *bp)

- struct breakpoint **cpu_bp;

- spin_lock(&cpu_bps_lock);

- cpu_bp = per_cpu_ptr(cpu_bps, cpu);

- for (i = 0; i < nr_wp_slots(); i++) {

- if (cpu_bp[i] && !can_co_exist(cpu_bp[i], bp)) {

- spin_unlock(&cpu_bps_lock);

-static bool all_cpu_bps_check(struct perf_event *bp)

- for_each_online_cpu(cpu) {

- if (cpu_bps_check(cpu, bp))

-int arch_reserve_bp_slot(struct perf_event *bp)

- /* ptrace breakpoint */

- if (is_ptrace_bp(bp)) {

- if (all_cpu_bps_check(bp))

- if (same_task_bps_check(bp))

- return task_bps_add(bp);

- /* perf breakpoint */

- if (is_kernel_addr(bp->attr.bp_addr))

- if (bp->hw.target && bp->cpu == -1) {

- if (same_task_bps_check(bp))

- return task_bps_add(bp);

- } else if (!bp->hw.target && bp->cpu != -1) {

- if (all_task_bps_check(bp))

- return cpu_bps_add(bp);

- if (same_task_bps_check(bp))

- ret = cpu_bps_add(bp);

- ret = task_bps_add(bp);

- cpu_bps_remove(bp);

-void arch_release_bp_slot(struct perf_event *bp)

- if (!is_kernel_addr(bp->attr.bp_addr)) {

- if (bp->hw.target)

- task_bps_remove(bp);

- if (bp->cpu != -1)

- cpu_bps_remove(bp);

- * Perform cleanup of arch-specific counters during unregistration

- * of the perf-event

-void arch_unregister_hw_breakpoint(struct perf_event *bp)

- * If the breakpoint is unregistered between a hw_breakpoint_handler()

- * and the single_step_dabr_instruction(), then cleanup the breakpoint

- * restoration variables to prevent dangling pointers.

- * FIXME, this should not be using bp->ctx at all! Sayeth peterz.

- if (bp->ctx && bp->ctx->task && bp->ctx->task != ((void *)-1L)) {

- for (i = 0; i < nr_wp_slots(); i++) {

- if (bp->ctx->task->thread.last_hit_ubp[i] == bp)

- bp->ctx->task->thread.last_hit_ubp[i] = NULL;

- if (unlikely(tsk->thread.last_hit_ubp[i]))

- tsk->thread.last_hit_ubp[i] = NULL;

-static void handler_error(struct perf_event *bp, struct arch_hw_breakpoint *info)

-static void larx_stcx_err(struct perf_event *bp, struct arch_hw_breakpoint *info)

- struct arch_hw_breakpoint **info, int *hit,

- current->thread.last_hit_ubp[i] = bp[i];

- handler_error(bp[i], info[i]);

-static void handle_p10dd1_spurious_exception(struct arch_hw_breakpoint **info,

- hw_end_addr = ALIGN(info[i]->address + info[i]->len, HW_BREAKPOINT_SIZE);

- info[i]->type |= HW_BRK_TYPE_EXTRANEOUS_IRQ;

- struct arch_hw_breakpoint *info[HBP_NUM_MAX] = { NULL };

- info[i] = counter_arch_bp(bp[i]);

- info[i]->type &= ~HW_BRK_TYPE_EXTRANEOUS_IRQ;

- if (wp_check_constraints(regs, instr, ea, type, size, info[i])) {

- handler_error(bp[i], info[i]);

- handle_p10dd1_spurious_exception(info, hit, ea);

- larx_stcx_err(bp[i], info[i]);

- if (!stepping_handler(regs, bp, info, hit, instr))

- if (!(info[i]->type & HW_BRK_TYPE_EXTRANEOUS_IRQ))

- __set_breakpoint(i, info[i]);

- struct perf_event *bp = NULL;

- struct arch_hw_breakpoint *info;

- for (i = 0; i < nr_wp_slots(); i++) {

- bp = current->thread.last_hit_ubp[i];

- current->thread.last_hit_ubp[i] = NULL;

- return NOTIFY_DONE;

- for (i = 0; i < nr_wp_slots(); i++) {

- bp = __this_cpu_read(bp_per_reg[i]);

- info = counter_arch_bp(bp);

- __set_breakpoint(i, info);

- if (test_thread_flag(TIF_SINGLESTEP))

- "appraise func=KEXEC_KERNEL_CHECK appraise_flag=check_blacklist appraise_type=imasig|modsig",

- "appraise func=MODULE_CHECK appraise_flag=check_blacklist appraise_type=imasig|modsig",

- "appraise func=KEXEC_KERNEL_CHECK appraise_flag=check_blacklist appraise_type=imasig|modsig",

- "appraise func=MODULE_CHECK appraise_flag=check_blacklist appraise_type=imasig|modsig",

-static struct notifier_block fail_iommu_bus_notifier = {

- bus_register_notifier(&pci_bus_type, &fail_iommu_bus_notifier);

- bus_register_notifier(&vio_bus_type, &fail_iommu_bus_notifier);

-#include <linux/of_device.h>

-#include <asm/export.h>

-#ifdef CONFIG_MPROFILE_KERNEL

-#include <linux/of.h>

-#include <linux/of_device.h>

-#include <linux/of_platform.h>

- phb = zalloc_maybe_bootmem(sizeof(struct pci_controller), GFP_KERNEL);

-#ifdef CONFIG_PPC64

-int gpr32_set_common(struct task_struct *target,

- const struct user_regset *regset,

- unsigned int pos, unsigned int count,

- const void *kbuf, const void __user *ubuf,

- unsigned long *regs)

- if (!kbuf && !user_read_access_begin(u, count))

- for (; count > 0 && pos < PT_MSR; --count)

- regs[pos++] = *k++;

- for (; count > 0 && pos < PT_MSR; --count) {

- unsafe_get_user(reg, u++, Efault);

- regs[pos++] = reg;

- unsafe_get_user(reg, u++, Efault);

- for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)

- regs[pos++] = *k++;

- for (; count > 0 && pos < PT_TRAP; --count, ++pos)

- for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {

- unsafe_get_user(reg, u++, Efault);

- regs[pos++] = reg;

- for (; count > 0 && pos < PT_TRAP; --count, ++pos)

- unsafe_get_user(reg, u++, Efault);

- user_read_access_end();

-static int rtas_error_rc(int rtas_rc)

- case -1: /* Hardware Error */

- case -3: /* Bad indicator/domain/etc */

- case -9000: /* Isolation error */

- case -9001: /* Outstanding TCE/PTE */

- case -9002: /* No usable slot */

- pr_err("%s: unexpected error %d\n", __func__, rtas_rc);

- status = rtas_call(token, 1, 1, NULL, __pa(rtas_os_term_buf));

-#include <linux/of_irq.h>

-#include <linux/of_platform.h>

-void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)

- nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_backtrace_ipi);

- if (mmu_has_feature(MMU_FTR_BOOK3S_KUAP)) {

-#include <asm/export.h>

-obj32-$(CONFIG_FUNCTION_TRACER) += ftrace_mprofile.o

-obj64-$(CONFIG_FUNCTION_TRACER) += ftrace_mprofile.o

-obj64-$(CONFIG_FUNCTION_TRACER) += ftrace_64_pg.o

-obj-$(CONFIG_FUNCTION_TRACER) += ftrace_low.o ftrace.o

- * We generally only have a single long_branch tramp and at most 2 or 3 plt

- * tramps generated. But, we don't use the plt tramps currently. We also allot

- * 2 tramps after .text and .init.text. So, we only end up with around 3 usable

- * tramps in total. Set aside 8 just to be sure.

-#define NUM_FTRACE_TRAMPS 8

-ftrace_call_replace(unsigned long ip, unsigned long addr, int link)

- addr = ppc_function_entry((void *)addr);

- /* if (link) set op to 'bl' else 'b' */

-ftrace_modify_code(unsigned long ip, ppc_inst_t old, ppc_inst_t new)

- ppc_inst_t replaced;

- * We are paranoid about modifying text, as if a bug was to happen, it

- * could cause us to read or write to someplace that could cause harm.

- * Carefully read and modify the code with probe_kernel_*(), and make

- * sure what we read is what we expected it to be before modifying it.

- /* read the text we want to modify */

- if (copy_inst_from_kernel_nofault(&replaced, (void *)ip))

- /* Make sure it is what we expect it to be */

- if (!ppc_inst_equal(replaced, old)) {

- pr_err("%p: replaced (%08lx) != old (%08lx)", (void *)ip,

- ppc_inst_as_ulong(replaced), ppc_inst_as_ulong(old));

- /* replace the text with the new text */

- return patch_instruction((u32 *)ip, new);

- * Helper functions that are the same for both PPC64 and PPC32.

-static int test_24bit_addr(unsigned long ip, unsigned long addr)

- addr = ppc_function_entry((void *)addr);

- return is_offset_in_branch_range(addr - ip);

-static int is_bl_op(ppc_inst_t op)

- return (ppc_inst_val(op) & ~PPC_LI_MASK) == PPC_RAW_BL(0);

-static int is_b_op(ppc_inst_t op)

- return (ppc_inst_val(op) & ~PPC_LI_MASK) == PPC_RAW_BRANCH(0);

-static unsigned long find_bl_target(unsigned long ip, ppc_inst_t op)

- offset = PPC_LI(ppc_inst_val(op));

- /* make it signed */

- if (offset & 0x02000000)

- offset |= 0xfe000000;

- return ip + (long)offset;

-#ifdef CONFIG_MODULES

-__ftrace_make_nop(struct module *mod,

- struct dyn_ftrace *rec, unsigned long addr)

- unsigned long entry, ptr, tramp;

- unsigned long ip = rec->ip;

- ppc_inst_t op, pop;

- /* read where this goes */

- if (copy_inst_from_kernel_nofault(&op, (void *)ip)) {

- pr_err("Fetching opcode failed.\n");

- /* Make sure that this is still a 24bit jump */

- if (!is_bl_op(op)) {

- pr_err("Not expected bl: opcode is %08lx\n", ppc_inst_as_ulong(op));

- /* lets find where the pointer goes */

- tramp = find_bl_target(ip, op);

- pr_devel("ip:%lx jumps to %lx", ip, tramp);

- if (module_trampoline_target(mod, tramp, &ptr)) {

- pr_err("Failed to get trampoline target\n");

- pr_devel("trampoline target %lx", ptr);

- entry = ppc_global_function_entry((void *)addr);

- /* This should match what was called */

- if (ptr != entry) {

- pr_err("addr %lx does not match expected %lx\n", ptr, entry);

- if (IS_ENABLED(CONFIG_MPROFILE_KERNEL)) {

- if (copy_inst_from_kernel_nofault(&op, (void *)(ip - 4))) {

- pr_err("Fetching instruction at %lx failed.\n", ip - 4);

- /* We expect either a mflr r0, or a std r0, LRSAVE(r1) */

- if (!ppc_inst_equal(op, ppc_inst(PPC_RAW_MFLR(_R0))) &&

- !ppc_inst_equal(op, ppc_inst(PPC_INST_STD_LR))) {

- pr_err("Unexpected instruction %08lx around bl _mcount\n",

- ppc_inst_as_ulong(op));

- } else if (IS_ENABLED(CONFIG_PPC64)) {

- * Check what is in the next instruction. We can see ld r2,40(r1), but

- * on first pass after boot we will see mflr r0.

- if (copy_inst_from_kernel_nofault(&op, (void *)(ip + 4))) {

- pr_err("Fetching op failed.\n");

- if (!ppc_inst_equal(op, ppc_inst(PPC_INST_LD_TOC))) {

- pr_err("Expected %08lx found %08lx\n", PPC_INST_LD_TOC,

- ppc_inst_as_ulong(op));

- * When using -mprofile-kernel or PPC32 there is no load to jump over.

- * Otherwise our original call site looks like:

- * Milton Miller pointed out that we can not simply nop the branch.

- * If a task was preempted when calling a trace function, the nops

- * will remove the way to restore the TOC in r2 and the r2 TOC will

- * Use a b +8 to jump over the load.

- * XXX: could make PCREL depend on MPROFILE_KERNEL

- * XXX: check PCREL && MPROFILE_KERNEL calling sequence

- if (IS_ENABLED(CONFIG_MPROFILE_KERNEL) || IS_ENABLED(CONFIG_PPC32))

- pop = ppc_inst(PPC_RAW_NOP());

- pop = ppc_inst(PPC_RAW_BRANCH(8)); /* b +8 */

- if (patch_instruction((u32 *)ip, pop)) {

- pr_err("Patching NOP failed.\n");

-static int __ftrace_make_nop(struct module *mod, struct dyn_ftrace *rec, unsigned long addr)

-#endif /* CONFIG_MODULES */

- * We have the compiler generated long_branch tramps at the end

- * and we prefer those

- for (i = NUM_FTRACE_TRAMPS - 1; i >= 0; i--)

-static int add_ftrace_tramp(unsigned long tramp)

- for (i = 0; i < NUM_FTRACE_TRAMPS; i++)

- if (!ftrace_tramps[i]) {

- ftrace_tramps[i] = tramp;

- * If this is a compiler generated long_branch trampoline (essentially, a

- * trampoline that has a branch to _mcount()), we re-write the branch to

- * instead go to ftrace_[regs_]caller() and note down the location of this

-static int setup_mcount_compiler_tramp(unsigned long tramp)

- unsigned long ptr;

- /* Is this a known long jump tramp? */

- for (i = 0; i < NUM_FTRACE_TRAMPS; i++)

- if (ftrace_tramps[i] == tramp)

- /* New trampoline -- read where this goes */

- if (copy_inst_from_kernel_nofault(&op, (void *)tramp)) {

- pr_debug("Fetching opcode failed.\n");

- /* Is this a 24 bit branch? */

- if (!is_b_op(op)) {

- pr_debug("Trampoline is not a long branch tramp.\n");

- /* lets find where the pointer goes */

- ptr = find_bl_target(tramp, op);

- if (ptr != ppc_global_function_entry((void *)_mcount)) {

- pr_debug("Trampoline target %p is not _mcount\n", (void *)ptr);

- /* Let's re-write the tramp to go to ftrace_[regs_]caller */

- if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_REGS))

- ptr = ppc_global_function_entry((void *)ftrace_regs_caller);

- ptr = ppc_global_function_entry((void *)ftrace_caller);

- if (patch_branch((u32 *)tramp, ptr, 0)) {

- pr_debug("REL24 out of range!\n");

- if (add_ftrace_tramp(tramp)) {

- pr_debug("No tramp locations left\n");

-static int __ftrace_make_nop_kernel(struct dyn_ftrace *rec, unsigned long addr)

- unsigned long tramp, ip = rec->ip;

- /* Read where this goes */

- if (copy_inst_from_kernel_nofault(&op, (void *)ip)) {

- pr_err("Fetching opcode failed.\n");

- /* Make sure that this is still a 24bit jump */

- if (!is_bl_op(op)) {

- pr_err("Not expected bl: opcode is %08lx\n", ppc_inst_as_ulong(op));

- /* Let's find where the pointer goes */

- tramp = find_bl_target(ip, op);

- pr_devel("ip:%lx jumps to %lx", ip, tramp);

- if (setup_mcount_compiler_tramp(tramp)) {

- /* Are other trampolines reachable? */

- if (!find_ftrace_tramp(ip)) {

- pr_err("No ftrace trampolines reachable from %ps\n",

- if (patch_instruction((u32 *)ip, ppc_inst(PPC_RAW_NOP()))) {

- pr_err("Patching NOP failed.\n");

-int ftrace_make_nop(struct module *mod,

- struct dyn_ftrace *rec, unsigned long addr)

- unsigned long ip = rec->ip;

- * If the calling address is more that 24 bits away,

- * then we had to use a trampoline to make the call.

- * Otherwise just update the call site.

- if (test_24bit_addr(ip, addr)) {

- /* within range */

- old = ftrace_call_replace(ip, addr, 1);

- new = ppc_inst(PPC_RAW_NOP());

- return ftrace_modify_code(ip, old, new);

- } else if (core_kernel_text(ip)) {

- return __ftrace_make_nop_kernel(rec, addr);

- } else if (!IS_ENABLED(CONFIG_MODULES)) {

- * Out of range jumps are called from modules.

- * We should either already have a pointer to the module

- * or it has been passed in.

- if (!rec->arch.mod) {

- pr_err("No module loaded addr=%lx\n", addr);

- rec->arch.mod = mod;

- if (mod != rec->arch.mod) {

- pr_err("Record mod %p not equal to passed in mod %p\n",

- rec->arch.mod, mod);

- /* nothing to do if mod == rec->arch.mod */

- mod = rec->arch.mod;

- return __ftrace_make_nop(mod, rec, addr);

-#ifdef CONFIG_MODULES

- * Examine the existing instructions for __ftrace_make_call.

- * They should effectively be a NOP, and follow formal constraints,

- * depending on the ABI. Return false if they don't.

-static bool expected_nop_sequence(void *ip, ppc_inst_t op0, ppc_inst_t op1)

- if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_REGS))

- return ppc_inst_equal(op0, ppc_inst(PPC_RAW_NOP()));

- return ppc_inst_equal(op0, ppc_inst(PPC_RAW_BRANCH(8))) &&

- ppc_inst_equal(op1, ppc_inst(PPC_INST_LD_TOC));

-__ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)

- void *ip = (void *)rec->ip;

- unsigned long entry, ptr, tramp;

- struct module *mod = rec->arch.mod;

- /* read where this goes */

- if (copy_inst_from_kernel_nofault(op, ip))

- if (!IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_REGS) &&

- copy_inst_from_kernel_nofault(op + 1, ip + 4))

- if (!expected_nop_sequence(ip, op[0], op[1])) {

- pr_err("Unexpected call sequence at %p: %08lx %08lx\n", ip,

- ppc_inst_as_ulong(op[0]), ppc_inst_as_ulong(op[1]));

- /* If we never set up ftrace trampoline(s), then bail */

- if (!mod->arch.tramp ||

- (IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_REGS) && !mod->arch.tramp_regs)) {

- pr_err("No ftrace trampoline\n");

- if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_REGS) && rec->flags & FTRACE_FL_REGS)

- tramp = mod->arch.tramp_regs;

- tramp = mod->arch.tramp;

- if (module_trampoline_target(mod, tramp, &ptr)) {

- pr_err("Failed to get trampoline target\n");

- pr_devel("trampoline target %lx", ptr);

- entry = ppc_global_function_entry((void *)addr);

- /* This should match what was called */

- if (ptr != entry) {

- pr_err("addr %lx does not match expected %lx\n", ptr, entry);

- if (patch_branch(ip, tramp, BRANCH_SET_LINK)) {

- pr_err("REL24 out of range!\n");

-static int __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)

-#endif /* CONFIG_MODULES */

-static int __ftrace_make_call_kernel(struct dyn_ftrace *rec, unsigned long addr)

- void *ip = (void *)rec->ip;

- unsigned long tramp, entry, ptr;

- /* Make sure we're being asked to patch branch to a known ftrace addr */

- entry = ppc_global_function_entry((void *)ftrace_caller);

- ptr = ppc_global_function_entry((void *)addr);

- if (ptr != entry && IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_REGS))

- entry = ppc_global_function_entry((void *)ftrace_regs_caller);

- if (ptr != entry) {

- pr_err("Unknown ftrace addr to patch: %ps\n", (void *)ptr);

- /* Make sure we have a nop */

- if (copy_inst_from_kernel_nofault(&op, ip)) {

- pr_err("Unable to read ftrace location %p\n", ip);

- if (!ppc_inst_equal(op, ppc_inst(PPC_RAW_NOP()))) {

- pr_err("Unexpected call sequence at %p: %08lx\n",

- ip, ppc_inst_as_ulong(op));

- tramp = find_ftrace_tramp((unsigned long)ip);

- pr_err("No ftrace trampolines reachable from %ps\n", ip);

- if (patch_branch(ip, tramp, BRANCH_SET_LINK)) {

- pr_err("Error patching branch to ftrace tramp!\n");

-int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)

- unsigned long ip = rec->ip;

- * If the calling address is more that 24 bits away,

- * then we had to use a trampoline to make the call.

- * Otherwise just update the call site.

- if (test_24bit_addr(ip, addr)) {

- /* within range */

- old = ppc_inst(PPC_RAW_NOP());

- new = ftrace_call_replace(ip, addr, 1);

- return ftrace_modify_code(ip, old, new);

- } else if (core_kernel_text(ip)) {

- return __ftrace_make_call_kernel(rec, addr);

- } else if (!IS_ENABLED(CONFIG_MODULES)) {

- /* We should not get here without modules */

- * Out of range jumps are called from modules.

- * Being that we are converting from nop, it had better

- * already have a module defined.

- if (!rec->arch.mod) {

- pr_err("No module loaded\n");

- return __ftrace_make_call(rec, addr);

-#ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS

-#ifdef CONFIG_MODULES

-__ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_addr,

- unsigned long addr)

- unsigned long ip = rec->ip;

- unsigned long entry, ptr, tramp;

- struct module *mod = rec->arch.mod;

- /* If we never set up ftrace trampolines, then bail */

- if (!mod->arch.tramp || !mod->arch.tramp_regs) {

- pr_err("No ftrace trampoline\n");

- /* read where this goes */

- if (copy_inst_from_kernel_nofault(&op, (void *)ip)) {

- pr_err("Fetching opcode failed.\n");

- /* Make sure that this is still a 24bit jump */

- if (!is_bl_op(op)) {

- pr_err("Not expected bl: opcode is %08lx\n", ppc_inst_as_ulong(op));

- /* lets find where the pointer goes */

- tramp = find_bl_target(ip, op);

- entry = ppc_global_function_entry((void *)old_addr);

- pr_devel("ip:%lx jumps to %lx", ip, tramp);

- if (tramp != entry) {

- /* old_addr is not within range, so we must have used a trampoline */

- if (module_trampoline_target(mod, tramp, &ptr)) {

- pr_err("Failed to get trampoline target\n");

- pr_devel("trampoline target %lx", ptr);

- /* This should match what was called */

- if (ptr != entry) {

- pr_err("addr %lx does not match expected %lx\n", ptr, entry);

- /* The new target may be within range */

- if (test_24bit_addr(ip, addr)) {

- /* within range */

- if (patch_branch((u32 *)ip, addr, BRANCH_SET_LINK)) {

- pr_err("REL24 out of range!\n");

- if (rec->flags & FTRACE_FL_REGS)

- tramp = mod->arch.tramp_regs;

- tramp = mod->arch.tramp;

- if (module_trampoline_target(mod, tramp, &ptr)) {

- pr_err("Failed to get trampoline target\n");

- pr_devel("trampoline target %lx", ptr);

- entry = ppc_global_function_entry((void *)addr);

- /* This should match what was called */

- if (ptr != entry) {

- pr_err("addr %lx does not match expected %lx\n", ptr, entry);

- if (patch_branch((u32 *)ip, tramp, BRANCH_SET_LINK)) {

- pr_err("REL24 out of range!\n");

-static int __ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_addr, unsigned long addr)

-int ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_addr,

- unsigned long addr)

- unsigned long ip = rec->ip;

- ppc_inst_t old, new;

- * If the calling address is more that 24 bits away,

- * then we had to use a trampoline to make the call.

- * Otherwise just update the call site.

- if (test_24bit_addr(ip, addr) && test_24bit_addr(ip, old_addr)) {

- /* within range */

- old = ftrace_call_replace(ip, old_addr, 1);

- new = ftrace_call_replace(ip, addr, 1);

- return ftrace_modify_code(ip, old, new);

- } else if (core_kernel_text(ip)) {

- * We always patch out of range locations to go to the regs

- * variant, so there is nothing to do here

- } else if (!IS_ENABLED(CONFIG_MODULES)) {

- /* We should not get here without modules */

- * Out of range jumps are called from modules.

- if (!rec->arch.mod) {

- pr_err("No module loaded\n");

- return __ftrace_modify_call(rec, old_addr, addr);

- new = ftrace_call_replace(ip, (unsigned long)func, 1);

-#ifdef CONFIG_PPC64

-#define PACATOC offsetof(struct paca_struct, kernel_toc)

-extern unsigned int ftrace_tramp_text[], ftrace_tramp_init[];

-int __init ftrace_dyn_arch_init(void)

-#ifdef CONFIG_PPC_KERNEL_PCREL

- u32 stub_insns[] = {

- PPC_RAW_LD(_R12, _R13, PACATOC),

- unsigned long addr;

- if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_REGS))

- addr = ppc_global_function_entry((void *)ftrace_regs_caller);

- addr = ppc_global_function_entry((void *)ftrace_caller);

- if (reladdr >= (long)SZ_2G || reladdr < -(long)SZ_2G) {

-extern void ftrace_graph_call(void);

-extern void ftrace_graph_stub(void);

-static int ftrace_modify_ftrace_graph_caller(bool enable)

- unsigned long ip = (unsigned long)(&ftrace_graph_call);

- unsigned long addr = (unsigned long)(&ftrace_graph_caller);

- unsigned long stub = (unsigned long)(&ftrace_graph_stub);

- ppc_inst_t old, new;

- if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_ARGS))

- old = ftrace_call_replace(ip, enable ? stub : addr, 0);

- new = ftrace_call_replace(ip, enable ? addr : stub, 0);

- return ftrace_modify_code(ip, old, new);

-int ftrace_enable_ftrace_graph_caller(void)

- return ftrace_modify_ftrace_graph_caller(true);

-int ftrace_disable_ftrace_graph_caller(void)

- return ftrace_modify_ftrace_graph_caller(false);

- * Hook the return address and push it in the stack of return addrs

- * in current thread info. Return the address we want to divert to.

-static unsigned long

-__prepare_ftrace_return(unsigned long parent, unsigned long ip, unsigned long sp)

- unsigned long return_hooker;

- bit = ftrace_test_recursion_trylock(ip, parent);

- return_hooker = ppc_function_entry(return_to_handler);

- if (!function_graph_enter(parent, ip, 0, (unsigned long *)sp))

- parent = return_hooker;

-#ifdef CONFIG_DYNAMIC_FTRACE_WITH_ARGS

-void ftrace_graph_func(unsigned long ip, unsigned long parent_ip,

- struct ftrace_ops *op, struct ftrace_regs *fregs)

- fregs->regs.link = __prepare_ftrace_return(parent_ip, ip, fregs->regs.gpr[1]);

-unsigned long prepare_ftrace_return(unsigned long parent, unsigned long ip,

- return __prepare_ftrace_return(parent, ip, sp);

-#ifdef CONFIG_PPC64_ELF_ABI_V1

-char *arch_ftrace_match_adjust(char *str, const char *search)

- if (str[0] == '.' && search[0] != '.')

-#endif /* CONFIG_PPC64_ELF_ABI_V1 */

-/* SPDX-License-Identifier: GPL-2.0-or-later */

- * Split from ftrace_64.S

-#include <linux/magic.h>

-#include <asm/ppc_asm.h>

-#include <asm/asm-offsets.h>

-#include <asm/ftrace.h>

-#include <asm/ppc-opcode.h>

-#include <asm/export.h>

-_GLOBAL_TOC(ftrace_caller)

- lbz r3, PACA_FTRACE_ENABLED(r13)

- /* Taken from output of objdump from lib64/glibc */

- subi r3, r3, MCOUNT_INSN_SIZE

-#ifdef CONFIG_FUNCTION_GRAPH_TRACER

-.globl ftrace_graph_call

- b ftrace_graph_stub

-_GLOBAL(ftrace_graph_stub)

-_GLOBAL(ftrace_stub)

-#ifdef CONFIG_FUNCTION_GRAPH_TRACER

-_GLOBAL(ftrace_graph_caller)

- /* load r4 with local address */

- subi r4, r4, MCOUNT_INSN_SIZE

- /* Grab the LR out of the caller stack frame */

- bl prepare_ftrace_return

- * prepare_ftrace_return gives us the address we divert to.

- * Change the LR in the callers stack frame to this.

-#endif /* CONFIG_FUNCTION_GRAPH_TRACER */

- * Split from entry_64.S

-#include <asm/export.h>

-#ifdef CONFIG_PPC64

-#include <asm/export.h>

-static void emulate_single_step(struct pt_regs *regs)

- * Default handler for a Watchdog exception,

- * spins until a reboot occurs

-void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs)

- /* Generic WatchdogHandler, implement your own */

- mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE));

- WatchdogHandler(regs);

-#include <asm/export.h>

-#ifdef CONFIG_PPC64

- trigger_allbutself_cpu_backtrace();

-#include <linux/of_device.h>

- * get_cpu_node_size - Compute the size of a CPU node in the FDT.

- * This should be done only once and the value is stored in

- * a static variable.

-#define DIRECT64_PROPNAME "linux,direct64-ddr-window-info"

-#define DMA64_PROPNAME "linux,dma64-ddr-window-info"

-#undef DMA64_PROPNAME

-#undef DIRECT64_PROPNAME

-#include <linux/of_device.h>

-#include <asm/export.h>

- kvm_free_hpt_cma(virt_to_page(info->virt),

-#include <asm/export.h>

- asm volatile("tlbilxlpid");

-#include <asm/export.h>

-obj-y += alloc.o code-patching.o feature-fixups.o pmem.o

-// SPDX-License-Identifier: GPL-2.0

-#include <linux/types.h>

-#include <linux/init.h>

-#include <linux/slab.h>

-#include <linux/memblock.h>

-#include <linux/string.h>

-#include <asm/setup.h>

-void * __ref zalloc_maybe_bootmem(size_t size, gfp_t mask)

- if (slab_is_available())

- p = kzalloc(size, mask);

- p = memblock_alloc(size, SMP_CACHE_BYTES);

- panic("%s: Failed to allocate %zu bytes\n", __func__,

-#include <asm/export.h>

-static int patch_feature_section(unsigned long value, struct fixup_entry *fcur)

- if ((value & fcur->mask) == fcur->value)

-void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)

- if (patch_feature_section(value, fcur)) {

-#include <asm/export.h>

-static nokprobe_inline int __copy_mem_out(u8 *dest, unsigned long ea, int nb, struct pt_regs *regs)

-static int __emulate_dcbz(unsigned long ea)

-#include <asm/export.h>

-struct static_key_false disable_kuap_key;

-EXPORT_SYMBOL(disable_kuap_key);

-void kuap_lock_all_ool(void)

-EXPORT_SYMBOL(kuap_lock_all_ool);

-void kuap_unlock_all_ool(void)

- kuap_unlock_all();

-EXPORT_SYMBOL(kuap_unlock_all_ool);

- kuap_lock_all_ool();

- static_branch_enable(&disable_kuap_key);

- if (!kuep_is_disabled())

- trace_hugepage_update(addr, old, clr, set);

- struct page *page;

- page = pte_page(pte);

- if (!test_bit(PG_dcache_clean, &page->flags) && !PageReserved(page)) {

- flush_dcache_icache_page(page);

- set_bit(PG_dcache_clean, &page->flags);

- struct page *page;

- page = virt_to_page(pmd_frag);

- if (atomic_sub_and_test(PMD_FRAG_NR - count, &page->pt_frag_refcount)) {

- pgtable_pmd_page_dtor(page);

- __free_page(page);

- struct page *page;

- page = alloc_page(gfp);

- if (!pgtable_pmd_page_ctor(page)) {

- __free_pages(page, 0);

- atomic_set(&page->pt_frag_refcount, 1);

- ret = page_address(page);

- * If we find pgtable_page set, we return

- atomic_set(&page->pt_frag_refcount, PMD_FRAG_NR);

- struct page *page = virt_to_page(pmd);

- if (PageReserved(page))

- return free_reserved_page(page);

- BUG_ON(atomic_read(&page->pt_frag_refcount) <= 0);

- if (atomic_dec_and_test(&page->pt_frag_refcount)) {

- pgtable_pmd_page_dtor(page);

- __free_page(page);

- cur_cpu_spec->mmu_features |= MMU_FTR_BOOK3S_KUAP;

-unsigned long radix_mem_block_size __ro_after_init;

- unsigned long max_mapping_size = radix_mem_block_size;

-#ifdef CONFIG_MEMORY_HOTPLUG

-static int __init probe_memory_block_size(unsigned long node, const char *uname, int

- depth, void *data)

- unsigned long *mem_block_size = (unsigned long *)data;

- const __be32 *prop;

- if (strcmp(uname, "ibm,dynamic-reconfiguration-memory"))

- prop = of_get_flat_dt_prop(node, "ibm,lmb-size", &len);

- if (!prop || len < dt_root_size_cells * sizeof(__be32))

- * Nothing in the device tree

- *mem_block_size = MIN_MEMORY_BLOCK_SIZE;

- *mem_block_size = of_read_number(prop, dt_root_size_cells);

-static unsigned long __init radix_memory_block_size(void)

- unsigned long mem_block_size = MIN_MEMORY_BLOCK_SIZE;

- * OPAL firmware feature is set by now. Hence we are ok

- * to test OPAL feature.

- if (firmware_has_feature(FW_FEATURE_OPAL))

- mem_block_size = 1UL * 1024 * 1024 * 1024;

- of_scan_flat_dt(probe_memory_block_size, &mem_block_size);

- return mem_block_size;

-#else /* CONFIG_MEMORY_HOTPLUG */

-static unsigned long __init radix_memory_block_size(void)

- return 1UL * 1024 * 1024 * 1024;

-#endif /* CONFIG_MEMORY_HOTPLUG */

- * Max mapping size used when mapping pages. We don't use

- * ppc_md.memory_block_size() here because this get called

- * early and we don't have machine probe called yet. Also

- * the pseries implementation only check for ibm,lmb-size.

- * All hypervisor supporting radix do expose that device

- radix_mem_block_size = radix_memory_block_size();

-#ifdef CONFIG_SPARSEMEM_VMEMMAP

- /* vmemmap mapping */

- if (mmu_psize_defs[MMU_PAGE_2M].shift) {

- * map vmemmap using 2M if available

- mmu_vmemmap_psize = MMU_PAGE_2M;

- mmu_vmemmap_psize = mmu_virtual_psize;

-static void remove_pte_table(pte_t *pte_start, unsigned long addr,

- unsigned long end, bool direct)

- if (!PAGE_ALIGNED(addr) || !PAGE_ALIGNED(next)) {

- * The vmemmap_free() and remove_section_mapping()

- * codepaths call us with aligned addresses.

- WARN_ONCE(1, "%s: unaligned range\n", __func__);

- pte_clear(&init_mm, addr, pte);

- unsigned long end, bool direct)

- if (!IS_ALIGNED(addr, PMD_SIZE) ||

- !IS_ALIGNED(next, PMD_SIZE)) {

- WARN_ONCE(1, "%s: unaligned range\n", __func__);

- pte_clear(&init_mm, addr, (pte_t *)pmd);

- remove_pte_table(pte_base, addr, next, direct);

- unsigned long end, bool direct)

- remove_pmd_table(pmd_base, addr, next, direct);

-static void __meminit remove_pagetable(unsigned long start, unsigned long end,

- remove_pud_table(pud_base, addr, next, direct);

- remove_pagetable(start, end, true);

- remove_pagetable(start, start + page_size, false);

- trace_hugepage_update(addr, old, clr, set);

-static __always_inline void __tlbie_pid_lpid(unsigned long pid,

- unsigned long lpid,

- unsigned long ric)

- unsigned long rb, rs, prs, r;

- rb = PPC_BIT(53); /* IS = 1 */

- rs = (pid << PPC_BITLSHIFT(31)) | (lpid & ~(PPC_BITMASK(0, 31)));

- prs = 1; /* process scoped */

- r = 1; /* radix format */

- asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1)

- : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory");

- trace_tlbie(0, 0, rb, rs, ric, prs, r);

-static __always_inline void __tlbie_va_lpid(unsigned long va, unsigned long pid,

- unsigned long lpid,

- unsigned long ap, unsigned long ric)

- unsigned long rb, rs, prs, r;

- rb = va & ~(PPC_BITMASK(52, 63));

- rb |= ap << PPC_BITLSHIFT(58);

- rs = (pid << PPC_BITLSHIFT(31)) | (lpid & ~(PPC_BITMASK(0, 31)));

- prs = 1; /* process scoped */

- r = 1; /* radix format */

- asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1)

- : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory");

- trace_tlbie(0, 0, rb, rs, ric, prs, r);

-static inline void fixup_tlbie_va_range_lpid(unsigned long va,

- unsigned long pid,

- unsigned long lpid,

- if (cpu_has_feature(CPU_FTR_P9_TLBIE_ERAT_BUG)) {

- asm volatile("ptesync" : : : "memory");

- __tlbie_pid_lpid(0, lpid, RIC_FLUSH_TLB);

- if (cpu_has_feature(CPU_FTR_P9_TLBIE_STQ_BUG)) {

- asm volatile("ptesync" : : : "memory");

- __tlbie_va_lpid(va, pid, lpid, ap, RIC_FLUSH_TLB);

-static inline void fixup_tlbie_pid_lpid(unsigned long pid, unsigned long lpid)

- * We can use any address for the invalidation, pick one which is

- * probably unused as an optimisation.

- unsigned long va = ((1UL << 52) - 1);

- if (cpu_has_feature(CPU_FTR_P9_TLBIE_ERAT_BUG)) {

- asm volatile("ptesync" : : : "memory");

- __tlbie_pid_lpid(0, lpid, RIC_FLUSH_TLB);

- if (cpu_has_feature(CPU_FTR_P9_TLBIE_STQ_BUG)) {

- asm volatile("ptesync" : : : "memory");

- __tlbie_va_lpid(va, pid, lpid, mmu_get_ap(MMU_PAGE_64K),

-static inline void _tlbie_pid_lpid(unsigned long pid, unsigned long lpid,

- unsigned long ric)

- asm volatile("ptesync" : : : "memory");

- * Workaround the fact that the "ric" argument to __tlbie_pid

- * must be a compile-time contraint to match the "i" constraint

- * in the asm statement.

- case RIC_FLUSH_TLB:

- __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_TLB);

- fixup_tlbie_pid_lpid(pid, lpid);

- case RIC_FLUSH_PWC:

- __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_PWC);

- case RIC_FLUSH_ALL:

- __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_ALL);

- fixup_tlbie_pid_lpid(pid, lpid);

- asm volatile("eieio; tlbsync; ptesync" : : : "memory");

-static inline void __tlbie_va_range_lpid(unsigned long start, unsigned long end,

- unsigned long pid, unsigned long lpid,

- unsigned long page_size,

- unsigned long psize)

- unsigned long addr;

- unsigned long ap = mmu_get_ap(psize);

- for (addr = start; addr < end; addr += page_size)

- __tlbie_va_lpid(addr, pid, lpid, ap, RIC_FLUSH_TLB);

- fixup_tlbie_va_range_lpid(addr - page_size, pid, lpid, ap);

-static inline void _tlbie_va_range_lpid(unsigned long start, unsigned long end,

- unsigned long pid, unsigned long lpid,

- unsigned long page_size,

- unsigned long psize, bool also_pwc)

- asm volatile("ptesync" : : : "memory");

- __tlbie_pid_lpid(pid, lpid, RIC_FLUSH_PWC);

- __tlbie_va_range_lpid(start, end, pid, lpid, page_size, psize);

- asm volatile("eieio; tlbsync; ptesync" : : : "memory");

- atomic_dec(&mm->context.active_cpus);

- __flush_all_mm(mm, true);

-static void flush_dcache_icache_hugepage(struct page *page)

- int nr = compound_nr(page);

- if (!PageHighMem(page)) {

- __flush_dcache_icache(lowmem_page_address(page + i));

- void *start = kmap_local_page(page + i);

-void flush_dcache_icache_page(struct page *page)

- if (flush_coherent_icache())

- if (PageCompound(page))

- return flush_dcache_icache_hugepage(page);

- if (!PageHighMem(page)) {

- __flush_dcache_icache(lowmem_page_address(page));

- } else if (IS_ENABLED(CONFIG_BOOKE) || sizeof(phys_addr_t) > sizeof(void *)) {

- void *start = kmap_local_page(page);

- __flush_dcache_icache(start);

- kunmap_local(start);

- flush_dcache_icache_phys(page_to_phys(page));

-EXPORT_SYMBOL(flush_dcache_icache_page);

-#ifdef CONFIG_PER_VMA_LOCK

- vma_end_read(vma);

-#endif /* CONFIG_PER_VMA_LOCK */

-#ifdef CONFIG_PER_VMA_LOCK

-static int __meminit vmemmap_populated(unsigned long vmemmap_addr, int vmemmap_map_size)

-static bool altmap_cross_boundary(struct vmem_altmap *altmap, unsigned long start,

- unsigned long page_size)

-int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,

- struct vmem_altmap *altmap)

-void __ref vmemmap_free(unsigned long start, unsigned long end,

- struct vmem_altmap *altmap)

-void __iomem *ioremap_prot(phys_addr_t addr, unsigned long size, unsigned long flags)

-void __iomem *do_ioremap(phys_addr_t pa, phys_addr_t offset, unsigned long size,

- pgprot_t prot, void *caller)

- struct vm_struct *area;

- area = __get_vm_area_caller(size, VM_IOREMAP, IOREMAP_START, IOREMAP_END, caller);

- area->phys_addr = pa;

- va = (unsigned long)area->addr;

- ret = ioremap_page_range(va, va + size, pa, prot);

- return (void __iomem *)area->addr + offset;

- vunmap_range(va, va + size);

- free_vm_area(area);

- * If the address lies within the first 16 MB, assume it's in ISA

- if (p < 16 * 1024 * 1024)

- p += _ISA_MEM_BASE;

- return do_ioremap(p, offset, size, prot, caller);

- if (addr > high_memory && (unsigned long)addr < ioremap_bot)

- vunmap((void *)(PAGE_MASK & (unsigned long)addr));

- return do_ioremap(paligned, offset, size, prot, caller);

- addr = (void *)((unsigned long __force)PCI_FIX_ADDR(token) & PAGE_MASK);

- if ((unsigned long)addr < ioremap_bot) {

- pr_warn("Attempt to iounmap early bolted mapping at 0x%p\n", addr);

- if (!cpumask_test_cpu(smp_processor_id(), mm_cpumask(next))) {

- cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));

-void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)

-#include <linux/jump_label.h>

-struct static_key_false disable_kuap_key;

-EXPORT_SYMBOL(disable_kuap_key);

- static_branch_enable(&disable_kuap_key);

- __prevent_user_access(KUAP_READ_WRITE);

-#ifdef CONFIG_PPC_47x

-void __init early_init_mmu_47x(void)

- unsigned long root = of_get_flat_dt_root();

- if (of_get_flat_dt_prop(root, "cooperative-partition", NULL))

- mmu_clear_feature(MMU_FTR_USE_TLBIVAX_BCAST);

-#endif /* CONFIG_SMP */

-#endif /* CONFIG_PPC_47x */

-#ifdef CONFIG_PPC_47x

- early_init_mmu_47x();

- struct page *page;

- page = virt_to_page(pte_frag);

- if (atomic_sub_and_test(PTE_FRAG_NR - count, &page->pt_frag_refcount)) {

- pgtable_pte_page_dtor(page);

- __free_page(page);

- struct page *page;

- page = alloc_page(PGALLOC_GFP | __GFP_ACCOUNT);

- if (!pgtable_pte_page_ctor(page)) {

- __free_page(page);

- page = alloc_page(PGALLOC_GFP);

- atomic_set(&page->pt_frag_refcount, 1);

- ret = page_address(page);

- * If we find pgtable_page set, we return

- atomic_set(&page->pt_frag_refcount, PTE_FRAG_NR);

-void pte_fragment_free(unsigned long *table, int kernel)

- struct page *page = virt_to_page(table);

- if (PageReserved(page))

- return free_reserved_page(page);

- BUG_ON(atomic_read(&page->pt_frag_refcount) <= 0);

- if (atomic_dec_and_test(&page->pt_frag_refcount)) {

- pgtable_pte_page_dtor(page);

- __free_page(page);

-static struct page *maybe_pte_to_page(pte_t pte)

- struct page *pg = maybe_pte_to_page(pte);

- if (!test_bit(PG_dcache_clean, &pg->flags)) {

- flush_dcache_icache_page(pg);

- set_bit(PG_dcache_clean, &pg->flags);

- pg = maybe_pte_to_page(pte);

- if (unlikely(!pg))

- if (test_bit(PG_dcache_clean, &pg->flags))

- flush_dcache_icache_page(pg);

- set_bit(PG_dcache_clean, &pg->flags);

- pg = maybe_pte_to_page(pte);

- if (unlikely(!pg))

- if (test_bit(PG_dcache_clean, &pg->flags))

- flush_dcache_icache_page(pg);

- set_bit(PG_dcache_clean, &pg->flags);

-void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,

- __set_pte_at(mm, addr, ptep, pte, 0);

- BUG_ON(!pmd_present(*pmd));

- assert_spin_locked(pte_lockptr(mm, pmd));

-void hw_perf_event_setup(int cpu)

-static DEFINE_PER_CPU(char, hv_gpci_reqb[HGPCI_REQ_BUFFER_SIZE]) __aligned(sizeof(uint64_t));

-static LIST_HEAD(dtm_shutdown_list);

-struct dtm_shutdown {

- struct list_head list;

- void (*func)(void *arg);

-int pika_dtm_register_shutdown(void (*func)(void *arg), void *arg)

- struct dtm_shutdown *shutdown;

- shutdown = kmalloc(sizeof(struct dtm_shutdown), GFP_KERNEL);

- if (shutdown == NULL)

- shutdown->func = func;

- shutdown->arg = arg;

- list_add(&shutdown->list, &dtm_shutdown_list);

-int pika_dtm_unregister_shutdown(void (*func)(void *arg), void *arg)

- struct dtm_shutdown *shutdown;

- list_for_each_entry(shutdown, &dtm_shutdown_list, list)

- if (shutdown->func == func && shutdown->arg == arg) {

- list_del(&shutdown->list);

- struct dtm_shutdown *shutdown;

- /* Run through the shutdown list. */

- list_for_each_entry(shutdown, &dtm_shutdown_list, list)

- shutdown->func(shutdown->arg);

-int pika_dtm_register_shutdown(void (*func)(void *arg), void *arg)

-int pika_dtm_unregister_shutdown(void (*func)(void *arg), void *arg)

-EXPORT_SYMBOL(pika_dtm_register_shutdown);

-EXPORT_SYMBOL(pika_dtm_unregister_shutdown);

-#include <linux/of_platform.h>

-const char *__init mpc512x_select_reset_compat(void);

-#include <linux/of_platform.h>

-static void __init mpc512x_restart_init(void)

- struct device_node *np;

- const char *reset_compat;

- reset_compat = mpc512x_select_reset_compat();

- np = of_find_compatible_node(NULL, NULL, reset_compat);

- reset_module_base = of_iomap(np, 0);

-const char *__init mpc512x_select_reset_compat(void)

-#include <linux/of_platform.h>

-#include <linux/device.h>

-#include <linux/of_platform.h>

- depends on PPC_BOOK3S_32

- The MPC8260 is a typical embedded CPU made by Freescale. Selecting

- this option means that you wish to build a kernel for a machine with

- an 8260 class CPU.

- The MPC8272 CPM has a different internal dpram setup than other CPM2

-#include <asm/mpc8260.h>

-static int ep8248e_mdio_remove(struct platform_device *ofdev)

- .remove = ep8248e_mdio_remove,

-#include <asm/mpc8260.h>

-/* SPDX-License-Identifier: GPL-2.0-or-later */

-#ifndef _PPC_KERNEL_M82XX_PCI_H

-#define _PPC_KERNEL_M82XX_PCI_H

-#define SIU_INT_IRQ1 ((uint)0x13 + CPM_IRQ_OFFSET)

-#define _IO_BASE isa_io_base

-#endif /* _PPC_KERNEL_M8260_PCI_H */

-static int pq2_pci_exclude_device(struct pci_controller *hose,

- u_char bus, u8 devfn)

- if (bus == 0 && PCI_SLOT(devfn) == 0)

- return PCIBIOS_DEVICE_NOT_FOUND;

- return PCIBIOS_SUCCESSFUL;

-static void __init pq2_pci_add_bridge(struct device_node *np)

- struct pci_controller *hose;

- struct resource r;

- if (of_address_to_resource(np, 0, &r) || r.end - r.start < 0x10b)

- pci_add_flags(PCI_REASSIGN_ALL_BUS);

- hose = pcibios_alloc_controller(np);

- setup_indirect_pci(hose, r.start + 0x100, r.start + 0x104, 0);

- pci_process_bridge_OF_ranges(hose, np, 1);

- printk(KERN_ERR "No valid PCI reg property in device tree\n");

-void __init pq2_init_pci(void)

- struct device_node *np;

- ppc_md.pci_exclude_device = pq2_pci_exclude_device;

- for_each_compatible_node(np, NULL, "fsl,pq2-pci")

- pq2_pci_add_bridge(np);

-obj-y := misc.o usb.o

-#include <linux/of_platform.h>

-#include <linux/of_device.h>

-#include <linux/of_platform.h>

-#include <linux/device.h>

-#include <asm/pci-bridge.h>

-#include <linux/of_platform.h>

-// SPDX-License-Identifier: GPL-2.0-or-later

- * Freescale 83xx USB SOC setup code

-#include <linux/stddef.h>

-#include <linux/kernel.h>

-#include <linux/errno.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <asm/io.h>

-#include <sysdev/fsl_soc.h>

-#include "mpc83xx.h"

-#ifdef CONFIG_PPC_MPC834x

-int __init mpc834x_usb_cfg(void)

- unsigned long sccr, sicrl, sicrh;

- void __iomem *immap;

- struct device_node *np = NULL;

- int port0_is_dr = 0, port1_is_dr = 0;

- const void *prop, *dr_mode;

- immap = ioremap(get_immrbase(), 0x1000);

- /* Read registers */

- /* Note: DR and MPH must use the same clock setting in SCCR */

- sccr = in_be32(immap + MPC83XX_SCCR_OFFS) & ~MPC83XX_SCCR_USB_MASK;

- sicrl = in_be32(immap + MPC83XX_SICRL_OFFS) & ~MPC834X_SICRL_USB_MASK;

- sicrh = in_be32(immap + MPC83XX_SICRH_OFFS) & ~MPC834X_SICRH_USB_UTMI;

- np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");

- sccr |= MPC83XX_SCCR_USB_DRCM_11; /* 1:3 */

- prop = of_get_property(np, "phy_type", NULL);

- if (prop && (!strcmp(prop, "utmi") ||

- !strcmp(prop, "utmi_wide"))) {

- sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1;

- sicrh |= MPC834X_SICRH_USB_UTMI;

- } else if (prop && !strcmp(prop, "serial")) {

- dr_mode = of_get_property(np, "dr_mode", NULL);

- if (dr_mode && !strcmp(dr_mode, "otg")) {

- sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1;

- sicrl |= MPC834X_SICRL_USB1;

- } else if (prop && !strcmp(prop, "ulpi")) {

- sicrl |= MPC834X_SICRL_USB1;

- printk(KERN_WARNING "834x USB PHY type not supported\n");

- np = of_find_compatible_node(NULL, NULL, "fsl-usb2-mph");

- sccr |= MPC83XX_SCCR_USB_MPHCM_11; /* 1:3 */

- prop = of_get_property(np, "port0", NULL);

- printk(KERN_WARNING

- "834x USB port0 can't be used by both DR and MPH!\n");

- sicrl &= ~MPC834X_SICRL_USB0;

- prop = of_get_property(np, "port1", NULL);

- printk(KERN_WARNING

- "834x USB port1 can't be used by both DR and MPH!\n");

- sicrl &= ~MPC834X_SICRL_USB1;

- out_be32(immap + MPC83XX_SCCR_OFFS, sccr);

- out_be32(immap + MPC83XX_SICRL_OFFS, sicrl);

- out_be32(immap + MPC83XX_SICRH_OFFS, sicrh);

-#endif /* CONFIG_PPC_MPC834x */

-#ifdef CONFIG_PPC_MPC831x

-int __init mpc831x_usb_cfg(void)

- void __iomem *immap, *usb_regs;

- struct device_node *np = NULL;

- struct device_node *immr_node = NULL;

- struct resource res;

-#ifdef CONFIG_USB_OTG

- const void *dr_mode;

- np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");

- prop = of_get_property(np, "phy_type", NULL);

- /* Map IMMR space for pin and clock settings */

- immap = ioremap(get_immrbase(), 0x1000);

- /* Configure clock */

- immr_node = of_get_parent(np);

- if (immr_node && (of_device_is_compatible(immr_node, "fsl,mpc8315-immr") ||

- of_device_is_compatible(immr_node, "fsl,mpc8308-immr")))

- clrsetbits_be32(immap + MPC83XX_SCCR_OFFS,

- MPC8315_SCCR_USB_MASK,

- MPC8315_SCCR_USB_DRCM_01);

- clrsetbits_be32(immap + MPC83XX_SCCR_OFFS,

- MPC83XX_SCCR_USB_MASK,

- MPC83XX_SCCR_USB_DRCM_11);

- /* Configure pin mux for ULPI. There is no pin mux for UTMI */

- if (prop && !strcmp(prop, "ulpi")) {

- if (of_device_is_compatible(immr_node, "fsl,mpc8308-immr")) {

- clrsetbits_be32(immap + MPC83XX_SICRH_OFFS,

- MPC8308_SICRH_USB_MASK,

- MPC8308_SICRH_USB_ULPI);

- } else if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr")) {

- clrsetbits_be32(immap + MPC83XX_SICRL_OFFS,

- MPC8315_SICRL_USB_MASK,

- MPC8315_SICRL_USB_ULPI);

- clrsetbits_be32(immap + MPC83XX_SICRH_OFFS,

- MPC8315_SICRH_USB_MASK,

- MPC8315_SICRH_USB_ULPI);

- clrsetbits_be32(immap + MPC83XX_SICRL_OFFS,

- MPC831X_SICRL_USB_MASK,

- MPC831X_SICRL_USB_ULPI);

- clrsetbits_be32(immap + MPC83XX_SICRH_OFFS,

- MPC831X_SICRH_USB_MASK,

- MPC831X_SICRH_USB_ULPI);

- of_node_put(immr_node);

- /* Map USB SOC space */

- ret = of_address_to_resource(np, 0, &res);

- usb_regs = ioremap(res.start, resource_size(&res));

- /* Using on-chip PHY */

- if (prop && (!strcmp(prop, "utmi_wide") ||

- !strcmp(prop, "utmi"))) {

- if (of_device_is_compatible(immr_node, "fsl,mpc8308-immr"))

- if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr"))

- refsel = CONTROL_REFSEL_24MHZ;

- refsel = CONTROL_REFSEL_48MHZ;

- /* Set UTMI_PHY_EN and REFSEL */

- out_be32(usb_regs + FSL_USB2_CONTROL_OFFS,

- CONTROL_UTMI_PHY_EN | refsel);

- /* Using external UPLI PHY */

- } else if (prop && !strcmp(prop, "ulpi")) {

- /* Set PHY_CLK_SEL to ULPI */

- temp = CONTROL_PHY_CLK_SEL_ULPI;

-#ifdef CONFIG_USB_OTG

- /* Set OTG_PORT */

- if (!of_device_is_compatible(immr_node, "fsl,mpc8308-immr")) {

- dr_mode = of_get_property(np, "dr_mode", NULL);

- if (dr_mode && !strcmp(dr_mode, "otg"))

- temp |= CONTROL_OTG_PORT;

-#endif /* CONFIG_USB_OTG */

- out_be32(usb_regs + FSL_USB2_CONTROL_OFFS, temp);

- printk(KERN_WARNING "831x USB PHY type not supported\n");

- iounmap(usb_regs);

-#endif /* CONFIG_PPC_MPC831x */

-#ifdef CONFIG_PPC_MPC837x

-int __init mpc837x_usb_cfg(void)

- void __iomem *immap;

- struct device_node *np = NULL;

- np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");

- if (!np || !of_device_is_available(np)) {

- prop = of_get_property(np, "phy_type", NULL);

- if (!prop || (strcmp(prop, "ulpi") && strcmp(prop, "serial"))) {

- printk(KERN_WARNING "837x USB PHY type not supported\n");

- /* Map IMMR space for pin and clock settings */

- immap = ioremap(get_immrbase(), 0x1000);

- /* Configure clock */

- clrsetbits_be32(immap + MPC83XX_SCCR_OFFS, MPC837X_SCCR_USB_DRCM_11,

- MPC837X_SCCR_USB_DRCM_11);

- /* Configure pin mux for ULPI/serial */

- clrsetbits_be32(immap + MPC83XX_SICRL_OFFS, MPC837X_SICRL_USB_MASK,

- MPC837X_SICRL_USB_ULPI);

-#endif /* CONFIG_PPC_MPC837x */

-#include <linux/of_platform.h>

-#include <linux/of_fdt.h>

-#include <linux/of_platform.h>

-void __init corenet_gen_pic_init(void)

-void __init corenet_gen_setup_arch(void)

-int __init corenet_gen_publish_devices(void)

-#include <linux/of_platform.h>

-#include <linux/of_device.h>

-#include <linux/of_platform.h>

-#include <linux/of_device.h>

-void __init qemu_e500_pic_init(void)

-#include <linux/of_platform.h>

-#include <linux/fs_enet_pd.h>

-#include <asm/fs_pd.h>

- sysconf8xx_t __iomem *siu_conf;

- siu_conf = immr_map(im_siu_conf);

- out_be32(&siu_conf->sc_sdcr, 0x40);

- out_be32(&siu_conf->sc_sdcr, 1);

- immr_unmap(siu_conf);

-#include <asm/fs_pd.h>

-/* per-board overridable init_internal_rtc() function. */

-void __init __attribute__ ((weak))

-init_internal_rtc(void)

- sit8xx_t __iomem *sys_tmr = immr_map(im_sit);

- /* Disable the RTC one second and alarm interrupts. */

- clrbits16(&sys_tmr->sit_rtcsc, (RTCSC_SIE | RTCSC_ALE));

- /* Enable the RTC */

- setbits16(&sys_tmr->sit_rtcsc, (RTCSC_RTF | RTCSC_RTE));

- immr_unmap(sys_tmr);

- cark8xx_t __iomem *clk_r1;

- car8xx_t __iomem *clk_r2;

- sitk8xx_t __iomem *sys_tmr1;

- sit8xx_t __iomem *sys_tmr2;

- clk_r1 = immr_map(im_clkrstk);

- out_be32(&clk_r1->cark_sccrk, ~KAPWR_KEY);

- out_be32(&clk_r1->cark_sccrk, KAPWR_KEY);

- immr_unmap(clk_r1);

- clk_r2 = immr_map(im_clkrst);

- setbits32(&clk_r2->car_sccr, 0x02000000);

- immr_unmap(clk_r2);

- sys_tmr1 = immr_map(im_sitk);

- out_be32(&sys_tmr1->sitk_tbscrk, ~KAPWR_KEY);

- out_be32(&sys_tmr1->sitk_rtcsck, ~KAPWR_KEY);

- out_be32(&sys_tmr1->sitk_tbk, ~KAPWR_KEY);

- out_be32(&sys_tmr1->sitk_tbscrk, KAPWR_KEY);

- out_be32(&sys_tmr1->sitk_rtcsck, KAPWR_KEY);

- out_be32(&sys_tmr1->sitk_tbk, KAPWR_KEY);

- immr_unmap(sys_tmr1);

- init_internal_rtc();

- sys_tmr2 = immr_map(im_sit);

- out_be16(&sys_tmr2->sit_tbscr, ((1 << (7 - (irq/2))) << 8) |

- (TBSCR_TBF | TBSCR_TBE));

- immr_unmap(sys_tmr2);

- sitk8xx_t __iomem *sys_tmr1;

- sit8xx_t __iomem *sys_tmr2;

- sys_tmr1 = immr_map(im_sitk);

- sys_tmr2 = immr_map(im_sit);

- out_be32(&sys_tmr1->sitk_rtck, KAPWR_KEY);

- out_be32(&sys_tmr2->sit_rtc, (u32)time);

- out_be32(&sys_tmr1->sitk_rtck, ~KAPWR_KEY);

- immr_unmap(sys_tmr2);

- immr_unmap(sys_tmr1);

- sit8xx_t __iomem *sys_tmr = immr_map(im_sit);

- data = in_be32(&sys_tmr->sit_rtc);

- immr_unmap(sys_tmr);

- car8xx_t __iomem *clk_r = immr_map(im_clkrst);

- setbits32(&clk_r->car_plprcr, 0x00000080);

- in_8(&clk_r->res[0]);

-#include <asm/fs_pd.h>

-#include <linux/fs_enet_pd.h>

-#include <linux/fs_uart_pd.h>

-#include <asm/fs_pd.h>

-#include <linux/fs_enet_pd.h>

-#include <linux/fs_uart_pd.h>

-#include <asm/fs_pd.h>

- depends on (FSL_SOC_BOOKE && PPC32) || 8260

-#include <linux/of_platform.h>

-#include <linux/of_device.h>

-#include <linux/of_platform.h>

- inode->i_atime = inode->i_mtime = inode->i_ctime = current_time(inode);

-#include <linux/of_platform.h>

-#include <linux/of_device.h>

-#include <linux/of_platform.h>

-static inline int simple_feature_tweak(struct device_node *node, int type,

- int reg, u32 mask, int value)

-#ifndef CONFIG_PPC64

-#include <linux/of_device.h>

- uint64_t id = PCI_SLOT_ID(phb->opal_id,

- (pdev->bus->number << 8) | pdev->devfn);

- bdfn = (dev->bus->number << 8) | dev->devfn;

-#include <linux/of_platform.h>

- struct list_head list;

- struct opal_prd_msg_header msg;

- if (count < sizeof(item->msg))

- size = be16_to_cpu(item->msg.size);

- struct opal_prd_msg_header msg;

- msg.size = cpu_to_be16(sizeof(msg));

- msg.type = OPAL_PRD_MSG_TYPE_FINI;

- opal_prd_msg((struct opal_prd_msg *)&msg);

- memcpy(&item->msg, msg->params, msg_size);

-#include <linux/platform_device.h>

-#include <linux/of_platform.h>

- pe = pnv_pci_bdfn_to_pe(phb, pdev->devfn | (pdev->bus->number << 8));

- * We map the kernel linear region with 1GB large pages on radix. For

- * memory hot unplug to work our memory block size must be at least

- if (radix_enabled())

- return radix_mem_block_size;

- return 256UL * 1024 * 1024;

- strncpy((char *)&n, text, 8);

-static int __init pseries_cpu_hotplug_init(void)

- unsigned int node;

-#ifdef CONFIG_ARCH_CPU_PROBE_RELEASE

- ppc_md.cpu_probe = dlpar_cpu_probe;

- ppc_md.cpu_release = dlpar_cpu_release;

-#endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */

-machine_arch_initcall(pseries, pseries_cpu_hotplug_init);

-unsigned long pseries_memory_block_size(void)

- struct device_node *np;

- u64 memblock_size = MIN_MEMORY_BLOCK_SIZE;

- struct resource r;

- np = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory");

- const __be32 *prop;

- size_cells = of_n_size_cells(np);

- prop = of_get_property(np, "ibm,lmb-size", &len);

- if (prop && len >= size_cells * sizeof(__be32))

- memblock_size = of_read_number(prop, size_cells);

- } else if (machine_is(pseries)) {

- /* This fallback really only applies to pseries */

- unsigned int memzero_size = 0;

- np = of_find_node_by_path("/memory@0");

- if (!of_address_to_resource(np, 0, &r))

- memzero_size = resource_size(&r);

- if (memzero_size) {

- /* We now know the size of memory@0, use this to find

- * the first memoryblock and get its size.

- sprintf(buf, "/memory@%x", memzero_size);

- np = of_find_node_by_path(buf);

- if (!of_address_to_resource(np, 0, &r))

- memblock_size = resource_size(&r);

- return memblock_size;

- unsigned long block_sz, start_pfn;

- block_sz = pseries_memory_block_size();

- sections_per_block = block_sz / MIN_MEMORY_BLOCK_SIZE;

- unsigned long block_sz;

- block_sz = pseries_memory_block_size();

- __remove_memory(lmb->base_addr, block_sz);

- memblock_remove(lmb->base_addr, block_sz);

- rc = __add_memory(nid, lmb->base_addr, block_sz, MHP_NONE);

-#define DIRECT64_PROPNAME "linux,direct64-ddr-window-info"

-#define DMA64_PROPNAME "linux,dma64-ddr-window-info"

- * Avoid smp_processor_id while preemptible. All CPUs should have

- * the same value for lppaca_shared_proc.

- preempt_disable();

- if (!lppaca_shared_proc(get_lppaca())) {

- if (lppaca_shared_proc(get_lppaca())) {

- lppaca_shared_proc(get_lppaca()));

-unsigned long pseries_memory_block_size(void);

- if (lppaca_shared_proc(get_lppaca())) {

-#include <asm/lppaca.h>

-#include <asm/mpc8260.h>

-#include <asm/fs_pd.h>

- bp = cpm2_map_size(im_brgc1, 16);

- bp = cpm2_map_size(im_brgc5, 16);

- cpmux_t __iomem *im_cpmux;

- im_cpmux = cpm2_map(im_cpmux);

- reg = &im_cpmux->cmx_scr;

- reg = &im_cpmux->cmx_fcr;

- cpm2_unmap(im_cpmux);

- cpmux_t __iomem *im_cpmux;

- im_cpmux = cpm2_map(im_cpmux);

- reg = &im_cpmux->cmx_smr;

- cpm2_unmap(im_cpmux);

-#include <asm/mpc8260.h>

-#include <asm/fs_pd.h>

- cpm2_intctl = cpm2_map(im_intctl);

-#include <linux/of_device.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <asm/export.h>

-void ehv_pic_unmask_irq(struct irq_data *d)

-void ehv_pic_mask_irq(struct irq_data *d)

-void ehv_pic_end_irq(struct irq_data *d)

-void ehv_pic_direct_end_irq(struct irq_data *d)

-int ehv_pic_set_affinity(struct irq_data *d, const struct cpumask *dest,

-int ehv_pic_set_irq_type(struct irq_data *d, unsigned int flow_type)

-int fsl_add_bridge(struct platform_device *pdev, int is_primary)

- pcie = zalloc_maybe_bootmem(sizeof(*pcie), GFP_KERNEL);

-extern int fsl_add_bridge(struct platform_device *pdev, int is_primary);

-#include <linux/device.h>

-#include <linux/of_platform.h>

-#include <linux/device.h>

-#include <linux/of_platform.h>

-int fsl_map_inb_mem(struct rio_mport *mport, dma_addr_t lstart,

- u64 rstart, u64 size, u32 flags)

-void fsl_unmap_inb_mem(struct rio_mport *mport, dma_addr_t lstart)

-int fsl_rio_setup(struct platform_device *dev)

-#include <linux/of_platform.h>

-void msg_unit_error_handler(void)

-#include <linux/of_platform.h>

-#include <linux/fs_enet_pd.h>

-#include <linux/fs_uart_pd.h>

-extern void init_fcc_ioports(struct fs_platform_info*);

-extern void init_fec_ioports(struct fs_platform_info*);

-extern void init_smc_ioports(struct fs_uart_platform_info*);

-#include <linux/of_platform.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_platform.h>

-#include <linux/of_device.h>

-#include <linux/of_platform.h>

- server = be16_to_cpu(oserver);

-ifdef CONFIG_CC_IS_CLANG

-# clang stores addresses on the stack causing the frame size to blow

-# out. See https://github.com/ClangBuiltLinux/linux/issues/252

-KBUILD_CFLAGS += -Wframe-larger-than=4096

- show_mem(0, NULL);

- struct mm_struct *mm;

- u32 mmucfg, pidmask, lpidmask;

- int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0;

- if ((mmu_version > 1) && (mmucfg & 0x10000))

- pidmask = (1ul << pidsz) - 1;

- lpidmask = (1ul << lpidsz) - 1;

-static void sysrq_handle_xmon(int key)

-obj-$(CONFIG_ARCH_HAS_KEXEC_PURGATORY) += purgatory/

- select ARCH_WANT_OPTIMIZE_VMEMMAP

- select DMA_DIRECT_REMAP

- bool "Kexec system call"

- kexec is a system call that implements the ability to shutdown your

- current kernel, and to start another kernel. It is like a reboot

- but it is independent of the system firmware. And like a reboot

- you can start any kernel with it, not just Linux.

- The name comes from the similarity to the exec system call.

- bool "kexec file based systmem call"

- depends on 64BIT && MMU

- This is new version of kexec system call. This system call is

- file based and takes file descriptors as system call argument

- for kernel and initramfs as opposed to list of segments as

- accepted by previous system call.

- If you don't know what to do here, say Y.

-config ARCH_HAS_KEXEC_PURGATORY

- bool "Build kdump crash kernel"

- Generate crash dump after being started by kexec. This should

- be normally only set in special crash dump kernels which are

- loaded in the main kernel with kexec-tools into a specially

- reserved region and then later executed after a crash by

- For more details see Documentation/admin-guide/kdump/kdump.rst

-ifeq ($(CONFIG_PERF_EVENTS),y)

- KBUILD_CFLAGS += -fno-omit-frame-pointer

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
index 4af3300f3cf3..205a13d8c8b1 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
index 9230cc3d8946..d4ea4a2c0b9b 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index fa0061eb33a7..12ebe9792356 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi

- <&tdm_ext>, <&mclk_ext>;

- "tdm_ext", "mclk_ext";

-dtb-$(CONFIG_ARCH_THEAD) += th1520-lichee-pi-4a.dtb

diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
index 4b0249ac710f..a802ab110429 100644
--- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi

-// SPDX-License-Identifier: GPL-2.0

-void thead_feature_probe_func(unsigned int cpu,

- unsigned long archid,

- unsigned long impid)

- if ((archid == 0) && (impid == 0))

- per_cpu(misaligned_access_speed, cpu) = RISCV_HWPROBE_MISALIGNED_FAST;

- * content will alwyas be executed.

-void probe_vendor_features(unsigned int cpu);

-void thead_feature_probe_func(unsigned int cpu, unsigned long archid,

- unsigned long impid);

-static inline void probe_vendor_features(unsigned int cpu) { }

-static inline void flush_dcache_page(struct page *page)

- * HugeTLB pages are always fully mapped and only head page will be

- * set PG_dcache_clean (see comments in flush_icache_pte()).

- if (PageHuge(page))

- page = compound_head(page);

- if (test_bit(PG_dcache_clean, &page->flags))

- clear_bit(PG_dcache_clean, &page->flags);

-#define arch_efi_call_virt_setup() ({ \

- sync_kernel_mappings(efi_mm.pgd); \

- efi_virtmap_load(); \

-#define arch_efi_call_virt_teardown() efi_virtmap_unload()

-void efi_virtmap_load(void);

-void efi_virtmap_unload(void);

-#define ELF_ET_DYN_BASE ((TASK_SIZE / 3) * 2)

-#define RISCV_ISA_EXT_NAME_LEN_MAX 32

- /* Name of the extension displayed to userspace via /proc/cpuinfo */

- char uprop[RISCV_ISA_EXT_NAME_LEN_MAX];

- /* The logical ISA extension ID */

- unsigned int isa_ext_id;

- const struct kvm_one_reg *reg,

- unsigned long rtype);

- const struct kvm_one_reg *reg,

- unsigned long rtype);

-#define __pte_free_tlb(tlb, pte, buf) \

- pgtable_pte_page_dtor(pte); \

- tlb_remove_page((tlb), pte); \

- 57 : (pgtable_l4_enabled ? 48 : 39))

-static inline pte_t pte_mkwrite(pte_t pte)

-static inline void update_mmu_cache(struct vm_area_struct *vma,

- unsigned long address, pte_t *ptep)

- local_flush_tlb_page(address);

-static inline void __set_pte_at(struct mm_struct *mm,

- unsigned long addr, pte_t *ptep, pte_t pteval)

-static inline void set_pte_at(struct mm_struct *mm,

- unsigned long addr, pte_t *ptep, pte_t pteval)

- page_table_check_pte_set(mm, addr, ptep, pteval);

- __set_pte_at(mm, addr, ptep, pteval);

- __set_pte_at(mm, addr, ptep, __pte(0));

- set_pte_at(vma->vm_mm, address, ptep, entry);

- page_table_check_pte_clear(mm, address, pte);

-static inline pmd_t pmd_mkwrite(pmd_t pmd)

- return pte_pmd(pte_mkwrite(pmd_pte(pmd)));

- page_table_check_pmd_set(mm, addr, pmdp, pmd);

- return __set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd));

- page_table_check_pud_set(mm, addr, pudp, pud);

- return __set_pte_at(mm, addr, (pte_t *)pudp, pud_pte(pud));

- page_table_check_pmd_clear(mm, address, pmd);

- page_table_check_pmd_set(vma->vm_mm, address, pmdp, pmd);

- * - 0x9fc00000 (~2.5GB) for RV32.

- * - 0x4000000000 ( 256GB) for RV64 using SV39 mmu

- * - 0x800000000000 ( 128TB) for RV64 using SV48 mmu

-#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3)

-#define STACK_TOP TASK_SIZE

-#define STACK_TOP_MAX TASK_SIZE_64

-#define STACK_TOP_MAX TASK_SIZE

-#define STACK_ALIGN 16

-typedef long (*syscall_t)(ulong, ulong, ulong, ulong, ulong, ulong, ulong);

- regs->a0 = fn(regs->orig_a0, regs->a1, regs->a2,

- regs->a3, regs->a4, regs->a5, regs->a6);

- * In ptrace syscall, datap will be set to zero and the vector

- * registers will be copied to the address right after this

- * it is restored by sys_sigreturn / sys_rt_sigreturn.

- void (*feature_probe_func)(unsigned int cpu, unsigned long archid,

- unsigned long impid);

- cpu_mfr_info->feature_probe_func = NULL;

- cpu_mfr_info->feature_probe_func = thead_feature_probe_func;

-/* Called on each CPU as it starts */

-void probe_vendor_features(unsigned int cpu)

- struct cpu_manufacturer_info_t cpu_mfr_info;

- riscv_fill_cpu_mfr_info(&cpu_mfr_info);

- if (!cpu_mfr_info.feature_probe_func)

- cpu_mfr_info.feature_probe_func(cpu,

- cpu_mfr_info.arch_id,

- cpu_mfr_info.imp_id);

- probe_vendor_features(0);

-#define __SYSCALL(nr, call) [nr] = (call),

- [0 ... __NR_syscalls - 1] = sys_ni_syscall,

-int riscv_early_of_processor_hartid(struct device_node *node, unsigned long *hart)

- pr_warn("CPU with hartid=%lu has no \"riscv,isa\" property\n", *hart);

- if (IS_ENABLED(CONFIG_32BIT) && strncasecmp(isa, "rv32ima", 7))

- if (IS_ENABLED(CONFIG_64BIT) && strncasecmp(isa, "rv64ima", 7))

-#define __RISCV_ISA_EXT_DATA(UPROP, EXTID) \

- .uprop = #UPROP, \

- .isa_ext_id = EXTID, \

- * The canonical order of ISA extension names in the ISA string is defined in

- * chapter 27 of the unprivileged specification.

- * Ordinarily, for in-kernel data structures, this order is unimportant but

- * isa_ext_arr defines the order of the ISA string in /proc/cpuinfo.

- * The specification uses vague wording, such as should, when it comes to

- * ordering, so for our purposes the following rules apply:

- * 1. All multi-letter extensions must be separated from other extensions by an

- * 2. Additional standard extensions (starting with 'Z') must be sorted after

- * single-letter extensions and before any higher-privileged extensions.

- * 3. The first letter following the 'Z' conventionally indicates the most

- * closely related alphabetical extension category, IMAFDQLCBKJTPVH.

- * If multiple 'Z' extensions are named, they must be ordered first by

- * category, then alphabetically within a category.

- * 3. Standard supervisor-level extensions (starting with 'S') must be listed

- * after standard unprivileged extensions. If multiple supervisor-level

- * extensions are listed, they must be ordered alphabetically.

- * 4. Standard machine-level extensions (starting with 'Zxm') must be listed

- * after any lower-privileged, standard extensions. If multiple

- * machine-level extensions are listed, they must be ordered

- * 5. Non-standard extensions (starting with 'X') must be listed after all

- * standard extensions. If multiple non-standard extensions are listed, they

- * must be ordered alphabetically.

- * An example string following the order is:

- * rv64imadc_zifoo_zigoo_zafoo_sbar_scar_zxmbaz_xqux_xrux

- * New entries to this struct should follow the ordering rules described above.

-static struct riscv_isa_ext_data isa_ext_arr[] = {

- __RISCV_ISA_EXT_DATA(zicbom, RISCV_ISA_EXT_ZICBOM),

- __RISCV_ISA_EXT_DATA(zicboz, RISCV_ISA_EXT_ZICBOZ),

- __RISCV_ISA_EXT_DATA(zicntr, RISCV_ISA_EXT_ZICNTR),

- __RISCV_ISA_EXT_DATA(zicsr, RISCV_ISA_EXT_ZICSR),

- __RISCV_ISA_EXT_DATA(zifencei, RISCV_ISA_EXT_ZIFENCEI),

- __RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE),

- __RISCV_ISA_EXT_DATA(zihpm, RISCV_ISA_EXT_ZIHPM),

- __RISCV_ISA_EXT_DATA(zba, RISCV_ISA_EXT_ZBA),

- __RISCV_ISA_EXT_DATA(zbb, RISCV_ISA_EXT_ZBB),

- __RISCV_ISA_EXT_DATA(zbs, RISCV_ISA_EXT_ZBS),

- __RISCV_ISA_EXT_DATA(smaia, RISCV_ISA_EXT_SMAIA),

- __RISCV_ISA_EXT_DATA(ssaia, RISCV_ISA_EXT_SSAIA),

- __RISCV_ISA_EXT_DATA(sscofpmf, RISCV_ISA_EXT_SSCOFPMF),

- __RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC),

- __RISCV_ISA_EXT_DATA(svinval, RISCV_ISA_EXT_SVINVAL),

- __RISCV_ISA_EXT_DATA(svnapot, RISCV_ISA_EXT_SVNAPOT),

- __RISCV_ISA_EXT_DATA(svpbmt, RISCV_ISA_EXT_SVPBMT),

- __RISCV_ISA_EXT_DATA("", RISCV_ISA_EXT_MAX),

-static void print_isa_ext(struct seq_file *f)

- struct riscv_isa_ext_data *edata;

- int i = 0, arr_sz;

- arr_sz = ARRAY_SIZE(isa_ext_arr) - 1;

- /* No extension support available */

- for (i = 0; i <= arr_sz; i++) {

- edata = &isa_ext_arr[i];

- if (!__riscv_isa_extension_available(NULL, edata->isa_ext_id))

- seq_printf(f, "_%s", edata->uprop);

- * These are the only valid base (single letter) ISA extensions as per the spec.

- * It also specifies the canonical order in which it appears in the spec.

- * Some of the extension may just be a place holder for now (B, K, P, J).

- * This should be updated once corresponding extensions are ratified.

-static const char base_riscv_exts[13] = "imafdqcbkjpvh";

-static void print_isa(struct seq_file *f, const char *isa)

- seq_puts(f, "isa\t\t: ");

- /* Print the rv[64/32] part */

- seq_write(f, isa, 4);

- for (i = 0; i < sizeof(base_riscv_exts); i++) {

- if (__riscv_isa_extension_available(NULL, base_riscv_exts[i] - 'a'))

- /* Print only enabled the base ISA extensions */

- seq_write(f, &base_riscv_exts[i], 1);

- strncpy(sv_type, "sv32", 5);

- strncpy(sv_type, "sv57", 5);

- strncpy(sv_type, "sv48", 5);

- strncpy(sv_type, "sv39", 5);

- strncpy(sv_type, "none", 5);

- const char *compat, *isa;

- if (!of_property_read_string(node, "riscv,isa", &isa))

- print_isa(m, isa);

- if (!acpi_get_riscv_isa(NULL, cpu_id, &isa))

- print_isa(m, isa);

-#include <linux/of_device.h>

-void __init riscv_fill_hwcap(void)

- char print_str[NUM_ALPHA_EXTS + 1];

- unsigned long isa2hwcap[26] = {0};

- isa2hwcap['i' - 'a'] = COMPAT_HWCAP_ISA_I;

- isa2hwcap['m' - 'a'] = COMPAT_HWCAP_ISA_M;

- isa2hwcap['a' - 'a'] = COMPAT_HWCAP_ISA_A;

- isa2hwcap['f' - 'a'] = COMPAT_HWCAP_ISA_F;

- isa2hwcap['d' - 'a'] = COMPAT_HWCAP_ISA_D;

- isa2hwcap['c' - 'a'] = COMPAT_HWCAP_ISA_C;

- isa2hwcap['v' - 'a'] = COMPAT_HWCAP_ISA_V;

- bitmap_zero(riscv_isa, RISCV_ISA_EXT_MAX);

- * For all possible cpus, we have already validated in

- * the boot process that they at least contain "rv" and

- * whichever of "32"/"64" this kernel supports, and so this

- * section can be skipped.

- const char *ext = isa++;

- const char *ext_end = isa;

- bool ext_long = false, ext_err = false;

- * Workaround for invalid single-letter 's' & 'u'(QEMU).

- * No need to set the bit in riscv_isa as 's' & 'u' are

- * not valid ISA extensions. It works until multi-letter

- * extension starting with "Su" appears.

- if (ext[-1] != '_' && ext[1] == 'u') {

- * Before attempting to parse the extension itself, we find its end.

- * As multi-letter extensions must be split from other multi-letter

- * extensions with an "_", the end of a multi-letter extension will

- * either be the null character or the "_" at the start of the next

- * multi-letter extension.

- * Next, as the extensions version is currently ignored, we

- * eliminate that portion. This is done by parsing backwards from

- * the end of the extension, removing any numbers. This may be a

- * major or minor number however, so the process is repeated if a

- * minor number was found.

- * ext_end is intended to represent the first character *after* the

- * name portion of an extension, but will be decremented to the last

- * character itself while eliminating the extensions version number.

- * A simple re-increment solves this problem.

- for (; *isa && *isa != '_'; ++isa)

- if (unlikely(!isalnum(*isa)))

- if (unlikely(ext_err))

- if (!isdigit(ext_end[-1]))

- while (isdigit(*--ext_end))

- if (tolower(ext_end[0]) != 'p' || !isdigit(ext_end[-1])) {

- while (isdigit(*--ext_end))

- * Things are a little easier for single-letter extensions, as they

- * are parsed forwards.

- * After checking that our starting position is valid, we need to

- * ensure that, when isa was incremented at the start of the loop,

- * that it arrived at the start of the next extension.

- * If we are already on a non-digit, there is nothing to do. Either

- * we have a multi-letter extension's _, or the start of an

- * Otherwise we have found the current extension's major version

- * number. Parse past it, and a subsequent p/minor version number

- * if present. The `p` extension must not appear immediately after

- * a number, so there is no fear of missing it.

- if (unlikely(!isalpha(*ext))) {

- if (!isdigit(*isa))

- while (isdigit(*++isa))

- if (tolower(*isa) != 'p')

- if (!isdigit(*++isa)) {

- while (isdigit(*++isa))

- * The parser expects that at the start of an iteration isa points to the

- * first character of the next extension. As we stop parsing an extension

- * on meeting a non-alphanumeric character, an extra increment is needed

- * where the succeeding extension is a multi-letter prefixed with an "_".

-#define SET_ISA_EXT_MAP(name, bit) \

- if ((ext_end - ext == sizeof(name) - 1) && \

- !strncasecmp(ext, name, sizeof(name) - 1) && \

- riscv_isa_extension_check(bit)) \

- set_bit(bit, isainfo->isa); \

- if (unlikely(ext_err))

- int nr = tolower(*ext) - 'a';

- if (riscv_isa_extension_check(nr)) {

- this_hwcap |= isa2hwcap[nr];

- set_bit(nr, isainfo->isa);

- /* sorted alphabetically */

- SET_ISA_EXT_MAP("smaia", RISCV_ISA_EXT_SMAIA);

- SET_ISA_EXT_MAP("ssaia", RISCV_ISA_EXT_SSAIA);

- SET_ISA_EXT_MAP("sscofpmf", RISCV_ISA_EXT_SSCOFPMF);

- SET_ISA_EXT_MAP("sstc", RISCV_ISA_EXT_SSTC);

- SET_ISA_EXT_MAP("svinval", RISCV_ISA_EXT_SVINVAL);

- SET_ISA_EXT_MAP("svnapot", RISCV_ISA_EXT_SVNAPOT);

- SET_ISA_EXT_MAP("svpbmt", RISCV_ISA_EXT_SVPBMT);

- SET_ISA_EXT_MAP("zba", RISCV_ISA_EXT_ZBA);

- SET_ISA_EXT_MAP("zbb", RISCV_ISA_EXT_ZBB);

- SET_ISA_EXT_MAP("zbs", RISCV_ISA_EXT_ZBS);

- SET_ISA_EXT_MAP("zicbom", RISCV_ISA_EXT_ZICBOM);

- SET_ISA_EXT_MAP("zicboz", RISCV_ISA_EXT_ZICBOZ);

- SET_ISA_EXT_MAP("zihintpause", RISCV_ISA_EXT_ZIHINTPAUSE);

-#undef SET_ISA_EXT_MAP

- /* We don't support systems with F but without D, so mask those out

-#ifdef CONFIG_ARCH_HAS_KEXEC_PURGATORY

-#endif /* CONFIG_ARCH_HAS_KEXEC_PURGATORY */

- /* Save hart ID and DTB physical address */

-ENDPROC(ftrace_stub)

-static int patch_insn_write(void *addr, const void *insn, size_t len)

- patch_map(addr + len, FIX_TEXT_POKE1);

-NOKPROBE_SYMBOL(patch_insn_write);

-static int patch_insn_write(void *addr, const void *insn, size_t len)

-NOKPROBE_SYMBOL(patch_insn_write);

-obj-y := cmdline_early.pi.o string.pi.o ctype.pi.o lib-fdt.pi.o lib-fdt_ro.pi.o

- RISCV_INSN_REJECTED(c_j, insn);

- RISCV_INSN_REJECTED(c_jr, insn);

- RISCV_INSN_REJECTED(c_jalr, insn);

- RISCV_INSN_REJECTED(c_beqz, insn);

- RISCV_INSN_REJECTED(c_bnez, insn);

- probe_vendor_features(curr_cpuid);

-ENTRY(__cpu_resume_enter)

-END(__cpu_resume_enter)

-#define __SYSCALL(nr, call) [nr] = (call),

- [0 ... __NR_syscalls - 1] = sys_ni_syscall,

- else if (report_bug(regs->epc, regs) == BUG_TRAP_TYPE_WARN)

-void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm,

- const struct kvm_memory_slot *memslot)

- kvm_flush_remote_tlbs(kvm);

- kvm_pfn_t pfn = pte_pfn(range->pte);

-#include <linux/uaccess.h>

-#include <asm/hwcap.h>

-#include <asm/sbi.h>

-#include <asm/vector.h>

-#define KVM_RISCV_BASE_ISA_MASK GENMASK(25, 0)

-#define KVM_ISA_EXT_ARR(ext) [KVM_RISCV_ISA_EXT_##ext] = RISCV_ISA_EXT_##ext

-/* Mapping between KVM ISA Extension ID & Host ISA extension ID */

-static const unsigned long kvm_isa_ext_arr[] = {

- [KVM_RISCV_ISA_EXT_A] = RISCV_ISA_EXT_a,

- [KVM_RISCV_ISA_EXT_C] = RISCV_ISA_EXT_c,

- [KVM_RISCV_ISA_EXT_D] = RISCV_ISA_EXT_d,

- [KVM_RISCV_ISA_EXT_F] = RISCV_ISA_EXT_f,

- [KVM_RISCV_ISA_EXT_H] = RISCV_ISA_EXT_h,

- [KVM_RISCV_ISA_EXT_I] = RISCV_ISA_EXT_i,

- [KVM_RISCV_ISA_EXT_M] = RISCV_ISA_EXT_m,

- [KVM_RISCV_ISA_EXT_V] = RISCV_ISA_EXT_v,

- KVM_ISA_EXT_ARR(SSAIA),

- KVM_ISA_EXT_ARR(SSTC),

- KVM_ISA_EXT_ARR(SVINVAL),

- KVM_ISA_EXT_ARR(SVNAPOT),

- KVM_ISA_EXT_ARR(SVPBMT),

- KVM_ISA_EXT_ARR(ZBB),

- KVM_ISA_EXT_ARR(ZIHINTPAUSE),

- KVM_ISA_EXT_ARR(ZICBOM),

- KVM_ISA_EXT_ARR(ZICBOZ),

-static unsigned long kvm_riscv_vcpu_base2isa_ext(unsigned long base_ext)

- for (i = 0; i < KVM_RISCV_ISA_EXT_MAX; i++) {

- if (kvm_isa_ext_arr[i] == base_ext)

- return KVM_RISCV_ISA_EXT_MAX;

-static bool kvm_riscv_vcpu_isa_enable_allowed(unsigned long ext)

- case KVM_RISCV_ISA_EXT_H:

- case KVM_RISCV_ISA_EXT_V:

- return riscv_v_vstate_ctrl_user_allowed();

-static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)

- case KVM_RISCV_ISA_EXT_A:

- case KVM_RISCV_ISA_EXT_C:

- case KVM_RISCV_ISA_EXT_I:

- case KVM_RISCV_ISA_EXT_M:

- case KVM_RISCV_ISA_EXT_SSAIA:

- case KVM_RISCV_ISA_EXT_SSTC:

- case KVM_RISCV_ISA_EXT_SVINVAL:

- case KVM_RISCV_ISA_EXT_SVNAPOT:

- case KVM_RISCV_ISA_EXT_ZIHINTPAUSE:

- case KVM_RISCV_ISA_EXT_ZBB:

- unsigned long host_isa, i;

- for (i = 0; i < ARRAY_SIZE(kvm_isa_ext_arr); i++) {

- host_isa = kvm_isa_ext_arr[i];

- if (__riscv_isa_extension_available(NULL, host_isa) &&

- kvm_riscv_vcpu_isa_enable_allowed(i))

- set_bit(host_isa, vcpu->arch.isa);

-static int kvm_riscv_vcpu_get_reg_config(struct kvm_vcpu *vcpu,

- const struct kvm_one_reg *reg)

- unsigned long __user *uaddr =

- (unsigned long __user *)(unsigned long)reg->addr;

- unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |

- KVM_REG_SIZE_MASK |

- KVM_REG_RISCV_CONFIG);

- unsigned long reg_val;

- if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))

- switch (reg_num) {

- case KVM_REG_RISCV_CONFIG_REG(isa):

- reg_val = vcpu->arch.isa[0] & KVM_RISCV_BASE_ISA_MASK;

- case KVM_REG_RISCV_CONFIG_REG(zicbom_block_size):

- if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOM))

- reg_val = riscv_cbom_block_size;

- case KVM_REG_RISCV_CONFIG_REG(zicboz_block_size):

- if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOZ))

- reg_val = riscv_cboz_block_size;

- case KVM_REG_RISCV_CONFIG_REG(mvendorid):

- reg_val = vcpu->arch.mvendorid;

- case KVM_REG_RISCV_CONFIG_REG(marchid):

- reg_val = vcpu->arch.marchid;

- case KVM_REG_RISCV_CONFIG_REG(mimpid):

- reg_val = vcpu->arch.mimpid;

- if (copy_to_user(uaddr, &reg_val, KVM_REG_SIZE(reg->id)))

-static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu,

- const struct kvm_one_reg *reg)

- unsigned long __user *uaddr =

- (unsigned long __user *)(unsigned long)reg->addr;

- unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |

- KVM_REG_SIZE_MASK |

- KVM_REG_RISCV_CONFIG);

- unsigned long i, isa_ext, reg_val;

- if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))

- if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))

- switch (reg_num) {

- case KVM_REG_RISCV_CONFIG_REG(isa):

- * This ONE REG interface is only defined for

- * single letter extensions.

- if (fls(reg_val) >= RISCV_ISA_EXT_BASE)

- if (!vcpu->arch.ran_atleast_once) {

- /* Ignore the enable/disable request for certain extensions */

- for (i = 0; i < RISCV_ISA_EXT_BASE; i++) {

- isa_ext = kvm_riscv_vcpu_base2isa_ext(i);

- if (isa_ext >= KVM_RISCV_ISA_EXT_MAX) {

- reg_val &= ~BIT(i);

- if (!kvm_riscv_vcpu_isa_enable_allowed(isa_ext))

- if (reg_val & BIT(i))

- reg_val &= ~BIT(i);

- if (!kvm_riscv_vcpu_isa_disable_allowed(isa_ext))

- if (!(reg_val & BIT(i)))

- reg_val |= BIT(i);

- reg_val &= riscv_isa_extension_base(NULL);

- /* Do not modify anything beyond single letter extensions */

- reg_val = (vcpu->arch.isa[0] & ~KVM_RISCV_BASE_ISA_MASK) |

- (reg_val & KVM_RISCV_BASE_ISA_MASK);

- vcpu->arch.isa[0] = reg_val;

- kvm_riscv_vcpu_fp_reset(vcpu);

- return -EOPNOTSUPP;

- case KVM_REG_RISCV_CONFIG_REG(zicbom_block_size):

- return -EOPNOTSUPP;

- case KVM_REG_RISCV_CONFIG_REG(zicboz_block_size):

- return -EOPNOTSUPP;

- case KVM_REG_RISCV_CONFIG_REG(mvendorid):

- if (!vcpu->arch.ran_atleast_once)

- vcpu->arch.mvendorid = reg_val;

- case KVM_REG_RISCV_CONFIG_REG(marchid):

- if (!vcpu->arch.ran_atleast_once)

- vcpu->arch.marchid = reg_val;

- case KVM_REG_RISCV_CONFIG_REG(mimpid):

- if (!vcpu->arch.ran_atleast_once)

- vcpu->arch.mimpid = reg_val;

-static int kvm_riscv_vcpu_get_reg_core(struct kvm_vcpu *vcpu,

- const struct kvm_one_reg *reg)

- struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;

- unsigned long __user *uaddr =

- (unsigned long __user *)(unsigned long)reg->addr;

- unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |

- KVM_REG_SIZE_MASK |

- KVM_REG_RISCV_CORE);

- unsigned long reg_val;

- if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))

- if (reg_num >= sizeof(struct kvm_riscv_core) / sizeof(unsigned long))

- if (reg_num == KVM_REG_RISCV_CORE_REG(regs.pc))

- reg_val = cntx->sepc;

- else if (KVM_REG_RISCV_CORE_REG(regs.pc) < reg_num &&

- reg_num <= KVM_REG_RISCV_CORE_REG(regs.t6))

- reg_val = ((unsigned long *)cntx)[reg_num];

- else if (reg_num == KVM_REG_RISCV_CORE_REG(mode))

- reg_val = (cntx->sstatus & SR_SPP) ?

- KVM_RISCV_MODE_S : KVM_RISCV_MODE_U;

- if (copy_to_user(uaddr, &reg_val, KVM_REG_SIZE(reg->id)))

-static int kvm_riscv_vcpu_set_reg_core(struct kvm_vcpu *vcpu,

- const struct kvm_one_reg *reg)

- struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;

- unsigned long __user *uaddr =

- (unsigned long __user *)(unsigned long)reg->addr;

- unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |

- KVM_REG_SIZE_MASK |

- KVM_REG_RISCV_CORE);

- unsigned long reg_val;

- if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))

- if (reg_num >= sizeof(struct kvm_riscv_core) / sizeof(unsigned long))

- if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))

- if (reg_num == KVM_REG_RISCV_CORE_REG(regs.pc))

- cntx->sepc = reg_val;

- else if (KVM_REG_RISCV_CORE_REG(regs.pc) < reg_num &&

- reg_num <= KVM_REG_RISCV_CORE_REG(regs.t6))

- ((unsigned long *)cntx)[reg_num] = reg_val;

- else if (reg_num == KVM_REG_RISCV_CORE_REG(mode)) {

- if (reg_val == KVM_RISCV_MODE_S)

- cntx->sstatus |= SR_SPP;

- cntx->sstatus &= ~SR_SPP;

-static int kvm_riscv_vcpu_general_get_csr(struct kvm_vcpu *vcpu,

- unsigned long reg_num,

- unsigned long *out_val)

- struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;

- if (reg_num >= sizeof(struct kvm_riscv_csr) / sizeof(unsigned long))

- if (reg_num == KVM_REG_RISCV_CSR_REG(sip)) {

- kvm_riscv_vcpu_flush_interrupts(vcpu);

- *out_val = (csr->hvip >> VSIP_TO_HVIP_SHIFT) & VSIP_VALID_MASK;

- *out_val |= csr->hvip & ~IRQ_LOCAL_MASK;

- *out_val = ((unsigned long *)csr)[reg_num];

-static inline int kvm_riscv_vcpu_general_set_csr(struct kvm_vcpu *vcpu,

- unsigned long reg_num,

- unsigned long reg_val)

- struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;

- if (reg_num >= sizeof(struct kvm_riscv_csr) / sizeof(unsigned long))

- if (reg_num == KVM_REG_RISCV_CSR_REG(sip)) {

- reg_val &= VSIP_VALID_MASK;

- reg_val <<= VSIP_TO_HVIP_SHIFT;

- ((unsigned long *)csr)[reg_num] = reg_val;

- if (reg_num == KVM_REG_RISCV_CSR_REG(sip))

- WRITE_ONCE(vcpu->arch.irqs_pending_mask[0], 0);

-static int kvm_riscv_vcpu_get_reg_csr(struct kvm_vcpu *vcpu,

- const struct kvm_one_reg *reg)

- unsigned long __user *uaddr =

- (unsigned long __user *)(unsigned long)reg->addr;

- unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |

- KVM_REG_SIZE_MASK |

- KVM_REG_RISCV_CSR);

- unsigned long reg_val, reg_subtype;

- if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))

- reg_subtype = reg_num & KVM_REG_RISCV_SUBTYPE_MASK;

- reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK;

- switch (reg_subtype) {

- case KVM_REG_RISCV_CSR_GENERAL:

- rc = kvm_riscv_vcpu_general_get_csr(vcpu, reg_num, &reg_val);

- case KVM_REG_RISCV_CSR_AIA:

- rc = kvm_riscv_vcpu_aia_get_csr(vcpu, reg_num, &reg_val);

- if (copy_to_user(uaddr, &reg_val, KVM_REG_SIZE(reg->id)))

-static int kvm_riscv_vcpu_set_reg_csr(struct kvm_vcpu *vcpu,

- const struct kvm_one_reg *reg)

- unsigned long __user *uaddr =

- (unsigned long __user *)(unsigned long)reg->addr;

- unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |

- KVM_REG_SIZE_MASK |

- KVM_REG_RISCV_CSR);

- unsigned long reg_val, reg_subtype;

- if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))

- if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))

- reg_subtype = reg_num & KVM_REG_RISCV_SUBTYPE_MASK;

- reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK;

- switch (reg_subtype) {

- case KVM_REG_RISCV_CSR_GENERAL:

- rc = kvm_riscv_vcpu_general_set_csr(vcpu, reg_num, reg_val);

- case KVM_REG_RISCV_CSR_AIA:

- rc = kvm_riscv_vcpu_aia_set_csr(vcpu, reg_num, reg_val);

-static int kvm_riscv_vcpu_get_reg_isa_ext(struct kvm_vcpu *vcpu,

- const struct kvm_one_reg *reg)

- unsigned long __user *uaddr =

- (unsigned long __user *)(unsigned long)reg->addr;

- unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |

- KVM_REG_SIZE_MASK |

- KVM_REG_RISCV_ISA_EXT);

- unsigned long reg_val = 0;

- unsigned long host_isa_ext;

- if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))

- if (reg_num >= KVM_RISCV_ISA_EXT_MAX ||

- reg_num >= ARRAY_SIZE(kvm_isa_ext_arr))

- host_isa_ext = kvm_isa_ext_arr[reg_num];

- if (__riscv_isa_extension_available(vcpu->arch.isa, host_isa_ext))

- reg_val = 1; /* Mark the given extension as available */

- if (copy_to_user(uaddr, &reg_val, KVM_REG_SIZE(reg->id)))

-static int kvm_riscv_vcpu_set_reg_isa_ext(struct kvm_vcpu *vcpu,

- const struct kvm_one_reg *reg)

- unsigned long __user *uaddr =

- (unsigned long __user *)(unsigned long)reg->addr;

- unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |

- KVM_REG_SIZE_MASK |

- KVM_REG_RISCV_ISA_EXT);

- unsigned long reg_val;

- unsigned long host_isa_ext;

- if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))

- if (reg_num >= KVM_RISCV_ISA_EXT_MAX ||

- reg_num >= ARRAY_SIZE(kvm_isa_ext_arr))

- if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))

- host_isa_ext = kvm_isa_ext_arr[reg_num];

- if (!__riscv_isa_extension_available(NULL, host_isa_ext))

- return -EOPNOTSUPP;

- if (!vcpu->arch.ran_atleast_once) {

- * All multi-letter extension and a few single letter

- * extension can be disabled

- if (reg_val == 1 &&

- kvm_riscv_vcpu_isa_enable_allowed(reg_num))

- set_bit(host_isa_ext, vcpu->arch.isa);

- else if (!reg_val &&

- kvm_riscv_vcpu_isa_disable_allowed(reg_num))

- clear_bit(host_isa_ext, vcpu->arch.isa);

- kvm_riscv_vcpu_fp_reset(vcpu);

- return -EOPNOTSUPP;

-static int kvm_riscv_vcpu_set_reg(struct kvm_vcpu *vcpu,

- const struct kvm_one_reg *reg)

- switch (reg->id & KVM_REG_RISCV_TYPE_MASK) {

- case KVM_REG_RISCV_CONFIG:

- return kvm_riscv_vcpu_set_reg_config(vcpu, reg);

- case KVM_REG_RISCV_CORE:

- return kvm_riscv_vcpu_set_reg_core(vcpu, reg);

- case KVM_REG_RISCV_CSR:

- return kvm_riscv_vcpu_set_reg_csr(vcpu, reg);

- case KVM_REG_RISCV_TIMER:

- return kvm_riscv_vcpu_set_reg_timer(vcpu, reg);

- case KVM_REG_RISCV_FP_F:

- return kvm_riscv_vcpu_set_reg_fp(vcpu, reg,

- KVM_REG_RISCV_FP_F);

- case KVM_REG_RISCV_FP_D:

- return kvm_riscv_vcpu_set_reg_fp(vcpu, reg,

- KVM_REG_RISCV_FP_D);

- case KVM_REG_RISCV_ISA_EXT:

- return kvm_riscv_vcpu_set_reg_isa_ext(vcpu, reg);

- case KVM_REG_RISCV_SBI_EXT:

- return kvm_riscv_vcpu_set_reg_sbi_ext(vcpu, reg);

- case KVM_REG_RISCV_VECTOR:

- return kvm_riscv_vcpu_set_reg_vector(vcpu, reg,

- KVM_REG_RISCV_VECTOR);

-static int kvm_riscv_vcpu_get_reg(struct kvm_vcpu *vcpu,

- const struct kvm_one_reg *reg)

- switch (reg->id & KVM_REG_RISCV_TYPE_MASK) {

- case KVM_REG_RISCV_CONFIG:

- return kvm_riscv_vcpu_get_reg_config(vcpu, reg);

- case KVM_REG_RISCV_CORE:

- return kvm_riscv_vcpu_get_reg_core(vcpu, reg);

- case KVM_REG_RISCV_CSR:

- return kvm_riscv_vcpu_get_reg_csr(vcpu, reg);

- case KVM_REG_RISCV_TIMER:

- return kvm_riscv_vcpu_get_reg_timer(vcpu, reg);

- case KVM_REG_RISCV_FP_F:

- return kvm_riscv_vcpu_get_reg_fp(vcpu, reg,

- KVM_REG_RISCV_FP_F);

- case KVM_REG_RISCV_FP_D:

- return kvm_riscv_vcpu_get_reg_fp(vcpu, reg,

- KVM_REG_RISCV_FP_D);

- case KVM_REG_RISCV_ISA_EXT:

- return kvm_riscv_vcpu_get_reg_isa_ext(vcpu, reg);

- case KVM_REG_RISCV_SBI_EXT:

- return kvm_riscv_vcpu_get_reg_sbi_ext(vcpu, reg);

- case KVM_REG_RISCV_VECTOR:

- return kvm_riscv_vcpu_get_reg_vector(vcpu, reg,

- KVM_REG_RISCV_VECTOR);

- if (reg_num >= KVM_RISCV_SBI_EXT_MAX ||

- (reg_val != 1 && reg_val != 0))

- ret = -EOPNOTSUPP;

-static void *kvm_riscv_vcpu_vreg_addr(struct kvm_vcpu *vcpu,

- unsigned long reg_num,

- reg_val = &cntx->vector.vstart;

- reg_val = &cntx->vector.vl;

- reg_val = &cntx->vector.vtype;

- reg_val = &cntx->vector.vcsr;

- reg_val = cntx->vector.datap

- + (reg_num - KVM_REG_RISCV_VECTOR_REG(0)) * vlenb;

- const struct kvm_one_reg *reg,

- unsigned long rtype)

- void *reg_val = NULL;

- if (rtype == KVM_REG_RISCV_VECTOR &&

- riscv_isa_extension_available(isa, v)) {

- reg_val = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size);

- if (copy_to_user(uaddr, reg_val, reg_size))

- const struct kvm_one_reg *reg,

- unsigned long rtype)

- void *reg_val = NULL;

- if (rtype == KVM_REG_RISCV_VECTOR &&

- riscv_isa_extension_available(isa, v)) {

- reg_val = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size);

- if (copy_from_user(reg_val, uaddr, reg_size))

- struct page *page = pte_page(pte);

- * HugeTLB pages are always fully mapped, so only setting head page's

- * PG_dcache_clean flag is enough.

- if (PageHuge(page))

- page = compound_head(page);

- if (!test_bit(PG_dcache_clean, &page->flags)) {

- set_bit(PG_dcache_clean, &page->flags);

- bitmap_clear(context_asid_map, 0, num_asids);

-void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,

- enum dma_data_direction dir)

- ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size);

- ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size);

- void *vaddr = phys_to_virt(paddr);

- ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size);

-#ifdef CONFIG_PER_VMA_LOCK

- vma_end_read(vma);

-#endif /* CONFIG_PER_VMA_LOCK */

-#ifdef CONFIG_PER_VMA_LOCK

- unsigned long vaddr;

- vaddr = __get_free_page(GFP_KERNEL);

- BUG_ON(!vaddr || !pgtable_pte_page_ctor(virt_to_page((void *)vaddr)));

- return __pa(vaddr);

- unsigned long vaddr;

- vaddr = __get_free_page(GFP_KERNEL);

- BUG_ON(!vaddr || !pgtable_pmd_page_ctor(virt_to_page((void *)vaddr)));

- return __pa(vaddr);

- kernel_map.virt_addr = KERNEL_LINK_ADDR;

- unsigned long search_end = memblock_end_of_DRAM();

- ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),

- if (ret || !crash_size)

- min(search_end, (unsigned long)(SZ_4G - 1)));

- /* Try again without restricting region to 32bit addressible memory */

- search_start, search_end);

-pgd_t tmp_pg_dir[PTRS_PER_PGD] __page_aligned_bss;

-p4d_t tmp_p4d[PTRS_PER_P4D] __page_aligned_bss;

-pud_t tmp_pud[PTRS_PER_PUD] __page_aligned_bss;

-static void create_tmp_mapping(void)

- u64 ip = (u64)(ctx->insns + ctx->ninsns);

- is_tail_call ? 20 : 0, /* skip reserved nops and TCC init */

- if (addr && ctx->insns) {

- ip = (u64)(long)(ctx->insns + ctx->ninsns);

- if (!ctx->insns || !ctx->prog->aux->extable || BPF_MODE(insn->code) != BPF_PROBE_MEM)

- pc = (unsigned long)&ctx->insns[ctx->ninsns - insn_len];

- offset = pc - (long)&ex->insn;

- if (WARN_ON_ONCE(offset >= 0 || offset < INT_MIN))

- ex->insn = offset;

- offset = (long)&ex->fixup - (pc + insn_len * sizeof(u16));

- if (!FIELD_FIT(BPF_FIXUP_OFFSET_MASK, offset))

- ex->fixup = FIELD_PREP(BPF_FIXUP_OFFSET_MASK, offset) |

-static int gen_call_or_nops(void *target, void *ip, u32 *insns)

- struct rv_jit_context ctx;

- ctx.insns = (u16 *)insns;

- for (i = 0; i < 4; i++)

- emit(rv_nop(), &ctx);

- rvoff = (s64)(target - (ip + 4));

- emit(rv_sd(RV_REG_SP, -8, RV_REG_RA), &ctx);

- ret = emit_jump_and_link(RV_REG_RA, rvoff, false, &ctx);

- emit(rv_ld(RV_REG_RA, -8, RV_REG_SP), &ctx);

-static int gen_jump_or_nops(void *target, void *ip, u32 *insns)

- return emit_jump_and_link(RV_REG_ZERO, rvoff, false, &ctx);

- u32 old_insns[4], new_insns[4];

- int (*gen_insns)(void *target, void *ip, u32 *insns);

- int ninsns = is_call ? 4 : 2;

- if (!is_bpf_text_address((unsigned long)ip))

- gen_insns = is_call ? gen_call_or_nops : gen_jump_or_nops;

- ret = gen_insns(old_addr, ip, old_insns);

- if (memcmp(ip, old_insns, ninsns * 4))

- ret = gen_insns(new_addr, ip, new_insns);

- if (memcmp(ip, new_insns, ninsns * 4))

- ret = patch_text(ip, new_insns, ninsns);

- int retaddr_off, fp_off, retval_off, args_off;

- int nregs_off, ip_off, run_ctx_off, sreg_off;

- /* Generated trampoline stack layout:

- * FP - 8 [ RA of parent func ] return address of parent

- * FP - retaddr_off [ RA of traced func ] return address of traced

- * FP - fp_off [ FP of parent func ]

- /* room for parent function return address */

- retaddr_off = stack_size;

- fp_off = stack_size;

- emit_addi(RV_REG_SP, RV_REG_SP, -stack_size, ctx);

- emit_sd(RV_REG_SP, stack_size - retaddr_off, RV_REG_RA, ctx);

- emit_sd(RV_REG_SP, stack_size - fp_off, RV_REG_FP, ctx);

- emit_addi(RV_REG_FP, RV_REG_SP, stack_size, ctx);

- if (flags & BPF_TRAMP_F_SKIP_FRAME)

- /* return address of parent function */

- emit_ld(RV_REG_RA, stack_size - 8, RV_REG_SP, ctx);

- /* return address of traced function */

- emit_ld(RV_REG_RA, stack_size - retaddr_off, RV_REG_SP, ctx);

- emit_ld(RV_REG_FP, stack_size - fp_off, RV_REG_SP, ctx);

- emit_addi(RV_REG_SP, RV_REG_SP, stack_size, ctx);

- emit_jalr(RV_REG_ZERO, RV_REG_RA, 0, ctx);

- emit_mv(rd, rs, ctx);

- emit(is64 ? rv_divu(rd, rd, rs) : rv_divuw(rd, rd, rs), ctx);

- emit(is64 ? rv_remu(rd, rd, rs) : rv_remuw(rd, rd, rs), ctx);

- emit(is64 ? rv_divu(rd, rd, RV_REG_T1) :

- rv_divuw(rd, rd, RV_REG_T1), ctx);

- emit(is64 ? rv_remu(rd, rd, RV_REG_T1) :

- rv_remuw(rd, rd, RV_REG_T1), ctx);

- rvoff = rv_offset(i, off, ctx);

- /* LDX: dst = *(size *)(src + off) */

- emit(rv_lbu(rd, off, rs), ctx);

- emit(rv_lbu(rd, 0, RV_REG_T1), ctx);

- if (insn_is_zext(&insn[1]))

- emit(rv_lhu(rd, off, rs), ctx);

- emit(rv_lhu(rd, 0, RV_REG_T1), ctx);

- if (insn_is_zext(&insn[1]))

- emit(rv_lwu(rd, off, rs), ctx);

- emit(rv_lwu(rd, 0, RV_REG_T1), ctx);

- if (insn_is_zext(&insn[1]))

- /* reserve 4 nop insns */

- for (i = 0; i < 4; i++)

- jit_data->header =

- bpf_jit_binary_alloc(prog_size + extable_size,

- bpf_fill_ill_insns);

- if (!jit_data->header) {

- if (jit_data->header)

- bpf_jit_binary_free(jit_data->header);

- prog->aux->extable = (void *)ctx->insns + prog_size;

- bpf_jit_binary_free(jit_data->header);

- prog->bpf_func = (void *)ctx->insns;

- bpf_flush_icache(jit_data->header, ctx->insns + ctx->ninsns);

- bpf_jit_binary_lock_ro(jit_data->header);

-obj-$(CONFIG_S390_HYPFS_FS) += hypfs/

-obj-$(CONFIG_ARCH_HAS_KEXEC_PURGATORY) += purgatory/

- select ARCH_WANT_OPTIMIZE_VMEMMAP

- bool "kexec file based system call"

- depends on CRYPTO_SHA256

- depends on CRYPTO_SHA256_S390

- Enable the kexec file based system call. In contrast to the normal

- kexec system call this system call takes file descriptors for the

- kernel and initramfs as arguments.

-config ARCH_HAS_KEXEC_PURGATORY

- depends on KEXEC_FILE

- bool "Verify kernel signature during kexec_file_load() syscall"

- depends on KEXEC_FILE && MODULE_SIG_FORMAT

- This option makes kernel signature verification mandatory for

- the kexec_file_load() syscall.

- In addition to that option, you need to enable signature

- verification for the corresponding kernel image type being

- loaded in order for this to work.

-menu "Dump support"

- bool "kernel crash dumps"

- Generate crash dump after being started by kexec.

- Crash dump kernels are loaded in the main kernel with kexec-tools

- into a specially reserved region and then later executed after

- a crash by kdump/kexec.

- Refer to <file:Documentation/s390/zfcpdump.rst> for more details on this.

- This option also enables s390 zfcpdump.

- See also <file:Documentation/s390/zfcpdump.rst>

-config S390_HYPFS_FS

- information in an s390 hypervisor environment.

-drivers-y += drivers/s390/

- ops->sysctl_header = register_sysctl(appldata_proc_name, ops->ctl_table);

-int __bootdata(noexec_disabled);

- if (!strcmp(param, "noexec")) {

- rc = kstrtobool(val, &enabled);

- if (!rc && !enabled)

- noexec_disabled = 1;

- if (!noexec_disabled && test_facility(130)) {

- __ctl_set_bit(0, 20);

- vmemmap_start = round_up(ident_map_size, _REGION3_SIZE);

- if (IS_ENABLED(CONFIG_KASAN) ||

- vmalloc_size > _REGION2_SIZE ||

- vmemmap_start + vmemmap_size + vmalloc_size + MODULES_LEN >

- * forcing modules and vmalloc area under the ultravisor

- __memcpy_real_area = round_down(vmax - PAGE_SIZE, PAGE_SIZE);

- /* vmemmap_start is the future VMEM_MAX_PHYS, make sure it is within MAX_PHYSMEM */

- * reserve decompressor memory together with decompression heap, buffer and

- entry = set_pte_bit(entry, PAGE_KERNEL_EXEC);

- entry = set_pmd_bit(entry, SEGMENT_KERNEL_EXEC);

- entry = set_pud_bit(entry, REGION3_KERNEL_EXEC);

-#define PAES_MAX_KEYSIZE 320

-obj-$(CONFIG_S390_HYPFS_FS) += s390_hypfs.o

-s390_hypfs-objs := inode.o hypfs_diag.o hypfs_vm.o hypfs_dbfs.o hypfs_sprp.o

-s390_hypfs-objs += hypfs_diag0c.o

-extern void hypfs_dbfs_init(void);

-void hypfs_dbfs_init(void)

- dbfs_dir = debugfs_create_dir("s390_hypfs", NULL);

-void hypfs_dbfs_exit(void)

-#define TMP_SIZE 64 /* size of temporary buffers */

-static char *diag224_cpu_names; /* diag 224 name table */

-static void *diag204_buf_vmalloc; /* vmalloc pointer for diag204 data */

- * DIAG 204 member access functions.

- * Since we have two different diag 204 data formats for old and new s390

- * machines, we do not access the structs directly, but use getter functions for

- * each struct member instead. This should make the code more readable.

-/* Time information block */

-static inline int info_blk_hdr__size(enum diag204_format type)

- if (type == DIAG204_INFO_SIMPLE)

- return sizeof(struct diag204_info_blk_hdr);

- else /* DIAG204_INFO_EXT */

- return sizeof(struct diag204_x_info_blk_hdr);

-static inline __u8 info_blk_hdr__npar(enum diag204_format type, void *hdr)

- if (type == DIAG204_INFO_SIMPLE)

- return ((struct diag204_info_blk_hdr *)hdr)->npar;

- else /* DIAG204_INFO_EXT */

- return ((struct diag204_x_info_blk_hdr *)hdr)->npar;

-static inline __u8 info_blk_hdr__flags(enum diag204_format type, void *hdr)

- if (type == DIAG204_INFO_SIMPLE)

- return ((struct diag204_info_blk_hdr *)hdr)->flags;

- else /* DIAG204_INFO_EXT */

- return ((struct diag204_x_info_blk_hdr *)hdr)->flags;

-/* Partition header */

-static inline int part_hdr__size(enum diag204_format type)

- if (type == DIAG204_INFO_SIMPLE)

- return sizeof(struct diag204_part_hdr);

- else /* DIAG204_INFO_EXT */

- return sizeof(struct diag204_x_part_hdr);

-static inline __u8 part_hdr__rcpus(enum diag204_format type, void *hdr)

- if (type == DIAG204_INFO_SIMPLE)

- return ((struct diag204_part_hdr *)hdr)->cpus;

- else /* DIAG204_INFO_EXT */

- return ((struct diag204_x_part_hdr *)hdr)->rcpus;

-static inline void part_hdr__part_name(enum diag204_format type, void *hdr,

- if (type == DIAG204_INFO_SIMPLE)

- memcpy(name, ((struct diag204_part_hdr *)hdr)->part_name,

- DIAG204_LPAR_NAME_LEN);

- else /* DIAG204_INFO_EXT */

- memcpy(name, ((struct diag204_x_part_hdr *)hdr)->part_name,

- DIAG204_LPAR_NAME_LEN);

- EBCASC(name, DIAG204_LPAR_NAME_LEN);

- name[DIAG204_LPAR_NAME_LEN] = 0;

-/* CPU info block */

-static inline int cpu_info__size(enum diag204_format type)

- if (type == DIAG204_INFO_SIMPLE)

- return sizeof(struct diag204_cpu_info);

- else /* DIAG204_INFO_EXT */

- return sizeof(struct diag204_x_cpu_info);

-static inline __u8 cpu_info__ctidx(enum diag204_format type, void *hdr)

- if (type == DIAG204_INFO_SIMPLE)

- return ((struct diag204_cpu_info *)hdr)->ctidx;

- else /* DIAG204_INFO_EXT */

- return ((struct diag204_x_cpu_info *)hdr)->ctidx;

-static inline __u16 cpu_info__cpu_addr(enum diag204_format type, void *hdr)

- if (type == DIAG204_INFO_SIMPLE)

- return ((struct diag204_cpu_info *)hdr)->cpu_addr;

- else /* DIAG204_INFO_EXT */

- return ((struct diag204_x_cpu_info *)hdr)->cpu_addr;

-static inline __u64 cpu_info__acc_time(enum diag204_format type, void *hdr)

- if (type == DIAG204_INFO_SIMPLE)

- return ((struct diag204_cpu_info *)hdr)->acc_time;

- else /* DIAG204_INFO_EXT */

- return ((struct diag204_x_cpu_info *)hdr)->acc_time;

-static inline __u64 cpu_info__lp_time(enum diag204_format type, void *hdr)

- if (type == DIAG204_INFO_SIMPLE)

- return ((struct diag204_cpu_info *)hdr)->lp_time;

- else /* DIAG204_INFO_EXT */

- return ((struct diag204_x_cpu_info *)hdr)->lp_time;

-static inline __u64 cpu_info__online_time(enum diag204_format type, void *hdr)

- if (type == DIAG204_INFO_SIMPLE)

- return 0; /* online_time not available in simple info */

- else /* DIAG204_INFO_EXT */

- return ((struct diag204_x_cpu_info *)hdr)->online_time;

-/* Physical header */

-static inline int phys_hdr__size(enum diag204_format type)

- if (type == DIAG204_INFO_SIMPLE)

- return sizeof(struct diag204_phys_hdr);

- else /* DIAG204_INFO_EXT */

- return sizeof(struct diag204_x_phys_hdr);

-static inline __u8 phys_hdr__cpus(enum diag204_format type, void *hdr)

- if (type == DIAG204_INFO_SIMPLE)

- return ((struct diag204_phys_hdr *)hdr)->cpus;

- else /* DIAG204_INFO_EXT */

- return ((struct diag204_x_phys_hdr *)hdr)->cpus;

-/* Physical CPU info block */

-static inline int phys_cpu__size(enum diag204_format type)

- if (type == DIAG204_INFO_SIMPLE)

- return sizeof(struct diag204_phys_cpu);

- else /* DIAG204_INFO_EXT */

- return sizeof(struct diag204_x_phys_cpu);

-static inline __u16 phys_cpu__cpu_addr(enum diag204_format type, void *hdr)

- if (type == DIAG204_INFO_SIMPLE)

- return ((struct diag204_phys_cpu *)hdr)->cpu_addr;

- else /* DIAG204_INFO_EXT */

- return ((struct diag204_x_phys_cpu *)hdr)->cpu_addr;

-static inline __u64 phys_cpu__mgm_time(enum diag204_format type, void *hdr)

- if (type == DIAG204_INFO_SIMPLE)

- return ((struct diag204_phys_cpu *)hdr)->mgm_time;

- else /* DIAG204_INFO_EXT */

- return ((struct diag204_x_phys_cpu *)hdr)->mgm_time;

-static inline __u64 phys_cpu__ctidx(enum diag204_format type, void *hdr)

- if (type == DIAG204_INFO_SIMPLE)

- return ((struct diag204_phys_cpu *)hdr)->ctidx;

- else /* DIAG204_INFO_EXT */

- return ((struct diag204_x_phys_cpu *)hdr)->ctidx;

- if (diag204_buf_vmalloc) {

- vfree(diag204_buf_vmalloc);

- diag204_buf_vmalloc = NULL;

- free_pages((unsigned long) diag204_buf, 0);

-static void *page_align_ptr(void *ptr)

- return (void *) PAGE_ALIGN((unsigned long) ptr);

-static void *diag204_alloc_vbuf(int pages)

- /* The buffer has to be page aligned! */

- diag204_buf_vmalloc = vmalloc(array_size(PAGE_SIZE, (pages + 1)));

- if (!diag204_buf_vmalloc)

- return ERR_PTR(-ENOMEM);

- diag204_buf = page_align_ptr(diag204_buf_vmalloc);

- diag204_buf_pages = pages;

- return diag204_buf;

-static void *diag204_alloc_rbuf(void)

- diag204_buf = (void*)__get_free_pages(GFP_KERNEL,0);

- return ERR_PTR(-ENOMEM);

- diag204_buf_pages = 1;

- return diag204_buf;

-static void *diag204_get_buffer(enum diag204_format fmt, int *pages)

- return diag204_alloc_rbuf();

- return ERR_PTR(-ENOSYS);

- return diag204_alloc_vbuf(*pages);

- diag204_info_type = DIAG204_INFO_EXT;

- diag204_info_type = DIAG204_INFO_SIMPLE;

-static int diag204_do_store(void *buf, int pages)

- rc = diag204((unsigned long) diag204_store_sc |

- (unsigned long) diag204_info_type, pages, buf);

- return rc < 0 ? -ENOSYS : 0;

-static void *diag204_store(void)

- buf = diag204_get_buffer(diag204_info_type, &pages);

- rc = diag204_do_store(buf, pages);

- return ERR_PTR(rc);

-/* Diagnose 224 functions */

-static int diag224_get_name_table(void)

- /* memory must be below 2GB */

- diag224_cpu_names = (char *) __get_free_page(GFP_KERNEL | GFP_DMA);

- if (!diag224_cpu_names)

- if (diag224(diag224_cpu_names)) {

- free_page((unsigned long) diag224_cpu_names);

- return -EOPNOTSUPP;

- EBCASC(diag224_cpu_names + 16, (*diag224_cpu_names + 1) * 16);

-static void diag224_delete_name_table(void)

- free_page((unsigned long) diag224_cpu_names);

-static int diag224_idx2name(int index, char *name)

- memcpy(name, diag224_cpu_names + ((index + 1) * DIAG204_CPU_NAME_LEN),

- DIAG204_CPU_NAME_LEN);

- name[DIAG204_CPU_NAME_LEN] = 0;

- d204 = page_align_ptr(base + sizeof(d204->hdr)) - sizeof(d204->hdr);

- rc = diag204_do_store(d204->buf, diag204_buf_pages);

- if (diag204_info_type == DIAG204_INFO_EXT)

- if (MACHINE_IS_LPAR) {

- rc = diag224_get_name_table();

- pr_err("The hardware system does not provide all "

- "functions required by hypfs\n");

- debugfs_remove(dbfs_d204_file);

- diag224_delete_name_table();

- * Functions to create the directory structure

- * *******************************************

-static int hypfs_create_cpu_files(struct dentry *cpus_dir, void *cpu_info)

- struct dentry *cpu_dir;

- char buffer[TMP_SIZE];

- snprintf(buffer, TMP_SIZE, "%d", cpu_info__cpu_addr(diag204_info_type,

- cpu_dir = hypfs_mkdir(cpus_dir, buffer);

- rc = hypfs_create_u64(cpu_dir, "mgmtime",

- cpu_info__acc_time(diag204_info_type, cpu_info) -

- cpu_info__lp_time(diag204_info_type, cpu_info));

- return PTR_ERR(rc);

- rc = hypfs_create_u64(cpu_dir, "cputime",

- cpu_info__lp_time(diag204_info_type, cpu_info));

- return PTR_ERR(rc);

- if (diag204_info_type == DIAG204_INFO_EXT) {

- rc = hypfs_create_u64(cpu_dir, "onlinetime",

- cpu_info__online_time(diag204_info_type,

- return PTR_ERR(rc);

- diag224_idx2name(cpu_info__ctidx(diag204_info_type, cpu_info), buffer);

- rc = hypfs_create_str(cpu_dir, "type", buffer);

- return PTR_ERR_OR_ZERO(rc);

-static void *hypfs_create_lpar_files(struct dentry *systems_dir, void *part_hdr)

- struct dentry *cpus_dir;

- struct dentry *lpar_dir;

- char lpar_name[DIAG204_LPAR_NAME_LEN + 1];

- part_hdr__part_name(diag204_info_type, part_hdr, lpar_name);

- lpar_name[DIAG204_LPAR_NAME_LEN] = 0;

- lpar_dir = hypfs_mkdir(systems_dir, lpar_name);

- if (IS_ERR(lpar_dir))

- cpus_dir = hypfs_mkdir(lpar_dir, "cpus");

- if (IS_ERR(cpus_dir))

- cpu_info = part_hdr + part_hdr__size(diag204_info_type);

- for (i = 0; i < part_hdr__rcpus(diag204_info_type, part_hdr); i++) {

- rc = hypfs_create_cpu_files(cpus_dir, cpu_info);

- return ERR_PTR(rc);

- cpu_info += cpu_info__size(diag204_info_type);

-static int hypfs_create_phys_cpu_files(struct dentry *cpus_dir, void *cpu_info)

- struct dentry *cpu_dir;

- char buffer[TMP_SIZE];

- snprintf(buffer, TMP_SIZE, "%i", phys_cpu__cpu_addr(diag204_info_type,

- cpu_dir = hypfs_mkdir(cpus_dir, buffer);

- if (IS_ERR(cpu_dir))

- return PTR_ERR(cpu_dir);

- rc = hypfs_create_u64(cpu_dir, "mgmtime",

- phys_cpu__mgm_time(diag204_info_type, cpu_info));

- return PTR_ERR(rc);

- diag224_idx2name(phys_cpu__ctidx(diag204_info_type, cpu_info), buffer);

- rc = hypfs_create_str(cpu_dir, "type", buffer);

- return PTR_ERR_OR_ZERO(rc);

-static void *hypfs_create_phys_files(struct dentry *parent_dir, void *phys_hdr)

- struct dentry *cpus_dir;

- cpus_dir = hypfs_mkdir(parent_dir, "cpus");

- if (IS_ERR(cpus_dir))

- cpu_info = phys_hdr + phys_hdr__size(diag204_info_type);

- for (i = 0; i < phys_hdr__cpus(diag204_info_type, phys_hdr); i++) {

- rc = hypfs_create_phys_cpu_files(cpus_dir, cpu_info);

- return ERR_PTR(rc);

- cpu_info += phys_cpu__size(diag204_info_type);

-int hypfs_diag_create_files(struct dentry *root)

- struct dentry *systems_dir, *hyp_dir;

- void *time_hdr, *part_hdr;

- void *buffer, *ptr;

- buffer = diag204_store();

- if (IS_ERR(buffer))

- return PTR_ERR(buffer);

- systems_dir = hypfs_mkdir(root, "systems");

- if (IS_ERR(systems_dir)) {

- rc = PTR_ERR(systems_dir);

- time_hdr = (struct x_info_blk_hdr *)buffer;

- part_hdr = time_hdr + info_blk_hdr__size(diag204_info_type);

- for (i = 0; i < info_blk_hdr__npar(diag204_info_type, time_hdr); i++) {

- part_hdr = hypfs_create_lpar_files(systems_dir, part_hdr);

- if (IS_ERR(part_hdr)) {

- rc = PTR_ERR(part_hdr);

- if (info_blk_hdr__flags(diag204_info_type, time_hdr) &

- DIAG204_LPAR_PHYS_FLG) {

- ptr = hypfs_create_phys_files(root, part_hdr);

- if (IS_ERR(ptr)) {

- rc = PTR_ERR(ptr);

- hyp_dir = hypfs_mkdir(root, "hyp");

- if (IS_ERR(hyp_dir)) {

- rc = PTR_ERR(hyp_dir);

- ptr = hypfs_create_str(hyp_dir, "type", "LPAR Hypervisor");

- if (IS_ERR(ptr)) {

- rc = PTR_ERR(ptr);

-static char *guest_query;

-struct diag2fc_data {

- __u64 mem_share_kb;

- __u64 mem_used_kb;

- __u32 cpu_use_samp;

- __u32 cpu_delay_samp;

- __u32 page_wait_samp;

- char guest_name[NAME_LEN];

-struct diag2fc_parm_list {

- char userid[NAME_LEN];

- char aci_grp[NAME_LEN];

- memcpy(parm_list.userid, query, NAME_LEN);

- ASCEBC(parm_list.userid, NAME_LEN);

- memcpy(parm_list.aci_grp, all_groups, NAME_LEN);

- ASCEBC(parm_list.aci_grp, NAME_LEN);

-static void *diag2fc_store(char *query, unsigned int *count, int offset)

-static void diag2fc_free(const void *data)

-#define ATTRIBUTE(dir, name, member) \

- rc = hypfs_create_u64(dir, name, member); \

- return PTR_ERR(rc); \

-static int hypfs_vm_create_guest(struct dentry *systems_dir,

- struct diag2fc_data *data)

- char guest_name[NAME_LEN + 1] = {};

- struct dentry *guest_dir, *cpus_dir, *samples_dir, *mem_dir;

- int dedicated_flag, capped_value;

- capped_value = (data->flags & 0x00000006) >> 1;

- dedicated_flag = (data->flags & 0x00000008) >> 3;

- memcpy(guest_name, data->guest_name, NAME_LEN);

- EBCASC(guest_name, NAME_LEN);

- strim(guest_name);

- guest_dir = hypfs_mkdir(systems_dir, guest_name);

- if (IS_ERR(guest_dir))

- return PTR_ERR(guest_dir);

- ATTRIBUTE(guest_dir, "onlinetime_us", data->el_time);

- /* logical cpu information */

- cpus_dir = hypfs_mkdir(guest_dir, "cpus");

- if (IS_ERR(cpus_dir))

- return PTR_ERR(cpus_dir);

- ATTRIBUTE(cpus_dir, "cputime_us", data->used_cpu);

- ATTRIBUTE(cpus_dir, "capped", capped_value);

- ATTRIBUTE(cpus_dir, "dedicated", dedicated_flag);

- ATTRIBUTE(cpus_dir, "count", data->vcpus);

- * Note: The "weight_min" attribute got the wrong name.

- * The value represents the number of non-stopped (operating)

- ATTRIBUTE(cpus_dir, "weight_min", data->ocpus);

- ATTRIBUTE(cpus_dir, "weight_max", data->cpu_max);

- ATTRIBUTE(cpus_dir, "weight_cur", data->cpu_shares);

- /* memory information */

- mem_dir = hypfs_mkdir(guest_dir, "mem");

- if (IS_ERR(mem_dir))

- return PTR_ERR(mem_dir);

- ATTRIBUTE(mem_dir, "min_KiB", data->mem_min_kb);

- ATTRIBUTE(mem_dir, "max_KiB", data->mem_max_kb);

- ATTRIBUTE(mem_dir, "used_KiB", data->mem_used_kb);

- ATTRIBUTE(mem_dir, "share_KiB", data->mem_share_kb);

- samples_dir = hypfs_mkdir(guest_dir, "samples");

- if (IS_ERR(samples_dir))

- return PTR_ERR(samples_dir);

- ATTRIBUTE(samples_dir, "cpu_using", data->cpu_use_samp);

- ATTRIBUTE(samples_dir, "cpu_delay", data->cpu_delay_samp);

- ATTRIBUTE(samples_dir, "mem_delay", data->page_wait_samp);

- ATTRIBUTE(samples_dir, "idle", data->idle_samp);

- ATTRIBUTE(samples_dir, "other", data->other_samp);

- ATTRIBUTE(samples_dir, "total", data->total_samp);

-int hypfs_vm_create_files(struct dentry *root)

- struct dentry *dir, *file;

- struct diag2fc_data *data;

- unsigned int count = 0;

- data = diag2fc_store(guest_query, &count, 0);

- return PTR_ERR(data);

- /* Hypervisor Info */

- dir = hypfs_mkdir(root, "hyp");

- if (IS_ERR(dir)) {

- rc = PTR_ERR(dir);

- file = hypfs_create_str(dir, "type", "z/VM Hypervisor");

- if (IS_ERR(file)) {

- rc = PTR_ERR(file);

- /* physical cpus */

- dir = hypfs_mkdir(root, "cpus");

- if (IS_ERR(dir)) {

- rc = PTR_ERR(dir);

- file = hypfs_create_u64(dir, "count", data->lcpus);

- if (IS_ERR(file)) {

- rc = PTR_ERR(file);

- dir = hypfs_mkdir(root, "systems");

- if (IS_ERR(dir)) {

- rc = PTR_ERR(dir);

- for (i = 0; i < count; i++) {

- rc = hypfs_vm_create_guest(dir, &(data[i]));

- diag2fc_free(data);

- d2fc = diag2fc_store(guest_query, &count, sizeof(d2fc->hdr));

- guest_query = all_guests;

- guest_query = local_guest;

- inode->i_atime = inode->i_mtime = inode->i_ctime = current_time(inode);

- ret->i_atime = ret->i_mtime = ret->i_ctime = current_time(ret);

-static int __init hypfs_init(void)

- hypfs_dbfs_init();

- if (hypfs_diag_init()) {

- goto fail_dbfs_exit;

- if (hypfs_vm_init()) {

- goto fail_hypfs_diag_exit;

- hypfs_sprp_init();

- if (hypfs_diag0c_init()) {

- goto fail_hypfs_sprp_exit;

- goto fail_hypfs_diag0c_exit;

- goto fail_filesystem;

-fail_hypfs_diag0c_exit:

- hypfs_diag0c_exit();

-fail_hypfs_sprp_exit:

- hypfs_sprp_exit();

-fail_hypfs_diag_exit:

- hypfs_diag_exit();

- pr_err("Initialization of hypfs failed with rc=%i\n", rc);

- hypfs_dbfs_exit();

-device_initcall(hypfs_init)

-generic-y += export.h

- u8 lsi_mask; /* Local-Summary-Indicator mask */

- * stored in the s390dbf. See Documentation/s390/s390dbf.rst for more details!

-#define MAX_DMA_ADDRESS 0x80000000

- return pte_mkwrite(pte);

-void __iomem *ioremap_prot(phys_addr_t addr, size_t size, unsigned long prot);

-void __iomem *ioremap(phys_addr_t addr, size_t size);

-void __iomem *ioremap_wc(phys_addr_t addr, size_t size);

-void __iomem *ioremap_wt(phys_addr_t addr, size_t size);

-void iounmap(volatile void __iomem *addr);

-#define ioremap ioremap

-#define ioremap_wt ioremap_wt

-#define ioremap_wc ioremap_wc

- __kernel_map_pages(virt_to_page(addr), 1, !protect);

-#define pfn_to_virt(pfn) __va(pfn_to_phys(pfn))

-#define virt_to_pfn(kaddr) (phys_to_pfn(__pa(kaddr)))

- if (!pgtable_pmd_page_ctor(virt_to_page(table))) {

- pgtable_pmd_page_dtor(virt_to_page(pmd));

-#define VMEM_MAX_PHYS ((unsigned long) vmemmap)

-static inline pte_t pte_mkwrite(pte_t pte)

- * Certain architectures need to do special things when PTEs

- * within a page table are directly modified. Thus, the following

- * hook is made available.

-static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,

- pte_t *ptep, pte_t entry)

- if (mm_has_pgste(mm))

- ptep_set_pte_at(mm, addr, ptep, entry);

- set_pte(ptep, entry);

-static inline pmd_t pmd_mkwrite(pmd_t pmd)

-extern unsigned long __samode31, __eamode31;

-extern unsigned long __stext_amode31, __etext_amode31;

-int __set_memory(unsigned long addr, int numpages, unsigned long flags);

-static inline int set_memory_ro(unsigned long addr, int numpages)

- return __set_memory(addr, numpages, SET_MEMORY_RO);

-static inline int set_memory_rw(unsigned long addr, int numpages)

- return __set_memory(addr, numpages, SET_MEMORY_RW);

-static inline int set_memory_nx(unsigned long addr, int numpages)

- return __set_memory(addr, numpages, SET_MEMORY_NX);

-static inline int set_memory_x(unsigned long addr, int numpages)

- return __set_memory(addr, numpages, SET_MEMORY_X);

-static inline int set_memory_rox(unsigned long addr, int numpages)

- return __set_memory(addr, numpages, SET_MEMORY_RO | SET_MEMORY_X);

-static inline int set_memory_rwnx(unsigned long addr, int numpages)

- return __set_memory(addr, numpages, SET_MEMORY_RW | SET_MEMORY_NX);

-static inline int set_memory_4k(unsigned long addr, int numpages)

- return __set_memory(addr, numpages, SET_MEMORY_4K);

-extern int noexec_disabled;

-#ifdef CONFIG_PFAULT

-extern int pfault_init(void);

-extern void pfault_fini(void);

-#else /* CONFIG_PFAULT */

-#define pfault_init() ({-1;})

-#define pfault_fini() do { } while (0)

-#endif /* CONFIG_PFAULT */

- pgtable_pmd_page_dtor(virt_to_page(pmd));

- tlb_remove_table(tlb, pmd);

-#define MAXEP11AESKEYBLOBSIZE 320 /* max EP11 AES key blob size */

-obj-y += sysinfo.o lgr.o os_info.o machine_kexec.o

-obj-y += entry.o reipl.o relocate_kernel.o kdebugfs.o alternative.o

- * Diagnose 210: Get information about a virtual device

-decompressor_handled_param(noexec);

- if (test_facility(130) && !noexec_disabled) {

- __ctl_set_bit(0, 20);

- * ECBDIC -> ASCII, ASCII -> ECBDIC,

-#include <asm/export.h>

- strncpy(_value, buf, sizeof(_value) - 1); \

- &sys_ipl_type_attr.attr,

- &sys_ipl_secure_attr.attr,

- &sys_ipl_has_secure_attr.attr,

- &sys_ipl_type_attr.attr,

- &sys_ipl_secure_attr.attr,

- &sys_ipl_has_secure_attr.attr,

- &sys_ipl_type_attr.attr,

- &sys_ipl_secure_attr.attr,

- &sys_ipl_has_secure_attr.attr,

- &sys_ipl_type_attr.attr,

- &sys_ipl_secure_attr.attr,

- &sys_ipl_has_secure_attr.attr,

- &sys_ipl_type_attr.attr,

- &sys_ipl_secure_attr.attr,

- &sys_ipl_has_secure_attr.attr,

-/* UNKNOWN ipl device attributes */

-static struct attribute *ipl_unknown_attrs[] = {

-static struct attribute_group ipl_unknown_attr_group = {

- .attrs = ipl_unknown_attrs,

- rc = sysfs_create_group(&ipl_kset->kobj,

- &ipl_unknown_attr_group);

- vmcoreinfo_append_str("SAMODE31=%lx\n", __samode31);

- vmcoreinfo_append_str("EAMODE31=%lx\n", __eamode31);

- ptr = (void *)ipl_cert_list_addr;

-#include <asm/export.h>

-#define STACK_FRAME_SIZE (STACK_FRAME_OVERHEAD + __PT_SIZE)

-#define STACK_PTREGS (STACK_FRAME_OVERHEAD)

-#define STACK_PTREGS_GPRS (STACK_PTREGS + __PT_GPRS)

-#define STACK_PTREGS_PSW (STACK_PTREGS + __PT_PSW)

-#define STACK_PTREGS_ORIG_GPR2 (STACK_PTREGS + __PT_ORIG_GPR2)

-#define STACK_PTREGS_FLAGS (STACK_PTREGS + __PT_FLAGS)

- # allocate pt_regs and stack frame for ftrace_trace_function

- aghi %r15,-STACK_FRAME_SIZE

- stg %r1,(STACK_PTREGS_GPRS+15*8)(%r15)

- xc STACK_PTREGS_ORIG_GPR2(8,%r15),STACK_PTREGS_ORIG_GPR2(%r15)

- stg %r14,(STACK_PTREGS_PSW)(%r15)

- mvghi STACK_PTREGS_FLAGS(%r15),_PIF_FTRACE_FULL_REGS

- xc STACK_PTREGS_FLAGS(8,%r15),STACK_PTREGS_FLAGS(%r15)

- stg %r0,(STACK_PTREGS_PSW+8)(%r15)

- stmg %r2,%r14,(STACK_PTREGS_GPRS+2*8)(%r15)

- la %r5,STACK_PTREGS(%r15)

- lmg %r2,%r3,(STACK_PTREGS_GPRS+14*8)(%r15)

- lg %r4,(STACK_PTREGS_PSW+8)(%r15)

- stg %r2,(STACK_PTREGS_GPRS+14*8)(%r15)

- lg %r0,(STACK_PTREGS_PSW+8)(%r15)

- ltg %r1,STACK_PTREGS_ORIG_GPR2(%r15)

- lg %r1,STACK_PTREGS_ORIG_GPR2(%r15)

-0: lmg %r2,%r15,(STACK_PTREGS_GPRS+2*8)(%r15)

- aghi %r15,-STACK_FRAME_OVERHEAD

- aghi %r15,STACK_FRAME_OVERHEAD

- lay %r15,-STACK_FRAME_SIZE(%r15)

- lay %r7,STACK_FRAME_SIZE(%r15)

-unsigned long __amode31_ref __samode31 = (unsigned long)&_samode31;

-unsigned long __amode31_ref __eamode31 = (unsigned long)&_eamode31;

-unsigned long __amode31_ref __stext_amode31 = (unsigned long)&_stext_amode31;

-unsigned long __amode31_ref __etext_amode31 = (unsigned long)&_etext_amode31;

-int __bootdata(noexec_disabled);

- long amode31_offset = physmem_info.reserved[RR_AMODE31].start - __samode31;

- memmove((void *)physmem_info.reserved[RR_AMODE31].start, (void *)__samode31, amode31_size);

- memset((void *)__samode31, 0, amode31_size);

- ptr = (void *) early_ipl_comp_list_addr;

- struct lowcore *lc = lowcore_ptr[cpu];

- __ctl_store(lc->cregs_save_area, 0, 15);

- spin_unlock(&ctl_lock);

- diag204_buf = vmalloc(array_size(pages, PAGE_SIZE));

-static int uv_pin_shared(unsigned long paddr)

- if (test_bit_inv(BIT_UV_FEAT_MISC, &uv_info.uv_feature_indications))

- if (guestdbg_enabled(vcpu) && per_event(vcpu)) {

- rc = kvm_s390_skey_check_enable(vcpu);

- /* process PER, also if the instruction is processed in user space */

- if (vcpu->arch.sie_block->icptstatus & 0x02 &&

- (!rc || rc == -EOPNOTSUPP))

- .lsi_ptr = &gib_alert_irq.lsi_mask,

- if (!test_bit_inv(BIT_UV_FEAT_AIV, &uv_info.uv_feature_indications))

- return kvm_s390_inject_vcpu(vcpu, &s390irq);

- return -ENOIOCTLCMD;

-static inline bool kvm_s390_pv_is_protected(struct kvm *kvm)

- lockdep_assert_held(&kvm->lock);

- return !!kvm_s390_pv_get_handle(kvm);

-static inline bool kvm_s390_pv_cpu_is_protected(struct kvm_vcpu *vcpu)

- lockdep_assert_held(&vcpu->mutex);

- return !!kvm_s390_pv_cpu_get_handle(vcpu);

- WARN_ONCE(cc, "protvirt destroy vm fast failed handle %llx rc %x rrc %x",

- KVM_UV_EVENT(kvm, 3, "PROTVIRT CREATE VM: handle %llx len %llx rc %x rrc %x",

- uvcb.guest_handle, uvcb.guest_stor_len, *rc, *rrc);

-#include <asm/export.h>

- diag10_range(virt_to_pfn(addr), 1);

- address_markers[AMODE31_START_NR].start_address = __samode31;

- address_markers[AMODE31_END_NR].start_address = __eamode31;

- address_markers[MEMCPY_REAL_END_NR].start_address = __memcpy_real_area + PAGE_SIZE;

- pr_err("DCSS %s exceeds the kernel mapping range (%lu) "

- "and cannot be loaded\n", seg_name, VMEM_MAX_PHYS);

-#define __SUBCODE_MASK 0x0600

-#define __PF_RES_FIELD 0x8000000000000000ULL

-#ifdef CONFIG_PER_VMA_LOCK

- vma_end_read(vma);

-#endif /* CONFIG_PER_VMA_LOCK */

-#ifdef CONFIG_PFAULT

- * 'pfault' pseudo page faults routines.

-static int pfault_disable;

-static int __init nopfault(char *str)

- pfault_disable = 1;

-__setup("nopfault", nopfault);

-struct pfault_refbk {

-} __attribute__ ((packed, aligned(8)));

-static struct pfault_refbk pfault_init_refbk = {

- .refdiagc = 0x258,

- .refgaddr = __LC_LPP,

- .refselmk = 1ULL << 48,

- .refcmpmk = 1ULL << 48,

- .reserved = __PF_RES_FIELD

-int pfault_init(void)

- if (pfault_disable)

- diag_stat_inc(DIAG_STAT_X258);

- " diag %1,%0,0x258\n"

- : "a" (&pfault_init_refbk), "m" (pfault_init_refbk) : "cc");

-static struct pfault_refbk pfault_fini_refbk = {

- .refdiagc = 0x258,

-void pfault_fini(void)

- if (pfault_disable)

- diag_stat_inc(DIAG_STAT_X258);

- " diag %0,0,0x258\n"

- : : "a" (&pfault_fini_refbk), "m" (pfault_fini_refbk) : "cc");

-static DEFINE_SPINLOCK(pfault_lock);

-static LIST_HEAD(pfault_list);

-#define PF_COMPLETE 0x0080

- * The mechanism of our pfault code: if Linux is running as guest, runs a user

- * space process and the user space process accesses a page that the host has

- * paged out we get a pfault interrupt.

- * This allows us, within the guest, to schedule a different process. Without

- * this mechanism the host would have to suspend the whole virtual cpu until

- * the page has been paged in.

- * So when we get such an interrupt then we set the state of the current task

- * to uninterruptible and also set the need_resched flag. Both happens within

- * interrupt context(!). If we later on want to return to user space we

- * recognize the need_resched flag and then call schedule(). It's not very

- * obvious how this works...

- * Of course we have a lot of additional fun with the completion interrupt (->

- * host signals that a page of a process has been paged in and the process can

- * continue to run). This interrupt can arrive on any cpu and, since we have

- * virtual cpus, actually appear before the interrupt that signals that a page

-static void pfault_interrupt(struct ext_code ext_code,

- unsigned int param32, unsigned long param64)

- struct task_struct *tsk;

- * Get the external interruption subcode & pfault initial/completion

- * signal bit. VM stores this in the 'cpu address' field associated

- * with the external interrupt.

- subcode = ext_code.subcode;

- if ((subcode & 0xff00) != __SUBCODE_MASK)

- inc_irq_stat(IRQEXT_PFL);

- /* Get the token (= pid of the affected task). */

- pid = param64 & LPP_PID_MASK;

- tsk = find_task_by_pid_ns(pid, &init_pid_ns);

- get_task_struct(tsk);

- rcu_read_unlock();

- spin_lock(&pfault_lock);

- if (subcode & PF_COMPLETE) {

- /* signal bit is set -> a page has been swapped in by VM */

- if (tsk->thread.pfault_wait == 1) {

- /* Initial interrupt was faster than the completion

- * interrupt. pfault_wait is valid. Set pfault_wait

- * back to zero and wake up the process. This can

- * safely be done because the task is still sleeping

- * and can't produce new pfaults. */

- tsk->thread.pfault_wait = 0;

- list_del(&tsk->thread.list);

- wake_up_process(tsk);

- put_task_struct(tsk);

- /* Completion interrupt was faster than initial

- * interrupt. Set pfault_wait to -1 so the initial

- * interrupt doesn't put the task to sleep.

- * If the task is not running, ignore the completion

- * interrupt since it must be a leftover of a PFAULT

- * CANCEL operation which didn't remove all pending

- * completion interrupts. */

- if (task_is_running(tsk))

- tsk->thread.pfault_wait = -1;

- /* signal bit not set -> a real page is missing. */

- if (WARN_ON_ONCE(tsk != current))

- if (tsk->thread.pfault_wait == 1) {

- /* Already on the list with a reference: put to sleep */

- } else if (tsk->thread.pfault_wait == -1) {

- /* Completion interrupt was faster than the initial

- * interrupt (pfault_wait == -1). Set pfault_wait

- * back to zero and exit. */

- tsk->thread.pfault_wait = 0;

- /* Initial interrupt arrived before completion

- * interrupt. Let the task sleep.

- * An extra task reference is needed since a different

- * cpu may set the task state to TASK_RUNNING again

- * before the scheduler is reached. */

- get_task_struct(tsk);

- tsk->thread.pfault_wait = 1;

- list_add(&tsk->thread.list, &pfault_list);

- /* Since this must be a userspace fault, there

- * is no kernel task state to trample. Rely on the

- * return to userspace schedule() to block. */

- __set_current_state(TASK_UNINTERRUPTIBLE);

- set_tsk_need_resched(tsk);

- set_preempt_need_resched();

- spin_unlock(&pfault_lock);

- put_task_struct(tsk);

-static int pfault_cpu_dead(unsigned int cpu)

- struct thread_struct *thread, *next;

- struct task_struct *tsk;

- spin_lock_irq(&pfault_lock);

- list_for_each_entry_safe(thread, next, &pfault_list, list) {

- thread->pfault_wait = 0;

- list_del(&thread->list);

- tsk = container_of(thread, struct task_struct, thread);

- wake_up_process(tsk);

- put_task_struct(tsk);

- spin_unlock_irq(&pfault_lock);

-static int __init pfault_irq_init(void)

- rc = register_external_irq(EXT_IRQ_CP_SERVICE, pfault_interrupt);

- rc = pfault_init() == 0 ? 0 : -EOPNOTSUPP;

- irq_subclass_register(IRQ_SUBCLASS_SERVICE_SIGNAL);

- cpuhp_setup_state_nocalls(CPUHP_S390_PFAULT_DEAD, "s390/pfault:dead",

- NULL, pfault_cpu_dead);

- unregister_external_irq(EXT_IRQ_CP_SERVICE, pfault_interrupt);

- pfault_disable = 1;

-early_initcall(pfault_irq_init);

-#endif /* CONFIG_PFAULT */

- if (test_bit_inv(BIT_UV_FEAT_MISC, &uv_info.uv_feature_indications) &&

- max_zone_pfns[ZONE_DMA] = PFN_DOWN(MAX_DMA_ADDRESS);

- set_memory_ro((unsigned long)__start_ro_after_init, size >> PAGE_SHIFT);

- phys = src & PAGE_MASK;

- offset = src & ~PAGE_MASK;

- len = min(count, PAGE_SIZE - offset);

- new = pte_mkwrite(pte_mkdirty(new));

- new = pmd_mkwrite(pmd_mkdirty(new));

-int __set_memory(unsigned long addr, int numpages, unsigned long flags)

- struct page *page = alloc_pages(GFP_KERNEL, CRST_ALLOC_ORDER);

- arch_set_page_dat(page, CRST_ALLOC_ORDER);

- return (unsigned long *) page_to_virt(page);

- free_pages((unsigned long)table, CRST_ALLOC_ORDER);

- struct page *page;

- page = alloc_page(GFP_KERNEL);

- table = (u64 *)page_to_virt(page);

- __free_page(page);

- struct page *page;

- page = list_first_entry(&mm->context.pgtable_list,

- struct page, lru);

- mask = atomic_read(&page->_refcount) >> 24;

- table = (unsigned long *) page_to_virt(page);

- atomic_xor_bits(&page->_refcount,

- list_del(&page->lru);

- page = alloc_page(GFP_KERNEL);

- if (!pgtable_pte_page_ctor(page)) {

- __free_page(page);

- arch_set_page_dat(page, 0);

- table = (unsigned long *) page_to_virt(page);

- atomic_xor_bits(&page->_refcount, 0x03U << 24);

- atomic_xor_bits(&page->_refcount, 0x01U << 24);

- list_add(&page->lru, &mm->context.pgtable_list);

- if (!IS_ENABLED(CONFIG_DEBUG_VM) || !mask)

- struct page *page;

- page = virt_to_page(table);

- mask = atomic_xor_bits(&page->_refcount, 0x11U << (bit + 24));

- list_add(&page->lru, &mm->context.pgtable_list);

- list_del(&page->lru);

- mask = atomic_xor_bits(&page->_refcount, 0x10U << (bit + 24));

- mask = atomic_xor_bits(&page->_refcount, 0x03U << 24);

- page_table_release_check(page, table, half, mask);

- pgtable_pte_page_dtor(page);

- __free_page(page);

- struct page *page;

- page = virt_to_page(table);

- tlb_remove_table(tlb, table);

- mask = atomic_xor_bits(&page->_refcount, 0x11U << (bit + 24));

- list_add_tail(&page->lru, &mm->context.pgtable_list);

- list_del(&page->lru);

- struct page *page = virt_to_page(table);

- free_pages((unsigned long)table, CRST_ALLOC_ORDER);

- mask = atomic_xor_bits(&page->_refcount, mask << (4 + 24));

- mask = atomic_xor_bits(&page->_refcount, 0x03U << 24);

- page_table_release_check(page, table, half, mask);

- pgtable_pte_page_dtor(page);

- __free_page(page);

- table = (unsigned long *)__get_free_pages(GFP_KERNEL, CRST_ALLOC_ORDER);

- crst_table_init(table, val);

- free_pages((unsigned long)table, CRST_ALLOC_ORDER);

-#include <linux/kasan.h>

- WARN_ON_ONCE(PageReserved(virt_to_page(addr))))

- const unsigned long end = start + PUD_SIZE;

- /* Don't mess with any tables not fully in 1:1 mapping & vmemmap area */

- if (end > VMALLOC_START)

- const unsigned long end = start + P4D_SIZE;

- /* Don't mess with any tables not fully in 1:1 mapping & vmemmap area */

- if (end > VMALLOC_START)

- const unsigned long end = start + PGDIR_SIZE;

- /* Don't mess with any tables not fully in 1:1 mapping & vmemmap area */

- if (end > VMALLOC_START)

- mhp_range.end = VMEM_MAX_PHYS - 1;

-static int __init memblock_region_cmp(const void *a, const void *b)

- const struct memblock_region *r1 = a;

- const struct memblock_region *r2 = b;

- if (r1->base < r2->base)

- if (r1->base > r2->base)

-static void __init memblock_region_swap(void *a, void *b, int size)

- swap(*(struct memblock_region *)a, *(struct memblock_region *)b);

-#ifdef CONFIG_KASAN

-#define __sha(x) ((unsigned long)kasan_mem_to_shadow((void *)x))

-static inline int set_memory_kasan(unsigned long start, unsigned long end)

- start = PAGE_ALIGN_DOWN(__sha(start));

- end = PAGE_ALIGN(__sha(end));

- return set_memory_rwnx(start, (end - start) >> PAGE_SHIFT);

- * map whole physical memory to virtual memory (identity mapping)

- * we reserve enough space in the vmalloc area for vmemmap to hotplug

- * additional memory segments.

- struct memblock_region memory_rwx_regions[] = {

- .size = sizeof(struct lowcore),

- .flags = MEMBLOCK_NONE,

- .nid = NUMA_NO_NODE,

- .base = __pa(_stext),

- .size = _etext - _stext,

- .flags = MEMBLOCK_NONE,

- .nid = NUMA_NO_NODE,

- .base = __pa(_sinittext),

- .size = _einittext - _sinittext,

- .flags = MEMBLOCK_NONE,

- .nid = NUMA_NO_NODE,

- .base = __stext_amode31,

- .size = __etext_amode31 - __stext_amode31,

- .flags = MEMBLOCK_NONE,

- .nid = NUMA_NO_NODE,

- struct memblock_type memory_rwx = {

- .regions = memory_rwx_regions,

- .cnt = ARRAY_SIZE(memory_rwx_regions),

- .max = ARRAY_SIZE(memory_rwx_regions),

- phys_addr_t base, end;

- * Set RW+NX attribute on all memory, except regions enumerated with

- * memory_rwx exclude type. These regions need different attributes,

- * which are enforced afterwards.

- * __for_each_mem_range() iterate and exclude types should be sorted.

- * The relative location of _stext and _sinittext is hardcoded in the

- * linker script. However a location of __stext_amode31 and the kernel

- * image itself are chosen dynamically. Thus, sort the exclude type.

- sort(&memory_rwx_regions,

- ARRAY_SIZE(memory_rwx_regions), sizeof(memory_rwx_regions[0]),

- memblock_region_cmp, memblock_region_swap);

- __for_each_mem_range(i, &memblock.memory, &memory_rwx,

- NUMA_NO_NODE, MEMBLOCK_NONE, &base, &end, NULL) {

- set_memory_rwnx((unsigned long)__va(base),

- (end - base) >> PAGE_SHIFT);

-#ifdef CONFIG_KASAN

- for_each_mem_range(i, &base, &end)

- set_memory_kasan(base, end);

- set_memory_rox((unsigned long)_stext,

- (unsigned long)(_etext - _stext) >> PAGE_SHIFT);

- set_memory_ro((unsigned long)_etext,

- (unsigned long)(__end_rodata - _etext) >> PAGE_SHIFT);

- set_memory_rox((unsigned long)_sinittext,

- (unsigned long)(_einittext - _sinittext) >> PAGE_SHIFT);

- set_memory_rox(__stext_amode31,

- (__etext_amode31 - __stext_amode31) >> PAGE_SHIFT);

- /* lowcore must be executable for LPSWE */

- if (static_key_enabled(&cpu_has_bear))

- set_memory_nx(0, 1);

- set_memory_nx(PAGE_SIZE, 1);

- if (debug_pagealloc_enabled())

- set_memory_4k(0, ident_map_size >> PAGE_SHIFT);

-static void __iomem *__ioremap(phys_addr_t addr, size_t size, pgprot_t prot)

- unsigned long offset, vaddr;

- struct vm_struct *area;

- phys_addr_t last_addr;

- last_addr = addr + size - 1;

- if (!size || last_addr < addr)

- return (void __iomem *) addr;

- offset = addr & ~PAGE_MASK;

- addr &= PAGE_MASK;

- size = PAGE_ALIGN(size + offset);

- area = get_vm_area(size, VM_IOREMAP);

- vaddr = (unsigned long) area->addr;

- if (ioremap_page_range(vaddr, vaddr + size, addr, prot)) {

- free_vm_area(area);

- return (void __iomem *) ((unsigned long) area->addr + offset);

-void __iomem *ioremap_prot(phys_addr_t addr, size_t size, unsigned long prot)

- return __ioremap(addr, size, __pgprot(prot));

-void __iomem *ioremap(phys_addr_t addr, size_t size)

- return __ioremap(addr, size, PAGE_KERNEL);

-EXPORT_SYMBOL(ioremap);

-void __iomem *ioremap_wc(phys_addr_t addr, size_t size)

- return __ioremap(addr, size, pgprot_writecombine(PAGE_KERNEL));

-EXPORT_SYMBOL(ioremap_wc);

-void __iomem *ioremap_wt(phys_addr_t addr, size_t size)

- return __ioremap(addr, size, pgprot_writethrough(PAGE_KERNEL));

-EXPORT_SYMBOL(ioremap_wt);

- vunmap((__force void *) ((unsigned long) addr & PAGE_MASK));

-static int __init clp_misc_init(void)

- return misc_register(&clp_misc_device);

-device_initcall(clp_misc_init);

- bool "kexec system call (EXPERIMENTAL)"

- kexec is a system call that implements the ability to shutdown your

- current kernel, and to start another kernel. It is like a reboot

- but it is independent of the system firmware. And like a reboot

- you can start any kernel with it, not just Linux.

- The name comes from the similarity to the exec system call.

- It is an ongoing process to be certain the hardware in a machine

- is properly shutdown, so do not be surprised if this code does not

- initially work for you. As of this writing the exact hardware

- interface is strongly in flux, so no good recommendation can be

- bool "kernel crash dumps (EXPERIMENTAL)"

- depends on BROKEN_ON_SMP

- Generate crash dump after being started by kexec.

- This should be normally only set in special crash dump kernels

- which are loaded in the main kernel with kexec-tools into

- a specially reserved region and then later executed after

- a crash by kdump/kexec. The crash dump kernel must be compiled

- to a memory address not used by the main kernel using

- For more details see Documentation/admin-guide/kdump/kdump.rst

- bool "kexec jump (EXPERIMENTAL)"

- depends on KEXEC && HIBERNATION

- Jump between original kernel and kexeced kernel and invoke

- ceu_dma_membase + CEU_BUFFER_MEMORY_SIZE - 1);

- .fbdev = &lcdc_device.dev,

- ceu0_dma_membase +

- CEU_BUFFER_MEMORY_SIZE - 1);

- ceu1_dma_membase +

- CEU_BUFFER_MEMORY_SIZE - 1);

- .fbdev = &kfr2r09_sh_lcdc_device.dev,

- ceu_dma_membase + CEU_BUFFER_MEMORY_SIZE - 1);

- ceu0_dma_membase +

- CEU_BUFFER_MEMORY_SIZE - 1);

- ceu1_dma_membase +

- CEU_BUFFER_MEMORY_SIZE - 1);

- .flag = FBINFO_FLAG_DEFAULT,

- flush_work(&psw->work);

- * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache

- * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache

-extern void (*local_flush_dcache_page)(void *args);

-extern void (*local_flush_icache_page)(void *args);

-void flush_dcache_page(struct page *page);

-extern void flush_icache_page(struct vm_area_struct *vma,

- struct page *page);

-void iounmap(void __iomem *addr);

-void __iomem *__ioremap_caller(phys_addr_t offset, unsigned long size,

- pgprot_t prot, void *caller);

-static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size)

- return __ioremap_caller(offset, size, PAGE_KERNEL_NOCACHE,

- __builtin_return_address(0));

-static inline void __iomem *

-ioremap_cache(phys_addr_t offset, unsigned long size)

- return __ioremap_caller(offset, size, PAGE_KERNEL,

- __builtin_return_address(0));

-#define ioremap_cache ioremap_cache

-#ifdef CONFIG_HAVE_IOREMAP_PROT

-static inline void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,

- unsigned long flags)

- return __ioremap_caller(offset, size, __pgprot(flags),

- __builtin_return_address(0));

-#endif /* CONFIG_HAVE_IOREMAP_PROT */

-#else /* CONFIG_MMU */

-static inline void __iomem *ioremap(phys_addr_t offset, size_t size)

- return (void __iomem *)(unsigned long)offset;

-static inline void iounmap(volatile void __iomem *addr) { }

-#define inb_p(addr) inb(addr)

-#define inw_p(addr) inw(addr)

-#define inl_p(addr) inl(addr)

-#define outb_p(x, addr) outb((x), (addr))

-#define outw_p(x, addr) outw((x), (addr))

-#define outl_p(x, addr) outl((x), (addr))

-#define __pte_free_tlb(tlb,pte,addr) \

- pgtable_pte_page_dtor(pte); \

- tlb_remove_page((tlb), (pte)); \

-update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)

-#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)

-#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)

-PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE);

-PTE_BIT_FUNC(low, mkwrite, |= _PAGE_RW);

- local_flush_dcache_page = j2_flush_dcache;

- local_flush_icache_page = j2_flush_icache;

-static void sh4_flush_dcache_page(void *arg)

- struct page *page = arg;

- unsigned long addr = (unsigned long)page_address(page);

- struct address_space *mapping = page_mapping_file(page);

- clear_bit(PG_dcache_clean, &page->flags);

- flush_cache_one(CACHE_OC_ADDRESS_ARRAY |

- (addr & shm_align_mask), page_to_phys(page));

- local_flush_dcache_page = sh4_flush_dcache_page;

-static void sh7705_flush_dcache_page(void *arg)

- struct page *page = arg;

- struct address_space *mapping = page_mapping_file(page);

- clear_bit(PG_dcache_clean, &page->flags);

- __flush_dcache_page(__pa(page_address(page)));

-static void sh7705_flush_icache_page(void *page)

- __flush_purge_region(page_address(page), PAGE_SIZE);

- local_flush_dcache_page = sh7705_flush_dcache_page;

- local_flush_icache_page = sh7705_flush_icache_page;

-void (*local_flush_dcache_page)(void *args) = cache_noop;

-void (*local_flush_icache_page)(void *args) = cache_noop;

- if (boot_cpu_data.dcache.n_aliases && page_mapcount(page) &&

- test_bit(PG_dcache_clean, &page->flags)) {

- clear_bit(PG_dcache_clean, &page->flags);

- test_bit(PG_dcache_clean, &page->flags)) {

- clear_bit(PG_dcache_clean, &page->flags);

- if (boot_cpu_data.dcache.n_aliases && page_mapcount(from) &&

- test_bit(PG_dcache_clean, &from->flags)) {

- struct page *page;

- page = pfn_to_page(pfn);

- int dirty = !test_and_set_bit(PG_dcache_clean, &page->flags);

- __flush_purge_region(page_address(page), PAGE_SIZE);

- if (boot_cpu_data.dcache.n_aliases && page_mapcount(page) &&

- test_bit(PG_dcache_clean, &page->flags)) {

- __flush_purge_region((void *)addr, PAGE_SIZE);

-void flush_dcache_page(struct page *page)

- cacheop_on_each_cpu(local_flush_dcache_page, page, 1);

-EXPORT_SYMBOL(flush_dcache_page);

-void flush_icache_page(struct vm_area_struct *vma, struct page *page)

- /* Nothing uses the VMA, so just pass the struct page along */

- cacheop_on_each_cpu(local_flush_icache_page, page, 1);

- * Remap an arbitrary physical address space into the kernel virtual

- * address space. Needed when the kernel wants to access high addresses

- * NOTE! We need to allow non-page-aligned mappings too: we will obviously

- * have to convert them into an offset in a page-aligned mapping, but the

- * caller shouldn't need to know that small detail.

-void __iomem * __ref

-__ioremap_caller(phys_addr_t phys_addr, unsigned long size,

- pgprot_t pgprot, void *caller)

- struct vm_struct *area;

- unsigned long offset, last_addr, addr, orig_addr;

- /* Don't allow wraparound or zero size */

- last_addr = phys_addr + size - 1;

- if (!size || last_addr < phys_addr)

- mapped = pmb_remap_caller(phys_addr, size, pgprot, caller);

- * Mappings have to be page-aligned

- offset = phys_addr & ~PAGE_MASK;

- phys_addr &= PAGE_MASK;

- size = PAGE_ALIGN(last_addr+1) - phys_addr;

- area = get_vm_area_caller(size, VM_IOREMAP, caller);

- area->phys_addr = phys_addr;

- orig_addr = addr = (unsigned long)area->addr;

- if (ioremap_page_range(addr, addr + size, phys_addr, pgprot)) {

- vunmap((void *)orig_addr);

- return (void __iomem *)(offset + (char *)orig_addr);

-EXPORT_SYMBOL(__ioremap_caller);

-void iounmap(void __iomem *addr)

- struct vm_struct *p;

- if (iounmap_fixed(addr) == 0)

- if (pmb_unmap(addr) == 0)

- p = remove_vm_area((void *)(vaddr & PAGE_MASK));

- printk(KERN_ERR "%s: bad address %p\n", __func__, addr);

- BUG_ON(!test_bit(PG_dcache_clean, &page->flags));

-#include <linux/of_device.h>

-generic-y += export.h

-#define flush_icache_page(vma, pg) do { } while (0)

-#define flush_dcache_page(page) sparc_flush_page_to_ram(page)

-void flush_dcache_page_impl(struct page *page);

-void smp_flush_dcache_page_impl(struct page *page, int cpu);

-void flush_dcache_page_all(struct mm_struct *mm, struct page *page);

-#define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page)

-#define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page)

-void flush_dcache_page(struct page *page);

-#define flush_icache_page(vma, pg) do { } while(0)

-#include <linux/of_device.h>

-/* SPDX-License-Identifier: GPL-2.0 */

-/* ide.h: SPARC PCI specific IDE glue.

- * Adaptation from sparc64 version to sparc by Pete Zaitcev.

-#ifndef _SPARC_IDE_H

-#define _SPARC_IDE_H

-#include <asm/io.h>

-#ifdef CONFIG_SPARC64

-#include <asm/spitfire.h>

-#include <asm/cacheflush.h>

-#include <asm/page.h>

-#include <linux/pgtable.h>

-#include <asm/psr.h>

-#define __ide_insl(data_reg, buffer, wcount) \

- __ide_insw(data_reg, buffer, (wcount)<<1)

-#define __ide_outsl(data_reg, buffer, wcount) \

- __ide_outsw(data_reg, buffer, (wcount)<<1)

-/* On sparc, I/O ports and MMIO registers are accessed identically. */

-#define __ide_mm_insw __ide_insw

-#define __ide_mm_insl __ide_insl

-#define __ide_mm_outsw __ide_outsw

-#define __ide_mm_outsl __ide_outsl

-static inline void __ide_insw(void __iomem *port, void *dst, u32 count)

-#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)

- unsigned long end = (unsigned long)dst + (count << 1);

- if(((unsigned long)ps) & 0x2) {

- *ps++ = __raw_readw(port);

- while(count >= 2) {

- w = __raw_readw(port) << 16;

- w |= __raw_readw(port);

- *ps++ = __raw_readw(port);

-#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)

- __flush_dcache_range((unsigned long)dst, end);

-static inline void __ide_outsw(void __iomem *port, const void *src, u32 count)

-#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)

- unsigned long end = (unsigned long)src + (count << 1);

- const u16 *ps = src;

- if(((unsigned long)src) & 0x2) {

- __raw_writew(*ps++, port);

- pi = (const u32 *)ps;

- while(count >= 2) {

- __raw_writew((w >> 16), port);

- __raw_writew(w, port);

- ps = (const u16 *)pi;

- __raw_writew(*ps, port);

-#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)

- __flush_dcache_range((unsigned long)src, end);

-#endif /* __KERNEL__ */

-#endif /* _SPARC_IDE_H */

- bool exclude_self);

-#include <linux/of_device.h>

-#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)

-static inline pte_t pte_mkwrite(pte_t pte)

- return (pte_val(pte) & SRMMU_PTE_PMASK) >> (PAGE_SHIFT-4);

- set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \

-static inline pte_t pte_mkwrite(pte_t pte)

-static inline pmd_t pmd_mkwrite(pmd_t pmd)

- pte = pte_mkwrite(pte);

-#define set_pte_at(mm,addr,ptep,pte) \

- __set_pte_at((mm), (addr), (ptep), (pte), 0)

- flush_dcache_page_all(current->mm, \

- pfn_to_page(this_pfn)); \

-void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *);

-#include <asm/tlbflush.h>

-#define VIO_TAG_SIZE ((int)sizeof(struct vio_msg_tag))

- char oprom_array[1]; /* Holds property names and values. */

-#include <linux/of_device.h>

-#include <asm/export.h>

-#include <linux/of_device.h>

-#include <linux/of_platform.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_device.h>

-void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)

- if (cpumask_test_cpu(this_cpu, mask) && !exclude_self)

- if (exclude_self && cpu == this_cpu)

-static void sysrq_handle_globreg(int key)

-static void sysrq_handle_globpmu(int key)

-#include <linux/of_device.h>

- show_free_areas(0, NULL);

-static_assert(NSIGSEGV == 9);

-static inline void __local_flush_dcache_page(struct page *page)

- __flush_dcache_page(page_address(page),

- page_mapping_file(page) != NULL));

- if (page_mapping_file(page) != NULL &&

- tlb_type == spitfire)

- __flush_icache_page(__pa(page_address(page)));

-void smp_flush_dcache_page_impl(struct page *page, int cpu)

- __local_flush_dcache_page(page);

- void *pg_addr = page_address(page);

- if (page_mapping_file(page) != NULL)

- xcall_deliver(data0, __pa(pg_addr),

- (u64) pg_addr, cpumask_of(cpu));

- atomic_inc(&dcpage_flushes_xcall);

-void flush_dcache_page_all(struct mm_struct *mm, struct page *page)

- pg_addr = page_address(page);

- if (page_mapping_file(page) != NULL)

- xcall_deliver(data0, __pa(pg_addr),

- (u64) pg_addr, cpu_online_mask);

- atomic_inc(&dcpage_flushes_xcall);

- __local_flush_dcache_page(page);

-#include <linux/of_device.h>

-#include <asm/export.h>

- #include <asm/export.h>

-#include <asm/export.h>

- __flush_page_to_ram(vaddr);

-inline void flush_dcache_page_impl(struct page *page)

- __flush_dcache_page(page_address(page),

- ((tlb_type == spitfire) &&

- page_mapping_file(page) != NULL));

- if (page_mapping_file(page) != NULL &&

- tlb_type == spitfire)

- __flush_icache_page(__pa(page_address(page)));

-#define dcache_dirty_cpu(page) \

- (((page)->flags >> PG_dcache_cpu_shift) & PG_dcache_cpu_mask)

-static inline void set_dcache_dirty(struct page *page, int this_cpu)

- : "r" (mask), "r" (non_cpu_bits), "r" (&page->flags)

-static inline void clear_dcache_dirty_cpu(struct page *page, unsigned long cpu)

- : "r" (cpu), "r" (mask), "r" (&page->flags),

- pg_flags = page->flags;

- flush_dcache_page_impl(page);

- smp_flush_dcache_page_impl(page, cpu);

- clear_dcache_dirty_cpu(page, cpu);

-void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)

- __update_mmu_tsb_insert(mm, MM_TSB_BASE, PAGE_SHIFT,

- address, pte_val(pte));

-void flush_dcache_page(struct page *page)

- if (page == ZERO_PAGE(0))

- mapping = page_mapping_file(page);

- int dirty = test_bit(PG_dcache_dirty, &page->flags);

- int dirty_cpu = dcache_dirty_cpu(page);

- smp_flush_dcache_page_impl(page, dirty_cpu);

- set_dcache_dirty(page, this_cpu);

- flush_dcache_page_impl(page);

-EXPORT_SYMBOL(flush_dcache_page);

- * page->flags usage will work.

- * cpu number starting at bit 32 in the page->flags. Also,

- struct page *page = alloc_page(GFP_KERNEL | __GFP_ZERO);

- if (!pgtable_pte_page_ctor(page)) {

- __free_page(page);

- return (pte_t *) page_address(page);

- struct page *page = virt_to_page(pte);

- pgtable_pte_page_dtor(page);

- __free_page(page);

-#include <linux/of_device.h>

- if (page_ref_inc_return(page) == 2 && !pgtable_pte_page_ctor(page)) {

- pgtable_pte_page_dtor(page);

- mapping = page_mapping_file(page);

- flush_dcache_page_all(mm, page);

-OS := $(shell uname -s)

-core-y += $(ARCH_DIR)/kernel/ \

- $(ARCH_DIR)/drivers/ \

- $(ARCH_DIR)/os-$(OS)/

-include $(srctree)/$(ARCH_DIR)/Makefile-os-$(OS)

-export HEADER_ARCH SUBARCH USER_CFLAGS CFLAGS_NO_HARDENING OS DEV_NULL_PATH

- soundcore and the UML hostaudio relay, which acts as a intermediary

-config SOUND_OSS_CORE

-obj-$(CONFIG_HOSTAUDIO) += hostaudio.o

-int line_write(struct tty_struct *tty, const unsigned char *buf, int len)

-extern int line_write(struct tty_struct *tty, const unsigned char *buf,

-static char console_buf[MCONSOLE_MAX_DATA];

- strncpy(console_buf, string, n);

-DECLARE_WORK(port_work, port_work_proc);

-void slirp_init(struct net_device *dev, void *data)

- strncpy((char *)&ifr.ifr_name, iface, sizeof(ifr.ifr_name) - 1);

-#define __pte_free_tlb(tlb,pte, address) \

- pgtable_pte_page_dtor(pte); \

- tlb_remove_page((tlb),(pte)); \

-#define __pmd_free_tlb(tlb, pmd, address) \

- pgtable_pmd_page_dtor(virt_to_page(pmd)); \

- tlb_remove_page((tlb),virt_to_page(pmd)); \

-static inline pte_t pte_mkwrite(pte_t pte)

-static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,

- pte_t *pteptr, pte_t pteval)

- set_pte(pteptr, pteval);

-extern size_t strlcpy(char *, const char *, size_t);

-extern void free_irqs(void);

- strlcpy(dir, home, sizeof(dir));

- strlcpy(umid, name, sizeof(umid));

- strlcpy(tmp, uml_dir, sizeof(tmp));

- select ARCH_WANT_OPTIMIZE_VMEMMAP if X86_64

- bool "CPU microcode loading support"

- If you say Y here, you will be able to update the microcode on

- Intel and AMD processors. The Intel support is for the IA32 family,

- e.g. Pentium Pro, Pentium II, Pentium III, Pentium 4, Xeon etc. The

- AMD support is for families 0x10 and later. You will obviously need

- the actual microcode binary data itself which is not shipped with

- The preferred method to load microcode from a detached initrd is described

- in Documentation/arch/x86/microcode.rst. For that you need to enable

- CONFIG_BLK_DEV_INITRD in order for the loader to be able to scan the

- initrd for microcode blobs.

- In addition, you can build the microcode into the kernel. For that you

- need to add the vendor-supplied microcode to the CONFIG_EXTRA_FIRMWARE

-config MICROCODE_INTEL

- bool "Intel microcode loading support"

- depends on CPU_SUP_INTEL && MICROCODE

- This options enables microcode patch loading support for Intel

- For the current Intel microcode data package go to

- <https://downloadcenter.intel.com> and search for

- 'Linux Processor Microcode Data File'.

-config MICROCODE_AMD

- bool "AMD microcode loading support"

- depends on CPU_SUP_AMD && MICROCODE

- If you select this option, microcode patch loading support for AMD

- processors will be enabled.

- bool "kexec system call"

- kexec is a system call that implements the ability to shutdown your

- current kernel, and to start another kernel. It is like a reboot

- but it is independent of the system firmware. And like a reboot

- you can start any kernel with it, not just Linux.

- The name comes from the similarity to the exec system call.

- It is an ongoing process to be certain the hardware in a machine

- is properly shutdown, so do not be surprised if this code does not

- initially work for you. As of this writing the exact hardware

- interface is strongly in flux, so no good recommendation can be

- bool "kexec file based system call"

- depends on CRYPTO=y

- depends on CRYPTO_SHA256=y

- This is new version of kexec system call. This system call is

- file based and takes file descriptors as system call argument

- for kernel and initramfs as opposed to list of segments as

- accepted by previous system call.

-config ARCH_HAS_KEXEC_PURGATORY

- bool "Verify kernel signature during kexec_file_load() syscall"

- depends on KEXEC_FILE

- This option makes the kexec_file_load() syscall check for a valid

- signature of the kernel image. The image can still be loaded without

- a valid signature unless you also enable KEXEC_SIG_FORCE, though if

- there's a signature that we can check, then it must be valid.

- In addition to this option, you need to enable signature

- verification for the corresponding kernel image type being

- loaded in order for this to work.

-config KEXEC_SIG_FORCE

- bool "Require a valid signature in kexec_file_load() syscall"

- depends on KEXEC_SIG

- This option makes kernel signature verification mandatory for

- the kexec_file_load() syscall.

-config KEXEC_BZIMAGE_VERIFY_SIG

- bool "Enable bzImage signature verification support"

- depends on KEXEC_SIG

- depends on SIGNED_PE_FILE_VERIFICATION

- select SYSTEM_TRUSTED_KEYRING

- Enable bzImage signature verification support.

- bool "kernel crash dumps"

- depends on X86_64 || (X86_32 && HIGHMEM)

- Generate crash dump after being started by kexec.

- This should be normally only set in special crash dump kernels

- which are loaded in the main kernel with kexec-tools into

- a specially reserved region and then later executed after

- a crash by kdump/kexec. The crash dump kernel must be compiled

- to a memory address not used by the main kernel or BIOS using

- PHYSICAL_START, or it must be built as a relocatable image

- (CONFIG_RELOCATABLE=y).

- For more details see Documentation/admin-guide/kdump/kdump.rst

- depends on KEXEC && HIBERNATION

- Jump between original kernel and kexeced kernel and invoke

- code in physical address mode via KEXEC

-config ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE

-drivers-$(CONFIG_FB) += arch/x86/video/

- echo ' kvm_guest.config - Enable Kconfig items for running this kernel as a KVM guest'

- echo ' xen.config - Enable Kconfig items for running this kernel as a Xen guest'

- echo ' x86_debug.config - Enable tip tree debugging options for testing'

- * enter the kernel, it will either branch to the 64-bit EFI handover

- * entrypoint at offset 0x390 in the image, or to the 64-bit EFI PE/COFF

- * +------------------+ | | +------+----------------+ V

- * | efi32_stub_entry |---->| | | +------------------+

- * +------------------+ +------------+ +---->| efi64_stub_entry |

- * +-------------+----+

- * +------------+ +----------+ |

- * | startup_64 |<----| efi_main |<--------------+

- * +------------+ +----------+

- jnz efi64_stub_entry

-SYM_FUNC_START(efi32_entry)

-#define ST32_boottime 60 // offsetof(efi_system_table_32_t, boottime)

-#define BS32_handle_protocol 88 // offsetof(efi_boot_services_32_t, handle_protocol)

-#define LI32_image_base 32 // offsetof(efi_loaded_image_32_t, image_base)

- pushl %eax // dummy push to allocate loaded_image

- /* Get the loaded image protocol pointer from the image handle */

- leal -4(%ebp), %eax

- pushl %eax // &loaded_image

- leal (loaded_image_proto - 1b)(%ebx), %eax

- pushl %eax // pass the GUID address

- pushl 8(%ebp) // pass the image handle

- * Note the alignment of the stack frame.

- * handle <-- 16-byte aligned on entry by ABI

- * loaded_image <-- local variable

- * saved %ebx <-- 16-byte aligned here

- * &loaded_image_proto

- * handle <-- 16-byte aligned for call to handle_protocol

- movl 12(%ebp), %eax // sys_table

- movl ST32_boottime(%eax), %eax // sys_table->boottime

- call *BS32_handle_protocol(%eax) // sys_table->boottime->handle_protocol

- addl $12, %esp // restore argument space

- movl -4(%ebp), %esi // loaded_image

- movl LI32_image_base(%esi), %esi // loaded_image->image_base

- leal (startup_32 - 1b)(%ebx), %ebp // runtime address of startup_32

- * We need to set the image_offset variable here since startup_32() will

- * use it before we get to the 64-bit efi_pe_entry() in C code.

- subl %esi, %ebp // calculate image_offset

- movl %ebp, (image_offset - 1b)(%ebx) // save image_offset

- .section ".rodata"

- /* EFI loaded image protocol GUID */

-SYM_DATA_START_LOCAL(loaded_image_proto)

- .word 0x9562, 0x11d2

- .byte 0x8e, 0x3f, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b

-SYM_DATA_END(loaded_image_proto)

-void warn(char *m);

-#ifdef CONFIG_EFI_STUB

- * If we were loaded via the EFI LoadImage service, startup_32() will be at an

- * offset to the start of the space allocated for the image. efi_pe_entry() will

- * set up image_offset to tell us where the image actually starts, so that we

- * can use the full available buffer.

- * image_offset = startup_32 - image_base

- * Otherwise image_offset will be zero and has no effect on the calculations.

- subl image_offset@GOTOFF(%edx), %ebx

-#ifdef CONFIG_EFI_STUB

-SYM_FUNC_START(efi32_stub_entry)

- movl 8(%esp), %esi /* save boot_params pointer */

- /* efi_main returns the possibly relocated address of startup_32 */

-SYM_FUNC_END(efi32_stub_entry)

-SYM_FUNC_ALIAS(efi_stub_entry, efi32_stub_entry)

- pushl output_len@GOTOFF(%ebx) /* decompressed length, end of relocs */

- pushl input_len@GOTOFF(%ebx) /* input_len */

- leal input_data@GOTOFF(%ebx), %eax

- pushl %eax /* input_data */

- leal boot_heap@GOTOFF(%ebx), %eax

- pushl %eax /* heap area */

- .fill BOOT_HEAP_SIZE, 1, 0

-#ifdef CONFIG_EFI_STUB

- * If we were loaded via the EFI LoadImage service, startup_32 will be at an

- * offset to the start of the space allocated for the image. efi_pe_entry will

- * set up image_offset to tell us where the image actually starts, so that we

- * can use the full available buffer.

- * image_offset = startup_32 - image_base

- * Otherwise image_offset will be zero and has no effect on the calculations.

- subl rva(image_offset)(%ebp), %ebx

-#if IS_ENABLED(CONFIG_EFI_MIXED) && IS_ENABLED(CONFIG_EFI_HANDOVER_PROTOCOL)

-SYM_FUNC_START(efi32_stub_entry)

- add $0x4, %esp /* Discard return address */

-SYM_FUNC_END(efi32_stub_entry)

-#ifdef CONFIG_EFI_STUB

- * If we were loaded via the EFI LoadImage service, startup_32 will be at an

- * offset to the start of the space allocated for the image. efi_pe_entry will

- * set up image_offset to tell us where the image actually starts, so that we

- * can use the full available buffer.

- * image_offset = startup_32 - image_base

- * Otherwise image_offset will be zero and has no effect on the calculations.

- movl image_offset(%rip), %eax

- * We go though the trampoline even if we don't have to: if we're

- * already in a desired paging mode. This way the trampoline code gets

- * tested on every boot.

- movq %rsi, %rdi /* real mode address */

- * paging_prepare() sets up the trampoline and checks if we need to

- * enable 5-level paging.

- * paging_prepare() returns a two-quadword structure which lands

- * - Address of the trampoline is returned in RAX.

- * - Non zero RDX means trampoline needs to enable 5-level

- * RSI holds real mode data and needs to be preserved across

- * this function call.

- movq %rsi, %rdi /* real mode address */

- call paging_prepare

- /* Save the trampoline address in RCX */

- * Load the address of trampoline_return() into RDI.

- * It will be used by the trampoline to return to the main code.

- leaq trampoline_return(%rip), %rdi

- /* Switch to compatibility mode (CS.L = 0 CS.D = 1) via far return */

- pushq $__KERNEL32_CS

- leaq TRAMPOLINE_32BIT_CODE_OFFSET(%rax), %rax

- /* Restore the stack, the 32-bit trampoline uses its own stack */

- leaq rva(boot_stack_end)(%rbx), %rsp

- * cleanup_trampoline() would restore trampoline memory.

- * RDI is address of the page table to use instead of page table

- * in trampoline memory (if required).

- * RSI holds real mode data and needs to be preserved across

- * this function call.

- leaq rva(top_pgtable)(%rbx), %rdi

- call cleanup_trampoline

-#ifdef CONFIG_EFI_STUB

-#ifdef CONFIG_EFI_HANDOVER_PROTOCOL

-SYM_FUNC_START(efi64_stub_entry)

- and $~0xf, %rsp /* realign the stack */

- movq %rdx, %rbx /* save boot_params pointer */

- leaq rva(startup_64)(%rax), %rax

-SYM_FUNC_END(efi64_stub_entry)

-SYM_FUNC_ALIAS(efi_stub_entry, efi64_stub_entry)

- pushq %rsi /* Save the real mode argument */

- movq %rsi, %rdi /* real mode address */

- leaq boot_heap(%rip), %rsi /* malloc area for uncompression */

- leaq input_data(%rip), %rdx /* input_data */

- movl input_len(%rip), %ecx /* input_len */

- movq %rbp, %r8 /* output target address */

- movl output_len(%rip), %r9d /* decompressed length, end of relocs */

- * This is the 32-bit trampoline that will be copied over to low memory.

- * RDI contains the return address (might be above 4G).

- * ECX contains the base address of the trampoline memory.

- * Non zero RDX means trampoline needs to enable 5-level paging.

- /* Set up data and stack segments */

- movl $__KERNEL_DS, %eax

- /* Set up new stack */

- leal TRAMPOLINE_32BIT_STACK_END(%ecx), %esp

- /* Check what paging mode we want to be in after the trampoline */

- /* We want 5-level paging: don't touch CR3 if it already points to 5-level page tables */

- testl $X86_CR4_LA57, %eax

- /* We want 4-level paging: don't touch CR3 if it already points to 4-level page tables */

- testl $X86_CR4_LA57, %eax

- leal TRAMPOLINE_32BIT_PGTABLE_OFFSET(%ecx), %eax

-#ifdef CONFIG_X86_MCE

- * Preserve CR4.MCE if the kernel will enable #MC support.

- * Clearing MCE may fault in some environments (that also force #MC

- * support). Any machine check that occurs before #MC support is fully

- * configured will crash the system regardless of the CR4.MCE value set

- andl $X86_CR4_MCE, %eax

- /* Enable PAE and LA57 (if required) paging modes */

- orl $X86_CR4_PAE, %eax

- orl $X86_CR4_LA57, %eax

- /* Calculate address of paging_enabled() once we are executing in the trampoline */

- leal .Lpaging_enabled - trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_OFFSET(%ecx), %eax

- /* Prepare the stack for far return to Long Mode */

- pushl $__KERNEL_CS

-SYM_FUNC_START_LOCAL_NOALIGN(.Lpaging_enabled)

- /* Return from the trampoline */

-SYM_FUNC_END(.Lpaging_enabled)

-SYM_DATA_LOCAL(boot_heap, .fill BOOT_HEAP_SIZE, 1, 0)

-asmlinkage __visible void *extract_kernel(void *rmode, memptr heap,

- unsigned char *input_data,

- unsigned long input_len,

- unsigned char *output,

- unsigned long output_len)

- const unsigned long kernel_total_size = VO__end - VO__text;

- needed_size = max(output_len, kernel_total_size);

- if (virt_addr + max(output_len, kernel_total_size) > KERNEL_IMAGE_SIZE)

- __decompress(input_data, input_len, NULL, NULL, output, output_len,

- entry_offset = parse_elf(output);

- handle_relocations(output, output_len, virt_addr);

-#ifdef CONFIG_X86_5LEVEL

-#define TRAMPOLINE_32BIT_PGTABLE_OFFSET 0

-#define TRAMPOLINE_32BIT_CODE_SIZE 0x80

-#define TRAMPOLINE_32BIT_STACK_END TRAMPOLINE_32BIT_SIZE

-extern void trampoline_32bit_src(void *return_ptr);

-struct paging_config {

- unsigned long trampoline_start;

- unsigned long l5_required;

- * paging_prepare() and extract_kernel().

-struct paging_config paging_prepare(void *rmode)

- struct paging_config paging_config = {};

- boot_params = rmode;

- paging_config.l5_required = 1;

- paging_config.trampoline_start = find_trampoline_placement();

- trampoline_32bit = (unsigned long *)paging_config.trampoline_start;

- memcpy(trampoline_32bit + TRAMPOLINE_32BIT_CODE_OFFSET / sizeof(unsigned long),

- * If switching is not required, the page table is unused: trampoline

- * code wouldn't touch CR3.

- * We are not going to use the page table in trampoline memory if we

- * are already in the desired paging mode.

- if (paging_config.l5_required == !!(native_read_cr4() & X86_CR4_LA57))

- if (paging_config.l5_required) {

- trampoline_32bit[TRAMPOLINE_32BIT_PGTABLE_OFFSET] = __native_read_cr3() | _PAGE_TABLE_NOENC;

- memcpy(trampoline_32bit + TRAMPOLINE_32BIT_PGTABLE_OFFSET / sizeof(unsigned long),

- (void *)src, PAGE_SIZE);

- return paging_config;

-void cleanup_trampoline(void *pgtable)

- void *trampoline_pgtable;

- trampoline_pgtable = trampoline_32bit + TRAMPOLINE_32BIT_PGTABLE_OFFSET / sizeof(unsigned long);

- * Move the top level page table out of trampoline memory,

- if ((void *)__native_read_cr3() == trampoline_pgtable) {

- memcpy(pgtable, trampoline_pgtable, PAGE_SIZE);

- native_write_cr3((unsigned long)pgtable);

- /* Initialize variables for 5-level paging */

-#ifdef CONFIG_X86_5LEVEL

- if (__read_cr4() & X86_CR4_LA57) {

- __pgtable_l5_enabled = 1;

- ptrs_per_p4d = 512;

-#define SNP_FEATURES_PRESENT (0)

- if (!(sev_status & MSR_AMD64_SEV_SNP_ENABLED))

- unsupported = sev_status & SNP_FEATURES_IMPL_REQ & ~SNP_FEATURES_PRESENT;

-void sev_enable(struct boot_params *bp)

- * bp->cc_blob_address should only be set by boot/compressed kernel.

- * Initialize it to 0 to ensure that uninitialized values from

- * buggy bootloaders aren't propagated.

- bp->cc_blob_address = 0;

- * Do an initial SEV capability check before snp_init() which

- * loads the CPUID page and the same checks afterwards are done

- * without the hypervisor and are trustworthy.

- * If the HV fakes SEV support, the guest will crash'n'burn

- * which is good enough.

- /* Recheck the SME/SEV support leaf */

- native_cpuid(&eax, &ebx, &ecx, &edx);

- if (eax < 0x8000001f)

- * Recheck for the SME/SEV feature:

- * CPUID Fn8000_001F[EAX]

- * - Bit 0 - Secure Memory Encryption support

- * - Bit 1 - Secure Encrypted Virtualization support

- * CPUID Fn8000_001F[EBX]

- * - Bits 5:0 - Pagetable bit position used to indicate encryption

- native_cpuid(&eax, &ebx, &ecx, &edx);

- /* Check whether SEV is supported */

- if (!(eax & BIT(1))) {

- sme_me_mask = BIT_ULL(ebx & 0x3f);

-CONFIG_MICROCODE_AMD=y

-static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,

- struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);

- return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);

- return aes_set_key_common(crypto_skcipher_tfm(tfm),

- crypto_skcipher_ctx(tfm), key, len);

- return aes_set_key_common(crypto_aead_tfm(aead),

- &ctx->aes_key_expanded, key, key_len) ?:

- err = aes_set_key_common(crypto_skcipher_tfm(tfm), ctx->raw_crypt_ctx,

- return aes_set_key_common(crypto_skcipher_tfm(tfm), ctx->raw_tweak_ctx,

- key + keylen, keylen);

- return aes_set_key_common(crypto_aead_tfm(aead),

- &ctx->aes_key_expanded, key, key_len) ?:

- if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,

- new_raw_count) != prev_raw_count)

-static void perf_ibs_get_mem_lvl(union ibs_op_data2 *op_data2,

- union ibs_op_data3 *op_data3,

- struct perf_sample_data *data)

- if (op_data3->dc_uc_mem_acc && ibs_data_src != IBS_DATA_SRC_EXT_IO) {

- data_src->mem_lvl = PERF_MEM_LVL_UNC | PERF_MEM_LVL_HIT;

- if (op_data3->dc_miss == 0) {

- data_src->mem_lvl = PERF_MEM_LVL_L1 | PERF_MEM_LVL_HIT;

- !(op_data3->sw_pf || op_data3->dc_miss_no_mab_alloc)) {

- data_src->mem_lvl = PERF_MEM_LVL_L2 | PERF_MEM_LVL_HIT;

- if (ibs_data_src == IBS_DATA_SRC_EXT_LOC_CACHE) {

- data_src->mem_lvl = PERF_MEM_LVL_L3 | PERF_MEM_LVL_HIT;

- if (ibs_data_src == IBS_DATA_SRC_LOC_CACHE) {

- data_src->mem_lvl = PERF_MEM_LVL_L3 | PERF_MEM_LVL_REM_CCE1 |

- /* A peer cache in a near CCX */

- if (ibs_caps & IBS_CAPS_ZEN4 &&

- ibs_data_src == IBS_DATA_SRC_EXT_NEAR_CCX_CACHE) {

- data_src->mem_lvl = PERF_MEM_LVL_REM_CCE1 | PERF_MEM_LVL_HIT;

- /* A peer cache in a far CCX */

- if (ibs_caps & IBS_CAPS_ZEN4) {

- if (ibs_data_src == IBS_DATA_SRC_EXT_FAR_CCX_CACHE) {

- data_src->mem_lvl = PERF_MEM_LVL_REM_CCE2 | PERF_MEM_LVL_HIT;

- if (ibs_data_src == IBS_DATA_SRC_REM_CACHE) {

- data_src->mem_lvl = PERF_MEM_LVL_REM_CCE2 | PERF_MEM_LVL_HIT;

- if (ibs_data_src == IBS_DATA_SRC_EXT_DRAM) {

- if (op_data2->rmt_node == 0)

- data_src->mem_lvl = PERF_MEM_LVL_LOC_RAM | PERF_MEM_LVL_HIT;

- data_src->mem_lvl = PERF_MEM_LVL_REM_RAM1 | PERF_MEM_LVL_HIT;

- if (ibs_caps & IBS_CAPS_ZEN4 && ibs_data_src == IBS_DATA_SRC_EXT_PMEM) {

- data_src->mem_lvl_num = PERF_MEM_LVLNUM_PMEM;

- if (op_data2->rmt_node) {

- data_src->mem_remote = PERF_MEM_REMOTE_REMOTE;

- /* IBS doesn't provide Remote socket detail */

- data_src->mem_hops = PERF_MEM_HOPS_1;

- /* Extension Memory */

- if (ibs_caps & IBS_CAPS_ZEN4 &&

- ibs_data_src == IBS_DATA_SRC_EXT_EXT_MEM) {

- data_src->mem_lvl_num = PERF_MEM_LVLNUM_CXL;

- if (op_data2->rmt_node) {

- data_src->mem_remote = PERF_MEM_REMOTE_REMOTE;

- /* IBS doesn't provide Remote socket detail */

- data_src->mem_hops = PERF_MEM_HOPS_1;

- if (ibs_data_src == IBS_DATA_SRC_EXT_IO) {

- data_src->mem_lvl = PERF_MEM_LVL_IO;

- data_src->mem_lvl_num = PERF_MEM_LVLNUM_IO;

- if (op_data2->rmt_node) {

- data_src->mem_remote = PERF_MEM_REMOTE_REMOTE;

- /* IBS doesn't provide Remote socket detail */

- data_src->mem_hops = PERF_MEM_HOPS_1;

- if (op_data3->dc_miss_no_mab_alloc) {

- data_src->mem_lvl = PERF_MEM_LVL_LFB | PERF_MEM_LVL_HIT;

- data_src->mem_lvl = PERF_MEM_LVL_NA;

- perf_ibs_get_mem_lvl(op_data2, op_data3, data);

- rdpmcl(hwc->event_base_rdpmc, new_raw_count);

- if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,

- new_raw_count) != prev_raw_count)

- hybrid_pmu->pmu.capabilities |= PERF_PMU_CAP_HETEROGENEOUS_CPUS;

-PMU_FORMAT_ATTR_SHOW(snoop_rsp, "config1:0-63");

- case INTEL_FAM6_ALDERLAKE_N:

- new_raw_count = cstate_pmu_read_counter(event);

- if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,

- new_raw_count) != prev_raw_count)

- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &adl_cstates),

-static void __init intel_pmu_pebs_data_source_cmt(u64 *data_source)

- intel_pmu_pebs_data_source_cmt(data_source);

- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &adl_uncore_init),

- return err ? pcibios_err_to_errno(err) : 0;

- type->num_boxes = num_cbo;

- case INTEL_FAM6_ALDERLAKE_N:

- now = msr_read_counter(event);

- if (local64_cmpxchg(&event->hw.prev_count, prev, now) != prev)

- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &model_skl),

-static void hv_apic_eoi_write(u32 reg, u32 val)

- wrmsr(HV_X64_MSR_EOI, val, 0);

- if (!hv_hypercall_pg)

- if (!hv_hypercall_pg || (vp == VP_INVAL))

- apic->send_IPI = hv_send_ipi;

- apic->send_IPI_mask = hv_send_ipi_mask;

- apic->send_IPI_mask_allbutself = hv_send_ipi_mask_allbutself;

- apic->send_IPI_allbutself = hv_send_ipi_allbutself;

- apic->send_IPI_all = hv_send_ipi_all;

- apic->send_IPI_self = hv_send_ipi_self;

- apic_set_eoi_write(hv_apic_eoi_write);

- apic->read = hv_apic_read;

- apic->write = hv_apic_write;

- apic->icr_write = hv_apic_icr_write;

- apic->icr_read = hv_apic_icr_read;

- if (!hv_isolation_type_snp())

- struct hv_vp_assist_page **hvp = &hv_vp_assist_page[cpu];

- hv_vp_assist_page = kcalloc(num_possible_cpus(),

- sizeof(*hv_vp_assist_page), GFP_KERNEL);

- if (hv_isolation_type_snp()) {

- /* Hyper-V requires to write guest os id via ghcb in SNP IVM. */

- hv_ghcb_msr_write(HV_X64_MSR_GUEST_OS_ID, guest_id);

- hv_ghcb_msr_write(HV_X64_MSR_GUEST_OS_ID, 0);

- apic->send_IPI(cpu, X86_PLATFORM_IPI_VECTOR);

- apic->wakeup_secondary_cpu_64 = hv_vtl_wakeup_secondary_cpu;

-void hv_ghcb_msr_write(u64 msr, u64 value)

-EXPORT_SYMBOL_GPL(hv_ghcb_msr_write);

-void hv_ghcb_msr_read(u64 msr, u64 *value)

-EXPORT_SYMBOL_GPL(hv_ghcb_msr_read);

- sev_status = MSR_AMD64_SNP_VTOM;

- cc_vendor = CC_VENDOR_AMD;

-#endif /* CONFIG_AMD_MEM_ENCRYPT */

- * hv_isolation_type_snp - Check system runs in the AMD SEV-SNP based

-#include <acpi/pdc_intel.h>

-static inline void arch_acpi_set_pdc_bits(u32 *buf)

- buf[2] |= ACPI_PDC_C_CAPABILITY_SMP;

- buf[2] |= ACPI_PDC_EST_CAPABILITY_SWSMP;

- buf[2] |= ACPI_PDC_T_FFH;

- * If mwait/monitor is unsupported, C2/C3_FFH will be disabled

- if (!cpu_has(c, X86_FEATURE_MWAIT))

- buf[2] &= ~(ACPI_PDC_C_C2C3_FFH);

-extern void generic_apic_probe(void);

-static inline void generic_apic_probe(void)

-extern int disable_apic;

-extern void __inquire_remote_apic(int apicid);

-#else /* CONFIG_SMP */

-static inline void __inquire_remote_apic(int apicid)

-#endif /* CONFIG_SMP */

-static inline void default_inquire_remote_apic(int apicid)

- if (apic_verbosity >= APIC_DEBUG)

- __inquire_remote_apic(apicid);

- return smp_found_config && !disable_apic;

-extern void native_apic_wait_icr_idle(void);

-extern u32 native_safe_apic_wait_icr_idle(void);

-static inline int apic_force_enable(unsigned long addr)

-extern int apic_force_enable(unsigned long addr);

-static inline void native_apic_msr_eoi_write(u32 reg, u32 v)

-static inline void native_x2apic_wait_icr_idle(void)

- /* no need to wait for icr idle in x2apic */

-static inline u32 native_safe_x2apic_wait_icr_idle(void)

- /* no need to wait for icr idle in x2apic */

- void (*eoi_write)(u32 reg, u32 v);

- void (*native_eoi_write)(u32 reg, u32 v);

- bool dest_mode_logical;

- int (*apic_id_valid)(u32 apicid);

- int (*apic_id_registered)(void);

- void (*setup_apic_routing)(void);

- void (*apicid_to_cpu_present)(int phys_apicid, physid_mask_t *retmap);

- int (*check_phys_apicid_present)(int phys_apicid);

- void (*inquire_remote_apic)(int apicid);

-#ifdef CONFIG_X86_32

- * Called very early during boot from get_smp_config(). It should

- * return the logical apicid. x86_[bios]_cpu_to_apicid is

- * initialized before this function is called.

- * If logical apicid can't be determined that early, the function

- * may return BAD_APICID. Logical apicid will be configured after

- * init_apic_ldr() while bringing up CPUs. Note that NUMA affinity

- * won't be applied properly during early boot in this case.

- int (*x86_32_early_logical_apicid)(int cpu);

-static inline u32 apic_read(u32 reg)

- return apic->read(reg);

-static inline void apic_write(u32 reg, u32 val)

- apic->write(reg, val);

-static inline void apic_eoi(void)

- apic->eoi_write(APIC_EOI, APIC_EOI_ACK);

-static inline u64 apic_icr_read(void)

- return apic->icr_read();

-static inline void apic_icr_write(u32 low, u32 high)

- apic->icr_write(low, high);

-static inline void apic_wait_icr_idle(void)

- apic->wait_icr_idle();

-static inline u32 safe_apic_wait_icr_idle(void)

- return apic->safe_wait_icr_idle();

-extern void __init apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v));

-static inline void apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)) {}

-static inline void ack_APIC_irq(void)

- * ack_APIC_irq() actually gets compiled as a single instruction

-#define APIC_DFR_VALUE (APIC_DFR_FLAT)

-DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid);

-extern void acpi_wake_cpu_handler_update(wakeup_cpu_handler handler);

-extern int default_acpi_madt_oem_check(char *, char *);

-extern void default_setup_apic_routing(void);

-extern int default_check_phys_apicid_present(int phys_apicid);

-#endif /* CONFIG_X86_LOCAL_APIC */

-#define X86_FEATURE_INVPCID_SINGLE ( 7*32+ 7) /* Effectively INVPCID && CR4.PCIDE=1 */

- DISABLE_CALL_DEPTH_TRACKING)

-#define DISABLED_MASK18 0

-#define EFI_LOADER_SIGNATURE "EL64"

-extern user_regset_active_fn regset_fpregs_active, regset_xregset_fpregs_active;

-extern int fpu_clone(struct task_struct *dst, unsigned long clone_flags, bool minimal);

- XFEATURE_RSRVD_COMP_11,

- XFEATURE_RSRVD_COMP_12,

-#define XFEATURE_MASK_SUPERVISOR_SUPPORTED (XFEATURE_MASK_PASID)

-#define XFEATURE_MASK_SUPERVISOR_UNSUPPORTED (XFEATURE_MASK_PT)

-extern void send_cleanup_vector(struct irq_cfg *);

-static inline void send_cleanup_vector(struct irq_cfg *c) { }

- HV_ISOLATION_TYPE_SNP = 2

-#ifdef CONFIG_X86_KERNEL_IBT

-DECLARE_IDTENTRY_SYSVEC(IRQ_MOVE_CLEANUP_VECTOR, sysvec_irq_move_cleanup);

-#define INTEL_FAM6_LAKEFIELD 0x8A /* Sunny Cove / Tremont */

-#define INTEL_FAM6_ALDERLAKE_N 0xBE

-#define INTEL_FAM6_RAPTORLAKE 0xB7

-#define INTEL_FAM6_LUNARLAKE_M 0xBD

-#define INTEL_FAM6_SIERRAFOREST_X 0xAF

-#define INTEL_FAM6_GRANDRIDGE 0xB6

-#define ARCH_HAS_IOREMAP_WC

-#define ARCH_HAS_IOREMAP_WT

-#include <asm-generic/iomap.h>

-/* 1 if "noapic" boot option passed */

-extern int skip_ioapic_setup;

- (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)

- bool exclude_self);

- * Reserve the lowest usable vector (and hence lowest priority) 0x20 for

- * triggering cleanup after irq migration. 0x21-0x2f will still be used

- * for device interrupts.

-#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR

-typedef void crash_vmclear_fn(void);

-extern crash_vmclear_fn __rcu *crash_vmclear_loaded_vmcss;

- * minimize the size of kvm_memory_slot.arch.gfn_track, i.e. allows allocating

- * 2 bytes per gfn instead of 4 bytes per gfn.

- * gfn_track. As above, gfn_track is a 16 bit counter, so KVM must not create

- * more than 2^16-1 upper-level shadow pages at a single gfn, otherwise

- * gfn_track will overflow and explosions will ensure.

- bool xsaves_enabled;

- unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];

- struct kvm_page_track_notifier_node mmu_sp_tracker;

- void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);

- void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu, u64 multiplier);

-#define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB

-static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm)

-void kvm_mmu_zap_all(struct kvm *kvm);

-enum kvm_page_track_mode {

- KVM_PAGE_TRACK_WRITE,

- KVM_PAGE_TRACK_MAX,

- * @vcpu: the vcpu where the write access happened.

- void (*track_write)(struct kvm_vcpu *vcpu, gpa_t gpa, const u8 *new,

- int bytes, struct kvm_page_track_notifier_node *node);

- * It is called when memory slot is being moved or removed

- * users can drop write-protection for the pages in that memory slot

- * @kvm: the kvm where memory slot being moved or removed

- * @slot: the memory slot being moved or removed

- * @node: this node

- void (*track_flush_slot)(struct kvm *kvm, struct kvm_memory_slot *slot,

- struct kvm_page_track_notifier_node *node);

-int kvm_page_track_init(struct kvm *kvm);

-void kvm_page_track_cleanup(struct kvm *kvm);

-bool kvm_page_track_write_tracking_enabled(struct kvm *kvm);

-int kvm_page_track_write_tracking_alloc(struct kvm_memory_slot *slot);

-void kvm_page_track_free_memslot(struct kvm_memory_slot *slot);

-int kvm_page_track_create_memslot(struct kvm *kvm,

- struct kvm_memory_slot *slot,

- unsigned long npages);

-void kvm_slot_page_track_add_page(struct kvm *kvm,

- struct kvm_memory_slot *slot, gfn_t gfn,

- enum kvm_page_track_mode mode);

-void kvm_slot_page_track_remove_page(struct kvm *kvm,

- struct kvm_memory_slot *slot, gfn_t gfn,

- enum kvm_page_track_mode mode);

-bool kvm_slot_page_track_is_active(struct kvm *kvm,

- const struct kvm_memory_slot *slot,

- gfn_t gfn, enum kvm_page_track_mode mode);

-kvm_page_track_register_notifier(struct kvm *kvm,

- struct kvm_page_track_notifier_node *n);

-kvm_page_track_unregister_notifier(struct kvm *kvm,

- struct kvm_page_track_notifier_node *n);

-void kvm_page_track_write(struct kvm_vcpu *vcpu, gpa_t gpa, const u8 *new,

-void kvm_page_track_flush_slot(struct kvm *kvm, struct kvm_memory_slot *slot);

- typeof(l->a.counter) *__old = (typeof(l->a.counter) *) old;

- return try_cmpxchg_local(&l->a.counter, __old, new);

-void __init early_set_mem_enc_dec_hypercall(unsigned long vaddr, int npages,

-early_set_mem_enc_dec_hypercall(unsigned long vaddr, int npages, bool enc) {}

-#include <asm/cpu.h>

-#include <linux/earlycpio.h>

-#include <linux/initrd.h>

-#include <asm/microcode_amd.h>

-struct ucode_patch {

- struct list_head plist;

- void *data; /* Intel uses only this one */

- unsigned int size;

-extern struct list_head microcode_cache;

-struct microcode_ops {

- enum ucode_state (*request_microcode_fw) (int cpu, struct device *);

- void (*microcode_fini_cpu) (int cpu);

- * The generic 'microcode_core' part guarantees that

- * the callbacks below run on a target cpu when they

- * are being called.

- * See also the "Synchronization" section in microcode_core.c.

- enum ucode_state (*apply_microcode) (int cpu);

- int (*collect_cpu_info) (int cpu, struct cpu_signature *csig);

-extern struct ucode_cpu_info ucode_cpu_info[];

-struct cpio_data find_microcode_in_initrd(const char *path, bool use_pa);

-#ifdef CONFIG_MICROCODE_INTEL

-extern struct microcode_ops * __init init_intel_microcode(void);

-static inline struct microcode_ops * __init init_intel_microcode(void)

-#endif /* CONFIG_MICROCODE_INTEL */

-#ifdef CONFIG_MICROCODE_AMD

-extern struct microcode_ops * __init init_amd_microcode(void);

-extern void __exit exit_amd_microcode(void);

-static inline struct microcode_ops * __init init_amd_microcode(void)

-static inline void __exit exit_amd_microcode(void) {}

-#define MAX_UCODE_COUNT 128

-#define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))

-#define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')

-#define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')

-#define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')

-#define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')

-#define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')

-#define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')

-#define CPUID_IS(a, b, c, ebx, ecx, edx) \

- (!((ebx ^ (a))|(edx ^ (b))|(ecx ^ (c))))

- * In early loading microcode phase on BSP, boot_cpu_data is not set up yet.

- * x86_cpuid_vendor() gets vendor id for BSP.

- * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify

- * coding, we still use x86_cpuid_vendor() to get vendor id for AP.

- * x86_cpuid_vendor() gets vendor information directly from CPUID.

-static inline int x86_cpuid_vendor(void)

- u32 eax = 0x00000000;

- u32 ebx, ecx = 0, edx;

- native_cpuid(&eax, &ebx, &ecx, &edx);

- if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx))

- return X86_VENDOR_INTEL;

- if (CPUID_IS(CPUID_AMD1, CPUID_AMD2, CPUID_AMD3, ebx, ecx, edx))

- return X86_VENDOR_AMD;

- return X86_VENDOR_UNKNOWN;

-static inline unsigned int x86_cpuid_family(void)

- u32 eax = 0x00000001;

- u32 ebx, ecx = 0, edx;

- native_cpuid(&eax, &ebx, &ecx, &edx);

- return x86_family(eax);

-#ifdef CONFIG_MICROCODE

-extern void __init load_ucode_bsp(void);

-extern void load_ucode_ap(void);

-void reload_early_microcode(unsigned int cpu);

-extern bool initrd_gone;

-void microcode_bsp_resume(void);

-static inline void __init load_ucode_bsp(void) { }

-static inline void load_ucode_ap(void) { }

-static inline void reload_early_microcode(unsigned int cpu) { }

-static inline void microcode_bsp_resume(void) { }

-/* SPDX-License-Identifier: GPL-2.0 */

-#ifndef _ASM_X86_MICROCODE_AMD_H

-#define _ASM_X86_MICROCODE_AMD_H

-#include <asm/microcode.h>

-#define UCODE_MAGIC 0x00414d44

-#define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000

-#define UCODE_UCODE_TYPE 0x00000001

-#define SECTION_HDR_SIZE 8

-#define CONTAINER_HDR_SZ 12

-struct equiv_cpu_entry {

- u32 installed_cpu;

- u32 fixed_errata_mask;

- u32 fixed_errata_compare;

-} __attribute__((packed));

-struct microcode_header_amd {

- u16 mc_patch_data_id;

- u8 mc_patch_data_len;

- u32 mc_patch_data_checksum;

- u16 processor_rev_id;

-} __attribute__((packed));

-struct microcode_amd {

- struct microcode_header_amd hdr;

- unsigned int mpb[];

-#define PATCH_MAX_SIZE (3 * PAGE_SIZE)

-#ifdef CONFIG_MICROCODE_AMD

-extern void __init load_ucode_amd_bsp(unsigned int family);

-extern void load_ucode_amd_ap(unsigned int family);

-extern int __init save_microcode_in_initrd_amd(unsigned int family);

-void reload_ucode_amd(unsigned int cpu);

-extern void amd_check_microcode(void);

-static inline void __init load_ucode_amd_bsp(unsigned int family) {}

-static inline void load_ucode_amd_ap(unsigned int family) {}

-static inline int __init

-save_microcode_in_initrd_amd(unsigned int family) { return -EINVAL; }

-static inline void reload_ucode_amd(unsigned int cpu) {}

-static inline void amd_check_microcode(void) {}

-#endif /* _ASM_X86_MICROCODE_AMD_H */

-/* SPDX-License-Identifier: GPL-2.0 */

-#ifndef _ASM_X86_MICROCODE_INTEL_H

-#define _ASM_X86_MICROCODE_INTEL_H

-#include <asm/microcode.h>

-struct microcode_header_intel {

- unsigned int hdrver;

- unsigned int date;

- unsigned int cksum;

- unsigned int ldrver;

- unsigned int datasize;

- unsigned int totalsize;

- unsigned int metasize;

- unsigned int reserved[2];

-struct microcode_intel {

- struct microcode_header_intel hdr;

- unsigned int bits[];

-/* microcode format is extended from prescott processors */

-struct extended_signature {

- unsigned int cksum;

-struct extended_sigtable {

- unsigned int count;

- unsigned int cksum;

- unsigned int reserved[3];

- struct extended_signature sigs[];

-#define DEFAULT_UCODE_DATASIZE (2000)

-#define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))

-#define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)

-#define EXT_HEADER_SIZE (sizeof(struct extended_sigtable))

-#define EXT_SIGNATURE_SIZE (sizeof(struct extended_signature))

-#define MC_HEADER_TYPE_MICROCODE 1

-#define MC_HEADER_TYPE_IFS 2

-#define get_totalsize(mc) \

- (((struct microcode_intel *)mc)->hdr.datasize ? \

- ((struct microcode_intel *)mc)->hdr.totalsize : \

- DEFAULT_UCODE_TOTALSIZE)

-#define get_datasize(mc) \

- (((struct microcode_intel *)mc)->hdr.datasize ? \

- ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)

-#define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)

-static inline u32 intel_get_microcode_revision(void)

- native_wrmsrl(MSR_IA32_UCODE_REV, 0);

- /* As documented in the SDM: Do a CPUID 1 here */

- native_cpuid_eax(1);

- /* get the current revision from MSR 0x8B */

- native_rdmsr(MSR_IA32_UCODE_REV, dummy, rev);

-#ifdef CONFIG_MICROCODE_INTEL

-extern void __init load_ucode_intel_bsp(void);

-extern void load_ucode_intel_ap(void);

-extern void show_ucode_info_early(void);

-extern int __init save_microcode_in_initrd_intel(void);

-void reload_ucode_intel(void);

-static inline __init void load_ucode_intel_bsp(void) {}

-static inline void load_ucode_intel_ap(void) {}

-static inline void show_ucode_info_early(void) {}

-static inline int __init save_microcode_in_initrd_intel(void) { return -EINVAL; }

-static inline void reload_ucode_intel(void) {}

-#endif /* _ASM_X86_MICROCODE_INTEL_H */

-extern unsigned int def_to_bigsmp;

-extern unsigned long mp_lapic_addr;

-int generic_processor_info(int apicid, int version);

-#define physid_clear(physid, map) clear_bit(physid, (map).mask)

-#define physid_test_and_set(physid, map) \

- test_and_set_bit(physid, (map).mask)

-#define physids_and(dst, src1, src2) \

- bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC)

-#define physids_complement(dst, src) \

- bitmap_complement((dst).mask, (src).mask, MAX_LOCAL_APIC)

-#define physids_equal(map1, map2) \

- bitmap_equal((map1).mask, (map2).mask, MAX_LOCAL_APIC)

-#define physids_weight(map) \

- bitmap_weight((map).mask, MAX_LOCAL_APIC)

-#define physids_shift_right(d, s, n) \

- bitmap_shift_right((d).mask, (s).mask, n, MAX_LOCAL_APIC)

-#define physids_shift_left(d, s, n) \

- bitmap_shift_left((d).mask, (s).mask, n, MAX_LOCAL_APIC)

-static inline unsigned long physids_coerce(physid_mask_t *map)

- return map->mask[0];

-void hv_ghcb_msr_write(u64 msr, u64 value);

-void hv_ghcb_msr_read(u64 msr, u64 *value);

-void hv_vtom_init(void);

-static inline void hv_ghcb_msr_write(u64 msr, u64 value) {}

-static inline void hv_ghcb_msr_read(u64 msr, u64 *value) {}

-static inline void hv_vtom_init(void) {}

-extern bool hv_isolation_type_snp(void);

-static inline int pte_dirty(pte_t pte)

- return pte_flags(pte) & _PAGE_DIRTY;

-static inline int pmd_dirty(pmd_t pmd)

- return pmd_flags(pmd) & _PAGE_DIRTY;

-static inline int pud_dirty(pud_t pud)

- return pud_flags(pud) & _PAGE_DIRTY;

- return pte_flags(pte) & _PAGE_RW;

- return pte_clear_flags(pte, _PAGE_RW);

- return pte_clear_flags(pte, _PAGE_DIRTY);

- return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);

-static inline pte_t pte_mkwrite(pte_t pte)

- return pmd_clear_flags(pmd, _PAGE_RW);

- return pmd_clear_flags(pmd, _PAGE_DIRTY);

- return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);

-static inline pmd_t pmd_mkwrite(pmd_t pmd)

- return pud_clear_flags(pud, _PAGE_DIRTY);

- return pud_clear_flags(pud, _PAGE_RW);

- return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);

- return pud_set_flags(pud, _PAGE_RW);

- return __pte(val);

- val &= _HPAGE_CHG_MASK;

- return __pmd(val);

-#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))

-static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,

- pte_t *ptep, pte_t pte)

- page_table_check_pte_set(mm, addr, ptep, pte);

- set_pte(ptep, pte);

- page_table_check_pmd_set(mm, addr, pmdp, pmd);

- page_table_check_pud_set(mm, addr, pudp, pud);

- page_table_check_pte_clear(mm, addr, pte);

- clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);

-#define pmd_write pmd_write

-static inline int pmd_write(pmd_t pmd)

- return pmd_flags(pmd) & _PAGE_RW;

- page_table_check_pmd_clear(mm, addr, pmd);

- page_table_check_pud_clear(mm, addr, pud);

- clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);

-#define pud_write pud_write

-static inline int pud_write(pud_t pud)

- return pud_flags(pud) & _PAGE_RW;

- page_table_check_pmd_set(vma->vm_mm, address, pmdp, pmd);

-#define _PAGE_BIT_SOFTW4 58 /* available for programmer */

-#define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \

- _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY | \

- _PAGE_SOFT_DIRTY | _PAGE_DEVMAP | _PAGE_ENC | \

-#define _HPAGE_CHG_MASK (_PAGE_CHG_MASK | _PAGE_PSE)

-#define __PAGE_KERNEL_RO (__PP| 0| 0|___A|__NX|___D| 0|___G)

-#define __PAGE_KERNEL_ROX (__PP| 0| 0|___A| 0|___D| 0|___G)

-#define __PAGE_KERNEL_VVAR (__PP| 0|_USR|___A|__NX|___D| 0|___G)

-extern void identify_boot_cpu(void);

-void native_pv_lock_init(void) __init;

-static inline void native_pv_lock_init(void)

-/* This counts to 12. Any more, it will return 13th argument. */

-#define __RMWcc_ARGS(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, _n, X...) _n

-#define RMWcc_ARGS(X...) __RMWcc_ARGS(, ##X, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)

-#define __RMWcc_CONCAT(a, b) a ## b

-#define RMWcc_CONCAT(a, b) __RMWcc_CONCAT(a, b)

-#define GEN_UNARY_RMWcc(X...) RMWcc_CONCAT(GEN_UNARY_RMWcc_, RMWcc_ARGS(X))(X)

-#define GEN_BINARY_RMWcc(X...) RMWcc_CONCAT(GEN_BINARY_RMWcc_, RMWcc_ARGS(X))(X)

-#define arch_is_kernel_initmem_freed arch_is_kernel_initmem_freed

-static inline bool arch_is_kernel_initmem_freed(unsigned long addr)

- * If _brk_start has not been cleared, brk allocation is incomplete,

- * and we can not make assumptions about its use.

- * After brk allocation is complete, space between _brk_end and _end

- * is available for allocation.

- return addr >= _brk_end && addr < (unsigned long)&_end;

-DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid);

-#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)

-DECLARE_EARLY_PER_CPU_READ_MOSTLY(int, x86_cpu_to_logical_apicid);

-void x86_idle_thread_init(unsigned int cpu, struct task_struct *idle);

-void smp_store_boot_cpu_info(void);

-#ifdef CONFIG_X86_LOCAL_APIC

-extern int hard_smp_processor_id(void);

-#else /* CONFIG_X86_LOCAL_APIC */

-#define hard_smp_processor_id() 0

-#endif /* CONFIG_X86_LOCAL_APIC */

- u32 spec_ctrl; /* Guest version of SPEC_CTRL at 0x2E0 */

-#define EXPECTED_VMCB_SAVE_AREA_SIZE 740

-static inline void arch_tlbbatch_add_mm(struct arch_tlbflush_unmap_batch *batch,

- struct mm_struct *mm)

- _PAGE_SOFTW3 | _PAGE_SOFTW4;

-bool topology_smt_supported(void);

-static inline bool topology_smt_supported(void) { return false; }

-extern bool ibt_selftest(void);

- : : "memory", "rax", "r8", "r9", "r10", "r11");

- u64 function; /* BIOS runtime callback function ptr */

-/* SPDX-License-Identifier: GPL-2.0-only */

-/* CPU virtualization extensions handling

- * This should carry the code for handling CPU virtualization extensions

- * that needs to live in the kernel core.

- * Author: Eduardo Habkost <ehabkost@redhat.com>

-#ifndef _ASM_X86_VIRTEX_H

-#define _ASM_X86_VIRTEX_H

-#include <asm/processor.h>

-#include <asm/vmx.h>

-#include <asm/svm.h>

-#include <asm/tlbflush.h>

-static inline int cpu_has_vmx(void)

- unsigned long ecx = cpuid_ecx(1);

- return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */

- * cpu_vmxoff() - Disable VMX on the current CPU

- * Disable VMX and clear CR4.VMXE (even if VMXOFF faults)

- * Note, VMXOFF causes a #UD if the CPU is !post-VMXON, but it's impossible to

- * atomically track post-VMXON state, e.g. this may be called in NMI context.

- * Eat all faults as all other faults on VMXOFF faults are mode related, i.e.

- * faults are guaranteed to be due to the !post-VMXON check unless the CPU is

- * magically in RM, VM86, compat mode, or at CPL>0.

-static inline int cpu_vmxoff(void)

- asm_volatile_goto("1: vmxoff\n\t"

- _ASM_EXTABLE(1b, %l[fault])

- ::: "cc", "memory" : fault);

- cr4_clear_bits(X86_CR4_VMXE);

-static inline int cpu_vmx_enabled(void)

- return __read_cr4() & X86_CR4_VMXE;

-/** Disable VMX if it is enabled on the current CPU

- * You shouldn't call this if cpu_has_vmx() returns 0.

-static inline void __cpu_emergency_vmxoff(void)

- if (cpu_vmx_enabled())

-/** Disable VMX if it is supported and enabled on the current CPU

-static inline void cpu_emergency_vmxoff(void)

- if (cpu_has_vmx())

- __cpu_emergency_vmxoff();

-/** Check if the CPU has SVM support

- * You can use the 'msg' arg to get a message describing the problem,

- * if the function returns zero. Simply pass NULL if you are not interested

- * on the messages; gcc should take care of not generating code for

- * the messages on this case.

-static inline int cpu_has_svm(const char **msg)

- if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&

- boot_cpu_data.x86_vendor != X86_VENDOR_HYGON) {

- *msg = "not amd or hygon";

- if (boot_cpu_data.extended_cpuid_level < SVM_CPUID_FUNC) {

- *msg = "can't execute cpuid_8000000a";

- if (!boot_cpu_has(X86_FEATURE_SVM)) {

- *msg = "svm not available";

-/** Disable SVM on the current CPU

- * You should call this only if cpu_has_svm() returned true.

-static inline void cpu_svm_disable(void)

- wrmsrl(MSR_VM_HSAVE_PA, 0);

- rdmsrl(MSR_EFER, efer);

- if (efer & EFER_SVME) {

- * Force GIF=1 prior to disabling SVM to ensure INIT and NMI

- * aren't blocked, e.g. if a fatal error occurred between CLGI

- * and STGI. Note, STGI may #UD if SVM is disabled from NMI

- * context between reading EFER and executing STGI. In that

- * case, GIF must already be set, otherwise the NMI would have

- * been blocked, so just eat the fault.

- asm_volatile_goto("1: stgi\n\t"

- _ASM_EXTABLE(1b, %l[fault])

- ::: "memory" : fault);

- wrmsrl(MSR_EFER, efer & ~EFER_SVME);

-/** Makes sure SVM is disabled, if it is supported on the CPU

-static inline void cpu_emergency_svm_disable(void)

- if (cpu_has_svm(NULL))

- cpu_svm_disable();

-#endif /* _ASM_X86_VIRTEX_H */

-#define SECONDARY_EXEC_XSAVES VMCS_CONTROL_BIT(XSAVES)

-#define virt_to_pfn(v) (PFN_DOWN(__pa(v)))

-#ifdef CONFIG_SWIOTLB_XEN

-extern int pci_xen_swiotlb_init_late(void);

-static inline int pci_xen_swiotlb_init_late(void) { return -ENXIO; }

-#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS

-#define arch_calc_vm_prot_bits(prot, key) ( \

- ((key) & 0x1 ? VM_PKEY_BIT0 : 0) | \

- ((key) & 0x2 ? VM_PKEY_BIT1 : 0) | \

- ((key) & 0x4 ? VM_PKEY_BIT2 : 0) | \

- ((key) & 0x8 ? VM_PKEY_BIT3 : 0))

-# If instrumentation of this dir is enabled, boot hangs during first second.

-# Probably could be more selective here, but note that files related to irqs,

-# boot, dumpstack/stacktrace, etc are either non-interesting or can lead to

-# non-deterministic coverage.

-KCOV_INSTRUMENT := n

- unsigned int ver = 0;

- if (boot_cpu_physical_apicid != -1U)

- ver = boot_cpu_apic_version;

- cpu = generic_processor_info(id, ver);

- if (!apic->apic_id_valid(apic_id)) {

- acpi_wake_cpu_handler_update(acpi_wakeup_cpu);

- if (skip_ioapic_setup) {

-obj-$(CONFIG_X86_LOCAL_APIC) += apic.o apic_common.o apic_noop.o ipi.o vector.o

- * The highest APIC ID seen during enumeration.

-static unsigned int max_physical_apicid;

-DEFINE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid, BAD_APICID);

-EXPORT_EARLY_PER_CPU_SYMBOL(x86_bios_cpu_apicid);

- * On x86_32, the mapping between cpu and logical apicid may vary

- * depending on apic in use. The following early percpu variable is

- * used for the mapping. This is where the behaviors of x86_64 and 32

- * actually diverge. Let's keep it ugly for now.

-DEFINE_EARLY_PER_CPU_READ_MOSTLY(int, x86_cpu_to_logical_apicid, BAD_APICID);

-unsigned long mp_lapic_addr __ro_after_init;

-int disable_apic __ro_after_init;

-static unsigned long apic_phys __ro_after_init;

- pr_info("APIC: switched to apic NOOP\n");

- apic = &apic_noop;

-void native_apic_wait_icr_idle(void)

- while (apic_read(APIC_ICR) & APIC_ICR_BUSY)

-u32 native_safe_apic_wait_icr_idle(void)

- send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;

- inc_irq_stat(icr_read_retry_count);

- } while (timeout++ < 1000);

- return send_status;

- apic->send_IPI_mask(mask, LOCAL_TIMER_VECTOR);

- if (!boot_cpu_has(X86_FEATURE_APIC) || disable_apic)

- /* APIC hasn't been mapped yet */

- if (!x2apic_mode && !apic_phys)

- /* APIC hasn't been mapped yet */

- if (!x2apic_mode && !apic_phys)

- if (disable_apic) {

- pr_err(FW_BUG "Local APIC %d not detected, force emulation\n",

- boot_cpu_physical_apicid);

- if (read_apic_id() != boot_cpu_physical_apicid) {

- panic("Boot APIC ID in local APIC unexpected (%d vs %d)",

- read_apic_id(), boot_cpu_physical_apicid);

- /* Or can we switch back to PIC here? */

- default_setup_apic_routing();

- * might not have done the ack_APIC_irq() because it thought, interrupt

- if (disable_apic) {

- * Double-check whether this APIC is really registered.

- * This is meaningless in clustered apic mode, so we skip it.

- BUG_ON(!apic->apic_id_registered());

- * document number 292116). So here it goes...

- apic->init_apic_ldr();

-#ifdef CONFIG_X86_32

- if (apic->dest_mode_logical) {

- int logical_apicid, ldr_apicid;

- * APIC LDR is initialized. If logical_apicid mapping was

- * initialized during get_smp_config(), make sure it matches

- * the actual value.

- logical_apicid = early_per_cpu(x86_cpu_to_logical_apicid, cpu);

- ldr_apicid = GET_APIC_LOGICAL_ID(apic_read(APIC_LDR));

- if (logical_apicid != BAD_APICID)

- WARN_ON(logical_apicid != ldr_apicid);

- /* Always use the value from LDR. */

- early_per_cpu(x86_cpu_to_logical_apicid, cpu) = ldr_apicid;

- if (!cpu && (pic_mode || !value || skip_ioapic_setup)) {

- register_lapic_address(mp_lapic_addr);

- if (skip_ioapic_setup) {

-static int __init detect_init_APIC(void)

- mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;

-static int __init apic_verify(void)

- mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;

- mp_lapic_addr = l & MSR_IA32_APICBASE_BASE;

-int __init apic_force_enable(unsigned long addr)

- return apic_verify();

-static int __init detect_init_APIC(void)

- if (apic_force_enable(APIC_DEFAULT_PHYS_BASE))

- if (apic_verify())

- unsigned int new_apicid;

- if (x2apic_mode) {

- boot_cpu_physical_apicid = read_apic_id();

- /* If no local APIC can be found return early */

- if (!smp_found_config && detect_init_APIC()) {

- /* lets NOP'ify apic operations */

- pr_info("APIC: disable apic facility\n");

- apic_phys = mp_lapic_addr;

- * If the system has ACPI MADT tables or MP info, the LAPIC

- * address is already registered.

- if (!acpi_lapic && !smp_found_config)

- register_lapic_address(apic_phys);

- * Fetch the APIC ID of the BSP in case we have a

- * default configuration (or the MP table is broken).

- new_apicid = read_apic_id();

- if (boot_cpu_physical_apicid != new_apicid) {

- boot_cpu_physical_apicid = new_apicid;

- * yeah -- we lie about apic_version

- * in case if apic was disabled via boot option

- * but it's not a problem for SMP compiled kernel

- * since apic_intr_mode_select is prepared for such

- * a case and disable smp mode

- boot_cpu_apic_version = GET_APIC_VERSION(apic_read(APIC_LVR));

- if (!x2apic_mode) {

- set_fixmap_nocache(FIX_APIC_BASE, address);

- apic_mmio_base = APIC_BASE;

- apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n",

- APIC_BASE, address);

- if (boot_cpu_physical_apicid == -1U) {

- boot_cpu_physical_apicid = read_apic_id();

- boot_cpu_apic_version = GET_APIC_VERSION(apic_read(APIC_LVR));

-int generic_processor_info(int apicid, int version)

- int cpu, max = nr_cpu_ids;

- bool boot_cpu_detected = physid_isset(boot_cpu_physical_apicid,

- phys_cpu_present_map);

- * boot_cpu_physical_apicid is designed to have the apicid

- * returned by read_apic_id(), i.e, the apicid of the

- * currently booting-up processor. However, on some platforms,

- * it is temporarily modified by the apicid reported as BSP

- * through MP table. Concretely:

- * - arch/x86/kernel/mpparse.c: MP_processor_info()

- * - arch/x86/mm/amdtopology.c: amd_numa_init()

- * This function is executed with the modified

- * boot_cpu_physical_apicid. So, disabled_cpu_apicid kernel

- * parameter doesn't work to disable APs on kdump 2nd kernel.

- * Since fixing handling of boot_cpu_physical_apicid requires

- * another discussion and tests on each platform, we leave it

- * for now and here we use read_apic_id() directly in this

- * function, generic_processor_info().

- if (disabled_cpu_apicid != BAD_APICID &&

- disabled_cpu_apicid != read_apic_id() &&

- disabled_cpu_apicid == apicid) {

- int thiscpu = num_processors + disabled_cpus;

- pr_warn("APIC: Disabling requested cpu."

- " Processor %d/0x%x ignored.\n", thiscpu, apicid);

- * If boot cpu has not been detected yet, then only allow upto

- * nr_cpu_ids - 1 processors and keep one slot free for boot cpu

- if (!boot_cpu_detected && num_processors >= nr_cpu_ids - 1 &&

- apicid != boot_cpu_physical_apicid) {

- int thiscpu = max + disabled_cpus - 1;

- pr_warn("APIC: NR_CPUS/possible_cpus limit of %i almost"

- " reached. Keeping one slot for boot cpu."

- " Processor %d/0x%x ignored.\n", max, thiscpu, apicid);

- if (apicid == boot_cpu_physical_apicid) {

- * x86_bios_cpu_apicid is required to have processors listed

- * in same order as logical cpu numbers. Hence the first

- * entry is BSP, and so on.

- * boot_cpu_init() already hold bit 0 in cpu_present_mask

- /* Logical cpuid 0 is reserved for BSP. */

- cpuid_to_apicid[0] = apicid;

- cpu = allocate_logical_cpuid(apicid);

- * Validate version

- if (version == 0x0) {

- pr_warn("BIOS bug: APIC version is 0 for CPU %d/0x%x, fixing up to 0x10\n",

- if (version != boot_cpu_apic_version) {

- pr_warn("BIOS bug: APIC version mismatch, boot CPU: %x, CPU %d: version %x\n",

- boot_cpu_apic_version, cpu, version);

- if (apicid > max_physical_apicid)

- max_physical_apicid = apicid;

-#if defined(CONFIG_SMP) || defined(CONFIG_X86_64)

- early_per_cpu(x86_cpu_to_apicid, cpu) = apicid;

- early_per_cpu(x86_bios_cpu_apicid, cpu) = apicid;

-#ifdef CONFIG_X86_32

- early_per_cpu(x86_cpu_to_logical_apicid, cpu) =

- apic->x86_32_early_logical_apicid(cpu);

- set_cpu_possible(cpu, true);

- physid_set(apicid, phys_cpu_present_map);

- set_cpu_present(cpu, true);

- if (system_state != SYSTEM_BOOTING)

- cpu_mark_primary_thread(cpu, apicid);

-int hard_smp_processor_id(void)

- return read_apic_id();

-#ifdef CONFIG_X86_64

-void __init acpi_wake_cpu_handler_update(wakeup_cpu_handler handler)

- struct apic **drv;

- for (drv = __apicdrivers; drv < __apicdrivers_end; drv++)

- (*drv)->wakeup_secondary_cpu_64 = handler;

- * Override the generic EOI implementation with an optimized version.

- * Only called during early boot when only one CPU is active and with

- * interrupts disabled, so we know this does not race with actual APIC driver

-void __init apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v))

- struct apic **drv;

- for (drv = __apicdrivers; drv < __apicdrivers_end; drv++) {

- /* Should happen once for each apic */

- WARN_ON((*drv)->eoi_write == eoi_write);

- (*drv)->native_eoi_write = (*drv)->eoi_write;

- (*drv)->eoi_write = eoi_write;

- * Hack: In case of kdump, after a crash, kernel might be booting

- * on a cpu with non-zero lapic id. But boot_cpu_physical_apicid

- * might be zero if read from MP tables. Get it from LAPIC.

-# ifdef CONFIG_CRASH_DUMP

- boot_cpu_physical_apicid = read_apic_id();

-#ifdef CONFIG_X86_64

- skip_ioapic_setup = 0;

- lapic_resource.start = apic_phys;

- return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);

-int default_check_phys_apicid_present(int phys_apicid)

- return physid_isset(phys_apicid, phys_cpu_present_map);

-int default_apic_id_valid(u32 apicid)

- return (apicid < 255);

- * Set up the logical destination ID.

- * Intel recommends to set DFR, LDR and TPR before enabling

- * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel

- * document number 292116). So here it goes...

-void flat_init_apic_ldr(void)

- unsigned long val;

- unsigned long num, id;

- num = smp_processor_id();

- apic_write(APIC_DFR, APIC_DFR_FLAT);

- val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;

- val |= SET_APIC_LOGICAL_ID(id);

- apic_write(APIC_LDR, val);

-static unsigned int read_xapic_id(void)

- return flat_get_apic_id(apic_read(APIC_ID));

-static int flat_apic_id_registered(void)

- return physid_isset(read_xapic_id(), phys_cpu_present_map);

- .apic_id_valid = default_apic_id_valid,

- .apic_id_registered = flat_apic_id_registered,

- .check_apicid_used = NULL,

- .init_apic_ldr = flat_init_apic_ldr,

- .ioapic_phys_id_map = NULL,

- .setup_apic_routing = NULL,

- .apicid_to_cpu_present = NULL,

- .check_phys_apicid_present = default_check_phys_apicid_present,

- .inquire_remote_apic = default_inquire_remote_apic,

- .eoi_write = native_apic_mem_write,

- .wait_icr_idle = native_apic_wait_icr_idle,

- .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,

-static void physflat_init_apic_ldr(void)

- * LDR and DFR are not involved in physflat mode, rather:

- * "In physical destination mode, the destination processor is

- * specified by its local APIC ID [...]." (Intel SDM, 10.6.2.1)

- if (apic == &apic_physflat || num_possible_cpus() > 8 ||

- jailhouse_paravirt())

- .apic_id_valid = default_apic_id_valid,

- .apic_id_registered = flat_apic_id_registered,

- .init_apic_ldr = physflat_init_apic_ldr,

- .setup_apic_routing = NULL,

- .apicid_to_cpu_present = NULL,

- .check_phys_apicid_present = default_check_phys_apicid_present,

- .inquire_remote_apic = default_inquire_remote_apic,

- .eoi_write = native_apic_mem_write,

- .wait_icr_idle = native_apic_wait_icr_idle,

- .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,

-static void noop_init_apic_ldr(void) { }

-static void noop_apic_wait_icr_idle(void) { }

-static int noop_wakeup_secondary_cpu(int apicid, unsigned long start_eip)

-static u32 noop_safe_apic_wait_icr_idle(void)

-static u64 noop_apic_icr_read(void)

-static int noop_phys_pkg_id(int cpuid_apic, int index_msb)

-static unsigned int noop_get_apic_id(unsigned long x)

-static int noop_probe(void)

- * NOOP apic should not ever be

- * enabled via probe routine

-static int noop_apic_id_registered(void)

- * if we would be really "pedantic"

- * we should pass read_apic_id() here

- * but since NOOP suppose APIC ID = 0

- * lets save a few cycles

- return physid_isset(0, phys_cpu_present_map);

- WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_APIC) && !disable_apic);

-static void noop_apic_write(u32 reg, u32 v)

- WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_APIC) && !disable_apic);

-#ifdef CONFIG_X86_32

-static int noop_x86_32_early_logical_apicid(int cpu)

- return BAD_APICID;

- .probe = noop_probe,

- .acpi_madt_oem_check = NULL,

- .apic_id_valid = default_apic_id_valid,

- .apic_id_registered = noop_apic_id_registered,

- .init_apic_ldr = noop_init_apic_ldr,

- .setup_apic_routing = NULL,

- .apicid_to_cpu_present = physid_set_mask_of_physid,

- .check_phys_apicid_present = default_check_phys_apicid_present,

- .set_apic_id = NULL,

- .inquire_remote_apic = NULL,

- .eoi_write = noop_apic_write,

- .wait_icr_idle = noop_apic_wait_icr_idle,

- .safe_wait_icr_idle = noop_safe_apic_wait_icr_idle,

-#ifdef CONFIG_X86_32

- .x86_32_early_logical_apicid = noop_x86_32_early_logical_apicid,

-static int numachip_apic_id_valid(u32 apicid)

- /* Trust what bootloader passes in MADT */

-static int numachip_apic_id_registered(void)

-/* APIC IPIs are queued */

-static void numachip_apic_wait_icr_idle(void)

-/* APIC NMI IPIs are queued */

-static u32 numachip_safe_apic_wait_icr_idle(void)

- .apic_id_valid = numachip_apic_id_valid,

- .apic_id_registered = numachip_apic_id_registered,

- .check_apicid_used = NULL,

- .init_apic_ldr = flat_init_apic_ldr,

- .ioapic_phys_id_map = NULL,

- .setup_apic_routing = NULL,

- .apicid_to_cpu_present = NULL,

- .check_phys_apicid_present = default_check_phys_apicid_present,

- .inquire_remote_apic = NULL, /* REMRD not supported */

- .eoi_write = native_apic_mem_write,

- .wait_icr_idle = numachip_apic_wait_icr_idle,

- .safe_wait_icr_idle = numachip_safe_apic_wait_icr_idle,

- .apic_id_valid = numachip_apic_id_valid,

- .apic_id_registered = numachip_apic_id_registered,

- .check_apicid_used = NULL,

- .init_apic_ldr = flat_init_apic_ldr,

- .ioapic_phys_id_map = NULL,

- .setup_apic_routing = NULL,

- .apicid_to_cpu_present = NULL,

- .check_phys_apicid_present = default_check_phys_apicid_present,

- .inquire_remote_apic = NULL, /* REMRD not supported */

- .eoi_write = native_apic_mem_write,

- .wait_icr_idle = numachip_apic_wait_icr_idle,

- .safe_wait_icr_idle = numachip_safe_apic_wait_icr_idle,

-static int bigsmp_apic_id_registered(void)

-static int bigsmp_early_logical_apicid(int cpu)

- /* on bigsmp, logical apicid is the same as physical */

- return early_per_cpu(x86_cpu_to_apicid, cpu);

- * bigsmp enables physical destination mode

- * and doesn't use LDR and DFR

-static void bigsmp_init_apic_ldr(void)

-static void bigsmp_setup_apic_routing(void)

- "Enabling APIC mode: Physflat. Using %d I/O APICs\n",

-static int bigsmp_cpu_present_to_apicid(int mps_cpu)

- if (mps_cpu < nr_cpu_ids)

- return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);

- return BAD_APICID;

-static int bigsmp_check_phys_apicid_present(int phys_apicid)

- if (def_to_bigsmp)

- dmi_check_system(bigsmp_dmi_table);

- return dmi_bigsmp;

- .acpi_madt_oem_check = NULL,

- .apic_id_valid = default_apic_id_valid,

- .apic_id_registered = bigsmp_apic_id_registered,

- .init_apic_ldr = bigsmp_init_apic_ldr,

- .setup_apic_routing = bigsmp_setup_apic_routing,

- .cpu_present_to_apicid = bigsmp_cpu_present_to_apicid,

- .apicid_to_cpu_present = physid_set_mask_of_physid,

- .check_phys_apicid_present = bigsmp_check_phys_apicid_present,

- .inquire_remote_apic = default_inquire_remote_apic,

- .eoi_write = native_apic_mem_write,

- .wait_icr_idle = native_apic_wait_icr_idle,

- .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,

- .x86_32_early_logical_apicid = bigsmp_early_logical_apicid,

-void __init generic_bigsmp_probe(void)

- if (!probe_bigsmp())

- apic = &apic_bigsmp;

- for_each_possible_cpu(cpu) {

- if (early_per_cpu(x86_cpu_to_logical_apicid,

- cpu) == BAD_APICID)

- early_per_cpu(x86_cpu_to_logical_apicid, cpu) =

- bigsmp_early_logical_apicid(cpu);

- pr_info("Overriding APIC driver with %s\n", apic_bigsmp.name);

- apic->send_IPI_mask(mask, NMI_VECTOR);

-void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)

- nmi_trigger_cpumask_backtrace(mask, exclude_self,

-int skip_ioapic_setup;

- skip_ioapic_setup = 1;

- if (skip_ioapic_setup)

- physid_mask_t tmp;

- apic->apicid_to_cpu_present(mpc_ioapic_id(ioapic_idx),

- apic_printk(APIC_VERBOSE, "Setting %d in the "

- "phys_id_present_map\n",

- mpc_ioapic_id(ioapic_idx));

- physids_or(phys_id_present_map, phys_id_present_map, tmp);

- apic_id = hard_smp_processor_id();

- if (skip_ioapic_setup || !nr_ioapics)

- apic->apicid_to_cpu_present(apic_id, &tmp);

- skip_ioapic_setup = 1;

- apic->send_IPI_allbutself(vector);

- apic->send_IPI_mask_allbutself(cpu_online_mask, vector);

- apic->send_IPI(cpu, RESCHEDULE_VECTOR);

- apic->send_IPI(cpu, CALL_FUNCTION_SINGLE_VECTOR);

- apic->send_IPI_all(CALL_FUNCTION_VECTOR);

- apic->send_IPI_allbutself(CALL_FUNCTION_VECTOR);

- apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);

-static inline void __xapic_wait_icr_idle(void)

-void __default_send_IPI_shortcut(unsigned int shortcut, int vector)

- * Subtle. In the case of the 'never do double writes' workaround

- * we have to lock out interrupts to be safe. As we don't care

- * of the value read we use an atomic rmw access to avoid costly

- * cli/sti. Otherwise we use an even cheaper single atomic write

- safe_apic_wait_icr_idle();

- __xapic_wait_icr_idle();

- * No need to touch the target chip field. Also the destination

- * mode is ignored when a shorthand is used.

- cfg = __prepare_ICR(shortcut, vector, 0);

- * Send the IPI. The write to APIC_ICR fires this off.

- native_apic_mem_write(APIC_ICR, cfg);

-void __default_send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest)

- unsigned long cfg;

- safe_apic_wait_icr_idle();

- __xapic_wait_icr_idle();

- * prepare target chip field

- cfg = __prepare_ICR2(mask);

- native_apic_mem_write(APIC_ICR2, cfg);

- cfg = __prepare_ICR(0, vector, dest);

- * Send the IPI. The write to APIC_ICR fires this off.

- native_apic_mem_write(APIC_ICR, cfg);

- unsigned long query_cpu;

- * Hack. The clustered APIC addressing mode doesn't allow us to send

- * to an arbitrary mask, so I do a unicast to each CPU instead.

- for_each_cpu(query_cpu, mask) {

- query_cpu), vector, APIC_DEST_PHYSICAL);

- unsigned int this_cpu = smp_processor_id();

- unsigned int query_cpu;

- /* See Hack comment above */

- for_each_cpu(query_cpu, mask) {

- if (query_cpu == this_cpu)

- query_cpu), vector, APIC_DEST_PHYSICAL);

- apic->send_IPI_mask(cpumask_of(cpu), vector);

-void default_send_IPI_mask_sequence_logical(const struct cpumask *mask,

- unsigned int query_cpu;

- * Hack. The clustered APIC addressing mode doesn't allow us to send

- * to an arbitrary mask, so I do a unicasts to each CPU instead. This

- * should be modified to do 1 message per cluster ID - mbligh

- for_each_cpu(query_cpu, mask)

- __default_send_IPI_dest_field(

- early_per_cpu(x86_cpu_to_logical_apicid, query_cpu),

- vector, APIC_DEST_LOGICAL);

- unsigned int query_cpu;

- unsigned int this_cpu = smp_processor_id();

- /* See Hack comment above */

- for_each_cpu(query_cpu, mask) {

- if (query_cpu == this_cpu)

- __default_send_IPI_dest_field(

- early_per_cpu(x86_cpu_to_logical_apicid, query_cpu),

- vector, APIC_DEST_LOGICAL);

- * This is only used on smaller machines.

-/* must come after the send_IPI functions above for inlining */

- apicid = hard_smp_processor_id();

-void flat_init_apic_ldr(void);

-int x2apic_apic_id_valid(u32 apicid);

-int x2apic_apic_id_registered(void);

-void __x2apic_send_IPI_shorthand(int vector, u32 which);

-void __default_send_IPI_shortcut(unsigned int shortcut, int vector);

-static int default_x86_32_early_logical_apicid(int cpu)

-static void setup_apic_flat_routing(void)

-#ifdef CONFIG_X86_IO_APIC

- "Enabling APIC mode: Flat. Using %d I/O APICs\n",

-static int default_apic_id_registered(void)

- return physid_isset(read_apic_id(), phys_cpu_present_map);

- * Set up the logical destination ID. Intel recommends to set DFR, LDR and

- * TPR before enabling an APIC. See e.g. "AP-388 82489DX User's Manual"

- * (Intel document number 292116).

-static void default_init_apic_ldr(void)

- unsigned long val;

- apic_write(APIC_DFR, APIC_DFR_VALUE);

- val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;

- val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());

- apic_write(APIC_LDR, val);

- .acpi_madt_oem_check = NULL,

- .apic_id_valid = default_apic_id_valid,

- .setup_apic_routing = setup_apic_flat_routing,

- .apicid_to_cpu_present = physid_set_mask_of_physid,

- .check_phys_apicid_present = default_check_phys_apicid_present,

- .set_apic_id = NULL,

- .inquire_remote_apic = default_inquire_remote_apic,

- .eoi_write = native_apic_mem_write,

- .wait_icr_idle = native_apic_wait_icr_idle,

- .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,

- .x86_32_early_logical_apicid = default_x86_32_early_logical_apicid,

-void __init default_setup_apic_routing(void)

- int version = boot_cpu_apic_version;

- if (num_possible_cpus() > 8) {

- if (!APIC_XAPIC(version)) {

- def_to_bigsmp = 0;

- def_to_bigsmp = 1;

-#ifdef CONFIG_X86_BIGSMP

- * This is used to switch to bigsmp mode when

- * - There is no apic= option specified by the user

- * - generic_apic_probe() has chosen apic_default as the sub_arch

- * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support

- if (!cmdline_apic && apic == &apic_default)

- generic_bigsmp_probe();

- if (apic->setup_apic_routing)

- apic->setup_apic_routing();

-void __init generic_apic_probe(void)

- printk(KERN_INFO "Using APIC driver %s\n", apic->name);

-/* This function can switch the APIC even after the initial ->probe() */

-int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id)

- struct apic **drv;

- for (drv = __apicdrivers; drv < __apicdrivers_end; drv++) {

- if (!(*drv)->acpi_madt_oem_check)

- if (!(*drv)->acpi_madt_oem_check(oem_id, oem_table_id))

- if (!cmdline_apic) {

- printk(KERN_INFO "Switched to APIC driver `%s'.\n",

- * Check the APIC IDs in bios_cpu_apicid and choose the APIC mode.

-void __init default_setup_apic_routing(void)

- if (apic != *drv) {

- pr_info("Switched APIC routing to %s.\n",

- if (apic != *drv) {

- pr_info("Setting APIC routing to %s.\n",

-static DEFINE_PER_CPU(struct hlist_head, cleanup_list);

- if (apic->apic_id_valid(32768))

- apic->send_IPI(apicd->cpu, apicd->vector);

-DEFINE_IDTENTRY_SYSVEC(sysvec_irq_move_cleanup)

- struct hlist_head *clhead = this_cpu_ptr(&cleanup_list);

- /* Prevent vectors vanishing under us */

- raw_spin_lock(&vector_lock);

- hlist_for_each_entry_safe(apicd, tmp, clhead, clist) {

- * up is registered at the APICs IRR. If so, then this is

- * not the best time to clean it up. Clean it up in the

- * next attempt by sending another IRQ_MOVE_CLEANUP_VECTOR

- * to this CPU. IRQ_MOVE_CLEANUP_VECTOR is the lowest

- * priority external vector, so on return from this

- * interrupt the device interrupt will happen first.

- irr = apic_read(APIC_IRR + (vector / 32 * 0x10));

- apic->send_IPI_self(IRQ_MOVE_CLEANUP_VECTOR);

- raw_spin_unlock(&vector_lock);

-static void __send_cleanup_vector(struct apic_chip_data *apicd)

- cpu = apicd->prev_cpu;

- hlist_add_head(&apicd->clist, per_cpu_ptr(&cleanup_list, cpu));

- apic->send_IPI(cpu, IRQ_MOVE_CLEANUP_VECTOR);

-void send_cleanup_vector(struct irq_cfg *cfg)

- __send_cleanup_vector(apicd);

- smp_processor_id(), hard_smp_processor_id());

-static void x2apic_send_IPI_allbutself(int vector)

- __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLBUT);

-static void x2apic_send_IPI_all(int vector)

- __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLINC);

- .apic_id_valid = x2apic_apic_id_valid,

- .apic_id_registered = x2apic_apic_id_registered,

- .setup_apic_routing = NULL,

- .apicid_to_cpu_present = NULL,

- .check_phys_apicid_present = default_check_phys_apicid_present,

- .inquire_remote_apic = NULL,

- .eoi_write = native_apic_msr_eoi_write,

- .wait_icr_idle = native_x2apic_wait_icr_idle,

- .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,

-static u32 x2apic_max_apicid __ro_after_init;

-static void x2apic_send_IPI_allbutself(int vector)

- __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLBUT);

-static void x2apic_send_IPI_all(int vector)

- __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLINC);

-static void init_x2apic_ldr(void)

-static int x2apic_phys_probe(void)

- if (x2apic_phys || x2apic_fadt_phys())

- return apic == &apic_x2apic_phys;

-/* Common x2apic functions, also used by x2apic_cluster */

-int x2apic_apic_id_valid(u32 apicid)

- if (x2apic_max_apicid && apicid > x2apic_max_apicid)

-int x2apic_apic_id_registered(void)

-void __x2apic_send_IPI_shorthand(int vector, u32 which)

- unsigned long cfg = __prepare_ICR(which, vector, 0);

- /* x2apic MSRs are special and need a special fence: */

- weak_wrmsr_fence();

- native_x2apic_icr_write(cfg, 0);

-void x2apic_send_IPI_self(int vector)

- apic_write(APIC_SELF_IPI, vector);

- .apic_id_valid = x2apic_apic_id_valid,

- .apic_id_registered = x2apic_apic_id_registered,

- .check_apicid_used = NULL,

- .init_apic_ldr = init_x2apic_ldr,

- .ioapic_phys_id_map = NULL,

- .setup_apic_routing = NULL,

- .apicid_to_cpu_present = NULL,

- .check_phys_apicid_present = default_check_phys_apicid_present,

- .inquire_remote_apic = NULL,

- .eoi_write = native_apic_msr_eoi_write,

- .wait_icr_idle = native_x2apic_wait_icr_idle,

- .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,

- /* Relies on 'to' being NULL chars so result will be NULL terminated */

- strncpy(to, from, len-1);

-static int uv_apic_id_valid(u32 apicid)

-static int uv_apic_id_registered(void)

-static void uv_init_apic_ldr(void)

-static u32 apic_uv_calc_apicid(unsigned int cpu)

- return apic_default_calc_apicid(cpu);

-static unsigned int x2apic_get_apic_id(unsigned long id)

-static void uv_send_IPI_self(int vector)

- apic_write(APIC_SELF_IPI, vector);

- .apic_id_valid = uv_apic_id_valid,

- .apic_id_registered = uv_apic_id_registered,

- .check_apicid_used = NULL,

- .init_apic_ldr = uv_init_apic_ldr,

- .ioapic_phys_id_map = NULL,

- .setup_apic_routing = NULL,

- .apicid_to_cpu_present = NULL,

- .check_phys_apicid_present = default_check_phys_apicid_present,

- .calc_dest_apicid = apic_uv_calc_apicid,

- .send_IPI_self = uv_send_IPI_self,

- .inquire_remote_apic = NULL,

- .eoi_write = native_apic_msr_eoi_write,

- .wait_icr_idle = native_x2apic_wait_icr_idle,

- .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,

- strncpy(id, "MMIOH", sizeof(id));

- int apicid = early_per_cpu(x86_cpu_to_apicid, cpu);

- * The apm_bios device is one of the misc char devices.

- * This is its minor number.

-#define APM_MINOR_DEV 134

- extern __u32 ia32_dir_class[];

- extern __u32 ia32_write_class[];

- extern __u32 ia32_read_class[];

- extern __u32 ia32_chattr_class[];

- extern __u32 ia32_signal_class[];

- c->apicid = hard_smp_processor_id();

-#include <asm/microcode_intel.h>

- u64 msr = CET_ENDBR_EN;

- if (!HAS_KERNEL_IBT ||

- !cpu_feature_enabled(X86_FEATURE_IBT))

- wrmsrl(MSR_IA32_S_CET, msr);

- if (!ibt_selftest()) {

- if (cpu_feature_enabled(X86_FEATURE_IBT))

- wrmsrl(MSR_IA32_S_CET, 0);

- VULNBL_INTEL_STEPPINGS(SKYLAKE_L, X86_STEPPING_ANY, SRBDS | MMIO | RETBLEED),

- VULNBL_INTEL_STEPPINGS(SKYLAKE, X86_STEPPING_ANY, SRBDS | MMIO | RETBLEED),

- VULNBL_INTEL_STEPPINGS(KABYLAKE_L, X86_STEPPING_ANY, SRBDS | MMIO | RETBLEED | GDS),

- VULNBL_INTEL_STEPPINGS(KABYLAKE, X86_STEPPING_ANY, SRBDS | MMIO | RETBLEED | GDS),

-void __init identify_boot_cpu(void)

- * only when microcode has been updated. Caller holds microcode_mutex and CPU

- cpu_smt_check_topology();

- c->apicid = hard_smp_processor_id();

-#include <asm/microcode_intel.h>

-int intel_cpu_collect_info(struct ucode_cpu_info *uci)

- unsigned int val[2];

- unsigned int family, model;

- struct cpu_signature csig = { 0 };

- unsigned int eax, ebx, ecx, edx;

- memset(uci, 0, sizeof(*uci));

- native_cpuid(&eax, &ebx, &ecx, &edx);

- family = x86_family(eax);

- model = x86_model(eax);

- if (model >= 5 || family > 6) {

- /* get processor flags from MSR 0x17 */

- native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);

- csig.pf = 1 << ((val[1] >> 18) & 7);

- csig.rev = intel_get_microcode_revision();

- uci->cpu_sig = csig;

-EXPORT_SYMBOL_GPL(intel_cpu_collect_info);

- * Returns 1 if update has been found, 0 otherwise.

-int intel_find_matching_signature(void *mc, unsigned int csig, int cpf)

- struct microcode_header_intel *mc_hdr = mc;

- struct extended_sigtable *ext_hdr;

- struct extended_signature *ext_sig;

- if (intel_cpu_signatures_match(csig, cpf, mc_hdr->sig, mc_hdr->pf))

- /* Look for ext. headers: */

- if (get_totalsize(mc_hdr) <= get_datasize(mc_hdr) + MC_HEADER_SIZE)

- ext_hdr = mc + get_datasize(mc_hdr) + MC_HEADER_SIZE;

- ext_sig = (void *)ext_hdr + EXT_HEADER_SIZE;

- for (i = 0; i < ext_hdr->count; i++) {

- if (intel_cpu_signatures_match(csig, cpf, ext_sig->sig, ext_sig->pf))

-EXPORT_SYMBOL_GPL(intel_find_matching_signature);

- * intel_microcode_sanity_check() - Sanity check microcode file.

- * @mc: Pointer to the microcode file contents.

- * @print_err: Display failure reason if true, silent if false.

- * @hdr_type: Type of file, i.e. normal microcode file or In Field Scan file.

- * Validate if the microcode header type matches with the type

- * Validate certain header fields and verify if computed checksum matches

- * with the one specified in the header.

- * Return: 0 if the file passes all the checks, -EINVAL if any of the checks

-int intel_microcode_sanity_check(void *mc, bool print_err, int hdr_type)

- unsigned long total_size, data_size, ext_table_size;

- struct microcode_header_intel *mc_header = mc;

- struct extended_sigtable *ext_header = NULL;

- u32 sum, orig_sum, ext_sigcount = 0, i;

- struct extended_signature *ext_sig;

- total_size = get_totalsize(mc_header);

- data_size = get_datasize(mc_header);

- if (data_size + MC_HEADER_SIZE > total_size) {

- pr_err("Error: bad microcode data file size.\n");

- if (mc_header->ldrver != 1 || mc_header->hdrver != hdr_type) {

- pr_err("Error: invalid/unknown microcode update format. Header type %d\n",

- mc_header->hdrver);

- ext_table_size = total_size - (MC_HEADER_SIZE + data_size);

- if (ext_table_size) {

- u32 ext_table_sum = 0;

- if (ext_table_size < EXT_HEADER_SIZE ||

- ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {

- pr_err("Error: truncated extended signature table.\n");

- ext_header = mc + MC_HEADER_SIZE + data_size;

- if (ext_table_size != exttable_size(ext_header)) {

- pr_err("Error: extended signature table size mismatch.\n");

- ext_sigcount = ext_header->count;

- * Check extended table checksum: the sum of all dwords that

- * comprise a valid table must be 0.

- ext_tablep = (u32 *)ext_header;

- i = ext_table_size / sizeof(u32);

- ext_table_sum += ext_tablep[i];

- if (ext_table_sum) {

- pr_warn("Bad extended signature table checksum, aborting.\n");

- * Calculate the checksum of update data and header. The checksum of

- * valid update data and header including the extended signature table

- i = (MC_HEADER_SIZE + data_size) / sizeof(u32);

- orig_sum += ((u32 *)mc)[i];

- pr_err("Bad microcode data checksum, aborting.\n");

- if (!ext_table_size)

- * Check extended signature checksum: 0 => valid.

- for (i = 0; i < ext_sigcount; i++) {

- ext_sig = (void *)ext_header + EXT_HEADER_SIZE +

- EXT_SIGNATURE_SIZE * i;

- sum = (mc_header->sig + mc_header->pf + mc_header->cksum) -

- (ext_sig->sig + ext_sig->pf + ext_sig->cksum);

- pr_err("Bad extended signature checksum, aborting.\n");

-EXPORT_SYMBOL_GPL(intel_microcode_sanity_check);

- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N,

- machine_check_poll(0, this_cpu_ptr(&mce_poll_banks));

- apic->send_IPI_mask(mce_inject_cpumask,

- if (!cmci_supported(&banks))

- __reserved_0 : 56;

-microcode-$(CONFIG_MICROCODE_INTEL) += intel.o

-microcode-$(CONFIG_MICROCODE_AMD) += amd.o

-#include <asm/microcode_amd.h>

-/* One blob per node. */

-static u8 amd_ucode_patch[MAX_NUMNODES][PATCH_MAX_SIZE];

-static bool early_apply_microcode(u32 cpuid_1_eax, void *ucode, size_t size, bool save_patch)

- u8 (*patch)[PATCH_MAX_SIZE];

- patch = (u8 (*)[PATCH_MAX_SIZE])__pa_nodebug(&amd_ucode_patch);

- patch = &amd_ucode_patch[0];

- memcpy(patch, mc, min_t(u32, desc.psize, PATCH_MAX_SIZE));

-void __init load_ucode_amd_bsp(unsigned int cpuid_1_eax)

- early_apply_microcode(cpuid_1_eax, cp.data, cp.size, true);

-void load_ucode_amd_ap(unsigned int cpuid_1_eax)

- struct microcode_amd *mc;

- struct cpio_data cp;

- u32 *new_rev, rev, dummy;

- if (IS_ENABLED(CONFIG_X86_32)) {

- mc = (struct microcode_amd *)__pa_nodebug(amd_ucode_patch);

- new_rev = (u32 *)__pa_nodebug(&ucode_new_rev);

- mc = (struct microcode_amd *)amd_ucode_patch;

- new_rev = &ucode_new_rev;

- native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);

- * Check whether a new patch has been saved already. Also, allow application of

- * the same revision in order to pick up SMT-thread-specific configuration even

- * if the sibling SMT thread already has an up-to-date revision.

- if (*new_rev && rev <= mc->hdr.patch_id) {

- if (!__apply_microcode_amd(mc)) {

- *new_rev = mc->hdr.patch_id;

- find_blobs_in_containers(cpuid_1_eax, &cp);

- if (!(cp.data && cp.size))

- early_apply_microcode(cpuid_1_eax, cp.data, cp.size, false);

-void reload_ucode_amd(unsigned int cpu)

- u32 rev, dummy __always_unused;

- struct microcode_amd *mc;

- mc = (struct microcode_amd *)amd_ucode_patch[cpu_to_node(cpu)];

- rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);

- if (rev < mc->hdr.patch_id) {

- if (!__apply_microcode_amd(mc)) {

- ucode_new_rev = mc->hdr.patch_id;

- pr_info("reload patch_level=0x%08x\n", ucode_new_rev);

- memset(&amd_ucode_patch[nid], 0, PATCH_MAX_SIZE);

- memcpy(&amd_ucode_patch[nid], p->data, min_t(u32, p->size, PATCH_MAX_SIZE));

-#include <asm/microcode_intel.h>

-#include <asm/microcode_amd.h>

-#include <asm/microcode.h>

- * - microcode_mutex to synchronize with each other;

-static DEFINE_MUTEX(microcode_mutex);

- load_ucode_amd_bsp(cpuid_1_eax);

- load_ucode_amd_ap(cpuid_1_eax);

-void reload_early_microcode(unsigned int cpu)

- mutex_lock(&microcode_mutex);

- mutex_unlock(&microcode_mutex);

- * This needs to be before all headers so that pr_debug in printk.h doesn't turn

- * printk calls into no_printk().

-#include <asm/microcode_intel.h>

-static void show_saved_mc(void)

- unsigned int sig, pf, rev, total_size, data_size, date;

- struct ucode_cpu_info uci;

- struct ucode_patch *p;

- if (list_empty(&microcode_cache)) {

- pr_debug("no microcode data saved.\n");

- intel_cpu_collect_info(&uci);

- sig = uci.cpu_sig.sig;

- pf = uci.cpu_sig.pf;

- rev = uci.cpu_sig.rev;

- pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);

- list_for_each_entry(p, &microcode_cache, plist) {

- struct microcode_header_intel *mc_saved_header;

- struct extended_sigtable *ext_header;

- struct extended_signature *ext_sig;

- mc_saved_header = (struct microcode_header_intel *)p->data;

- sig = mc_saved_header->sig;

- pf = mc_saved_header->pf;

- rev = mc_saved_header->rev;

- date = mc_saved_header->date;

- total_size = get_totalsize(mc_saved_header);

- data_size = get_datasize(mc_saved_header);

- pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, total size=0x%x, date = %04x-%02x-%02x\n",

- i++, sig, pf, rev, total_size,

- (date >> 16) & 0xff);

- /* Look for ext. headers: */

- if (total_size <= data_size + MC_HEADER_SIZE)

- ext_header = (void *)mc_saved_header + data_size + MC_HEADER_SIZE;

- ext_sigcount = ext_header->count;

- ext_sig = (void *)ext_header + EXT_HEADER_SIZE;

- for (j = 0; j < ext_sigcount; j++) {

- sig = ext_sig->sig;

- pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",

- * Save this microcode patch. It will be loaded early when a CPU is

- * hot-added or resumes.

-static void save_mc_for_early(struct ucode_cpu_info *uci, u8 *mc, unsigned int size)

- /* Synchronization during CPU hotplug. */

- static DEFINE_MUTEX(x86_cpu_microcode_mutex);

- mutex_lock(&x86_cpu_microcode_mutex);

- save_microcode_patch(uci, mc, size);

- mutex_unlock(&x86_cpu_microcode_mutex);

- * If early loading microcode is supported, save this mc into

- * permanent memory. So it will be loaded early when a CPU is hot added

- save_mc_for_early(uci, new_mc, new_mc_size);

- if (hv_is_synic_reg(reg) && hv_isolation_type_snp())

- hv_ghcb_msr_read(reg, &value);

- if (hv_is_synic_reg(reg) && hv_isolation_type_snp()) {

- hv_ghcb_msr_write(reg, value);

- if (hv_get_isolation_type() == HV_ISOLATION_TYPE_SNP)

- (hv_get_isolation_type() == HV_ISOLATION_TYPE_SNP))

- if (hv_root_partition)

-static struct class *pseudo_lock_class;

- dev = device_create(pseudo_lock_class, NULL,

- device_destroy(pseudo_lock_class, MKDEV(pseudo_lock_major, new_minor));

- device_destroy(pseudo_lock_class, MKDEV(pseudo_lock_major, plr->minor));

-static char *pseudo_lock_devnode(const struct device *dev, umode_t *mode)

- const struct rdtgroup *rdtgrp;

- rdtgrp = dev_get_drvdata(dev);

- return kasprintf(GFP_KERNEL, "pseudo_lock/%s", rdtgrp->kn->name);

- pseudo_lock_class = class_create("pseudo_lock");

- if (IS_ERR(pseudo_lock_class)) {

- ret = PTR_ERR(pseudo_lock_class);

- pseudo_lock_class->devnode = pseudo_lock_devnode;

- class_destroy(pseudo_lock_class);

- pseudo_lock_class = NULL;

-static struct class *cpuid_class;

- dev = device_create(cpuid_class, NULL, MKDEV(CPUID_MAJOR, cpu), NULL,

- device_destroy(cpuid_class, MKDEV(CPUID_MAJOR, cpu));

-static char *cpuid_devnode(const struct device *dev, umode_t *mode)

- return kasprintf(GFP_KERNEL, "cpu/%u/cpuid", MINOR(dev->devt));

- cpuid_class = class_create("cpuid");

- if (IS_ERR(cpuid_class)) {

- err = PTR_ERR(cpuid_class);

- cpuid_class->devnode = cpuid_devnode;

- class_destroy(cpuid_class);

- * This is used to VMCLEAR all VMCSs loaded on the

- * processor. And when loading kvm_intel module, the

- * callback function pointer will be assigned.

- * protected by rcu.

-crash_vmclear_fn __rcu *crash_vmclear_loaded_vmcss = NULL;

-EXPORT_SYMBOL_GPL(crash_vmclear_loaded_vmcss);

-static inline void cpu_crash_vmclear_loaded_vmcss(void)

- crash_vmclear_fn *do_vmclear_operation = NULL;

- do_vmclear_operation = rcu_dereference(crash_vmclear_loaded_vmcss);

- if (do_vmclear_operation)

- do_vmclear_operation();

- rcu_read_unlock();

- * VMCLEAR VMCSs loaded on all cpus if needed.

- cpu_crash_vmclear_loaded_vmcss();

- * VMCLEAR VMCSs loaded on this cpu if needed.

- cpu_crash_vmclear_loaded_vmcss();

-#ifdef CONFIG_KEXEC_FILE

- unsigned long *sz)

- ret = prepare_elf_headers(image, &kbuf.buffer, &kbuf.bufsz);

- image->elf_headers = kbuf.buffer;

- image->elf_headers_sz = kbuf.bufsz;

- kbuf.memsz = kbuf.bufsz;

- u32 apic_id, version;

- version = GET_APIC_VERSION(apic_read(APIC_LVR));

- generic_processor_info(apic_id, version);

- if (apic_force_enable(lapic_addr))

- smp_found_config = 1;

- if (of_property_read_bool(dn, "intel,virtual-wire-mode")) {

- pr_info("Virtual Wire compatibility mode.\n");

- pr_info("IMCR and PIC compatibility mode.\n");

- register_lapic_address(lapic_addr);

-int fpu_clone(struct task_struct *dst, unsigned long clone_flags, bool minimal)

- "x87 floating point registers" ,

- "MPX bounds registers" ,

- "AVX-512 opmask" ,

- "AVX-512 ZMM_Hi256" ,

- "Processor Trace (unused)" ,

- "unknown xstate feature" ,

- "AMX Tile config" ,

- "unknown xstate feature" ,

- [XFEATURE_PKRU] = X86_FEATURE_PKU,

-#define XCHECK_SZ(sz, nr, nr_macro, __struct) do { \

- if ((nr == nr_macro) && \

- WARN_ONCE(sz != sizeof(__struct), \

- "%s: struct is %zu bytes, cpu state %d bytes\n", \

- __stringify(nr_macro), sizeof(__struct), sz)) { \

- XCHECK_SZ(sz, nr, XFEATURE_YMM, struct ymmh_struct);

- XCHECK_SZ(sz, nr, XFEATURE_BNDREGS, struct mpx_bndreg_state);

- XCHECK_SZ(sz, nr, XFEATURE_BNDCSR, struct mpx_bndcsr_state);

- XCHECK_SZ(sz, nr, XFEATURE_OPMASK, struct avx_512_opmask_state);

- XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state);

- XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM, struct avx_512_hi16_state);

- XCHECK_SZ(sz, nr, XFEATURE_PKRU, struct pkru_state);

- XCHECK_SZ(sz, nr, XFEATURE_PASID, struct ia32_pasid_state);

- XCHECK_SZ(sz, nr, XFEATURE_XTILE_CFG, struct xtile_cfg);

- /* The tile data size varies between implementations. */

- if (nr == XFEATURE_XTILE_DATA)

- check_xtile_data_against_struct(sz);

- * Make *SURE* to add any feature numbers in below if

- * there are "holes" in the xsave state component

- if ((nr < XFEATURE_YMM) ||

- (nr >= XFEATURE_MAX) ||

- (nr == XFEATURE_PT_UNIMPLEMENTED_SO_FAR) ||

- ((nr >= XFEATURE_RSRVD_COMP_11) && (nr <= XFEATURE_RSRVD_COMP_16))) {

- * %rsi holds a physical pointer to real_mode_data.

- * subsequent code.

- * %rsi holds a physical pointer to real_mode_data.

- * %rsi carries pointer to realmode data and is callee-clobbered. Save

- /* rsi is pointer to real mode structure with interesting info.

- strncpy(hc->name, "hpet", sizeof(hc->name));

- * ELCR registers (0x4d0, 0x4d1) control edge/level of IRQ

-#ifdef CONFIG_X86_KERNEL_IBT

- INTG(IRQ_MOVE_CLEANUP_VECTOR, asm_sysvec_irq_move_cleanup),

- apic->send_IPI_self(IRQ_WORK_VECTOR);

- for (cpu = 0; cpu < setup_data.v1.num_cpus; cpu++) {

- generic_processor_info(setup_data.v1.cpu_ids[cpu],

- boot_cpu_apic_version);

-static notrace void kvm_guest_apic_eoi_write(u32 reg, u32 val)

- apic->native_eoi_write(APIC_EOI, APIC_EOI_ACK);

-static void kvm_setup_pv_ipi(void)

- apic->send_IPI_mask = kvm_send_ipi_mask;

- apic->send_IPI_mask_allbutself = kvm_send_ipi_mask_allbutself;

- apic_set_eoi_write(kvm_guest_apic_eoi_write);

- nr_pages = DIV_ROUND_UP(__end_bss_decrypted - __start_bss_decrypted,

- apicid = m->apicid;

- if (m->cpuflag & CPU_BOOTPROCESSOR) {

- boot_cpu_physical_apicid = m->apicid;

- generic_processor_info(apicid, m->apicver);

- * local APIC has default address

- mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;

- * local APIC has default address

- mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;

-static struct class *msr_class;

- dev = device_create(msr_class, NULL, MKDEV(MSR_MAJOR, cpu), NULL,

- device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu));

-static char *msr_devnode(const struct device *dev, umode_t *mode)

- return kasprintf(GFP_KERNEL, "cpu/%u/msr", MINOR(dev->devt));

- msr_class = class_create("msr");

- if (IS_ERR(msr_class)) {

- err = PTR_ERR(msr_class);

- msr_class->devnode = msr_devnode;

- class_destroy(msr_class);

- apic->send_IPI_mask(mask, NMI_VECTOR);

- if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))

- .mmu.tlb_remove_table =

- (void (*)(struct mmu_gather *, void *))tlb_remove_page,

- if (!xen_initial_domain() && !x86_swiotlb_enable)

-int pci_xen_swiotlb_init_late(void)

- if (dma_ops == &xen_swiotlb_dma_ops)

- /* we can work with the default swiotlb */

- if (!io_tlb_default_mem.nslabs) {

- int rc = swiotlb_init_late(swiotlb_size_or_default(),

- GFP_KERNEL, xen_swiotlb_fixup);

- /* XXX: this switches the dma ops under live devices! */

- dma_ops = &xen_swiotlb_dma_ops;

- if (IS_ENABLED(CONFIG_PCI))

- pci_request_acs();

-EXPORT_SYMBOL_GPL(pci_xen_swiotlb_init_late);

- fpu_clone(p, clone_flags, args->fn);

-#include <asm/virtext.h>

- /* Just make sure we won't change CPUs while doing this */

- if (cpu_has_vmx() || cpu_has_svm(NULL)) {

- * Disable virtualization, i.e. VMX or SVM, to ensure INIT is recognized during

- * reboot. VMX blocks INIT if the CPU is post-VMXON, and SVM blocks INIT if

- * GIF=0, i.e. if the crash occurred between CLGI and STGI.

-void cpu_emergency_disable_virtualization(void)

- cpu_emergency_vmxoff();

- cpu_emergency_svm_disable();

-unsigned int def_to_bigsmp;

- generic_apic_probe();

- per_cpu(x86_bios_cpu_apicid, cpu) =

- early_per_cpu_map(x86_bios_cpu_apicid, cpu);

-#ifdef CONFIG_X86_32

- per_cpu(x86_cpu_to_logical_apicid, cpu) =

- early_per_cpu_map(x86_cpu_to_logical_apicid, cpu);

- early_per_cpu_ptr(x86_bios_cpu_apicid) = NULL;

-#ifdef CONFIG_X86_32

- early_per_cpu_ptr(x86_cpu_to_logical_apicid) = NULL;

-void snp_set_wakeup_secondary_cpu(void)

- apic->wakeup_secondary_cpu = wakeup_cpu_via_vmgexit;

-static_assert(NSIGSEGV == 9);

- apic->send_IPI(cpu, NMI_VECTOR);

- * topology_smt_supported - Check whether SMT is supported by the CPUs

-bool topology_smt_supported(void)

- return smp_num_siblings > 1;

-void __init smp_store_boot_cpu_info(void)

- * For now, skip the cluster domain on Hybrid.

- if (!cpu_feature_enabled(X86_FEATURE_HYBRID_CPU)) {

- x86_topology[i++] = (struct sched_domain_topology_level){

- cpu_clustergroup_mask, x86_cluster_flags, SD_INIT_NAME(CLS)

-void __inquire_remote_apic(int apicid)

- unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };

- const char * const names[] = { "ID", "VERSION", "SPIV" };

- pr_info("Inquiring remote APIC 0x%x...\n", apicid);

- for (i = 0; i < ARRAY_SIZE(regs); i++) {

- pr_info("... APIC 0x%x %s: ", apicid, names[i]);

- status = safe_apic_wait_icr_idle();

- pr_cont("a previous APIC delivery may have failed\n");

- apic_icr_write(APIC_DM_REMRD | regs[i], apicid);

- status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;

- } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);

- case APIC_ICR_RR_VALID:

- status = apic_read(APIC_RRR);

- pr_cont("%08x\n", status);

- pr_cont("failed\n");

- if (apicid == BAD_APICID ||

- !physid_isset(apicid, phys_cpu_present_map) ||

- !apic->apic_id_valid(apicid)) {

- * Various sanity checks.

-static void __init smp_sanity_check(void)

- preempt_disable();

-#if !defined(CONFIG_X86_BIGSMP) && defined(CONFIG_X86_32)

- if (def_to_bigsmp && nr_cpu_ids > 8) {

- pr_warn("More than 8 CPUs detected - skipping them\n"

- "Use CONFIG_X86_BIGSMP\n");

- for_each_present_cpu(cpu) {

- set_cpu_present(cpu, false);

- for_each_possible_cpu(cpu) {

- set_cpu_possible(cpu, false);

- set_nr_cpu_ids(8);

- if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {

- pr_warn("weird, boot CPU (#%d) not listed by the BIOS\n",

- hard_smp_processor_id());

- physid_set(hard_smp_processor_id(), phys_cpu_present_map);

- * Should not be necessary because the MP table should list the boot

- * CPU too, but we do it for the sake of robustness anyway.

- if (!apic->check_phys_apicid_present(boot_cpu_physical_apicid)) {

- pr_notice("weird, boot CPU (#%d) not listed by the BIOS\n",

- boot_cpu_physical_apicid);

- physid_set(hard_smp_processor_id(), phys_cpu_present_map);

- smp_sanity_check();

- for_each_present_cpu(cpu) {

- /* No boot processor was found in mptable or ACPI MADT */

- if (!num_processors) {

- if (boot_cpu_has(X86_FEATURE_APIC)) {

- int apicid = boot_cpu_physical_apicid;

- int cpu = hard_smp_processor_id();

- pr_warn("Boot CPU (id %d) not listed by BIOS\n", cpu);

- /* Make sure boot cpu is enumerated */

- if (apic->cpu_present_to_apicid(0) == BAD_APICID &&

- apic->apic_id_valid(apicid))

- generic_processor_info(apicid, boot_cpu_apic_version);

- if (!num_processors)

- num_processors = 1;

- * With physical CPU hotplug, we should halt the cpu

- info.low_limit = PAGE_SIZE;

-static inline void cond_local_irq_enable(struct pt_regs *regs)

- if (regs->flags & X86_EFLAGS_IF)

- local_irq_enable();

-static inline void cond_local_irq_disable(struct pt_regs *regs)

- if (regs->flags & X86_EFLAGS_IF)

- local_irq_disable();

-#ifdef CONFIG_X86_KERNEL_IBT

-static __ro_after_init bool ibt_fatal = true;

-extern void ibt_selftest_ip(void); /* code label defined in asm below */

-enum cp_error_code {

- CP_EC = (1 << 15) - 1,

- CP_ENCL = 1 << 15,

-DEFINE_IDTENTRY_ERRORCODE(exc_control_protection)

- if (!cpu_feature_enabled(X86_FEATURE_IBT)) {

- pr_err("Unexpected #CP\n");

- if (WARN_ON_ONCE(user_mode(regs) || (error_code & CP_EC) != CP_ENDBR))

- if (unlikely(regs->ip == (unsigned long)&ibt_selftest_ip)) {

- pr_err("Missing ENDBR: %pS\n", (void *)instruction_pointer(regs));

- printk(KERN_DEFAULT CUT_HERE);

- __warn(__FILE__, __LINE__, (void *)regs->ip, TAINT_WARN, regs, NULL);

-/* Must be noinline to ensure uniqueness of ibt_selftest_ip. */

-noinline bool ibt_selftest(void)

- unsigned long ret;

- asm (" lea ibt_selftest_ip(%%rip), %%rax\n\t"

- ANNOTATE_RETPOLINE_SAFE

- "ibt_selftest_ip:\n\t"

- : "=a" (ret) : : "memory");

-static int __init ibt_setup(char *str)

- if (!strcmp(str, "off"))

- setup_clear_cpu_cap(X86_FEATURE_IBT);

- if (!strcmp(str, "warn"))

- ibt_fatal = false;

-__setup("ibt=", ibt_setup);

-#endif /* CONFIG_X86_KERNEL_IBT */

- nr_online_nodes <= 2)

- return hard_smp_processor_id() >> index_msb;

- F(AVX_VNNI_INT8) | F(AVX_NE_CONVERT) | F(PREFETCHITI)

- bool (*guest_has_long_mode)(struct x86_emulate_ctxt *ctxt);

- bool xapic_id_mismatch = false;

- * Read kvm->arch.apic_map_dirty before kvm->arch.apic_map

- * (if clean) or the APIC registers (if dirty).

- if (kvm_recalculate_phys_map(new, vcpu, &xapic_id_mismatch)) {

-#include <asm/kvm_page_track.h>

-module_param(dbg, bool, 0644);

-void kvm_flush_remote_tlbs_range(struct kvm *kvm, gfn_t start_gfn,

- int ret = -EOPNOTSUPP;

- if (kvm_x86_ops.flush_remote_tlbs_range)

- ret = static_call(kvm_x86_flush_remote_tlbs_range)(kvm, start_gfn,

- kvm_flush_remote_tlbs(kvm);

- WARN_ON(is_shadow_present_pte(*sptep));

- WARN_ON(!is_shadow_present_pte(new_spte));

- WARN_ON(spte_to_pfn(old_spte) != spte_to_pfn(new_spte));

- WARN_ON(page && !page_count(page));

- WARN_ON(linfo->disallow_lpage < 0);

- return kvm_slot_page_track_add_page(kvm, slot, gfn,

- KVM_PAGE_TRACK_WRITE);

- return kvm_slot_page_track_remove_page(kvm, slot, gfn,

- KVM_PAGE_TRACK_WRITE);

- rmap_printk("%p %llx 0->1\n", spte, *spte);

- rmap_printk("%p %llx 1->many\n", spte, *spte);

- rmap_printk("%p %llx many->many\n", spte, *spte);

-static void pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head,

-static void pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head)

- if (!rmap_head->val) {

- pr_err("%s: %p 0->BUG\n", __func__, spte);

- } else if (!(rmap_head->val & 1)) {

- rmap_printk("%p 1->0\n", spte);

- if ((u64 *)rmap_head->val != spte) {

- pr_err("%s: %p 1->BUG\n", __func__, spte);

- rmap_printk("%p many->many\n", spte);

- pte_list_desc_remove_entry(rmap_head, desc, i);

- pr_err("%s: %p many->many\n", __func__, spte);

- pte_list_remove(sptep, rmap_head);

- pte_list_remove(spte, rmap_head);

- WARN_ON(sp->role.level == PG_LEVEL_4K);

- rmap_printk("spte %p %llx\n", sptep, *sptep);

- MMU_WARN_ON(!spte_ad_enabled(spte));

- WARN_ON(pte_huge(pte));

- rmap_printk("spte %p %llx gfn %llx (%d)\n",

- sptep, *sptep, gfn, level);

- iterator.level, range->pte);

-static int is_empty_shadow_page(u64 *spt)

- for (pos = spt, end = pos + SPTE_ENT_PER_PAGE; pos != end; pos++)

- if (is_shadow_present_pte(*pos)) {

- printk(KERN_ERR "%s: %p %llx\n", __func__,

- MMU_WARN_ON(!is_empty_shadow_page(sp->spt));

-static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,

- pte_list_remove(parent_pte, &sp->parent_ptes);

-static void drop_parent_pte(struct kvm_mmu_page *sp,

- mmu_page_remove_parent_pte(sp, parent_pte);

- WARN_ON((int)sp->unsync_children < 0);

- WARN_ON(!sp->unsync);

- WARN_ON(pvec->page[0].idx != INVALID_INDEX);

- WARN_ON(level == PG_LEVEL_4K);

- WARN_ON(idx == INVALID_INDEX);

- WARN_ON(!list_empty(&invalid_list));

- drop_parent_pte(child, sptep);

- drop_parent_pte(child, spte);

-static void kvm_mmu_unlink_parents(struct kvm_mmu_page *sp)

- drop_parent_pte(sp, sptep);

- kvm_mmu_unlink_parents(sp);

- WARN_ON(!sp->role.invalid || sp->root_count);

- pgprintk("%s: looking for gfn %llx\n", __func__, gfn);

- pgprintk("%s: gfn %llx role %x\n", __func__, gfn,

- if (kvm_slot_page_track_is_active(kvm, slot, gfn, KVM_PAGE_TRACK_WRITE))

- WARN_ON(sp->role.level != PG_LEVEL_4K);

- pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__,

- *sptep, write_fault, gfn);

- drop_parent_pte(child, sptep);

- pgprintk("hfn old %llx new %llx\n",

- spte_to_pfn(*sptep), pfn);

- pgprintk("%s: setting spte %llx\n", __func__, *sptep);

- WARN_ON(!sp->role.direct);

- * The "root" may be a special root, e.g. a PAE entry, treat it as a

- * SPTE to ensure any non-PA bits are dropped.

- sp = spte_to_child_sp(*root_hpa);

- if (to_shadow_page(mmu->root.hpa)) {

- if (!to_shadow_page(root_hpa) ||

- to_shadow_page(root_hpa)->role.guest_mode)

-static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)

- if (!kvm_vcpu_is_visible_gfn(vcpu, root_gfn)) {

- kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);

- if (mmu_check_root(vcpu, root_gfn))

- if (mmu_check_root(vcpu, pdptrs[i] >> PAGE_SHIFT))

- if (!VALID_PAGE(root))

- sp = to_shadow_page(root);

- if (WARN_ON(reserved))

- if (kvm_slot_page_track_is_active(vcpu->kvm, fault->slot, fault->gfn, KVM_PAGE_TRACK_WRITE))

- struct kvm_mmu_page *sp = to_shadow_page(vcpu->arch.mmu->root.hpa);

- pgprintk("%s: gva %lx error %x\n", __func__, fault->addr, fault->error_code);

- return (role.direct || pgd == root->pgd) &&

- VALID_PAGE(root->hpa) &&

- role.word == to_shadow_page(root->hpa)->role.word;

- * For now, limit the caching to 64-bit hosts+VMs in order to avoid

- * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs

- * later if necessary.

- if (VALID_PAGE(mmu->root.hpa) && !to_shadow_page(mmu->root.hpa))

- if (!new_role.direct)

- __clear_sp_write_flooding_count(

- to_shadow_page(vcpu->arch.mmu->root.hpa));

-static bool guest_can_use_gbpages(struct kvm_vcpu *vcpu)

- * If TDP is enabled, let the guest use GBPAGES if they're supported in

- * hardware. The hardware page walker doesn't let KVM disable GBPAGES,

- * i.e. won't treat them as reserved, and KVM doesn't redo the GVA->GPA

- * walk for performance and complexity reasons. Not to mention KVM

- * _can't_ solve the problem because GVA->GPA walks aren't visible to

- * KVM once a TDP translation is installed. Mimic hardware behavior so

- * that KVM's is at least consistent, i.e. doesn't randomly inject #PF.

- return tdp_enabled ? boot_cpu_has(X86_FEATURE_GBPAGES) :

- guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES);

- guest_can_use_gbpages(vcpu),

- guest_can_use_gbpages(vcpu), is_pse, is_amd);

- * gfn_track (see struct kvm_mmu_page_role comments). For now that

- * problem is swept under the rug; KVM's CPUID API is horrific and

- WARN_ON(VALID_PAGE(vcpu->arch.root_mmu.root.hpa));

- WARN_ON(VALID_PAGE(vcpu->arch.guest_mmu.root.hpa));

- * have an associated shadow page. This does mean KVM will get false

- * (a) only PAE paging and nested NPT has roots without shadow pages

- sp = to_shadow_page(root_hpa);

- pgprintk("misaligned: gpa %llx bytes %d role %x\n",

- gpa, bytes, sp->role.word);

-static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,

- const u8 *new, int bytes,

- struct kvm_page_track_notifier_node *node)

- pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);

- if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root.hpa)))

- if (WARN_ON(sp->role.invalid))

-static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm,

- struct kvm_memory_slot *slot,

- struct kvm_page_track_notifier_node *node)

- kvm_mmu_zap_all_fast(kvm);

- struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker;

- node->track_write = kvm_mmu_pte_write;

- node->track_flush_slot = kvm_mmu_invalidate_zap_pages_in_memslot;

- kvm_page_track_register_notifier(kvm, node);

- struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker;

- kvm_page_track_unregister_notifier(kvm, node);

- kvm_arch_flush_remote_tlbs_memslot(kvm, slot);

-void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm,

- const struct kvm_memory_slot *memslot)

- * All current use cases for flushing the TLBs for a specific memslot

- * related to dirty logging, and many do the TLB flush out of mmu_lock.

- * The interaction between the various operations on memslot must be

- * serialized by slots_locks to ensure the TLB flush from one operation

- * is observed by any other operation on the same memslot.

- lockdep_assert_held(&kvm->slots_lock);

- kvm_flush_remote_tlbs_range(kvm, memslot->base_gfn, memslot->npages);

-void kvm_mmu_zap_all(struct kvm *kvm)

- if (WARN_ON(sp->role.invalid))

- WARN_ON(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS);

- return sprintf(buffer, "never\n");

-#define pgprintk(x...) do { if (dbg) printk(x); } while (0)

-#define rmap_printk(fmt, args...) do { if (dbg) printk("%s: " fmt, __func__, ## args); } while (0)

-#define MMU_WARN_ON(x) WARN_ON(x)

-#define pgprintk(x...) do { } while (0)

-#define rmap_printk(x...) do { } while (0)

-#define MMU_WARN_ON(x) do { } while (0)

-void kvm_flush_remote_tlbs_range(struct kvm *kvm, gfn_t start_gfn,

-#include <asm/kvm_page_track.h>

- for (i = 0; i < KVM_PAGE_TRACK_MAX; i++) {

- kvfree(slot->arch.gfn_track[i]);

- slot->arch.gfn_track[i] = NULL;

-int kvm_page_track_create_memslot(struct kvm *kvm,

- struct kvm_memory_slot *slot,

- unsigned long npages)

- for (i = 0; i < KVM_PAGE_TRACK_MAX; i++) {

- if (i == KVM_PAGE_TRACK_WRITE &&

- !kvm_page_track_write_tracking_enabled(kvm))

- slot->arch.gfn_track[i] =

- __vcalloc(npages, sizeof(*slot->arch.gfn_track[i]),

- GFP_KERNEL_ACCOUNT);

- if (!slot->arch.gfn_track[i])

- kvm_page_track_free_memslot(slot);

-static inline bool page_track_mode_is_valid(enum kvm_page_track_mode mode)

- if (mode < 0 || mode >= KVM_PAGE_TRACK_MAX)

- unsigned short *gfn_track;

- if (slot->arch.gfn_track[KVM_PAGE_TRACK_WRITE])

- gfn_track = __vcalloc(slot->npages, sizeof(*gfn_track),

- GFP_KERNEL_ACCOUNT);

- if (gfn_track == NULL)

- slot->arch.gfn_track[KVM_PAGE_TRACK_WRITE] = gfn_track;

-static void update_gfn_track(struct kvm_memory_slot *slot, gfn_t gfn,

- enum kvm_page_track_mode mode, short count)

- val = slot->arch.gfn_track[mode][index];

- if (WARN_ON(val + count < 0 || val + count > USHRT_MAX))

- slot->arch.gfn_track[mode][index] += count;

- * add guest page to the tracking pool so that corresponding access on that

- * page will be intercepted.

- * It should be called under the protection both of mmu-lock and kvm->srcu

- * or kvm->slots_lock.

- * @kvm: the guest instance we are interested in.

- * @slot: the @gfn belongs to.

- * @gfn: the guest page.

- * @mode: tracking mode, currently only write track is supported.

-void kvm_slot_page_track_add_page(struct kvm *kvm,

- struct kvm_memory_slot *slot, gfn_t gfn,

- enum kvm_page_track_mode mode)

- if (WARN_ON(!page_track_mode_is_valid(mode)))

- if (WARN_ON(mode == KVM_PAGE_TRACK_WRITE &&

- !kvm_page_track_write_tracking_enabled(kvm)))

- update_gfn_track(slot, gfn, mode, 1);

- if (mode == KVM_PAGE_TRACK_WRITE)

- if (kvm_mmu_slot_gfn_write_protect(kvm, slot, gfn, PG_LEVEL_4K))

- kvm_flush_remote_tlbs(kvm);

-EXPORT_SYMBOL_GPL(kvm_slot_page_track_add_page);

- * remove the guest page from the tracking pool which stops the interception

- * of corresponding access on that page. It is the opposed operation of

- * kvm_slot_page_track_add_page().

- * It should be called under the protection both of mmu-lock and kvm->srcu

- * or kvm->slots_lock.

- * @kvm: the guest instance we are interested in.

- * @slot: the @gfn belongs to.

- * @gfn: the guest page.

- * @mode: tracking mode, currently only write track is supported.

-void kvm_slot_page_track_remove_page(struct kvm *kvm,

- struct kvm_memory_slot *slot, gfn_t gfn,

- enum kvm_page_track_mode mode)

- if (WARN_ON(!page_track_mode_is_valid(mode)))

- if (WARN_ON(mode == KVM_PAGE_TRACK_WRITE &&

- !kvm_page_track_write_tracking_enabled(kvm)))

- update_gfn_track(slot, gfn, mode, -1);

-EXPORT_SYMBOL_GPL(kvm_slot_page_track_remove_page);

-bool kvm_slot_page_track_is_active(struct kvm *kvm,

- const struct kvm_memory_slot *slot,

- gfn_t gfn, enum kvm_page_track_mode mode)

- if (WARN_ON(!page_track_mode_is_valid(mode)))

- if (mode == KVM_PAGE_TRACK_WRITE &&

- !kvm_page_track_write_tracking_enabled(kvm))

- return !!READ_ONCE(slot->arch.gfn_track[mode][index]);

-kvm_page_track_register_notifier(struct kvm *kvm,

- struct kvm_page_track_notifier_node *n)

-kvm_page_track_unregister_notifier(struct kvm *kvm,

- struct kvm_page_track_notifier_node *n)

-void kvm_page_track_write(struct kvm_vcpu *vcpu, gpa_t gpa, const u8 *new,

- head = &vcpu->kvm->arch.track_notifier_head;

- srcu_read_lock_held(&head->track_srcu))

- n->track_write(vcpu, gpa, new, bytes, n);

- * Notify the node that memory slot is being removed or moved so that it can

- * drop write-protection for the pages in the memory slot.

- * The node should figure out it has any write-protected pages in this slot

-void kvm_page_track_flush_slot(struct kvm *kvm, struct kvm_memory_slot *slot)

- srcu_read_lock_held(&head->track_srcu))

- if (n->track_flush_slot)

- n->track_flush_slot(kvm, slot, n);

- ASSERT(!(is_long_mode(vcpu) && !is_pae(vcpu)));

- host_addr = kvm_vcpu_gfn_to_hva_prot(vcpu, gpa_to_gfn(real_gpa),

- pgprintk("%s: pte %llx pte_access %x pt_access %x\n",

- __func__, (u64)pte, walker->pte_access,

- walker->pt_access[walker->level - 1]);

- pgprintk("%s: gpte %llx spte %p\n", __func__, (u64)gpte, spte);

- if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root.hpa)))

- pgprintk("%s: addr %lx err %x\n", __func__, fault->addr, fault->error_code);

- pgprintk("%s: guest page fault\n", __func__);

- WARN_ON(sp->role.level != PG_LEVEL_4K);

- WARN_ON(gen & ~MMIO_SPTE_GEN_MASK);

- pgprintk("%s: found shadow page for %llx, marking ro\n",

- WARN_ON(level > PG_LEVEL_4K);

- MMU_WARN_ON(!is_shadow_present_pte(spte));

- int root_level = root->role.level;

- WARN_ON(root_level < 1);

- WARN_ON(root_level > PT64_ROOT_MAX_LEVEL);

- iter->root_level = root_level;

- WARN_ON(level > PT64_ROOT_MAX_LEVEL);

- WARN_ON(level < PG_LEVEL_4K);

- WARN_ON(gfn & (KVM_PAGES_PER_HPAGE(level) - 1));

- if (WARN_ON(!is_mmio_spte(old_spte) &&

- !is_mmio_spte(new_spte) &&

- !is_removed_spte(new_spte)))

- WARN_ON(is_removed_spte(old_spte) || is_removed_spte(new_spte));

- for_each_tdp_pte(_iter, to_shadow_page(_mmu->root.hpa), _start, _end)

- WARN_ON(iter->yielded);

- WARN_ON(iter->gfn > iter->next_last_level_gfn);

- WARN_ON(pte_huge(range->pte) || range->start + 1 != range->end);

- if (!pte_write(range->pte)) {

- pte_pfn(range->pte));

- MMU_WARN_ON(kvm_ad_enabled() &&

- spte_ad_need_write_protect(iter.old_spte));

- MMU_WARN_ON(kvm_ad_enabled() &&

- spte_ad_need_write_protect(iter.old_spte));

- lockdep_assert_held_write(&kvm->mmu_lock);

- if (!static_call(kvm_x86_pmu_hw_event_available)(pmc))

- unsigned long flags;

- spin_lock_irqsave(&svm->ir_list_lock, flags);

- spin_unlock_irqrestore(&svm->ir_list_lock, flags);

- if (!svm->v_vmload_vmsave_enabled)

- kvm_set_rflags(&svm->vcpu, vmcb12->save.rflags | X86_EFLAGS_FIXED);

- svm_set_efer(&svm->vcpu, svm->nested.save.efer);

- svm_set_cr0(&svm->vcpu, svm->nested.save.cr0);

- svm_set_cr4(&svm->vcpu, svm->nested.save.cr4);

- kvm_rax_write(&svm->vcpu, vmcb12->save.rax);

- kvm_rsp_write(&svm->vcpu, vmcb12->save.rsp);

- kvm_rip_write(&svm->vcpu, vmcb12->save.rip);

- if (unlikely(svm->lbrv_enabled && (svm->nested.ctl.virt_ext & LBR_CTL_ENABLE_MASK))) {

- if (svm->vgif_enabled && (svm->nested.ctl.int_ctl & V_GIF_ENABLE_MASK))

- if (svm->tsc_ratio_msr != kvm_caps.default_tsc_scaling_ratio) {

- WARN_ON(!svm->tsc_scaling_enabled);

- if (svm->nrips_enabled)

- if (svm->lbrv_enabled)

- pause_count12 = svm->pause_filter_enabled ? svm->nested.ctl.pause_filter_count : 0;

- pause_thresh12 = svm->pause_threshold_enabled ? svm->nested.ctl.pause_filter_thresh : 0;

- if (svm->nrips_enabled)

- if (unlikely(svm->lbrv_enabled && (svm->nested.ctl.virt_ext & LBR_CTL_ENABLE_MASK))) {

- if (svm->tsc_ratio_msr != kvm_caps.default_tsc_scaling_ratio) {

- WARN_ON(!svm->tsc_scaling_enabled);

- __svm_write_tsc_multiplier(vcpu->arch.tsc_scaling_ratio);

- src_vcpu = kvm_get_vcpu(dst_kvm, i);

- if (!sev_enabled || !npt_enabled)

- ret = svm_invoke_exit_handler(vcpu, SVM_EXIT_IRET);

- * address since hardware will access it using the guest key.

- svm->vmcb->control.vmsa_pa = __pa(svm->sev_es.vmsa);

- /* No support for enable_vmware_backdoor */

- clr_exception_intercept(svm, GP_VECTOR);

- * As an SEV-ES guest, hardware will restore the host state on VMEXIT,

- * of which one step is to perform a VMLOAD. KVM performs the

- * corresponding VMSAVE in svm_prepare_guest_switch for both

- * traditional and SEV-ES guests.

- /* XCR0 is restored on VMEXIT, save the current host value */

- /* PKRU is restored on VMEXIT, save the current host value */

- /* MSR_IA32_XSS is restored on VMEXIT, save the currnet host value */

-#include <asm/virtext.h>

-static int nrips = true;

-static bool kvm_is_svm_supported(void)

- int cpu = raw_smp_processor_id();

- if (!cpu_has_svm(&msg)) {

- pr_err("SVM not supported by CPU %d, %s\n", cpu, msg);

- if (!kvm_is_svm_supported())

-void __svm_write_tsc_multiplier(u64 multiplier)

- preempt_disable();

- cpu_svm_disable();

-static int svm_get_lbr_msr(struct vcpu_svm *svm, u32 index)

- * If the LBR virtualization is disabled, the LBR msrs are always

- * kept in the vmcb01 to avoid copying them on nested guest entries.

- * If nested, and the LBR virtualization is enabled/disabled, the msrs

- * are moved between the vmcb01 and vmcb02 as needed.

- struct vmcb *vmcb =

- (svm->vmcb->control.virt_ext & LBR_CTL_ENABLE_MASK) ?

- svm->vmcb : svm->vmcb01.ptr;

- case MSR_IA32_DEBUGCTLMSR:

- return vmcb->save.dbgctl;

- case MSR_IA32_LASTBRANCHFROMIP:

- return vmcb->save.br_from;

- case MSR_IA32_LASTBRANCHTOIP:

- return vmcb->save.br_to;

- case MSR_IA32_LASTINTFROMIP:

- return vmcb->save.last_excp_from;

- case MSR_IA32_LASTINTTOIP:

- return vmcb->save.last_excp_to;

- KVM_BUG(false, svm->vcpu.kvm,

- "%s: Unknown MSR 0x%x", __func__, index);

- bool enable_lbrv = svm_get_lbr_msr(svm, MSR_IA32_DEBUGCTLMSR) &

- bool current_enable_lbrv = !!(svm->vmcb->control.virt_ext &

- LBR_CTL_ENABLE_MASK);

- if (unlikely(is_guest_mode(vcpu) && svm->lbrv_enabled))

- if (unlikely(svm->nested.ctl.virt_ext & LBR_CTL_ENABLE_MASK))

- enable_lbrv = true;

-static void svm_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)

- svm->vmcb->control.tsc_offset = offset;

-static void svm_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 multiplier)

- __svm_write_tsc_multiplier(multiplier);

- svm->v_vmload_vmsave_enabled = false;

- * as VMware does. Don't intercept #GP for SEV guests as KVM can't

- * decrypt guest memory to decode the faulting instruction.

- if (enable_vmware_backdoor && !sev_guest(vcpu->kvm))

- if (vcpu->arch.guest_state_protected)

- if (!sev_es_guest(vcpu->kvm))

- svm->nmi_iret_rip = kvm_rip_read(vcpu);

- if (!msr_info->host_initiated && !svm->tsc_scaling_enabled)

- msr_info->data = svm_get_lbr_msr(svm, msr_info->index);

- if (!svm->tsc_scaling_enabled) {

- if (svm->tsc_scaling_enabled && is_guest_mode(vcpu))

- if (svm->vmcb->control.virt_ext & LBR_CTL_ENABLE_MASK)

- svm->vmcb->save.dbgctl = data;

- svm->vmcb01.ptr->save.dbgctl = data;

- * If we've made progress since setting HF_IRET_MASK, we've

- (sev_es_guest(vcpu->kvm) ||

- kvm_rip_read(vcpu) != svm->nmi_iret_rip)) {

- vcpu->arch.xsaves_enabled = guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&

- boot_cpu_has(X86_FEATURE_XSAVE) &&

- boot_cpu_has(X86_FEATURE_XSAVES);

- /* Update nrips enabled cache */

- svm->nrips_enabled = kvm_cpu_cap_has(X86_FEATURE_NRIPS) &&

- guest_cpuid_has(vcpu, X86_FEATURE_NRIPS);

- svm->tsc_scaling_enabled = tsc_scaling && guest_cpuid_has(vcpu, X86_FEATURE_TSCRATEMSR);

- svm->lbrv_enabled = lbrv && guest_cpuid_has(vcpu, X86_FEATURE_LBRV);

- svm->v_vmload_vmsave_enabled = vls && guest_cpuid_has(vcpu, X86_FEATURE_V_VMSAVE_VMLOAD);

- svm->pause_filter_enabled = kvm_cpu_cap_has(X86_FEATURE_PAUSEFILTER) &&

- guest_cpuid_has(vcpu, X86_FEATURE_PAUSEFILTER);

- svm->pause_threshold_enabled = kvm_cpu_cap_has(X86_FEATURE_PFTHRESHOLD) &&

- guest_cpuid_has(vcpu, X86_FEATURE_PFTHRESHOLD);

- svm->vgif_enabled = vgif && guest_cpuid_has(vcpu, X86_FEATURE_VGIF);

- svm->vnmi_enabled = vnmi && guest_cpuid_has(vcpu, X86_FEATURE_VNMI);

- * Inject #UD if KVM reached this point without an instruction buffer.

- * In practice, this path should never be hit by a well-behaved guest,

- * e.g. KVM doesn't intercept #UD or #GP for SEV guests, but this path

- * is still theoretically reachable, e.g. via unaccelerated fault-like

- * AVIC access, and needs to be handled by KVM to avoid putting the

- * guest into an infinite loop. Injecting #UD is somewhat arbitrary,

- * but its the least awful option given lack of insight into the guest.

- kvm_queue_exception(vcpu, UD_VECTOR);

- * may be modified by svm_adjust_mmio_mask()).

- if (!boot_cpu_has(X86_FEATURE_NRIPS))

- kvm_x86_vendor_exit();

- /* optional nested SVM features that are enabled for this guest */

- bool nrips_enabled : 1;

- bool tsc_scaling_enabled : 1;

- bool v_vmload_vmsave_enabled : 1;

- bool lbrv_enabled : 1;

- bool pause_filter_enabled : 1;

- bool pause_threshold_enabled : 1;

- bool vgif_enabled : 1;

- bool vnmi_enabled : 1;

-static inline void set_dr_intercepts(struct vcpu_svm *svm)

- struct vmcb *vmcb = svm->vmcb01.ptr;

- if (!sev_es_guest(svm->vcpu.kvm)) {

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR0_READ);

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR1_READ);

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR2_READ);

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR3_READ);

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR4_READ);

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR5_READ);

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR6_READ);

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR0_WRITE);

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR1_WRITE);

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR2_WRITE);

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR3_WRITE);

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR4_WRITE);

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR5_WRITE);

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR6_WRITE);

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_READ);

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_WRITE);

- recalc_intercepts(svm);

-static inline void clr_dr_intercepts(struct vcpu_svm *svm)

- struct vmcb *vmcb = svm->vmcb01.ptr;

- vmcb->control.intercepts[INTERCEPT_DR] = 0;

- /* DR7 access must remain intercepted for an SEV-ES guest */

- if (sev_es_guest(svm->vcpu.kvm)) {

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_READ);

- vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_WRITE);

- recalc_intercepts(svm);

- return svm->vgif_enabled && (svm->nested.ctl.int_ctl & V_GIF_ENABLE_MASK);

- return svm->vnmi_enabled &&

-void __svm_write_tsc_multiplier(u64 multiplier);

- SECONDARY_EXEC_XSAVES;

- SECONDARY_EXEC_XSAVES | \

- SECONDARY_EXEC_XSAVES |

- return nested_cpu_has2(vmcs12, SECONDARY_EXEC_XSAVES);

- if (nested_vmx_allowed(vcpu) &&

- if (!nested_vmx_allowed(vcpu))

- (!nested_vmx_allowed(vcpu) || !vmx->nested.enlightened_vmcs_enabled))

- SECONDARY_EXEC_XSAVES |

- return nested_cpu_has2(vmcs12, SECONDARY_EXEC_XSAVES);

- [0] = { 0x3c, 0x00 },

- [1] = { 0xc0, 0x00 },

- [2] = { 0x3c, 0x01 },

- [3] = { 0x2e, 0x4f },

- [4] = { 0x2e, 0x41 },

- [5] = { 0xc4, 0x00 },

- [6] = { 0xc5, 0x00 },

- /* The above index must match CPUID 0x0A.EBX bit vector */

- [7] = { 0x00, 0x03 },

-static int fixed_pmc_events[] = {1, 0, 7};

- for (i = 0; i < ARRAY_SIZE(intel_arch_events); i++) {

- /* disable event that reported as not present by cpuid */

- if ((i < 7) && !(pmu->available_event_types & (1 << i)))

- size_t size = ARRAY_SIZE(fixed_pmc_events);

- struct kvm_pmc *pmc;

- pmc = &pmu->fixed_counters[i];

- event = fixed_pmc_events[array_index_nospec(i, size)];

- intel_arch_events[event].eventsel;

- pmu->nr_arch_fixed_counters =

- min3(ARRAY_SIZE(fixed_pmc_events),

- (size_t) edx.split.num_counters_fixed,

- (size_t)kvm_pmu_cap.num_counters_fixed);

- apic->send_IPI_self(POSTED_INTR_WAKEUP_VECTOR);

-#include <asm/kexec.h>

-#include <asm/virtext.h>

-/* Control for disabling CPU Fill buffer clear */

-static bool __read_mostly vmx_fb_clear_ctrl_available;

- if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES)) {

- rdmsrl(MSR_IA32_ARCH_CAPABILITIES, msr);

- if (msr & ARCH_CAP_SKIP_VMENTRY_L1DFLUSH) {

- l1tf_vmx_mitigation = VMENTER_L1D_FLUSH_NOT_REQUIRED;

- return sprintf(s, "???\n");

- return sprintf(s, "%s\n", vmentry_l1d_param[l1tf_vmx_mitigation].option);

-static void vmx_setup_fb_clear_ctrl(void)

- if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES) &&

- !boot_cpu_has_bug(X86_BUG_MDS) &&

- !boot_cpu_has_bug(X86_BUG_TAA)) {

- rdmsrl(MSR_IA32_ARCH_CAPABILITIES, msr);

- if (msr & ARCH_CAP_FB_CLEAR_CTRL)

- vmx_fb_clear_ctrl_available = true;

- vmx->disable_fb_clear = vmx_fb_clear_ctrl_available;

-#ifdef CONFIG_KEXEC_CORE

-static void crash_vmclear_local_loaded_vmcss(void)

-#endif /* CONFIG_KEXEC_CORE */

-static void vmx_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)

- vmcs_write64(TSC_OFFSET, offset);

-static void vmx_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 multiplier)

- vmcs_write64(TSC_MULTIPLIER, multiplier);

- * nested_vmx_allowed() checks whether a guest should be allowed to use VMX

- * instructions and MSRs (i.e., nested VMX). Nested VMX is disabled for

- * all guests if the "nested" module option is off, and can also be disabled

- * for a single guest by disabling its VMX cpuid bit.

-bool nested_vmx_allowed(struct kvm_vcpu *vcpu)

- return nested && guest_cpuid_has(vcpu, X86_FEATURE_VMX);

- if (!nested_vmx_allowed(vcpu))

-static bool kvm_is_vmx_supported(void)

- int cpu = raw_smp_processor_id();

- if (!cpu_has_vmx()) {

- if (!kvm_is_vmx_supported())

- * Very old userspace does not call KVM_SET_TSS_ADDR before entering

- * vcpu. Warn the user that an update is overdue.

- if (!kvm_vmx->tss_addr)

- pr_warn_once("KVM_SET_TSS_ADDR needs to be called before running vCPU\n");

-static int vmx_get_max_tdp_level(void)

- apic->send_IPI_mask(get_cpu_mask(vcpu->cpu), pi_vec);

-#define vmx_adjust_sec_exec_control(vmx, exec_control, name, feat_name, ctrl_name, exiting) \

- if (cpu_has_vmx_##name()) { \

- __enabled = guest_cpuid_has(&(vmx)->vcpu, \

- X86_FEATURE_##feat_name); \

- vmx_adjust_secondary_exec_control(vmx, exec_control, \

- SECONDARY_EXEC_##ctrl_name, __enabled, exiting); \

- if (cpu_has_vmx_xsaves()) {

- /* Exposing XSAVES only when XSAVE is exposed */

- bool xsaves_enabled =

- boot_cpu_has(X86_FEATURE_XSAVE) &&

- guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&

- guest_cpuid_has(vcpu, X86_FEATURE_XSAVES);

- vcpu->arch.xsaves_enabled = xsaves_enabled;

- vmx_adjust_secondary_exec_control(vmx, &exec_control,

- SECONDARY_EXEC_XSAVES,

- xsaves_enabled, false);

- vmx_flush_tlb_current(vcpu);

- if (unlikely(vmx->fail))

- vmx->exit_reason.full = vmcs_read32(VM_EXIT_REASON);

- vcpu->arch.regs_avail &= ~VMX_REGS_LAZY_LOAD_SET;

- vmx->idt_vectoring_info = 0;

- if (likely(!vmx->exit_reason.failed_vmentry))

- vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);

- /* xsaves_enabled is recomputed in vmx_compute_secondary_exec_control(). */

- vcpu->arch.xsaves_enabled = false;

- if (nested_vmx_allowed(vcpu))

- kvm_configure_mmu(enable_ept, 0, vmx_get_max_tdp_level(),

-#ifdef CONFIG_KEXEC_CORE

- RCU_INIT_POINTER(crash_vmclear_loaded_vmcss, NULL);

- synchronize_rcu();

- vmx_setup_fb_clear_ctrl();

-#ifdef CONFIG_KEXEC_CORE

- rcu_assign_pointer(crash_vmclear_loaded_vmcss,

- crash_vmclear_local_loaded_vmcss);

-bool nested_vmx_allowed(struct kvm_vcpu *vcpu);

- SECONDARY_EXEC_XSAVES | \

- if (vcpu->arch.xsaves_enabled &&

- if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES)) {

- rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);

- data &= KVM_SUPPORTED_ARCH_CAP;

- static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);

- static_call(kvm_x86_write_tsc_multiplier)(

- vcpu, vcpu->arch.tsc_scaling_ratio);

- unsigned long *bitmap = NULL;

-static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)

- return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);

- .guest_has_long_mode = emulator_guest_has_long_mode,

- unsigned long khz = 0;

- * It should be impossible for the hypervisor timer to be in

- * use before KVM has ever run the vCPU.

- WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu));

- if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))

- if (kvm_vcpu_ioctl_x86_set_vcpu_events(

- vcpu, &vcpu->run->s.regs.events))

- kvm_arch_flush_remote_tlbs_memslot(kvm, new);

-void kvm_arch_flush_shadow_all(struct kvm *kvm)

- kvm_mmu_zap_all(kvm);

-void kvm_arch_flush_shadow_memslot(struct kvm *kvm,

- struct kvm_memory_slot *slot)

- kvm_page_track_flush_slot(kvm, slot);

- * it simpler for us, we can clobber rsi/rdi and rax/r8-r11 freely.

-0: ALTERNATIVE "jmp .Lunrolled", "rep movsb", X86_FEATURE_ERMS

- _ASM_EXTABLE_UA( 0b, 1b)

-10: movq (%rsi),%r8

-11: movq 8(%rsi),%r9

-12: movq 16(%rsi),%r10

-13: movq 24(%rsi),%r11

-14: movq %r8,(%rdi)

-15: movq %r9,8(%rdi)

-16: movq %r10,16(%rdi)

-17: movq %r11,24(%rdi)

-20: movq 32(%rsi),%r8

-21: movq 40(%rsi),%r9

-22: movq 48(%rsi),%r10

-23: movq 56(%rsi),%r11

-24: movq %r8,32(%rdi)

-25: movq %r9,40(%rdi)

-26: movq %r10,48(%rdi)

-27: movq %r11,56(%rdi)

- _ASM_EXTABLE_UA(10b, .Lcopy_user_tail)

- _ASM_EXTABLE_UA(11b, .Lcopy_user_tail)

- _ASM_EXTABLE_UA(12b, .Lcopy_user_tail)

- _ASM_EXTABLE_UA(13b, .Lcopy_user_tail)

- _ASM_EXTABLE_UA(14b, .Lcopy_user_tail)

- _ASM_EXTABLE_UA(15b, .Lcopy_user_tail)

- _ASM_EXTABLE_UA(16b, .Lcopy_user_tail)

- _ASM_EXTABLE_UA(17b, .Lcopy_user_tail)

- _ASM_EXTABLE_UA(20b, .Lcopy_user_tail)

- _ASM_EXTABLE_UA(21b, .Lcopy_user_tail)

- _ASM_EXTABLE_UA(22b, .Lcopy_user_tail)

- _ASM_EXTABLE_UA(23b, .Lcopy_user_tail)

- _ASM_EXTABLE_UA(24b, .Lcopy_user_tail)

- _ASM_EXTABLE_UA(25b, .Lcopy_user_tail)

- _ASM_EXTABLE_UA(26b, .Lcopy_user_tail)

- _ASM_EXTABLE_UA(27b, .Lcopy_user_tail)

-#ifdef CONFIG_PER_VMA_LOCK

- vma_end_read(vma);

-#endif /* CONFIG_PER_VMA_LOCK */

-#ifdef CONFIG_PER_VMA_LOCK

-#include <asm/microcode.h>

- INTEL_MATCH(INTEL_FAM6_ALDERLAKE_N ),

- * INVPCID's single-context modes (2/3) only work if we set

- * X86_CR4_PCIDE, *and* we INVPCID support. It's unusable

- * on systems that have X86_CR4_PCIDE clear, or that have

- * no INVPCID support at all.

- if (boot_cpu_has(X86_FEATURE_INVPCID))

- setup_force_cpu_cap(X86_FEATURE_INVPCID_SINGLE);

-static void enc_dec_hypercall(unsigned long vaddr, int npages, bool enc)

- unsigned long sz = npages << PAGE_SHIFT;

- unsigned long vaddr_end = vaddr + sz;

- enc_dec_hypercall(vaddr, npages, enc);

- early_set_mem_enc_dec_hypercall(start, PAGE_ALIGN(size) >> PAGE_SHIFT, enc);

-void __init early_set_mem_enc_dec_hypercall(unsigned long vaddr, int npages, bool enc)

- enc_dec_hypercall(vaddr, npages, enc);

- return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);

- pgprot_t clr = __pgprot(_PAGE_RW);

- pgtable_pte_page_dtor(pte);

- struct page *page = virt_to_page(pmd);

- pgtable_pmd_page_dtor(page);

- paravirt_tlb_remove_table(tlb, page);

- struct page *page = virt_to_page(pgd);

- list_add(&page->lru, &pgd_list);

- struct page *page = virt_to_page(pgd);

- list_del(&page->lru);

- virt_to_page(pgd)->pt_mm = mm;

- return page->pt_mm;

- pgtable_pmd_page_dtor(virt_to_page(pmds[i]));

- free_page((unsigned long)pmds[i]);

- pmd_t *pmd = (pmd_t *)__get_free_page(gfp);

- if (pmd && !pgtable_pmd_page_ctor(virt_to_page(pmd))) {

- free_page((unsigned long)pmd);

- pgtable_pmd_page_dtor(virt_to_page(pmd));

- if (!apic->apic_id_valid(apic_id)) {

- printk(KERN_INFO "SRAT: PXM %u -> X2APIC 0x%04x ignored\n",

- u32 loaded_mm_asid = this_cpu_read(cpu_tlbstate.loaded_mm_asid);

- * Some platforms #GP if we call invpcid(type=1/2) before CR4.PCIDE=1.

- * Just use invalidate_user_asid() in case we are called early.

- if (!this_cpu_has(X86_FEATURE_INVPCID_SINGLE))

- invalidate_user_asid(loaded_mm_asid);

- emit_mov_reg(&prog,

- BPF_CLASS(insn->code) == BPF_ALU64,

- dst_reg, src_reg);

- * equivalent to 'xor rdx, rdx', but one byte less

- EMIT2(0x31, 0xd2);

- maybe_emit_1mod(&prog, src_reg, is64);

- EMIT2(0xF7, add_1reg(0xF0, src_reg));

- if (BPF_MODE(insn->code) == BPF_PROBE_MEM) {

- emit_ldx(&prog, BPF_SIZE(insn->code), dst_reg, src_reg, insn_off);

- if (BPF_MODE(insn->code) == BPF_PROBE_MEM) {

- if (insn->off == -1)

- /* -1 jmp instructions will always jump

- * backwards two bytes. Explicitly handling

- * this case avoids wasting too many passes

- * when there are long sequences of replaced

- jmp_offset = addrs[i + insn->off] - addrs[i];

-static void save_regs(const struct btf_func_model *m, u8 **prog, int nr_regs,

- int i, j, arg_size;

- bool next_same_struct = false;

- for (i = 0, j = 0; i < min(nr_regs, 6); i++) {

- /* The arg_size is at most 16 bytes, enforced by the verifier. */

- arg_size = m->arg_size[j];

- if (arg_size > 8) {

- next_same_struct = !next_same_struct;

- emit_stx(prog, bytes_to_bpf_size(arg_size),

- i == 5 ? X86_REG_R9 : BPF_REG_1 + i,

- -(stack_size - i * 8));

- j = next_same_struct ? j : j + 1;

-static void restore_regs(const struct btf_func_model *m, u8 **prog, int nr_regs,

- int i, j, arg_size;

- bool next_same_struct = false;

- for (i = 0, j = 0; i < min(nr_regs, 6); i++) {

- /* The arg_size is at most 16 bytes, enforced by the verifier. */

- arg_size = m->arg_size[j];

- if (arg_size > 8) {

- next_same_struct = !next_same_struct;

- emit_ldx(prog, bytes_to_bpf_size(arg_size),

- i == 5 ? X86_REG_R9 : BPF_REG_1 + i,

- -(stack_size - i * 8));

- j = next_same_struct ? j : j + 1;

- EMIT4(0x48, 0x8D, 0x75, -run_ctx_off);

- EMIT4(0x48, 0x8D, 0x7D, -stack_size);

- EMIT4(0x48, 0x8D, 0x55, -run_ctx_off);

- int regs_off, nregs_off, ip_off, run_ctx_off;

- /* x86-64 supports up to 6 arguments. 7+ can be added in the future */

- EMIT4(0x48, 0x83, 0xEC, stack_size); /* sub rsp, stack_size */

- EMIT1(0x53); /* push rbx */

- save_regs(m, &prog, nr_regs, regs_off);

- restore_regs(m, &prog, nr_regs, regs_off);

- EMIT1(0x5B); /* pop rbx */

- if (start == MAX_RESOURCE)

- size = sizeof(*ir) + ir->used * sizeof(ir->slots[0]);

- size = sizeof(*rt) + ir->used * sizeof(rt->slots[0]);

- if (!disable_apic) {

- * @ctx: map allocation parameters (address, size, flags)

- send_cleanup_vector(cfg);

- char arg[ACTION_LEN], *p;

- strncpy(arg, val, ACTION_LEN - 1);

- arg[ACTION_LEN - 1] = '\0';

- p = strchr(arg, '\n');

- strcpy(uv_nmi_action, arg);

- apic->send_IPI_mask(uv_nmi_cpu_mask, APIC_DM_NMI);

- strncpy(uv_nmi_action, "dump", strlen(uv_nmi_action));

- mem_$(BITS).o subarch.o os-$(OS)/

-obj-y += checksum_32.o syscalls_32.o

-extern void ldt_host_info(void);

-/* SPDX-License-Identifier: GPL-2.0-or-later */

- * INET An implementation of the TCP/IP protocol suite for the LINUX

- * operating system. INET is implemented using the BSD Socket

- * interface as the means of communication with the user level.

- * IP/TCP/UDP checksumming routines

- * Authors: Jorge Cwik, <jorge@laser.satlink.net>

- * Arnt Gulbrandsen, <agulbra@nvg.unit.no>

- * Tom May, <ftom@netcom.com>

- * Pentium Pro/II routines:

- * Alexander Kjeldaas <astor@guardian.no>

- * Finn Arne Gangstad <finnag@guardian.no>

- * Lots of code moved from tcp.c and ip.c; see those files

- * Changes: Ingo Molnar, converted csum_partial_copy() to 2.1 exception

- * Andi Kleen, add zeroing on error

- * converted to pure assembler

-#include <asm/errno.h>

-#include <asm/asm.h>

-#include <asm/export.h>

- * computes a partial checksum, e.g. for TCP/UDP fragments

-unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum)

-.globl csum_partial

-#ifndef CONFIG_X86_USE_PPRO_CHECKSUM

- * Experiments with Ethernet and SLIP connections show that buff

- * is aligned on either a 2-byte or 4-byte boundary. We get at

- * least a twofold speedup on 486 and Pentium if it is 4-byte aligned.

- * Fortunately, it is easy to convert 2-byte alignment to 4-byte

- * alignment for the unrolled loop.

- movl 20(%esp),%eax # Function arg: unsigned int sum

- movl 16(%esp),%ecx # Function arg: int len

- movl 12(%esp),%esi # Function arg: unsigned char *buff

- testl $2, %esi # Check alignment.

- jz 2f # Jump if alignment is ok.

- subl $2, %ecx # Alignment uses up two bytes.

- jae 1f # Jump if we had at least two bytes.

- addl $2, %ecx # ecx was < 2. Deal with it.

-1: movw (%esi), %bx

-1: movl (%esi), %ebx

- movl 4(%esi), %ebx

- movl 8(%esi), %ebx

- movl 12(%esi), %ebx

- movl 16(%esi), %ebx

- movl 20(%esi), %ebx

- movl 24(%esi), %ebx

- movl 28(%esi), %ebx

- lea 32(%esi), %esi

- shrl $2, %edx # This clears CF

-3: adcl (%esi), %eax

-/* Version for PentiumII/PPro */

- movl 20(%esp),%eax # Function arg: unsigned int sum

- movl 16(%esp),%ecx # Function arg: int len

- movl 12(%esp),%esi # Function arg: const unsigned char *buf

- lea 45f(%ebx,%ebx,2), %ebx

- # Handle 2-byte-aligned regions

-20: addw (%esi), %ax

- movzbl (%esi),%ebx # csumming 1 byte, 2-aligned

- addw (%esi), %ax # csumming 2 bytes, 2-aligned

- addl -128(%esi), %eax

- adcl -124(%esi), %eax

- adcl -120(%esi), %eax

- adcl -116(%esi), %eax

- adcl -112(%esi), %eax

- adcl -108(%esi), %eax

- adcl -104(%esi), %eax

- adcl -100(%esi), %eax

- adcl -96(%esi), %eax

- adcl -92(%esi), %eax

- adcl -88(%esi), %eax

- adcl -84(%esi), %eax

- adcl -80(%esi), %eax

- adcl -76(%esi), %eax

- adcl -72(%esi), %eax

- adcl -68(%esi), %eax

- adcl -64(%esi), %eax

- adcl -60(%esi), %eax

- adcl -56(%esi), %eax

- adcl -52(%esi), %eax

- adcl -48(%esi), %eax

- adcl -44(%esi), %eax

- adcl -40(%esi), %eax

- adcl -36(%esi), %eax

- adcl -32(%esi), %eax

- adcl -28(%esi), %eax

- adcl -24(%esi), %eax

- adcl -20(%esi), %eax

- adcl -16(%esi), %eax

- adcl -12(%esi), %eax

- adcl -8(%esi), %eax

- adcl -4(%esi), %eax

- lea 128(%esi), %esi

- # Handle the last 1-3 bytes without jumping

- notl %ecx # 1->2, 2->1, 3->0, higher bits are masked

- movl $0xffffff,%ebx # by the shll and shrl instructions

- andl -128(%esi),%ebx # esi is 4-aligned so should be ok

- EXPORT_SYMBOL(csum_partial)

-obj-$(CONFIG_FB) += fbdev.o

-static u32 xen_safe_apic_wait_icr_idle(void)

-static int xen_id_always_valid(u32 apicid)

-static int xen_id_always_registered(void)

-static void xen_noop(void)

-static void xen_silent_inquire(int apicid)

-static struct apic xen_pv_apic = {

- .probe = xen_apic_probe_pv,

- .apic_id_valid = xen_id_always_valid,

- .apic_id_registered = xen_id_always_registered,

- .check_apicid_used = default_check_apicid_used, /* Used on 32-bit */

- .init_apic_ldr = xen_noop, /* setup_local_APIC calls it */

- .ioapic_phys_id_map = default_ioapic_phys_id_map, /* Used on 32-bit */

- .setup_apic_routing = NULL,

- .apicid_to_cpu_present = physid_set_mask_of_physid, /* Used on 32-bit */

- .check_phys_apicid_present = default_check_phys_apicid_present, /* smp_sanity_check needs it */

- .get_apic_id = xen_get_apic_id,

- .set_apic_id = xen_set_apic_id, /* Can be NULL on 32-bit. */

- .send_IPI_mask = xen_send_IPI_mask,

- .send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself,

- .send_IPI_allbutself = xen_send_IPI_allbutself,

- .send_IPI_all = xen_send_IPI_all,

- .send_IPI_self = xen_send_IPI_self,

- /* .wait_for_init_deassert- used by AP bootup - smp_callin which we don't use */

- .inquire_remote_apic = xen_silent_inquire,

- .eoi_write = xen_apic_write,

- .icr_read = xen_apic_icr_read,

- .icr_write = xen_apic_icr_write,

- .wait_icr_idle = xen_noop,

- .safe_wait_icr_idle = xen_safe_apic_wait_icr_idle,

-static void __init xen_apic_check(void)

- if (apic == &xen_pv_apic)

- pr_info("Switched APIC routing from %s to %s.\n", apic->name,

- xen_pv_apic.name);

- apic = &xen_pv_apic;

- /* On PV guests the APIC CPUID bit is disabled so none of the

- * routines end up executing. */

- if (!xen_initial_domain())

- apic = &xen_pv_apic;

- x86_platform.apic_post_init = xen_apic_check;

-apic_driver(xen_pv_apic);

-#include <acpi/pdc_intel.h>

- /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,

- buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);

- (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {

- pfn = virt_to_pfn(va);

-#ifdef CONFIG_X86_KERNEL_IBT

- x86_init.irqs.intr_mode_init = x86_init_noop;

-#ifdef CONFIG_X86_LOCAL_APIC

- ptev = pte_mkwrite(*pte);

- ptl = ptlock_ptr(page);

- in_frames[i] = virt_to_mfn(vaddr);

- __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);

- out_frames[i] = virt_to_pfn(vaddr);

- set_phys_to_machine(virt_to_pfn(vaddr), mfn);

- * Currently an auto-translated guest will not perform I/O, nor will

- * it require PAE page directories below 4GB. Therefore any calls to

- * this function are redundant and can be ignored.

- out_frame = virt_to_pfn(vstart);

- in_frame = virt_to_mfn(vstart);

- mfn_save = virt_to_mfn(buf);

- if (skip_ioapic_setup) {

-#ifdef CONFIG_X86_KERNEL_IBT

-void flush_dcache_page(struct page *);

-/* This is not required, see Documentation/core-api/cachetlb.rst */

-#define flush_icache_page(vma,page) do { } while (0)

-void __iomem *xtensa_ioremap_nocache(unsigned long addr, unsigned long size);

-void __iomem *xtensa_ioremap_cache(unsigned long addr, unsigned long size);

-void xtensa_iounmap(volatile void __iomem *addr);

- * Return the virtual address for the specified bus memory.

- return xtensa_ioremap_nocache(offset, size);

- return xtensa_ioremap_cache(offset, size);

-#define ioremap_cache ioremap_cache

-static inline void iounmap(volatile void __iomem *addr)

- unsigned long va = (unsigned long) addr;

- if (!(va >= XCHAL_KIO_CACHED_VADDR &&

- va - XCHAL_KIO_CACHED_VADDR < XCHAL_KIO_SIZE) &&

- !(va >= XCHAL_KIO_BYPASS_VADDR &&

- va - XCHAL_KIO_BYPASS_VADDR < XCHAL_KIO_SIZE))

- xtensa_iounmap(addr);

-static inline pte_t pte_mkwrite(pte_t pte)

-set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pteval)

- update_pte(ptep, pteval);

-static inline void set_pte(pte_t *ptep, pte_t pteval)

- update_pte(ptep, pteval);

-extern void update_mmu_cache(struct vm_area_struct * vma,

- unsigned long address, pte_t *ptep);

-#define XTENSA_PMU_PMG 0x1000

-#define XTENSA_PMU_PM(i) (0x1080 + (i) * 4)

-#define XTENSA_PMU_PMCTRL(i) (0x1100 + (i) * 4)

-#define XTENSA_PMU_PMSTAT(i) (0x1180 + (i) * 4)

-void flush_dcache_page(struct page *page)

- struct address_space *mapping = page_mapping_file(page);

- if (!test_bit(PG_arch_1, &page->flags))

- set_bit(PG_arch_1, &page->flags);

- unsigned long phys = page_to_phys(page);

- unsigned long temp = page->index << PAGE_SHIFT;

- virt = TLBTEMP_BASE_1 + (phys & DCACHE_ALIAS_MASK);

- __flush_invalidate_dcache_page_alias(virt, phys);

- virt = TLBTEMP_BASE_1 + (temp & DCACHE_ALIAS_MASK);

- __flush_invalidate_dcache_page_alias(virt, phys);

- __invalidate_icache_page_alias(virt, phys);

-EXPORT_SYMBOL(flush_dcache_page);

-update_mmu_cache(struct vm_area_struct * vma, unsigned long addr, pte_t *ptep)

- struct page *page;

- page = pfn_to_page(pfn);

- /* Invalidate old entry in TLBs */

- flush_tlb_page(vma, addr);

- if (!PageReserved(page) && test_bit(PG_arch_1, &page->flags)) {

- unsigned long phys = page_to_phys(page);

- tmp = TLBTEMP_BASE_1 + (phys & DCACHE_ALIAS_MASK);

- __flush_invalidate_dcache_page_alias(tmp, phys);

- tmp = TLBTEMP_BASE_1 + (addr & DCACHE_ALIAS_MASK);

- __flush_invalidate_dcache_page_alias(tmp, phys);

- __invalidate_icache_page_alias(tmp, phys);

- clear_bit(PG_arch_1, &page->flags);

- if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags)

- unsigned long paddr = (unsigned long)kmap_atomic(page);

- __flush_dcache_page(paddr);

- __invalidate_icache_page(paddr);

- set_bit(PG_arch_1, &page->flags);

- kunmap_atomic((void *)paddr);

-#include <linux/vmalloc.h>

-static void __iomem *xtensa_ioremap(unsigned long paddr, unsigned long size,

- unsigned long offset = paddr & ~PAGE_MASK;

- unsigned long pfn = __phys_to_pfn(paddr);

- struct vm_struct *area;

- unsigned long vaddr;

- paddr &= PAGE_MASK;

- size = PAGE_ALIGN(offset + size);

- area = get_vm_area(size, VM_IOREMAP);

- vaddr = (unsigned long)area->addr;

- area->phys_addr = paddr;

- err = ioremap_page_range(vaddr, vaddr + size, paddr, prot);

- vunmap((void *)vaddr);

- flush_cache_vmap(vaddr, vaddr + size);

- return (void __iomem *)(offset + vaddr);

-void __iomem *xtensa_ioremap_nocache(unsigned long addr, unsigned long size)

- return xtensa_ioremap(addr, size, pgprot_noncached(PAGE_KERNEL));

-EXPORT_SYMBOL(xtensa_ioremap_nocache);

-void __iomem *xtensa_ioremap_cache(unsigned long addr, unsigned long size)

- return xtensa_ioremap(addr, size, PAGE_KERNEL);

-EXPORT_SYMBOL(xtensa_ioremap_cache);

-void xtensa_iounmap(volatile void __iomem *io_addr)

- void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr);

-EXPORT_SYMBOL(xtensa_iounmap);

-static int rs_write(struct tty_struct * tty,

- const unsigned char *buf, int count)

-static int rs_put_char(struct tty_struct *tty, unsigned char ch)

- return rs_write(tty, &ch, 1);

-static void rs_flush_chars(struct tty_struct *tty)

-static void rs_hangup(struct tty_struct *tty)

- /* Stub, once again.. */

-static void rs_wait_until_sent(struct tty_struct *tty, int timeout)

- /* Stub, once again.. */

- .put_char = rs_put_char,

- .flush_chars = rs_flush_chars,

- .hangup = rs_hangup,

- .wait_until_sent = rs_wait_until_sent,

- * Write out and wait upon all dirty data associated with this

- * device. Filesystem data as well as the underlying block

- * device. Takes the superblock lock.

-int fsync_bdev(struct block_device *bdev)

- struct super_block *sb = get_super(bdev);

- int res = sync_filesystem(sb);

- return sync_blockdev(bdev);

-EXPORT_SYMBOL(fsync_bdev);

- error = sb->s_op->freeze_super(sb);

- error = freeze_super(sb);

- error = sb->s_op->thaw_super(sb);

- error = thaw_super(sb);

-int __invalidate_device(struct block_device *bdev, bool kill_dirty)

- struct super_block *sb = get_super(bdev);

- * no need to lock the super, get_super holds the

- * read mutex so the filesystem cannot go away

- * under us (->put_super runs with the write lock

- shrink_dcache_sb(sb);

- res = invalidate_inodes(sb, kill_dirty);

-EXPORT_SYMBOL(__invalidate_device);

- if (bip->bip_vcnt >= bip->bip_max_vcnt) {

- printk(KERN_ERR "%s: bip_vec full\n", __func__);

- if (bip->bip_vcnt &&

- bvec_gap_to_prev(&bdev_get_queue(bio->bi_bdev)->limits,

- &bip->bip_vec[bip->bip_vcnt - 1], offset))

- unsigned int intervals;

- blk_status_t status;

- intervals = bio_integrity_intervals(bi, bio_sectors(bio));

- len = intervals * bi->tuple_size;

- status = BLK_STS_RESOURCE;

- bip->bip_iter.bi_size = len;

- for (i = 0 ; i < nr_pages ; i++) {

- ret = bio_integrity_add_page(bio, virt_to_page(buf),

- status = BLK_STS_RESOURCE;

- bio->bi_status = status;

-void zero_fill_bio(struct bio *bio)

- bio_for_each_segment(bv, bio, iter)

-EXPORT_SYMBOL(zero_fill_bio);

-static inline bool page_is_mergeable(const struct bio_vec *bv,

- struct page *page, unsigned int len, unsigned int off,

- else if (IS_ENABLED(CONFIG_KMSAN))

- return (bv->bv_page + bv_end / PAGE_SIZE) == (page + off / PAGE_SIZE);

- * __bio_try_merge_page - try appending data to an existing bvec.

- * @bio: destination bio

- * @page: start page to add

- * @len: length of the data to add

- * @off: offset of the data relative to @page

- * @same_page: return if the segment has been merged inside the same page

- * Try to add the data at @page + @off to the last bvec of @bio. This is a

- * useful optimisation for file systems with a block size smaller than the

- * Warn if (@len, @off) crosses pages in case that @same_page is true.

- * Return %true on success or %false on failure.

-static bool __bio_try_merge_page(struct bio *bio, struct page *page,

- unsigned int len, unsigned int off, bool *same_page)

- if (WARN_ON_ONCE(bio_flagged(bio, BIO_CLONED)))

- if (bio->bi_vcnt > 0) {

- struct bio_vec *bv = &bio->bi_io_vec[bio->bi_vcnt - 1];

- if (page_is_mergeable(bv, page, len, off, same_page)) {

- if (bio->bi_iter.bi_size > UINT_MAX - len) {

- *same_page = false;

- bv->bv_len += len;

- bio->bi_iter.bi_size += len;

-static bool bio_try_merge_hw_seg(struct request_queue *q, struct bio *bio,

- struct page *page, unsigned len,

- unsigned offset, bool *same_page)

- struct bio_vec *bv = &bio->bi_io_vec[bio->bi_vcnt - 1];

- return __bio_try_merge_page(bio, page, len, offset, same_page);

- struct bio_vec *bvec;

- if (((bio->bi_iter.bi_size + len) >> 9) > max_sectors)

- if (bio_try_merge_hw_seg(q, bio, page, len, offset, same_page))

- bvec = &bio->bi_io_vec[bio->bi_vcnt - 1];

- if (bvec_gap_to_prev(&q->limits, bvec, offset))

- if (bio_full(bio, len))

- if (bio->bi_vcnt >= queue_max_segments(q))

- if (!__bio_try_merge_page(bio, page, len, offset, &same_page)) {

- if (bio_full(bio, len))

- __bio_add_page(bio, page, len, offset);

- if (!__bio_try_merge_page(bio, page, len, offset, &same_page)) {

- __bio_add_page(bio, page, len, offset);

- bio_release_page(bio, page);

- size_t offset, trim;

- trim = size & (bdev_logical_block_size(bio->bi_bdev) - 1);

- iov_iter_revert(iter, trim);

- /* blkg_list is pushed at the head, reverse walk to allocate parents first */

- blkg->pd[pol->plid] = pd;

- pd->online = false;

- /* all allocated, init in the same order */

- if (pol->pd_init_fn)

- list_for_each_entry_reverse(blkg, &q->blkg_list, q_node)

- pol->pd_init_fn(blkg->pd[pol->plid]);

- list_for_each_entry_reverse(blkg, &q->blkg_list, q_node) {

- pol->pd_online_fn(blkg->pd[pol->plid]);

- blkg->pd[pol->plid]->online = true;

- /* alloc failed, nothing's initialized yet, free everything */

- if (blkg->pd[pol->plid]) {

- pol->pd_free_fn(blkg->pd[pol->plid]);

- list_move_tail(&rq->flush.list, pending);

- list_move_tail(&rq->flush.list, &fq->flush_data_in_flight);

- list_add(&rq->queuelist, &q->requeue_list);

- list_del_init(&rq->flush.list);

- list_for_each_entry_safe(rq, n, running, flush.list) {

- list_first_entry(pending, struct request, flush.list);

- if (!list_empty(&fq->flush_data_in_flight) &&

- INIT_LIST_HEAD(&rq->flush.list);

- rq->flush.seq |= REQ_FSEQ_POSTFLUSH;

- list_move_tail(&rq->flush.list, &fq->flush_data_in_flight);

- INIT_LIST_HEAD(&fq->flush_data_in_flight);

-static int blk_iolatency_try_init(struct blkg_conf_ctx *ctx)

- static DEFINE_MUTEX(init_mutex);

- ret = blkg_conf_open_bdev(ctx);

- * blk_iolatency_init() may fail after rq_qos_add() succeeds which can

- * confuse iolat_rq_qos() test. Make the test and init atomic.

- mutex_lock(&init_mutex);

- if (!iolat_rq_qos(ctx->bdev->bd_queue))

- ret = blk_iolatency_init(ctx->bdev->bd_disk);

- mutex_unlock(&init_mutex);

- ret = blk_iolatency_try_init(&ctx);

- max_sectors, &same_page)) {

- bio_release_page(bio, page);

- struct llist_head *list;

- list = &per_cpu(blk_cpu_done, cpu);

- if (llist_add(&rq->ipi_list, list)) {

- INIT_CSD(&rq->csd, __blk_mq_complete_request_remote, rq);

- smp_call_function_single_async(cpu, &rq->csd);

- blk_mq_run_hw_queue(hctx, false);

- if (async || (hctx->flags & BLK_MQ_F_BLOCKING) ||

- !cpumask_test_cpu(raw_smp_processor_id(), hctx->cpumask)) {

- blk_mq_run_hw_queue(hctx, false);

- blk_mq_start_stopped_hw_queue(hctx, async);

- blk_mq_run_hw_queue(hctx, false);

- if (set->nr_hw_queues >= new_nr_hw_queues)

- blk_mq_map_queues(&set->map[HCTX_TYPE_DEFAULT]);

- if (!strncmp(page, "write back", 10))

- else if (!strncmp(page, "write through", 13) ||

- !strncmp(page, "none", 4))

- unsigned long nr_slices, time_elapsed, io_trim;

- u64 bytes_trim, tmp;

- time_elapsed = jiffies - tg->slice_start[rw];

- nr_slices = time_elapsed / tg->td->throtl_slice;

- tmp = tg_bps_limit(tg, rw) * tg->td->throtl_slice * nr_slices;

- io_trim = (tg_iops_limit(tg, rw) * tg->td->throtl_slice * nr_slices) /

- if (!bytes_trim && !io_trim)

- if (tg->bytes_disp[rw] >= bytes_trim)

- if (tg->io_disp[rw] >= io_trim)

- tg->slice_start[rw] += nr_slices * tg->td->throtl_slice;

- "[%c] trim slice nr=%lu bytes=%llu io=%lu start=%lu end=%lu jiffies=%lu",

- rw == READ ? 'R' : 'W', nr_slices, bytes_trim, io_trim,

- tg->slice_start[rw], tg->slice_end[rw], jiffies);

-static unsigned int calculate_io_allowed(u32 iops_limit,

- unsigned long jiffy_elapsed)

- unsigned int io_allowed;

- * jiffy_elapsed should not be a big value as minimum iops can be

- * 1 then at max jiffy elapsed should be equivalent of 1 second as we

- * will allow dispatch after 1 second and after that slice should

- * have been trimmed.

- tmp = (u64)iops_limit * jiffy_elapsed;

- if (tmp > UINT_MAX)

- io_allowed = UINT_MAX;

- return io_allowed;

-static u64 calculate_bytes_allowed(u64 bps_limit, unsigned long jiffy_elapsed)

- return mul_u64_u64_div_u64(bps_limit, (u64)jiffy_elapsed, (u64)HZ);

- throtl_log(&tg->service_queue, "%s: %llu %llu %u %u\n", __func__,

- unsigned int io_allowed;

- if (tg->io_disp[rw] + 1 <= io_allowed) {

- u64 bytes_allowed, extra_bytes;

- if (tg->bytes_disp[rw] + bio_size <= bytes_allowed) {

- uint64_t carryover_bytes[2];

- unsigned int carryover_ios[2];

- struct list_head flush_data_in_flight;

- spinlock_t mq_flush_lock;

-const char *blk_status_to_str(blk_status_t status);

- if (__invalidate_device(disk->part0, true))

- pr_warn("VFS: busy inodes on changed media %s\n",

- * Generate uevents for the disk. If DISK_EVENT_MEDIA_CHANGE is present,

- * attempt to free all dentries and inodes and invalidates all block

- * Returns %true if DISK_EVENT_MEDIA_CHANGE was raised, or %false if not.

-bool disk_force_media_change(struct gendisk *disk, unsigned int events)

- disk_event_uevent(disk, events);

- if (!(events & DISK_EVENT_MEDIA_CHANGE))

- if (__invalidate_device(disk->part0, true))

- pr_warn("VFS: busy inodes on changed media %s\n",

-static int blkdev_get_block(struct inode *inode, sector_t iblock,

- struct buffer_head *bh, int create)

- bh->b_bdev = I_BDEV(inode);

- bh->b_blocknr = iblock;

- set_buffer_mapped(bh);

- .direct_IO = blkdev_direct_IO,

- filp->f_mode |= FMODE_BUF_RASYNC;

- struct block_device *bdev = I_BDEV(iocb->ki_filp->f_mapping->host);

- ret = __generic_file_write_iter(iocb, from);

-static void blk_report_disk_dead(struct gendisk *disk)

- mutex_lock(&bdev->bd_holder_lock);

- if (bdev->bd_holder_ops && bdev->bd_holder_ops->mark_dead)

- bdev->bd_holder_ops->mark_dead(bdev);

- mutex_unlock(&bdev->bd_holder_lock);

- * blk_mark_disk_dead - mark a disk as dead

- * @disk: disk to mark as dead

- * Mark as disk as dead (e.g. surprise removed) and don't accept any new I/O

-void blk_mark_disk_dead(struct gendisk *disk)

- blk_report_disk_dead(disk);

- * Prevent new openers by unlinked the bdev inode, and write out

- * dirty data before marking the disk dead and stopping all I/O.

- xa_for_each(&disk->part_tbl, idx, part) {

- __invalidate_device(part, true);

- blk_mark_disk_dead(disk);

- dd->async_depth = max(1UL, 3 * q->nr_requests / 4);

- strncpy(new_subpart->name, partdef, length);

- new_subpart->name[length] = '\0';

- strncpy(newparts->name, bdevdef, length);

- newparts->name[length] = '\0';

- strncpy(buf, bdevdef, length);

- buf[length] = '\0';

- strncpy(info->volname, subpart->name, label_min);

- info->volname[label_min] = '\0';

- __invalidate_device(part, true);

-static int opal_discovery0_end(struct opal_dev *dev)

- return opal_discovery0_end(dev);

- ret = is_key_on_revocation_list(pkcs7);

- if (ret != -ENOKEY) {

- pr_devel("PKCS#7 platform key is on revocation list\n");

-static void crypto_destroy_instance(struct crypto_alg *alg)

- struct crypto_instance *inst = (void *)alg;

- * @trust_keys: Signing certificate(s) to use as starting points

-#include <crypto/engine.h>

- bool finalize_req = false;

- struct crypto_engine_ctx *enginectx;

- finalize_req = true;

- if (finalize_req || engine->retry_support) {

- enginectx = crypto_tfm_ctx(req->tfm);

- if (enginectx->op.prepare_request &&

- enginectx->op.unprepare_request) {

- ret = enginectx->op.unprepare_request(engine, req);

- dev_err(engine->dev, "failed to unprepare request\n");

- struct crypto_engine_ctx *enginectx;

- enginectx = crypto_tfm_ctx(async_req->tfm);

- if (enginectx->op.prepare_request) {

- ret = enginectx->op.prepare_request(engine, async_req);

- dev_err(engine->dev, "failed to prepare request: %d\n",

- if (!enginectx->op.do_one_request) {

- ret = enginectx->op.do_one_request(engine, async_req);

- * If retry mechanism is supported,

- * unprepare current request and

- * enqueue it back into crypto-engine queue.

- if (enginectx->op.unprepare_request) {

- ret = enginectx->op.unprepare_request(engine,

- dev_err(engine->dev,

- "failed to unprepare request\n");

- if (enginectx->op.unprepare_request) {

- ret = enginectx->op.unprepare_request(engine, async_req);

- dev_err(engine->dev, "failed to unprepare request\n");

-#define JENT_RCT_CUTOFF 30 /* Taken from SP800-90B sec 4.4.1 */

-#define JENT_APT_CUTOFF 325 /* Taken from SP800-90B sec 4.4.2 */

-#define JENT_RCT_CUTOFF_PERMANENT 60

- len = strlcpy(ecb_name, cipher_name + 4, sizeof(ecb_name));

- if (len < 2 || len >= sizeof(ecb_name))

-static inline struct crypto_sig *__crypto_sig_tfm(struct crypto_tfm *tfm)

- return container_of(tfm, struct crypto_sig, base);

- len = strlcpy(ctx->name, cipher_name + 4, sizeof(ctx->name));

- if (len < 2 || len >= sizeof(ctx->name))

-source "drivers/auxdisplay/Kconfig"

-obj-$(CONFIG_DRM_ACCEL_IVPU) += intel_vpu.o \ No newline at end of file

- args->value = vdev->hw->ranges.user_low.start;

- .prime_handle_to_fd = drm_gem_prime_handle_to_fd,

- .prime_fd_to_handle = drm_gem_prime_fd_to_handle,

- .gem_prime_mmap = drm_gem_prime_mmap,

- ret = dma_set_mask_and_coherent(vdev->drm.dev, DMA_BIT_MASK(38));

- /* VPU MTL does not require PCI spec 10m D3hot delay */

- if (ivpu_is_mtl(vdev))

- vdev->hw->ops = &ivpu_hw_mtl_ops;

-static inline bool ivpu_is_mtl(struct ivpu_device *vdev)

- return to_pci_dev(vdev->drm.dev)->device == PCI_DEVICE_ID_MTL;

- static const char * const fw_names[] = {

- "intel/vpu/mtl_vpu_v0.0.bin"

- if (ivpu_firmware)

- return request_firmware(&vdev->fw->file, ivpu_firmware, vdev->drm.dev);

- ret = firmware_request_nowarn(&vdev->fw->file, fw_names[i], vdev->drm.dev);

- ivpu_dbg(vdev, FW_BOOT, "FW version: %s\n", (char *)fw_hdr + VPU_FW_HEADER_SIZE);

- ivpu_hw_init_range(&vdev->hw->ranges.global_low, start, size);

- fw->mem_shave_nn = ivpu_bo_alloc_internal(vdev, vdev->hw->ranges.global_high.start,

- ivpu_bo_free_internal(fw->mem);

- boot_params->shared_region_base = vdev->hw->ranges.global_low.start;

- boot_params->shared_region_size = vdev->hw->ranges.global_low.end -

- vdev->hw->ranges.global_low.start;

- boot_params->global_aliased_pio_base =

- vdev->hw->ranges.global_aliased_pio.start;

- boot_params->global_aliased_pio_size =

- ivpu_hw_range_size(&vdev->hw->ranges.global_aliased_pio);

- ADDR_TO_L2_CACHE_CFG(vdev->hw->ranges.global_high.start);

- if (bo->flags & DRM_IVPU_BO_HIGH_MEM)

- range = &vdev->hw->ranges.user_high;

- range = &vdev->hw->ranges.user_low;

- range = &vdev->hw->ranges.global_low;

- struct ivpu_addr_range global_low;

- struct ivpu_addr_range global_high;

- struct ivpu_addr_range user_low;

- struct ivpu_addr_range user_high;

- struct ivpu_addr_range global_aliased_pio;

-extern const struct ivpu_hw_ops ivpu_hw_mtl_ops;

-#include "ivpu_hw_mtl_reg.h"

-#define ICB_0_IRQ_MASK ((REG_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, HOST_IPC_FIFO_INT)) | \

- (REG_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, MMU_IRQ_0_INT)) | \

- (REG_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, MMU_IRQ_1_INT)) | \

- (REG_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, MMU_IRQ_2_INT)) | \

- (REG_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, NOC_FIREWALL_INT)) | \

- (REG_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, CPU_INT_REDIRECT_0_INT)) | \

- (REG_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, CPU_INT_REDIRECT_1_INT)))

-#define ICB_1_IRQ_MASK ((REG_FLD(MTL_VPU_HOST_SS_ICB_STATUS_1, CPU_INT_REDIRECT_2_INT)) | \

- (REG_FLD(MTL_VPU_HOST_SS_ICB_STATUS_1, CPU_INT_REDIRECT_3_INT)) | \

- (REG_FLD(MTL_VPU_HOST_SS_ICB_STATUS_1, CPU_INT_REDIRECT_4_INT)))

-#define BUTTRESS_IRQ_MASK ((REG_FLD(MTL_BUTTRESS_INTERRUPT_STAT, FREQ_CHANGE)) | \

- (REG_FLD(MTL_BUTTRESS_INTERRUPT_STAT, ATS_ERR)) | \

- (REG_FLD(MTL_BUTTRESS_INTERRUPT_STAT, UFI_ERR)))

-#define ITF_FIREWALL_VIOLATION_MASK ((REG_FLD(MTL_VPU_HOST_SS_FW_SOC_IRQ_EN, CSS_ROM_CMX)) | \

- (REG_FLD(MTL_VPU_HOST_SS_FW_SOC_IRQ_EN, CSS_DBG)) | \

- (REG_FLD(MTL_VPU_HOST_SS_FW_SOC_IRQ_EN, CSS_CTRL)) | \

- (REG_FLD(MTL_VPU_HOST_SS_FW_SOC_IRQ_EN, DEC400)) | \

- (REG_FLD(MTL_VPU_HOST_SS_FW_SOC_IRQ_EN, MSS_NCE)) | \

- (REG_FLD(MTL_VPU_HOST_SS_FW_SOC_IRQ_EN, MSS_MBI)) | \

- (REG_FLD(MTL_VPU_HOST_SS_FW_SOC_IRQ_EN, MSS_MBI_CMX)))

- u32 gen_ctrl = REGV_RD32(MTL_VPU_HOST_SS_GEN_CTRL);

- u32 platform = REG_GET_FLD(MTL_VPU_HOST_SS_GEN_CTRL, PS, gen_ctrl);

- return REGB_POLL_FLD(MTL_BUTTRESS_WP_REQ_CMD, SEND, 0, PLL_TIMEOUT_US);

- val = REGB_RD32(MTL_BUTTRESS_WP_REQ_PAYLOAD0);

- val = REG_SET_FLD_NUM(MTL_BUTTRESS_WP_REQ_PAYLOAD0, MIN_RATIO, min_ratio, val);

- val = REG_SET_FLD_NUM(MTL_BUTTRESS_WP_REQ_PAYLOAD0, MAX_RATIO, max_ratio, val);

- REGB_WR32(MTL_BUTTRESS_WP_REQ_PAYLOAD0, val);

- val = REGB_RD32(MTL_BUTTRESS_WP_REQ_PAYLOAD1);

- val = REG_SET_FLD_NUM(MTL_BUTTRESS_WP_REQ_PAYLOAD1, TARGET_RATIO, target_ratio, val);

- val = REG_SET_FLD_NUM(MTL_BUTTRESS_WP_REQ_PAYLOAD1, EPP, PLL_DEFAULT_EPP_VALUE, val);

- REGB_WR32(MTL_BUTTRESS_WP_REQ_PAYLOAD1, val);

- val = REGB_RD32(MTL_BUTTRESS_WP_REQ_PAYLOAD2);

- val = REG_SET_FLD_NUM(MTL_BUTTRESS_WP_REQ_PAYLOAD2, CONFIG, config, val);

- REGB_WR32(MTL_BUTTRESS_WP_REQ_PAYLOAD2, val);

- val = REGB_RD32(MTL_BUTTRESS_WP_REQ_CMD);

- val = REG_SET_FLD(MTL_BUTTRESS_WP_REQ_CMD, SEND, val);

- REGB_WR32(MTL_BUTTRESS_WP_REQ_CMD, val);

- return REGB_POLL_FLD(MTL_BUTTRESS_PLL_STATUS, LOCK, exp_val, PLL_TIMEOUT_US);

- return REGB_POLL_FLD(MTL_BUTTRESS_VPU_STATUS, READY, 1, PLL_TIMEOUT_US);

- fmin_fuse = REGB_RD32(MTL_BUTTRESS_FMIN_FUSE);

- fuse_min_ratio = REG_GET_FLD(MTL_BUTTRESS_FMIN_FUSE, MIN_RATIO, fmin_fuse);

- fuse_pn_ratio = REG_GET_FLD(MTL_BUTTRESS_FMIN_FUSE, PN_RATIO, fmin_fuse);

- fmax_fuse = REGB_RD32(MTL_BUTTRESS_FMAX_FUSE);

- fuse_max_ratio = REG_GET_FLD(MTL_BUTTRESS_FMAX_FUSE, MAX_RATIO, fmax_fuse);

-static int ivpu_hw_mtl_wait_for_vpuip_bar(struct ivpu_device *vdev)

- return REGV_POLL_FLD(MTL_VPU_HOST_SS_CPR_RST_CLR, AON, 0, 100);

- ret = ivpu_hw_mtl_wait_for_vpuip_bar(vdev);

- val = REG_SET_FLD(MTL_VPU_HOST_SS_CPR_RST_CLR, TOP_NOC, val);

- val = REG_SET_FLD(MTL_VPU_HOST_SS_CPR_RST_CLR, DSS_MAS, val);

- val = REG_SET_FLD(MTL_VPU_HOST_SS_CPR_RST_CLR, MSS_MAS, val);

- REGV_WR32(MTL_VPU_HOST_SS_CPR_RST_CLR, val);

- u32 val = REGV_RD32(MTL_VPU_HOST_SS_CPR_RST_SET);

- val = REG_SET_FLD(MTL_VPU_HOST_SS_CPR_RST_SET, TOP_NOC, val);

- val = REG_SET_FLD(MTL_VPU_HOST_SS_CPR_RST_SET, DSS_MAS, val);

- val = REG_SET_FLD(MTL_VPU_HOST_SS_CPR_RST_SET, MSS_MAS, val);

- val = REG_CLR_FLD(MTL_VPU_HOST_SS_CPR_RST_SET, TOP_NOC, val);

- val = REG_CLR_FLD(MTL_VPU_HOST_SS_CPR_RST_SET, DSS_MAS, val);

- val = REG_CLR_FLD(MTL_VPU_HOST_SS_CPR_RST_SET, MSS_MAS, val);

- REGV_WR32(MTL_VPU_HOST_SS_CPR_RST_SET, val);

- u32 val = REGV_RD32(MTL_VPU_HOST_SS_CPR_CLK_SET);

- val = REG_SET_FLD(MTL_VPU_HOST_SS_CPR_CLK_SET, TOP_NOC, val);

- val = REG_SET_FLD(MTL_VPU_HOST_SS_CPR_CLK_SET, DSS_MAS, val);

- val = REG_SET_FLD(MTL_VPU_HOST_SS_CPR_CLK_SET, MSS_MAS, val);

- val = REG_CLR_FLD(MTL_VPU_HOST_SS_CPR_CLK_SET, TOP_NOC, val);

- val = REG_CLR_FLD(MTL_VPU_HOST_SS_CPR_CLK_SET, DSS_MAS, val);

- val = REG_CLR_FLD(MTL_VPU_HOST_SS_CPR_CLK_SET, MSS_MAS, val);

- REGV_WR32(MTL_VPU_HOST_SS_CPR_CLK_SET, val);

- u32 val = REGV_RD32(MTL_VPU_HOST_SS_NOC_QREQN);

- if (!REG_TEST_FLD_NUM(MTL_VPU_HOST_SS_NOC_QREQN, TOP_SOCMMIO, exp_val, val))

- u32 val = REGV_RD32(MTL_VPU_HOST_SS_NOC_QACCEPTN);

- if (!REG_TEST_FLD_NUM(MTL_VPU_HOST_SS_NOC_QACCEPTN, TOP_SOCMMIO, exp_val, val))

- u32 val = REGV_RD32(MTL_VPU_HOST_SS_NOC_QDENY);

- if (!REG_TEST_FLD_NUM(MTL_VPU_HOST_SS_NOC_QDENY, TOP_SOCMMIO, exp_val, val))

- REGV_WR32(MTL_VPU_HOST_SS_AON_VPU_IDLE_GEN, 0x0);

- val = REGV_RD32(MTL_VPU_HOST_SS_NOC_QREQN);

- val = REG_SET_FLD(MTL_VPU_HOST_SS_NOC_QREQN, TOP_SOCMMIO, val);

- val = REG_CLR_FLD(MTL_VPU_HOST_SS_NOC_QREQN, TOP_SOCMMIO, val);

- REGV_WR32(MTL_VPU_HOST_SS_NOC_QREQN, val);

- u32 val = REGV_RD32(MTL_VPU_HOST_SS_AON_PWR_ISLAND_TRICKLE_EN0);

- val = REG_SET_FLD(MTL_VPU_HOST_SS_AON_PWR_ISLAND_TRICKLE_EN0, MSS_CPU, val);

- val = REG_CLR_FLD(MTL_VPU_HOST_SS_AON_PWR_ISLAND_TRICKLE_EN0, MSS_CPU, val);

- REGV_WR32(MTL_VPU_HOST_SS_AON_PWR_ISLAND_TRICKLE_EN0, val);

- u32 val = REGV_RD32(MTL_VPU_HOST_SS_AON_PWR_ISLAND_EN0);

- val = REG_SET_FLD(MTL_VPU_HOST_SS_AON_PWR_ISLAND_EN0, MSS_CPU, val);

- val = REG_CLR_FLD(MTL_VPU_HOST_SS_AON_PWR_ISLAND_EN0, MSS_CPU, val);

- REGV_WR32(MTL_VPU_HOST_SS_AON_PWR_ISLAND_EN0, val);

- return REGV_POLL_FLD(MTL_VPU_HOST_SS_AON_PWR_ISLAND_STATUS0, MSS_CPU,

- u32 val = REGV_RD32(MTL_VPU_HOST_SS_AON_PWR_ISO_EN0);

- val = REG_SET_FLD(MTL_VPU_HOST_SS_AON_PWR_ISO_EN0, MSS_CPU, val);

- val = REG_CLR_FLD(MTL_VPU_HOST_SS_AON_PWR_ISO_EN0, MSS_CPU, val);

- REGV_WR32(MTL_VPU_HOST_SS_AON_PWR_ISO_EN0, val);

- u32 val = REGV_RD32(MTL_VPU_HOST_SS_AON_DPU_ACTIVE);

- val = REG_SET_FLD(MTL_VPU_HOST_SS_AON_DPU_ACTIVE, DPU_ACTIVE, val);

- val = REG_CLR_FLD(MTL_VPU_HOST_SS_AON_DPU_ACTIVE, DPU_ACTIVE, val);

- REGV_WR32(MTL_VPU_HOST_SS_AON_DPU_ACTIVE, val);

- u32 val = REGV_RD32(MTL_VPU_HOST_IF_TCU_PTW_OVERRIDES);

- val = REG_SET_FLD(MTL_VPU_HOST_IF_TCU_PTW_OVERRIDES, NOSNOOP_OVERRIDE_EN, val);

- val = REG_SET_FLD(MTL_VPU_HOST_IF_TCU_PTW_OVERRIDES, AW_NOSNOOP_OVERRIDE, val);

- val = REG_SET_FLD(MTL_VPU_HOST_IF_TCU_PTW_OVERRIDES, AR_NOSNOOP_OVERRIDE, val);

- REGV_WR32(MTL_VPU_HOST_IF_TCU_PTW_OVERRIDES, val);

- u32 val = REGV_RD32(MTL_VPU_HOST_IF_TBU_MMUSSIDV);

- if (ivpu_is_fpga(vdev)) {

- val = REG_SET_FLD(MTL_VPU_HOST_IF_TBU_MMUSSIDV, TBU0_AWMMUSSIDV, val);

- val = REG_SET_FLD(MTL_VPU_HOST_IF_TBU_MMUSSIDV, TBU0_ARMMUSSIDV, val);

- val = REG_SET_FLD(MTL_VPU_HOST_IF_TBU_MMUSSIDV, TBU2_AWMMUSSIDV, val);

- val = REG_SET_FLD(MTL_VPU_HOST_IF_TBU_MMUSSIDV, TBU2_ARMMUSSIDV, val);

- val = REG_SET_FLD(MTL_VPU_HOST_IF_TBU_MMUSSIDV, TBU0_AWMMUSSIDV, val);

- val = REG_SET_FLD(MTL_VPU_HOST_IF_TBU_MMUSSIDV, TBU0_ARMMUSSIDV, val);

- val = REG_SET_FLD(MTL_VPU_HOST_IF_TBU_MMUSSIDV, TBU1_AWMMUSSIDV, val);

- val = REG_SET_FLD(MTL_VPU_HOST_IF_TBU_MMUSSIDV, TBU1_ARMMUSSIDV, val);

- val = REG_SET_FLD(MTL_VPU_HOST_IF_TBU_MMUSSIDV, TBU2_AWMMUSSIDV, val);

- val = REG_SET_FLD(MTL_VPU_HOST_IF_TBU_MMUSSIDV, TBU2_ARMMUSSIDV, val);

- val = REG_SET_FLD(MTL_VPU_HOST_IF_TBU_MMUSSIDV, TBU3_AWMMUSSIDV, val);

- val = REG_SET_FLD(MTL_VPU_HOST_IF_TBU_MMUSSIDV, TBU3_ARMMUSSIDV, val);

- REGV_WR32(MTL_VPU_HOST_IF_TBU_MMUSSIDV, val);

- REGV_WR32(MTL_VPU_HOST_SS_LOADING_ADDRESS_LO, val);

- val = REG_SET_FLD(MTL_VPU_HOST_SS_LOADING_ADDRESS_LO, DONE, val);

- REGV_WR32(MTL_VPU_HOST_SS_LOADING_ADDRESS_LO, val);

- ret = REGB_POLL_FLD(MTL_BUTTRESS_VPU_D0I3_CONTROL, INPROGRESS, 0, TIMEOUT_US);

- val = REGB_RD32(MTL_BUTTRESS_VPU_D0I3_CONTROL);

- val = REG_SET_FLD(MTL_BUTTRESS_VPU_D0I3_CONTROL, I3, val);

- val = REG_CLR_FLD(MTL_BUTTRESS_VPU_D0I3_CONTROL, I3, val);

- REGB_WR32(MTL_BUTTRESS_VPU_D0I3_CONTROL, val);

- ret = REGB_POLL_FLD(MTL_BUTTRESS_VPU_D0I3_CONTROL, INPROGRESS, 0, TIMEOUT_US);

-static int ivpu_hw_mtl_info_init(struct ivpu_device *vdev)

- ivpu_hw_init_range(&hw->ranges.global_low, 0x80000000, SZ_512M);

- ivpu_hw_init_range(&hw->ranges.global_high, 0x180000000, SZ_2M);

- ivpu_hw_init_range(&hw->ranges.user_low, 0xc0000000, 255 * SZ_1M);

- ivpu_hw_init_range(&hw->ranges.user_high, 0x180000000, SZ_2G);

- hw->ranges.global_aliased_pio = hw->ranges.user_low;

-static int ivpu_hw_mtl_reset(struct ivpu_device *vdev)

- ret = REGB_POLL_FLD(MTL_BUTTRESS_VPU_IP_RESET, TRIGGER, 0, TIMEOUT_US);

- val = REGB_RD32(MTL_BUTTRESS_VPU_IP_RESET);

- val = REG_SET_FLD(MTL_BUTTRESS_VPU_IP_RESET, TRIGGER, val);

- REGB_WR32(MTL_BUTTRESS_VPU_IP_RESET, val);

- ret = REGB_POLL_FLD(MTL_BUTTRESS_VPU_IP_RESET, TRIGGER, 0, TIMEOUT_US);

-static int ivpu_hw_mtl_d0i3_enable(struct ivpu_device *vdev)

-static int ivpu_hw_mtl_d0i3_disable(struct ivpu_device *vdev)

-static int ivpu_hw_mtl_power_up(struct ivpu_device *vdev)

- ret = ivpu_hw_mtl_reset(vdev);

- ret = ivpu_hw_mtl_d0i3_disable(vdev);

-static int ivpu_hw_mtl_boot_fw(struct ivpu_device *vdev)

-static bool ivpu_hw_mtl_is_idle(struct ivpu_device *vdev)

- val = REGB_RD32(MTL_BUTTRESS_VPU_STATUS);

- return REG_TEST_FLD(MTL_BUTTRESS_VPU_STATUS, READY, val) &&

- REG_TEST_FLD(MTL_BUTTRESS_VPU_STATUS, IDLE, val);

-static int ivpu_hw_mtl_power_down(struct ivpu_device *vdev)

- if (!ivpu_hw_mtl_is_idle(vdev) && ivpu_hw_mtl_reset(vdev)) {

- if (ivpu_hw_mtl_d0i3_enable(vdev)) {

-static void ivpu_hw_mtl_wdt_disable(struct ivpu_device *vdev)

-static u32 ivpu_hw_mtl_pll_to_freq(u32 ratio, u32 config)

-static u32 ivpu_hw_mtl_reg_pll_freq_get(struct ivpu_device *vdev)

- pll_curr_ratio = REGB_RD32(MTL_BUTTRESS_CURRENT_PLL);

- pll_curr_ratio &= MTL_BUTTRESS_CURRENT_PLL_RATIO_MASK;

- return ivpu_hw_mtl_pll_to_freq(pll_curr_ratio, vdev->hw->config);

-static u32 ivpu_hw_mtl_reg_telemetry_offset_get(struct ivpu_device *vdev)

- return REGB_RD32(MTL_BUTTRESS_VPU_TELEMETRY_OFFSET);

-static u32 ivpu_hw_mtl_reg_telemetry_size_get(struct ivpu_device *vdev)

- return REGB_RD32(MTL_BUTTRESS_VPU_TELEMETRY_SIZE);

-static u32 ivpu_hw_mtl_reg_telemetry_enable_get(struct ivpu_device *vdev)

- return REGB_RD32(MTL_BUTTRESS_VPU_TELEMETRY_ENABLE);

-static void ivpu_hw_mtl_reg_db_set(struct ivpu_device *vdev, u32 db_id)

-static u32 ivpu_hw_mtl_reg_ipc_rx_addr_get(struct ivpu_device *vdev)

- return REGV_RD32(MTL_VPU_HOST_SS_TIM_IPC_FIFO_ATM);

-static u32 ivpu_hw_mtl_reg_ipc_rx_count_get(struct ivpu_device *vdev)

- u32 count = REGV_RD32_SILENT(MTL_VPU_HOST_SS_TIM_IPC_FIFO_STAT);

- return REG_GET_FLD(MTL_VPU_HOST_SS_TIM_IPC_FIFO_STAT, FILL_LEVEL, count);

-static void ivpu_hw_mtl_reg_ipc_tx_set(struct ivpu_device *vdev, u32 vpu_addr)

-static void ivpu_hw_mtl_irq_clear(struct ivpu_device *vdev)

- REGV_WR64(MTL_VPU_HOST_SS_ICB_CLEAR_0, ICB_0_1_IRQ_MASK);

-static void ivpu_hw_mtl_irq_enable(struct ivpu_device *vdev)

- REGV_WR32(MTL_VPU_HOST_SS_FW_SOC_IRQ_EN, ITF_FIREWALL_VIOLATION_MASK);

- REGV_WR64(MTL_VPU_HOST_SS_ICB_ENABLE_0, ICB_0_1_IRQ_MASK);

- REGB_WR32(MTL_BUTTRESS_LOCAL_INT_MASK, BUTTRESS_IRQ_ENABLE_MASK);

- REGB_WR32(MTL_BUTTRESS_GLOBAL_INT_MASK, 0x0);

-static void ivpu_hw_mtl_irq_disable(struct ivpu_device *vdev)

- REGB_WR32(MTL_BUTTRESS_GLOBAL_INT_MASK, 0x1);

- REGB_WR32(MTL_BUTTRESS_LOCAL_INT_MASK, BUTTRESS_IRQ_DISABLE_MASK);

- REGV_WR64(MTL_VPU_HOST_SS_ICB_ENABLE_0, 0x0ull);

- REGV_WR32(MTL_VPU_HOST_SS_FW_SOC_IRQ_EN, 0x0);

-static void ivpu_hw_mtl_irq_wdt_nce_handler(struct ivpu_device *vdev)

-static void ivpu_hw_mtl_irq_wdt_mss_handler(struct ivpu_device *vdev)

-static void ivpu_hw_mtl_irq_noc_firewall_handler(struct ivpu_device *vdev)

-static u32 ivpu_hw_mtl_irqv_handler(struct ivpu_device *vdev, int irq)

- u32 status = REGV_RD32(MTL_VPU_HOST_SS_ICB_STATUS_0) & ICB_0_IRQ_MASK;

- REGV_WR32(MTL_VPU_HOST_SS_ICB_CLEAR_0, status);

- if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, MMU_IRQ_0_INT, status))

- if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, HOST_IPC_FIFO_INT, status))

- if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, MMU_IRQ_1_INT, status))

- if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, MMU_IRQ_2_INT, status))

- if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, CPU_INT_REDIRECT_0_INT, status))

- ivpu_hw_mtl_irq_wdt_mss_handler(vdev);

- if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, CPU_INT_REDIRECT_1_INT, status))

- ivpu_hw_mtl_irq_wdt_nce_handler(vdev);

- if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, NOC_FIREWALL_INT, status))

- ivpu_hw_mtl_irq_noc_firewall_handler(vdev);

-static u32 ivpu_hw_mtl_irqb_handler(struct ivpu_device *vdev, int irq)

- u32 status = REGB_RD32(MTL_BUTTRESS_INTERRUPT_STAT) & BUTTRESS_IRQ_MASK;

- REGB_WR32(MTL_BUTTRESS_GLOBAL_INT_MASK, 0x1);

- if (REG_TEST_FLD(MTL_BUTTRESS_INTERRUPT_STAT, FREQ_CHANGE, status))

- ivpu_dbg(vdev, IRQ, "FREQ_CHANGE irq: %08x", REGB_RD32(MTL_BUTTRESS_CURRENT_PLL));

- if (REG_TEST_FLD(MTL_BUTTRESS_INTERRUPT_STAT, ATS_ERR, status)) {

- ivpu_err(vdev, "ATS_ERR irq 0x%016llx", REGB_RD64(MTL_BUTTRESS_ATS_ERR_LOG_0));

- REGB_WR32(MTL_BUTTRESS_ATS_ERR_CLEAR, 0x1);

- if (REG_TEST_FLD(MTL_BUTTRESS_INTERRUPT_STAT, UFI_ERR, status)) {

- u32 ufi_log = REGB_RD32(MTL_BUTTRESS_UFI_ERR_LOG);

- ufi_log, REG_GET_FLD(MTL_BUTTRESS_UFI_ERR_LOG, OPCODE, ufi_log),

- REG_GET_FLD(MTL_BUTTRESS_UFI_ERR_LOG, AXI_ID, ufi_log),

- REG_GET_FLD(MTL_BUTTRESS_UFI_ERR_LOG, CQ_ID, ufi_log));

- REGB_WR32(MTL_BUTTRESS_UFI_ERR_CLEAR, 0x1);

- REGB_WR32(MTL_BUTTRESS_INTERRUPT_STAT, 0x0);

- REGB_WR32(MTL_BUTTRESS_INTERRUPT_STAT, status);

- REGB_WR32(MTL_BUTTRESS_GLOBAL_INT_MASK, 0x0);

-static irqreturn_t ivpu_hw_mtl_irq_handler(int irq, void *ptr)

- ret_irqv = ivpu_hw_mtl_irqv_handler(vdev, irq);

- ret_irqb = ivpu_hw_mtl_irqb_handler(vdev, irq);

-static void ivpu_hw_mtl_diagnose_failure(struct ivpu_device *vdev)

- u32 irqv = REGV_RD32(MTL_VPU_HOST_SS_ICB_STATUS_0) & ICB_0_IRQ_MASK;

- u32 irqb = REGB_RD32(MTL_BUTTRESS_INTERRUPT_STAT) & BUTTRESS_IRQ_MASK;

- if (ivpu_hw_mtl_reg_ipc_rx_count_get(vdev))

- if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, CPU_INT_REDIRECT_0_INT, irqv))

- if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, CPU_INT_REDIRECT_1_INT, irqv))

- if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, NOC_FIREWALL_INT, irqv))

- if (REG_TEST_FLD(MTL_BUTTRESS_INTERRUPT_STAT, ATS_ERR, irqb))

- ivpu_err(vdev, "ATS_ERR irq 0x%016llx", REGB_RD64(MTL_BUTTRESS_ATS_ERR_LOG_0));

- if (REG_TEST_FLD(MTL_BUTTRESS_INTERRUPT_STAT, UFI_ERR, irqb)) {

- u32 ufi_log = REGB_RD32(MTL_BUTTRESS_UFI_ERR_LOG);

- ufi_log, REG_GET_FLD(MTL_BUTTRESS_UFI_ERR_LOG, OPCODE, ufi_log),

- REG_GET_FLD(MTL_BUTTRESS_UFI_ERR_LOG, AXI_ID, ufi_log),

- REG_GET_FLD(MTL_BUTTRESS_UFI_ERR_LOG, CQ_ID, ufi_log));

-const struct ivpu_hw_ops ivpu_hw_mtl_ops = {

- .info_init = ivpu_hw_mtl_info_init,

- .power_up = ivpu_hw_mtl_power_up,

- .is_idle = ivpu_hw_mtl_is_idle,

- .power_down = ivpu_hw_mtl_power_down,

- .boot_fw = ivpu_hw_mtl_boot_fw,

- .wdt_disable = ivpu_hw_mtl_wdt_disable,

- .diagnose_failure = ivpu_hw_mtl_diagnose_failure,

- .reg_pll_freq_get = ivpu_hw_mtl_reg_pll_freq_get,

- .reg_telemetry_offset_get = ivpu_hw_mtl_reg_telemetry_offset_get,

- .reg_telemetry_size_get = ivpu_hw_mtl_reg_telemetry_size_get,

- .reg_telemetry_enable_get = ivpu_hw_mtl_reg_telemetry_enable_get,

- .reg_db_set = ivpu_hw_mtl_reg_db_set,

- .reg_ipc_rx_addr_get = ivpu_hw_mtl_reg_ipc_rx_addr_get,

- .reg_ipc_rx_count_get = ivpu_hw_mtl_reg_ipc_rx_count_get,

- .reg_ipc_tx_set = ivpu_hw_mtl_reg_ipc_tx_set,

- .irq_clear = ivpu_hw_mtl_irq_clear,

- .irq_enable = ivpu_hw_mtl_irq_enable,

- .irq_disable = ivpu_hw_mtl_irq_disable,

- .irq_handler = ivpu_hw_mtl_irq_handler,

-/* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __IVPU_HW_MTL_REG_H__

-#define __IVPU_HW_MTL_REG_H__

-#include <linux/bits.h>

-#define MTL_BUTTRESS_INTERRUPT_TYPE 0x00000000u

-#define MTL_BUTTRESS_INTERRUPT_STAT 0x00000004u

-#define MTL_BUTTRESS_INTERRUPT_STAT_FREQ_CHANGE_MASK BIT_MASK(0)

-#define MTL_BUTTRESS_INTERRUPT_STAT_ATS_ERR_MASK BIT_MASK(1)

-#define MTL_BUTTRESS_INTERRUPT_STAT_UFI_ERR_MASK BIT_MASK(2)

-#define MTL_BUTTRESS_WP_REQ_PAYLOAD0 0x00000008u

-#define MTL_BUTTRESS_WP_REQ_PAYLOAD0_MIN_RATIO_MASK GENMASK(15, 0)

-#define MTL_BUTTRESS_WP_REQ_PAYLOAD0_MAX_RATIO_MASK GENMASK(31, 16)

-#define MTL_BUTTRESS_WP_REQ_PAYLOAD1 0x0000000cu

-#define MTL_BUTTRESS_WP_REQ_PAYLOAD1_TARGET_RATIO_MASK GENMASK(15, 0)

-#define MTL_BUTTRESS_WP_REQ_PAYLOAD1_EPP_MASK GENMASK(31, 16)

-#define MTL_BUTTRESS_WP_REQ_PAYLOAD2 0x00000010u

-#define MTL_BUTTRESS_WP_REQ_PAYLOAD2_CONFIG_MASK GENMASK(15, 0)

-#define MTL_BUTTRESS_WP_REQ_CMD 0x00000014u

-#define MTL_BUTTRESS_WP_REQ_CMD_SEND_MASK BIT_MASK(0)

-#define MTL_BUTTRESS_WP_DOWNLOAD 0x00000018u

-#define MTL_BUTTRESS_WP_DOWNLOAD_TARGET_RATIO_MASK GENMASK(15, 0)

-#define MTL_BUTTRESS_CURRENT_PLL 0x0000001cu

-#define MTL_BUTTRESS_CURRENT_PLL_RATIO_MASK GENMASK(15, 0)

-#define MTL_BUTTRESS_PLL_ENABLE 0x00000020u

-#define MTL_BUTTRESS_FMIN_FUSE 0x00000024u

-#define MTL_BUTTRESS_FMIN_FUSE_MIN_RATIO_MASK GENMASK(7, 0)

-#define MTL_BUTTRESS_FMIN_FUSE_PN_RATIO_MASK GENMASK(15, 8)

-#define MTL_BUTTRESS_FMAX_FUSE 0x00000028u

-#define MTL_BUTTRESS_FMAX_FUSE_MAX_RATIO_MASK GENMASK(7, 0)

-#define MTL_BUTTRESS_TILE_FUSE 0x0000002cu

-#define MTL_BUTTRESS_TILE_FUSE_VALID_MASK BIT_MASK(0)

-#define MTL_BUTTRESS_TILE_FUSE_SKU_MASK GENMASK(3, 2)

-#define MTL_BUTTRESS_LOCAL_INT_MASK 0x00000030u

-#define MTL_BUTTRESS_GLOBAL_INT_MASK 0x00000034u

-#define MTL_BUTTRESS_PLL_STATUS 0x00000040u

-#define MTL_BUTTRESS_PLL_STATUS_LOCK_MASK BIT_MASK(1)

-#define MTL_BUTTRESS_VPU_STATUS 0x00000044u

-#define MTL_BUTTRESS_VPU_STATUS_READY_MASK BIT_MASK(0)

-#define MTL_BUTTRESS_VPU_STATUS_IDLE_MASK BIT_MASK(1)

-#define MTL_BUTTRESS_VPU_D0I3_CONTROL 0x00000060u

-#define MTL_BUTTRESS_VPU_D0I3_CONTROL_INPROGRESS_MASK BIT_MASK(0)

-#define MTL_BUTTRESS_VPU_D0I3_CONTROL_I3_MASK BIT_MASK(2)

-#define MTL_BUTTRESS_VPU_IP_RESET 0x00000050u

-#define MTL_BUTTRESS_VPU_IP_RESET_TRIGGER_MASK BIT_MASK(0)

-#define MTL_BUTTRESS_VPU_TELEMETRY_OFFSET 0x00000080u

-#define MTL_BUTTRESS_VPU_TELEMETRY_SIZE 0x00000084u

-#define MTL_BUTTRESS_VPU_TELEMETRY_ENABLE 0x00000088u

-#define MTL_BUTTRESS_ATS_ERR_LOG_0 0x000000a0u

-#define MTL_BUTTRESS_ATS_ERR_LOG_1 0x000000a4u

-#define MTL_BUTTRESS_ATS_ERR_CLEAR 0x000000a8u

-#define MTL_BUTTRESS_UFI_ERR_LOG 0x000000b0u

-#define MTL_BUTTRESS_UFI_ERR_LOG_CQ_ID_MASK GENMASK(11, 0)

-#define MTL_BUTTRESS_UFI_ERR_LOG_AXI_ID_MASK GENMASK(19, 12)

-#define MTL_BUTTRESS_UFI_ERR_LOG_OPCODE_MASK GENMASK(24, 20)

-#define MTL_BUTTRESS_UFI_ERR_CLEAR 0x000000b4u

-#define MTL_VPU_HOST_SS_CPR_CLK_SET 0x00000084u

-#define MTL_VPU_HOST_SS_CPR_CLK_SET_TOP_NOC_MASK BIT_MASK(1)

-#define MTL_VPU_HOST_SS_CPR_CLK_SET_DSS_MAS_MASK BIT_MASK(10)

-#define MTL_VPU_HOST_SS_CPR_CLK_SET_MSS_MAS_MASK BIT_MASK(11)

-#define MTL_VPU_HOST_SS_CPR_RST_SET 0x00000094u

-#define MTL_VPU_HOST_SS_CPR_RST_SET_TOP_NOC_MASK BIT_MASK(1)

-#define MTL_VPU_HOST_SS_CPR_RST_SET_DSS_MAS_MASK BIT_MASK(10)

-#define MTL_VPU_HOST_SS_CPR_RST_SET_MSS_MAS_MASK BIT_MASK(11)

-#define MTL_VPU_HOST_SS_CPR_RST_CLR 0x00000098u

-#define MTL_VPU_HOST_SS_CPR_RST_CLR_AON_MASK BIT_MASK(0)

-#define MTL_VPU_HOST_SS_CPR_RST_CLR_TOP_NOC_MASK BIT_MASK(1)

-#define MTL_VPU_HOST_SS_CPR_RST_CLR_DSS_MAS_MASK BIT_MASK(10)

-#define MTL_VPU_HOST_SS_CPR_RST_CLR_MSS_MAS_MASK BIT_MASK(11)

-#define MTL_VPU_HOST_SS_HW_VERSION 0x00000108u

-#define MTL_VPU_HOST_SS_HW_VERSION_SOC_REVISION_MASK GENMASK(7, 0)

-#define MTL_VPU_HOST_SS_HW_VERSION_SOC_NUMBER_MASK GENMASK(15, 8)

-#define MTL_VPU_HOST_SS_HW_VERSION_VPU_GENERATION_MASK GENMASK(23, 16)

-#define MTL_VPU_HOST_SS_GEN_CTRL 0x00000118u

-#define MTL_VPU_HOST_SS_GEN_CTRL_PS_MASK GENMASK(31, 29)

-#define MTL_VPU_HOST_SS_NOC_QREQN 0x00000154u

-#define MTL_VPU_HOST_SS_NOC_QREQN_TOP_SOCMMIO_MASK BIT_MASK(0)

-#define MTL_VPU_HOST_SS_NOC_QACCEPTN 0x00000158u

-#define MTL_VPU_HOST_SS_NOC_QACCEPTN_TOP_SOCMMIO_MASK BIT_MASK(0)

-#define MTL_VPU_HOST_SS_NOC_QDENY 0x0000015cu

-#define MTL_VPU_HOST_SS_NOC_QDENY_TOP_SOCMMIO_MASK BIT_MASK(0)

-#define MTL_VPU_TOP_NOC_QREQN 0x00000160u

-#define MTL_VPU_TOP_NOC_QREQN_CPU_CTRL_MASK BIT_MASK(0)

-#define MTL_VPU_TOP_NOC_QREQN_HOSTIF_L2CACHE_MASK BIT_MASK(1)

-#define MTL_VPU_TOP_NOC_QACCEPTN 0x00000164u

-#define MTL_VPU_TOP_NOC_QACCEPTN_CPU_CTRL_MASK BIT_MASK(0)

-#define MTL_VPU_TOP_NOC_QACCEPTN_HOSTIF_L2CACHE_MASK BIT_MASK(1)

-#define MTL_VPU_TOP_NOC_QDENY 0x00000168u

-#define MTL_VPU_TOP_NOC_QDENY_CPU_CTRL_MASK BIT_MASK(0)

-#define MTL_VPU_TOP_NOC_QDENY_HOSTIF_L2CACHE_MASK BIT_MASK(1)

-#define MTL_VPU_HOST_SS_FW_SOC_IRQ_EN 0x00000170u

-#define MTL_VPU_HOST_SS_FW_SOC_IRQ_EN_CSS_ROM_CMX_MASK BIT_MASK(0)

-#define MTL_VPU_HOST_SS_FW_SOC_IRQ_EN_CSS_DBG_MASK BIT_MASK(1)

-#define MTL_VPU_HOST_SS_FW_SOC_IRQ_EN_CSS_CTRL_MASK BIT_MASK(2)

-#define MTL_VPU_HOST_SS_FW_SOC_IRQ_EN_DEC400_MASK BIT_MASK(3)

-#define MTL_VPU_HOST_SS_FW_SOC_IRQ_EN_MSS_NCE_MASK BIT_MASK(4)

-#define MTL_VPU_HOST_SS_FW_SOC_IRQ_EN_MSS_MBI_MASK BIT_MASK(5)

-#define MTL_VPU_HOST_SS_FW_SOC_IRQ_EN_MSS_MBI_CMX_MASK BIT_MASK(6)

-#define MTL_VPU_HOST_SS_ICB_STATUS_0 0x00010210u

-#define MTL_VPU_HOST_SS_ICB_STATUS_0_TIMER_0_INT_MASK BIT_MASK(0)

-#define MTL_VPU_HOST_SS_ICB_STATUS_0_TIMER_1_INT_MASK BIT_MASK(1)

-#define MTL_VPU_HOST_SS_ICB_STATUS_0_TIMER_2_INT_MASK BIT_MASK(2)

-#define MTL_VPU_HOST_SS_ICB_STATUS_0_TIMER_3_INT_MASK BIT_MASK(3)

-#define MTL_VPU_HOST_SS_ICB_STATUS_0_HOST_IPC_FIFO_INT_MASK BIT_MASK(4)

-#define MTL_VPU_HOST_SS_ICB_STATUS_0_MMU_IRQ_0_INT_MASK BIT_MASK(5)

-#define MTL_VPU_HOST_SS_ICB_STATUS_0_MMU_IRQ_1_INT_MASK BIT_MASK(6)

-#define MTL_VPU_HOST_SS_ICB_STATUS_0_MMU_IRQ_2_INT_MASK BIT_MASK(7)

-#define MTL_VPU_HOST_SS_ICB_STATUS_0_NOC_FIREWALL_INT_MASK BIT_MASK(8)

-#define MTL_VPU_HOST_SS_ICB_STATUS_0_CPU_INT_REDIRECT_0_INT_MASK BIT_MASK(30)

-#define MTL_VPU_HOST_SS_ICB_STATUS_0_CPU_INT_REDIRECT_1_INT_MASK BIT_MASK(31)

-#define MTL_VPU_HOST_SS_ICB_STATUS_1 0x00010214u

-#define MTL_VPU_HOST_SS_ICB_STATUS_1_CPU_INT_REDIRECT_2_INT_MASK BIT_MASK(0)

-#define MTL_VPU_HOST_SS_ICB_STATUS_1_CPU_INT_REDIRECT_3_INT_MASK BIT_MASK(1)

-#define MTL_VPU_HOST_SS_ICB_STATUS_1_CPU_INT_REDIRECT_4_INT_MASK BIT_MASK(2)

-#define MTL_VPU_HOST_SS_ICB_CLEAR_0 0x00010220u

-#define MTL_VPU_HOST_SS_ICB_CLEAR_1 0x00010224u

-#define MTL_VPU_HOST_SS_ICB_ENABLE_0 0x00010240u

-#define MTL_VPU_HOST_SS_TIM_IPC_FIFO_ATM 0x000200f4u

-#define MTL_VPU_HOST_SS_TIM_IPC_FIFO_STAT 0x000200fcu

-#define MTL_VPU_HOST_SS_TIM_IPC_FIFO_STAT_READ_POINTER_MASK GENMASK(7, 0)

-#define MTL_VPU_HOST_SS_TIM_IPC_FIFO_STAT_WRITE_POINTER_MASK GENMASK(15, 8)

-#define MTL_VPU_HOST_SS_TIM_IPC_FIFO_STAT_FILL_LEVEL_MASK GENMASK(23, 16)

-#define MTL_VPU_HOST_SS_TIM_IPC_FIFO_STAT_RSVD0_MASK GENMASK(31, 24)

-#define MTL_VPU_HOST_SS_AON_PWR_ISO_EN0 0x00030020u

-#define MTL_VPU_HOST_SS_AON_PWR_ISO_EN0_MSS_CPU_MASK BIT_MASK(3)

-#define MTL_VPU_HOST_SS_AON_PWR_ISLAND_EN0 0x00030024u

-#define MTL_VPU_HOST_SS_AON_PWR_ISLAND_EN0_MSS_CPU_MASK BIT_MASK(3)

-#define MTL_VPU_HOST_SS_AON_PWR_ISLAND_TRICKLE_EN0 0x00030028u

-#define MTL_VPU_HOST_SS_AON_PWR_ISLAND_TRICKLE_EN0_MSS_CPU_MASK BIT_MASK(3)

-#define MTL_VPU_HOST_SS_AON_PWR_ISLAND_STATUS0 0x0003002cu

-#define MTL_VPU_HOST_SS_AON_PWR_ISLAND_STATUS0_MSS_CPU_MASK BIT_MASK(3)

-#define MTL_VPU_HOST_SS_AON_VPU_IDLE_GEN 0x00030200u

-#define MTL_VPU_HOST_SS_AON_VPU_IDLE_GEN_EN_MASK BIT_MASK(0)

-#define MTL_VPU_HOST_SS_AON_DPU_ACTIVE 0x00030204u

-#define MTL_VPU_HOST_SS_AON_DPU_ACTIVE_DPU_ACTIVE_MASK BIT_MASK(0)

-#define MTL_VPU_HOST_SS_LOADING_ADDRESS_LO 0x00041040u

-#define MTL_VPU_HOST_SS_LOADING_ADDRESS_LO_DONE_MASK BIT_MASK(0)

-#define MTL_VPU_HOST_SS_LOADING_ADDRESS_LO_IOSF_RS_ID_MASK GENMASK(2, 1)

-#define MTL_VPU_HOST_SS_LOADING_ADDRESS_LO_IMAGE_LOCATION_MASK GENMASK(31, 3)

-#define MTL_VPU_HOST_SS_WORKPOINT_CONFIG_MIRROR 0x00082020u

-#define MTL_VPU_HOST_SS_WORKPOINT_CONFIG_MIRROR_FINAL_PLL_FREQ_MASK GENMASK(15, 0)

-#define MTL_VPU_HOST_SS_WORKPOINT_CONFIG_MIRROR_CONFIG_ID_MASK GENMASK(31, 16)

-#define MTL_VPU_HOST_MMU_IDR0 0x00200000u

-#define MTL_VPU_HOST_MMU_IDR1 0x00200004u

-#define MTL_VPU_HOST_MMU_IDR3 0x0020000cu

-#define MTL_VPU_HOST_MMU_IDR5 0x00200014u

-#define MTL_VPU_HOST_MMU_CR0 0x00200020u

-#define MTL_VPU_HOST_MMU_CR0ACK 0x00200024u

-#define MTL_VPU_HOST_MMU_CR1 0x00200028u

-#define MTL_VPU_HOST_MMU_CR2 0x0020002cu

-#define MTL_VPU_HOST_MMU_IRQ_CTRL 0x00200050u

-#define MTL_VPU_HOST_MMU_IRQ_CTRLACK 0x00200054u

-#define MTL_VPU_HOST_MMU_GERROR 0x00200060u

-#define MTL_VPU_HOST_MMU_GERROR_CMDQ_MASK BIT_MASK(0)

-#define MTL_VPU_HOST_MMU_GERROR_EVTQ_ABT_MASK BIT_MASK(2)

-#define MTL_VPU_HOST_MMU_GERROR_PRIQ_ABT_MASK BIT_MASK(3)

-#define MTL_VPU_HOST_MMU_GERROR_MSI_CMDQ_ABT_MASK BIT_MASK(4)

-#define MTL_VPU_HOST_MMU_GERROR_MSI_EVTQ_ABT_MASK BIT_MASK(5)

-#define MTL_VPU_HOST_MMU_GERROR_MSI_PRIQ_ABT_MASK BIT_MASK(6)

-#define MTL_VPU_HOST_MMU_GERROR_MSI_ABT_MASK BIT_MASK(7)

-#define MTL_VPU_HOST_MMU_GERRORN 0x00200064u

-#define MTL_VPU_HOST_MMU_STRTAB_BASE 0x00200080u

-#define MTL_VPU_HOST_MMU_STRTAB_BASE_CFG 0x00200088u

-#define MTL_VPU_HOST_MMU_CMDQ_BASE 0x00200090u

-#define MTL_VPU_HOST_MMU_CMDQ_PROD 0x00200098u

-#define MTL_VPU_HOST_MMU_CMDQ_CONS 0x0020009cu

-#define MTL_VPU_HOST_MMU_EVTQ_BASE 0x002000a0u

-#define MTL_VPU_HOST_MMU_EVTQ_PROD 0x002000a8u

-#define MTL_VPU_HOST_MMU_EVTQ_CONS 0x002000acu

-#define MTL_VPU_HOST_MMU_EVTQ_PROD_SEC (0x002000a8u + SZ_64K)

-#define MTL_VPU_HOST_MMU_EVTQ_CONS_SEC (0x002000acu + SZ_64K)

-#define MTL_VPU_HOST_IF_TCU_PTW_OVERRIDES 0x00360000u

-#define MTL_VPU_HOST_IF_TCU_PTW_OVERRIDES_CACHE_OVERRIDE_EN_MASK BIT_MASK(0)

-#define MTL_VPU_HOST_IF_TCU_PTW_OVERRIDES_AWCACHE_OVERRIDE_MASK BIT_MASK(1)

-#define MTL_VPU_HOST_IF_TCU_PTW_OVERRIDES_ARCACHE_OVERRIDE_MASK BIT_MASK(2)

-#define MTL_VPU_HOST_IF_TCU_PTW_OVERRIDES_NOSNOOP_OVERRIDE_EN_MASK BIT_MASK(3)

-#define MTL_VPU_HOST_IF_TCU_PTW_OVERRIDES_AW_NOSNOOP_OVERRIDE_MASK BIT_MASK(4)

-#define MTL_VPU_HOST_IF_TCU_PTW_OVERRIDES_AR_NOSNOOP_OVERRIDE_MASK BIT_MASK(5)

-#define MTL_VPU_HOST_IF_TCU_PTW_OVERRIDES_PTW_AW_CONTEXT_FLAG_MASK GENMASK(10, 6)

-#define MTL_VPU_HOST_IF_TCU_PTW_OVERRIDES_PTW_AR_CONTEXT_FLAG_MASK GENMASK(15, 11)

-#define MTL_VPU_HOST_IF_TBU_MMUSSIDV 0x00360004u

-#define MTL_VPU_HOST_IF_TBU_MMUSSIDV_TBU0_AWMMUSSIDV_MASK BIT_MASK(0)

-#define MTL_VPU_HOST_IF_TBU_MMUSSIDV_TBU0_ARMMUSSIDV_MASK BIT_MASK(1)

-#define MTL_VPU_HOST_IF_TBU_MMUSSIDV_TBU1_AWMMUSSIDV_MASK BIT_MASK(2)

-#define MTL_VPU_HOST_IF_TBU_MMUSSIDV_TBU1_ARMMUSSIDV_MASK BIT_MASK(3)

-#define MTL_VPU_HOST_IF_TBU_MMUSSIDV_TBU2_AWMMUSSIDV_MASK BIT_MASK(4)

-#define MTL_VPU_HOST_IF_TBU_MMUSSIDV_TBU2_ARMMUSSIDV_MASK BIT_MASK(5)

-#define MTL_VPU_HOST_IF_TBU_MMUSSIDV_TBU3_AWMMUSSIDV_MASK BIT_MASK(6)

-#define MTL_VPU_HOST_IF_TBU_MMUSSIDV_TBU3_ARMMUSSIDV_MASK BIT_MASK(7)

-#define MTL_VPU_HOST_IF_TBU_MMUSSIDV_TBU4_AWMMUSSIDV_MASK BIT_MASK(8)

-#define MTL_VPU_HOST_IF_TBU_MMUSSIDV_TBU4_ARMMUSSIDV_MASK BIT_MASK(9)

-#define MTL_VPU_CPU_SS_DSU_LEON_RT_BASE 0x04000000u

-#define MTL_VPU_CPU_SS_DSU_LEON_RT_DSU_CTRL 0x04000000u

-#define MTL_VPU_CPU_SS_DSU_LEON_RT_PC_REG 0x04400010u

-#define MTL_VPU_CPU_SS_DSU_LEON_RT_NPC_REG 0x04400014u

-#define MTL_VPU_CPU_SS_DSU_LEON_RT_DSU_TRAP_REG 0x04400020u

-#define MTL_VPU_CPU_SS_MSSCPU_CPR_CLK_SET 0x06010004u

-#define MTL_VPU_CPU_SS_MSSCPU_CPR_CLK_SET_CPU_DSU_MASK BIT_MASK(1)

-#define MTL_VPU_CPU_SS_MSSCPU_CPR_RST_CLR 0x06010018u

-#define MTL_VPU_CPU_SS_MSSCPU_CPR_RST_CLR_CPU_DSU_MASK BIT_MASK(1)

-#define MTL_VPU_CPU_SS_MSSCPU_CPR_LEON_RT_VEC 0x06010040u

-#define MTL_VPU_CPU_SS_MSSCPU_CPR_LEON_RT_VEC_IRQI_RSTRUN0_MASK BIT_MASK(0)

-#define MTL_VPU_CPU_SS_MSSCPU_CPR_LEON_RT_VEC_IRQI_RESUME0_MASK BIT_MASK(1)

-#define MTL_VPU_CPU_SS_MSSCPU_CPR_LEON_RT_VEC_IRQI_RSTRUN1_MASK BIT_MASK(2)

-#define MTL_VPU_CPU_SS_MSSCPU_CPR_LEON_RT_VEC_IRQI_RESUME1_MASK BIT_MASK(3)

-#define MTL_VPU_CPU_SS_MSSCPU_CPR_LEON_RT_VEC_IRQI_RSTVEC_MASK GENMASK(31, 4)

-#define MTL_VPU_CPU_SS_TIM_WATCHDOG 0x0602009cu

-#define MTL_VPU_CPU_SS_TIM_WDOG_EN 0x060200a4u

-#define MTL_VPU_CPU_SS_TIM_SAFE 0x060200a8u

-#define MTL_VPU_CPU_SS_TIM_IPC_FIFO 0x060200f0u

-#define MTL_VPU_CPU_SS_TIM_GEN_CONFIG 0x06021008u

-#define MTL_VPU_CPU_SS_TIM_GEN_CONFIG_WDOG_TO_INT_CLR_MASK BIT_MASK(9)

-#define MTL_VPU_CPU_SS_DOORBELL_0 0x06300000u

-#define MTL_VPU_CPU_SS_DOORBELL_0_SET_MASK BIT_MASK(0)

-#define MTL_VPU_CPU_SS_DOORBELL_1 0x06301000u

-#endif /* __IVPU_HW_MTL_REG_H__ */

- buf_size = sizeof(*job) + bo_count * sizeof(struct ivpu_bo *);

- job = kzalloc(buf_size, GFP_KERNEL);

- if (!strncpy(req.payload.dyndbg_control.dyndbg_cmd, command, VPU_DYNDBG_CMD_MAX_LEN - 1))

-#include "ivpu_hw_mtl_reg.h"

-#define IVPU_MMU_GERROR_ERR_MASK ((REG_FLD(MTL_VPU_HOST_MMU_GERROR, CMDQ)) | \

- (REG_FLD(MTL_VPU_HOST_MMU_GERROR, EVTQ_ABT)) | \

- (REG_FLD(MTL_VPU_HOST_MMU_GERROR, PRIQ_ABT)) | \

- (REG_FLD(MTL_VPU_HOST_MMU_GERROR, MSI_CMDQ_ABT)) | \

- (REG_FLD(MTL_VPU_HOST_MMU_GERROR, MSI_EVTQ_ABT)) | \

- (REG_FLD(MTL_VPU_HOST_MMU_GERROR, MSI_PRIQ_ABT)) | \

- (REG_FLD(MTL_VPU_HOST_MMU_GERROR, MSI_ABT)))

- val = REGV_RD32(MTL_VPU_HOST_MMU_IDR0);

- val = REGV_RD32(MTL_VPU_HOST_MMU_IDR1);

- val = REGV_RD32(MTL_VPU_HOST_MMU_IDR3);

- val = REGV_RD32(MTL_VPU_HOST_MMU_IDR5);

- ret = ivpu_mmu_reg_write(vdev, MTL_VPU_HOST_MMU_IRQ_CTRL, 0);

- return ivpu_mmu_reg_write(vdev, MTL_VPU_HOST_MMU_IRQ_CTRL, irq_ctrl);

- return REGV_POLL(MTL_VPU_HOST_MMU_CMDQ_CONS, cmdq->cons, (cmdq->prod == cmdq->cons),

- REGV_WR32(MTL_VPU_HOST_MMU_CMDQ_PROD, q->prod);

- ret = ivpu_mmu_reg_write(vdev, MTL_VPU_HOST_MMU_CR0, 0);

- REGV_WR32(MTL_VPU_HOST_MMU_CR1, val);

- REGV_WR64(MTL_VPU_HOST_MMU_STRTAB_BASE, mmu->strtab.dma_q);

- REGV_WR32(MTL_VPU_HOST_MMU_STRTAB_BASE_CFG, mmu->strtab.base_cfg);

- REGV_WR64(MTL_VPU_HOST_MMU_CMDQ_BASE, mmu->cmdq.dma_q);

- REGV_WR32(MTL_VPU_HOST_MMU_CMDQ_PROD, 0);

- REGV_WR32(MTL_VPU_HOST_MMU_CMDQ_CONS, 0);

- ret = ivpu_mmu_reg_write(vdev, MTL_VPU_HOST_MMU_CR0, val);

- REGV_WR64(MTL_VPU_HOST_MMU_EVTQ_BASE, mmu->evtq.dma_q);

- REGV_WR32(MTL_VPU_HOST_MMU_EVTQ_PROD_SEC, 0);

- REGV_WR32(MTL_VPU_HOST_MMU_EVTQ_CONS_SEC, 0);

- ret = ivpu_mmu_reg_write(vdev, MTL_VPU_HOST_MMU_CR0, val);

- return ivpu_mmu_reg_write(vdev, MTL_VPU_HOST_MMU_CR0, val);

- cd[0] = FIELD_PREP(IVPU_MMU_CD_0_TCR_T0SZ, 26) |

- FIELD_PREP(IVPU_MMU_CD_0_TCR_IPS, 3) |

- evtq->prod = REGV_RD32(MTL_VPU_HOST_MMU_EVTQ_PROD_SEC);

- REGV_WR32(MTL_VPU_HOST_MMU_EVTQ_CONS_SEC, evtq->cons);

- gerror_val = REGV_RD32(MTL_VPU_HOST_MMU_GERROR);

- gerrorn_val = REGV_RD32(MTL_VPU_HOST_MMU_GERRORN);

- if (REG_TEST_FLD(MTL_VPU_HOST_MMU_GERROR, MSI_ABT, active))

- if (REG_TEST_FLD(MTL_VPU_HOST_MMU_GERROR, MSI_PRIQ_ABT, active))

- if (REG_TEST_FLD(MTL_VPU_HOST_MMU_GERROR, MSI_EVTQ_ABT, active))

- if (REG_TEST_FLD(MTL_VPU_HOST_MMU_GERROR, MSI_CMDQ_ABT, active))

- if (REG_TEST_FLD(MTL_VPU_HOST_MMU_GERROR, PRIQ_ABT, active))

- if (REG_TEST_FLD(MTL_VPU_HOST_MMU_GERROR, EVTQ_ABT, active))

- if (REG_TEST_FLD(MTL_VPU_HOST_MMU_GERROR, CMDQ, active))

- REGV_WR32(MTL_VPU_HOST_MMU_GERRORN, gerror_val);

-#define IVPU_MMU_PGD_INDEX_MASK GENMASK(38, 30)

-#define IVPU_MMU_ENTRY_FLAGS_MASK GENMASK(11, 0)

-#define IVPU_MMU_PAGE_SIZE SZ_4K

-#define IVPU_MMU_PTE_MAP_SIZE (IVPU_MMU_PGTABLE_ENTRIES * IVPU_MMU_PAGE_SIZE)

-#define IVPU_MMU_PMD_MAP_SIZE (IVPU_MMU_PGTABLE_ENTRIES * IVPU_MMU_PTE_MAP_SIZE)

-#define IVPU_MMU_PGTABLE_SIZE (IVPU_MMU_PGTABLE_ENTRIES * sizeof(u64))

- pgd = dma_alloc_wc(vdev->drm.dev, IVPU_MMU_PGTABLE_SIZE, &pgd_dma, GFP_KERNEL);

- pgtable->pgd = pgd;

-static void ivpu_mmu_pgtable_free(struct ivpu_device *vdev, struct ivpu_mmu_pgtable *pgtable)

- int pgd_index, pmd_index;

- for (pgd_index = 0; pgd_index < IVPU_MMU_PGTABLE_ENTRIES; ++pgd_index) {

- u64 **pmd_entries = pgtable->pgd_cpu_entries[pgd_index];

- u64 *pmd = pgtable->pgd_entries[pgd_index];

- for (pmd_index = 0; pmd_index < IVPU_MMU_PGTABLE_ENTRIES; ++pmd_index) {

- if (pmd_entries[pmd_index])

- dma_free_wc(vdev->drm.dev, IVPU_MMU_PGTABLE_SIZE,

- pmd_entries[pmd_index],

- pmd[pmd_index] & ~IVPU_MMU_ENTRY_FLAGS_MASK);

- kfree(pmd_entries);

- dma_free_wc(vdev->drm.dev, IVPU_MMU_PGTABLE_SIZE, pgtable->pgd_entries[pgd_index],

- pgtable->pgd[pgd_index] & ~IVPU_MMU_ENTRY_FLAGS_MASK);

- dma_free_wc(vdev->drm.dev, IVPU_MMU_PGTABLE_SIZE, pgtable->pgd,

- pgtable->pgd_dma & ~IVPU_MMU_ENTRY_FLAGS_MASK);

-ivpu_mmu_ensure_pmd(struct ivpu_device *vdev, struct ivpu_mmu_pgtable *pgtable, u64 pgd_index)

- u64 **pmd_entries;

- if (pgtable->pgd_entries[pgd_index])

- return pgtable->pgd_entries[pgd_index];

- pmd = dma_alloc_wc(vdev->drm.dev, IVPU_MMU_PGTABLE_SIZE, &pmd_dma, GFP_KERNEL);

- pmd_entries = kzalloc(IVPU_MMU_PGTABLE_SIZE, GFP_KERNEL);

- goto err_free_pgd;

- pgtable->pgd_entries[pgd_index] = pmd;

- pgtable->pgd_cpu_entries[pgd_index] = pmd_entries;

- pgtable->pgd[pgd_index] = pmd_dma | IVPU_MMU_ENTRY_VALID;

- dma_free_wc(vdev->drm.dev, IVPU_MMU_PGTABLE_SIZE, pmd, pmd_dma);

- int pgd_index, int pmd_index)

- if (pgtable->pgd_cpu_entries[pgd_index][pmd_index])

- return pgtable->pgd_cpu_entries[pgd_index][pmd_index];

- pte = dma_alloc_wc(vdev->drm.dev, IVPU_MMU_PGTABLE_SIZE, &pte_dma, GFP_KERNEL);

- pgtable->pgd_cpu_entries[pgd_index][pmd_index] = pte;

- pgtable->pgd_entries[pgd_index][pmd_index] = pte_dma | IVPU_MMU_ENTRY_VALID;

- u64 vpu_addr, dma_addr_t dma_addr, int prot)

- int pgd_index = FIELD_GET(IVPU_MMU_PGD_INDEX_MASK, vpu_addr);

- int pmd_index = FIELD_GET(IVPU_MMU_PMD_INDEX_MASK, vpu_addr);

- int pte_index = FIELD_GET(IVPU_MMU_PTE_INDEX_MASK, vpu_addr);

- /* Allocate PMD - second level page table if needed */

- if (!ivpu_mmu_ensure_pmd(vdev, &ctx->pgtable, pgd_index))

- /* Allocate PTE - third level page table if needed */

- pte = ivpu_mmu_ensure_pte(vdev, &ctx->pgtable, pgd_index, pmd_index);

- /* Update PTE - third level page table with DMA address */

- pte[pte_index] = dma_addr | prot;

- int pgd_index = FIELD_GET(IVPU_MMU_PGD_INDEX_MASK, vpu_addr);

- int pmd_index = FIELD_GET(IVPU_MMU_PMD_INDEX_MASK, vpu_addr);

- int pte_index = FIELD_GET(IVPU_MMU_PTE_INDEX_MASK, vpu_addr);

- ctx->pgtable.pgd_cpu_entries[pgd_index][pmd_index][pte_index] = IVPU_MMU_ENTRY_INVALID;

- u64 *pgd = ctx->pgtable.pgd;

- int pgd_index = FIELD_GET(IVPU_MMU_PGD_INDEX_MASK, vpu_addr);

- u64 pmd_end = (pgd_index + 1) * (u64)IVPU_MMU_PMD_MAP_SIZE;

- u64 *pmd = ctx->pgtable.pgd_entries[pgd_index];

- while (vpu_addr < end_addr && vpu_addr < pmd_end) {

- int pmd_index = FIELD_GET(IVPU_MMU_PMD_INDEX_MASK, vpu_addr);

- u64 *pte = ctx->pgtable.pgd_cpu_entries[pgd_index][pmd_index];

- clflush_cache_range(pte, IVPU_MMU_PGTABLE_SIZE);

- vpu_addr += IVPU_MMU_PTE_MAP_SIZE;

- clflush_cache_range(pmd, IVPU_MMU_PGTABLE_SIZE);

- clflush_cache_range(pgd, IVPU_MMU_PGTABLE_SIZE);

- u64 vpu_addr, dma_addr_t dma_addr, size_t size, int prot)

- int ret = ivpu_mmu_context_map_page(vdev, ctx, vpu_addr, dma_addr, prot);

- vpu_addr += IVPU_MMU_PAGE_SIZE;

- dma_addr += IVPU_MMU_PAGE_SIZE;

- size -= IVPU_MMU_PAGE_SIZE;

- u64 dma_addr = sg_dma_address(sg) - sg->offset;

- return drm_mm_insert_node_in_range(&ctx->mm, node, size, IVPU_MMU_PAGE_SIZE,

- 0, range->start, range->end, DRM_MM_INSERT_BEST);

- start = vdev->hw->ranges.global_low.start;

- end = vdev->hw->ranges.global_high.end;

- start = vdev->hw->ranges.user_low.start;

- end = vdev->hw->ranges.user_high.end;

- drm_WARN_ON(&vdev->drm, !ctx->pgtable.pgd);

- ivpu_mmu_pgtable_free(vdev, &ctx->pgtable);

-#define IVPU_MMU_PGTABLE_ENTRIES 512

- u64 **pgd_cpu_entries[IVPU_MMU_PGTABLE_ENTRIES];

- u64 *pgd_entries[IVPU_MMU_PGTABLE_ENTRIES];

- struct qaic_partial_execute_entry *pexec;

- size = is_partial ? sizeof(*pexec) : sizeof(*exec);

- pexec = (struct qaic_partial_execute_entry *)exec;

- .prime_fd_to_handle = drm_gem_prime_fd_to_handle,

-static int spk_ttyio_receive_buf2(struct tty_struct *tty,

- const unsigned char *cp,

- const char *fp, int count)

- depends on EFI && (X86_64 || ARM64)

-acpi-$(CONFIG_ARM_AMBA) += acpi_amba.o

-static void acpi_ac_notify(struct acpi_device *device, u32 event);

- .flags = ACPI_DRIVER_ALL_NOTIFY_EVENTS,

- .notify = acpi_ac_notify,

-static void acpi_ac_notify(struct acpi_device *device, u32 event)

-static int acpi_install_cmos_rtc_space_handler(struct acpi_device *adev,

- const struct acpi_device_id *id)

- status = acpi_install_address_space_handler(adev->handle,

-static void acpi_remove_cmos_rtc_space_handler(struct acpi_device *adev)

- if (ACPI_FAILURE(acpi_remove_address_space_handler(adev->handle,

- .attach = acpi_install_cmos_rtc_space_handler,

- .detach = acpi_remove_cmos_rtc_space_handler,

- struct cper_sec_mem_err *mem = (void *)(gdata + 1);

- if (mhp_supports_memmap_on_memory(info->length))

- mhp_flags |= MHP_MEMMAP_ON_MEMORY;

-static bool acpi_hwp_native_thermal_lvt_set;

-static acpi_status __init acpi_hwp_native_thermal_lvt_osc(acpi_handle handle,

- u8 sb_uuid_str[] = "4077A616-290C-47BE-9EBD-D87058713953";

- if (acpi_hwp_native_thermal_lvt_set)

- return AE_CTRL_TERMINATE;

- capbuf[0] = 0x0000;

- capbuf[1] = 0x1000; /* set bit 12 */

- if (ACPI_SUCCESS(acpi_run_osc(handle, &osc_context))) {

- if (osc_context.ret.pointer && osc_context.ret.length > 1) {

- u32 *capbuf_ret = osc_context.ret.pointer;

- if (capbuf_ret[1] & 0x1000) {

- acpi_handle_info(handle,

- "_OSC native thermal LVT Acked\n");

- acpi_hwp_native_thermal_lvt_set = true;

- kfree(osc_context.ret.pointer);

-void __init acpi_early_processor_osc(void)

- if (boot_cpu_has(X86_FEATURE_HWP)) {

- acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT,

- acpi_hwp_native_thermal_lvt_osc,

- NULL, NULL, NULL);

- acpi_get_devices(ACPI_PROCESSOR_DEVICE_HID,

- acpi_hwp_native_thermal_lvt_osc,

-static void acpi_video_bus_notify(struct acpi_device *device, u32 event);

- .notify = acpi_video_bus_notify,

-static void acpi_video_bus_notify(struct acpi_device *device, u32 event)

-ACPI_STATE_COMMON};

- ACPI_STATE_COMMON union acpi_operand_object *object;

- ACPI_STATE_COMMON u32 index;

- ACPI_STATE_COMMON u16 opcode;

- ACPI_STATE_COMMON struct acpi_namespace_node *node;

- ACPI_STATE_COMMON u32 arg_count; /* Number of fixed arguments */

- ACPI_STATE_COMMON u8 current_sync_level; /* Mutex Sync (nested acquire) level */

- union acpi_operand_object *obj_desc[ACPI_RESULTS_FRAME_OBJ_NUM];

- ACPI_STATE_COMMON u8 handler_list_id;

- "Null Object! Obj=%p State=%p Num=%u",

- object, walk_state, walk_state->result_count));

- data_length = (buffer_length < source_desc->buffer.length ?

- buffer_length : source_desc->buffer.length);

- AML_FLAGS_EXEC_0A_0T_1R),

-#include "internal.h"

- {"ARMHC500", 0}, /* ARM CoreSight ETM4x */

- "Erratum #162001800", IORT_SMMU_V3_PMCG_HISI_HIP08},

-static void acpi_battery_notify(struct acpi_device *device, u32 event)

- device_init_wakeup(&device->dev, 0);

- .flags = ACPI_DRIVER_ALL_NOTIFY_EVENTS,

- .notify = acpi_battery_notify,

- /* Set capability bits for _OSC under processor scope */

- acpi_early_processor_osc();

- acpi_early_processor_set_pdc();

-static void acpi_hed_notify(struct acpi_device *device, u32 event)

- .notify = acpi_hed_notify,

-#ifdef CONFIG_ARM_AMBA

-void acpi_amba_init(void);

-static inline void acpi_amba_init(void) {}

-int acpi_power_init(void);

-static inline void acpi_early_processor_set_pdc(void) {}

-void acpi_early_processor_osc(void);

-static inline void acpi_early_processor_osc(void) {}

- return devm_add_action_or_reset(dev, acpi_nfit_shutdown, acpi_desc);

-static void acpi_nfit_remove(struct acpi_device *adev)

- /* see acpi_nfit_unregister */

-static void acpi_nfit_notify(struct acpi_device *adev, u32 event)

- device_lock(&adev->dev);

- __acpi_nfit_notify(&adev->dev, adev->handle, event);

- device_unlock(&adev->dev);

- .remove = acpi_nfit_remove,

- .notify = acpi_nfit_notify,

- void *handler_addr;

- status = efi_call_virt_pointer(handler, handler_addr,

- handler->acpi_param_buffer_addr,

-#include <linux/dmi.h>

-#include <xen/xen.h>

-static bool __init processor_physically_present(acpi_handle handle)

- acpi_status status;

- acpi_object_type acpi_type;

- unsigned long long tmp;

- union acpi_object object = { 0 };

- struct acpi_buffer buffer = { sizeof(union acpi_object), &object };

- status = acpi_get_type(handle, &acpi_type);

- if (ACPI_FAILURE(status))

- switch (acpi_type) {

- case ACPI_TYPE_PROCESSOR:

- status = acpi_evaluate_object(handle, NULL, NULL, &buffer);

- if (ACPI_FAILURE(status))

- acpi_id = object.processor.proc_id;

- case ACPI_TYPE_DEVICE:

- status = acpi_evaluate_integer(handle, "_UID", NULL, &tmp);

- if (ACPI_FAILURE(status))

- if (xen_initial_domain())

- * When running as a Xen dom0 the number of processors Linux

- * sees can be different from the real number of processors on

- * the system, and we still need to execute _PDC for all of

- return xen_processor_present(acpi_id);

- type = (acpi_type == ACPI_TYPE_DEVICE) ? 1 : 0;

- cpuid = acpi_get_cpuid(handle, type, acpi_id);

- return !invalid_logical_cpuid(cpuid);

- /* Enable coordination with firmware's _TSD info */

- buf[2] = ACPI_PDC_SMP_T_SWCOORD;

- arch_acpi_set_pdc_bits(buf);

- if (boot_option_idle_override == IDLE_NOMWAIT) {

- * If mwait is disabled for CPU C-states, the C2C3_FFH access

- * mode will be disabled in the parameter of _PDC object.

- * Of course C1_FFH access mode will also be disabled.

- union acpi_object *obj;

- u32 *buffer = NULL;

- obj = pdc_in->pointer;

- buffer = (u32 *)(obj->buffer.pointer);

- buffer[2] &= ~(ACPI_PDC_C_C2C3_FFH | ACPI_PDC_C_C1_FFH);

-static int __init set_no_mwait(const struct dmi_system_id *id)

- pr_notice("%s detected - disabling mwait for CPU C-states\n",

- boot_option_idle_override = IDLE_NOMWAIT;

-static const struct dmi_system_id processor_idle_dmi_table[] __initconst = {

- set_no_mwait, "Extensa 5220", {

- DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),

- DMI_MATCH(DMI_SYS_VENDOR, "Acer"),

- DMI_MATCH(DMI_PRODUCT_VERSION, "0100"),

- DMI_MATCH(DMI_BOARD_NAME, "Columbia") }, NULL},

-static void __init processor_dmi_check(void)

- * Check whether the system is DMI table. If yes, OSPM

- * should not use mwait for CPU-states.

- dmi_check_system(processor_idle_dmi_table);

- processor_dmi_check();

- if (!err && dev->bus && !device_iommu_mapped(dev))

-module_param(nocrt, int, 0);

-MODULE_PARM_DESC(nocrt, "Set to take no action upon ACPI thermal zone critical trips points.");

-struct acpi_thermal_critical {

- unsigned long temperature;

-struct acpi_thermal_hot {

- unsigned long temperature;

- struct acpi_thermal_critical critical;

- struct acpi_thermal_hot hot;

-static int acpi_thermal_trips_update(struct acpi_thermal *tz, int flag)

- if (((flag & ACPI_TRIPS_PASSIVE) && tz->trips.passive.valid) ||

- valid = tz->trips.passive.valid;

- tz->trips.passive.valid = false;

- tz->trips.passive.temperature = tmp;

- tz->trips.passive.valid = true;

- tz->trips.passive.valid = false;

- if ((flag & ACPI_TRIPS_DEVICES) && tz->trips.passive.valid) {

- tz->trips.passive.valid = false;

- tz->trips.passive.valid = true;

- if (valid != tz->trips.passive.valid)

- valid = tz->trips.active[i].valid;

- tz->trips.active[i].valid)) {

- tz->trips.active[i].valid = false;

- tz->trips.active[0].temperature = celsius_to_deci_kelvin(act);

- tz->trips.active[i-1].temperature =

- tz->trips.active[i-2].temperature,

- tz->trips.active[i].temperature = tmp;

- tz->trips.active[i].valid = true;

- if ((flag & ACPI_TRIPS_DEVICES) && tz->trips.active[i].valid) {

- tz->trips.active[i].valid = false;

- tz->trips.active[i].valid = true;

- if (valid != tz->trips.active[i].valid)

- if (!tz->trips.active[i].valid)

- int i, ret = acpi_thermal_trips_update(tz, ACPI_TRIPS_INIT);

- tz->trips.passive.valid;

- valid = valid || tz->trips.active[i].valid;

-static int thermal_get_trip_type(struct thermal_zone_device *thermal,

- int trip, enum thermal_trip_type *type)

- if (!tz || trip < 0)

- if (tz->trips.critical.valid) {

- *type = THERMAL_TRIP_CRITICAL;

- if (tz->trips.hot.valid) {

- *type = THERMAL_TRIP_HOT;

- if (tz->trips.passive.valid) {

- *type = THERMAL_TRIP_PASSIVE;

- for (i = 0; i < ACPI_THERMAL_MAX_ACTIVE && tz->trips.active[i].valid; i++) {

- *type = THERMAL_TRIP_ACTIVE;

-static int thermal_get_trip_temp(struct thermal_zone_device *thermal,

- int trip, int *temp)

- struct acpi_thermal *tz = thermal_zone_device_priv(thermal);

- if (!tz || trip < 0)

- if (tz->trips.critical.valid) {

- *temp = deci_kelvin_to_millicelsius_with_offset(

- tz->trips.critical.temperature,

- tz->kelvin_offset);

- if (tz->trips.hot.valid) {

- *temp = deci_kelvin_to_millicelsius_with_offset(

- tz->trips.hot.temperature,

- tz->kelvin_offset);

- if (tz->trips.passive.valid) {

- *temp = deci_kelvin_to_millicelsius_with_offset(

- tz->trips.passive.temperature,

- tz->kelvin_offset);

- for (i = 0; i < ACPI_THERMAL_MAX_ACTIVE &&

- tz->trips.active[i].valid; i++) {

- *temp = deci_kelvin_to_millicelsius_with_offset(

- tz->trips.active[i].temperature,

- tz->kelvin_offset);

-static int thermal_get_crit_temp(struct thermal_zone_device *thermal,

- struct acpi_thermal *tz = thermal_zone_device_priv(thermal);

- if (tz->trips.critical.valid) {

- *temperature = deci_kelvin_to_millicelsius_with_offset(

- tz->trips.critical.temperature,

- tz->kelvin_offset);

-static int thermal_get_trend(struct thermal_zone_device *thermal,

- int trip, enum thermal_trend *trend)

- struct acpi_thermal *tz = thermal_zone_device_priv(thermal);

- enum thermal_trip_type type;

- if (thermal_get_trip_type(thermal, trip, &type))

- if (type == THERMAL_TRIP_ACTIVE) {

- int temp = deci_kelvin_to_millicelsius_with_offset(

- tz->temperature, tz->kelvin_offset);

- if (thermal_get_trip_temp(thermal, trip, &trip_temp))

- if (temp > trip_temp) {

- *trend = THERMAL_TREND_RAISING;

- /* Fall back on default trend */

- * tz->temperature has already been updated by generic thermal layer,

- * before this callback being invoked

- i = tz->trips.passive.tc1 * (tz->temperature - tz->last_temperature) +

- tz->trips.passive.tc2 * (tz->temperature - tz->trips.passive.temperature);

- *trend = THERMAL_TREND_RAISING;

- *trend = THERMAL_TREND_DROPPING;

- *trend = THERMAL_TREND_STABLE;

- if (tz->trips.passive.valid) {

- if (!tz->trips.active[i].valid)

- .get_trip_type = thermal_get_trip_type,

- .get_trip_temp = thermal_get_trip_temp,

- .get_crit_temp = thermal_get_crit_temp,

- acpi_status status;

- if (tz->trips.passive.valid)

- for (i = 0; i < ACPI_THERMAL_MAX_ACTIVE && tz->trips.active[i].valid;

- if (tz->trips.passive.valid)

- tz->thermal_zone = thermal_zone_device_register("acpitz", trips, 0, tz,

- &acpi_thermal_zone_ops, NULL,

- tz->trips.passive.tsp * 100,

- tz->polling_frequency * 100);

- tz->thermal_zone =

- thermal_zone_device_register("acpitz", trips, 0, tz,

- &acpi_thermal_zone_ops, NULL,

- 0, tz->polling_frequency * 100);

- if (IS_ERR(tz->thermal_zone))

- status = acpi_bus_attach_private_data(tz->device->handle,

- tz->thermal_zone);

- if (ACPI_FAILURE(status)) {

- goto remove_links;

- goto acpi_bus_detach;

- acpi_bus_detach_private_data(tz->device->handle);

-static void acpi_queue_thermal_check(struct acpi_thermal *tz)

- if (!work_pending(&tz->thermal_check_work))

- queue_work(acpi_thermal_pm_queue, &tz->thermal_check_work);

-static void acpi_thermal_notify(struct acpi_device *device, u32 event)

- acpi_thermal_trips_update(tz, ACPI_TRIPS_THRESHOLDS);

- acpi_queue_thermal_check(tz);

- acpi_bus_generate_netlink_event(device->pnp.device_class,

- dev_name(&device->dev), event, 0);

- acpi_thermal_trips_update(tz, ACPI_TRIPS_DEVICES);

- acpi_queue_thermal_check(tz);

- acpi_bus_generate_netlink_event(device->pnp.device_class,

- dev_name(&device->dev), event, 0);

- flush_workqueue(acpi_thermal_pm_queue);

- int i, j, power_state, result;

- if (!tz->trips.active[i].valid)

- tz->trips.active[i].enabled = true;

- result = acpi_bus_update_power(

- tz->trips.active[i].devices.handles[j],

- if (result || (power_state != ACPI_STATE_D0)) {

- tz->trips.active[i].enabled = false;

- .notify = acpi_thermal_notify,

- for (j = 0; j < package->package.count; ++j) {

- for (k = 0; k < info_obj->package.count; ++k) {

- union acpi_object *obj = &info_obj->package.elements[k];

- list = &lpi_constraints_table[lpi_constraints_table_size];

- list->min_dstate = -1;

- if (!dev_info.enabled || !dev_info.name ||

- !dev_info.min_dstate)

- status = acpi_get_handle(NULL, dev_info.name,

- if (ACPI_FAILURE(status))

- acpi_handle_debug(lps0_device_handle,

- "Name:%s\n", dev_info.name);

- list->min_dstate = dev_info.min_dstate;

- if (list->min_dstate < 0) {

- acpi_handle_debug(lps0_device_handle,

- "Incomplete constraint defined\n");

- for (j = 0; j < package->package.count; ++j) {

- for (j = 0; j < package_count; ++j) {

- for (i = 0; i < lpi_constraints_table_size; ++i) {

- acpi_handle handle = lpi_constraints_table[i].handle;

- struct acpi_device *adev = acpi_fetch_acpi_dev(handle);

- acpi_handle_debug(handle,

- acpi_power_state_string(lpi_constraints_table[i].min_dstate),

- acpi_handle_info(handle, "LPI: Device not power manageable\n");

- lpi_constraints_table[i].handle = NULL;

- if (adev->power.state < lpi_constraints_table[i].min_dstate)

- acpi_handle_info(handle,

- acpi_power_state_string(lpi_constraints_table[i].min_dstate),

- if (binder_debugfs_dir_entry_root) {

- const struct binder_debugfs_entry *db_entry;

- binder_for_each_debugfs_entry(db_entry)

- debugfs_create_file(db_entry->name,

- binder_debugfs_dir_entry_root,

- binder_debugfs_dir_entry_proc = debugfs_create_dir("proc",

- binder_debugfs_dir_entry_root);

-#include <linux/radix-tree.h>

- inode->i_mtime = inode->i_atime = inode->i_ctime = current_time(inode);

- ret->i_atime = ret->i_mtime = ret->i_ctime = current_time(ret);

- inode->i_mtime = inode->i_atime = inode->i_ctime = current_time(inode);

- const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);

-#include <linux/of_device.h>

- struct resource *res;

- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- base = devm_ioremap_resource(&pdev->dev, res);

-#include <linux/of_address.h>

-#include <linux/of_device.h>

- const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);

-#include <linux/of_device.h>

- plat_data->sgpio_ctrl = devm_ioremap_resource(dev,

- platform_get_resource(pdev, IORESOURCE_MEM, 1));

-#include <linux/of_device.h>

- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);

- tegra->sata_regs = devm_ioremap_resource(&pdev->dev, res);

- void __iomem *reg, unsigned

- int val, unsigned long interval,

- unsigned long timeout)

- const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);

- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);

- ctx->csr_core = devm_ioremap_resource(dev, res);

- res = platform_get_resource(pdev, IORESOURCE_MEM, 2);

- ctx->csr_diag = devm_ioremap_resource(dev, res);

- res = platform_get_resource(pdev, IORESOURCE_MEM, 3);

- ctx->csr_axi = devm_ioremap_resource(dev, res);

- unsigned long timeout_msec)

- unsigned long now, msecs;

- const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);

- if (ap->ops->error_handler)

- ata_eh_release(ap);

- if (ap->ops->error_handler)

- ata_eh_acquire(ap);

- if (ap->ops->error_handler)

- ata_port_freeze(ap);

- ata_qc_complete(qc);

- * ata_bus_probe - Reset and probe ATA bus

- * @ap: Bus to probe

- * Master ATA bus probing function. Initiates a hardware-dependent

- * bus reset, then attempts to identify any devices found on

- * PCI/etc. bus probe sem.

- * Zero on success, negative errno otherwise.

-int ata_bus_probe(struct ata_port *ap)

- unsigned int classes[ATA_MAX_DEVICES];

- int tries[ATA_MAX_DEVICES];

- struct ata_device *dev;

- ata_for_each_dev(dev, &ap->link, ALL)

- tries[dev->devno] = ATA_PROBE_MAX_TRIES;

- ata_for_each_dev(dev, &ap->link, ALL) {

- /* If we issue an SRST then an ATA drive (not ATAPI)

- * may change configuration and be in PIO0 timing. If

- * we do a hard reset (or are coming from power on)

- * this is true for ATA or ATAPI. Until we've set a

- * suitable controller mode we should not touch the

- * bus as we may be talking too fast.

- dev->pio_mode = XFER_PIO_0;

- dev->dma_mode = 0xff;

- /* If the controller has a pio mode setup function

- * then use it to set the chipset to rights. Don't

- * touch the DMA setup as that will be dealt with when

- * configuring devices.

- if (ap->ops->set_piomode)

- ap->ops->set_piomode(ap, dev);

- /* reset and determine device classes */

- ap->ops->phy_reset(ap);

- ata_for_each_dev(dev, &ap->link, ALL) {

- if (dev->class != ATA_DEV_UNKNOWN)

- classes[dev->devno] = dev->class;

- classes[dev->devno] = ATA_DEV_NONE;

- dev->class = ATA_DEV_UNKNOWN;

- /* read IDENTIFY page and configure devices. We have to do the identify

- specific sequence bass-ackwards so that PDIAG- is released by

- the slave device */

- ata_for_each_dev(dev, &ap->link, ALL_REVERSE) {

- if (tries[dev->devno])

- dev->class = classes[dev->devno];

- if (!ata_dev_enabled(dev))

- rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,

- /* Now ask for the cable type as PDIAG- should have been released */

- if (ap->ops->cable_detect)

- ap->cbl = ap->ops->cable_detect(ap);

- /* We may have SATA bridge glue hiding here irrespective of

- * the reported cable types and sensed types. When SATA

- * drives indicate we have a bridge, we don't know which end

- * of the link the bridge is which is a problem.

- ata_for_each_dev(dev, &ap->link, ENABLED)

- if (ata_id_is_sata(dev->id))

- ap->cbl = ATA_CBL_SATA;

- /* After the identify sequence we can now set up the devices. We do

- this in the normal order so that the user doesn't get confused */

- ata_for_each_dev(dev, &ap->link, ENABLED) {

- ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO;

- rc = ata_dev_configure(dev);

- ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO;

- /* configure transfer mode */

- rc = ata_set_mode(&ap->link, &dev);

- ata_for_each_dev(dev, &ap->link, ENABLED)

- tries[dev->devno]--;

- /* eeek, something went very wrong, give up */

- tries[dev->devno] = 0;

- /* give it just one more chance */

- tries[dev->devno] = min(tries[dev->devno], 1);

- if (tries[dev->devno] == 1) {

- /* This is the last chance, better to slow

- * down than lose it.

- sata_down_spd_limit(&ap->link, 0);

- ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);

- if (!tries[dev->devno])

- ata_dev_disable(dev);

- const unsigned long *timing = sata_ehc_deb_timing(ehc);

- const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);

- { "Crucial_CT*M500*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |

- ATA_HORKAGE_ZERO_AFTER_TRIM },

- /* XXX: New EH and old EH use different mechanisms to

- * synchronize EH with regular execution path.

- * In new EH, a qc owned by EH is marked with ATA_QCFLAG_EH.

- * Normal execution path is responsible for not accessing a

- * qc owned by EH. libata core enforces the rule by returning NULL

- * from ata_qc_from_tag() for qcs owned by EH.

- * Old EH depends on ata_qc_complete() nullifying completion

- * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does

- * not synchronize with interrupt handler. Only PIO task is

- if (ap->ops->error_handler) {

- struct ata_device *dev = qc->dev;

- struct ata_eh_info *ehi = &dev->link->eh_info;

- if (unlikely(qc->err_mask))

- qc->flags |= ATA_QCFLAG_EH;

- * Finish internal commands without any further processing

- * and always with the result TF filled.

- if (unlikely(ata_tag_internal(qc->tag))) {

- fill_result_tf(qc);

- trace_ata_qc_complete_internal(qc);

- __ata_qc_complete(qc);

- * Non-internal qc has failed. Fill the result TF and

- if (unlikely(qc->flags & ATA_QCFLAG_EH)) {

- fill_result_tf(qc);

- trace_ata_qc_complete_failed(qc);

- ata_qc_schedule_eh(qc);

- WARN_ON_ONCE(ata_port_is_frozen(ap));

- /* read result TF if requested */

- if (qc->flags & ATA_QCFLAG_RESULT_TF)

- fill_result_tf(qc);

- trace_ata_qc_complete_done(qc);

- * For CDL commands that completed without an error, check if

- * we have sense data (ATA_SENSE is set). If we do, then the

- * command may have been aborted by the device due to a limit

- * timeout using the policy 0xD. For these commands, invoke EH

- * to get the command sense data.

- if (qc->result_tf.status & ATA_SENSE &&

- ((ata_is_ncq(qc->tf.protocol) &&

- dev->flags & ATA_DFLAG_CDL_ENABLED) ||

- (!ata_is_ncq(qc->tf.protocol) &&

- ata_id_sense_reporting_enabled(dev->id)))) {

- * Tell SCSI EH to not overwrite scmd->result even if

- * this command is finished with result SAM_STAT_GOOD.

- qc->scsicmd->flags |= SCMD_FORCE_EH_SUCCESS;

- qc->flags |= ATA_QCFLAG_EH_SUCCESS_CMD;

- ehi->dev_action[dev->devno] |= ATA_EH_GET_SUCCESS_SENSE;

- * set pending so that ata_qc_schedule_eh() does not

- * trigger fast drain, and freeze the port.

- ap->pflags |= ATA_PFLAG_EH_PENDING;

- ata_qc_schedule_eh(qc);

- /* Some commands need post-processing after successful

- switch (qc->tf.command) {

- case ATA_CMD_SET_FEATURES:

- if (qc->tf.feature != SETFEATURES_WC_ON &&

- qc->tf.feature != SETFEATURES_WC_OFF &&

- qc->tf.feature != SETFEATURES_RA_ON &&

- qc->tf.feature != SETFEATURES_RA_OFF)

- case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */

- case ATA_CMD_SET_MULTI: /* multi_count changed */

- /* revalidate device */

- ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE;

- ata_port_schedule_eh(ap);

- case ATA_CMD_SLEEP:

- dev->flags |= ATA_DFLAG_SLEEPING;

- if (unlikely(dev->flags & ATA_DFLAG_DUBIOUS_XFER))

- ata_verify_xfer(qc);

- __ata_qc_complete(qc);

- if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)

- /* read result TF if failed or requested */

- if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)

- fill_result_tf(qc);

- __ata_qc_complete(qc);

- /* Make sure only one non-NCQ command is outstanding. The

- * check is skipped for old EH because it reuses active qc to

- * request ATAPI sense.

- WARN_ON_ONCE(ap->ops->error_handler && ata_tag_valid(link->active_tag));

-void __ata_port_probe(struct ata_port *ap)

-int ata_port_probe(struct ata_port *ap)

- if (ap->ops->error_handler) {

- __ata_port_probe(ap);

- ata_port_wait_eh(ap);

- rc = ata_bus_probe(ap);

- (void)ata_port_probe(ap);

- if (!ap->ops->error_handler)

- unsigned long interval, unsigned long timeout)

-static const unsigned long ata_eh_reset_timeouts[] = {

- ULONG_MAX, /* > 1 min has elapsed, give up */

- if (!ap->ops->error_handler)

- * For new EH, all qcs are finished in one of three ways -

- /* invoke error handler */

- if (ap->ops->error_handler) {

- struct ata_link *link;

- /* acquire EH ownership */

- ata_eh_acquire(ap);

- /* kill fast drain timer */

- del_timer_sync(&ap->fastdrain_timer);

- /* process port resume request */

- ata_eh_handle_port_resume(ap);

- /* fetch & clear EH info */

- spin_lock_irqsave(ap->lock, flags);

- ata_for_each_link(link, ap, HOST_FIRST) {

- struct ata_eh_context *ehc = &link->eh_context;

- struct ata_device *dev;

- memset(&link->eh_context, 0, sizeof(link->eh_context));

- link->eh_context.i = link->eh_info;

- memset(&link->eh_info, 0, sizeof(link->eh_info));

- ata_for_each_dev(dev, link, ENABLED) {

- int devno = dev->devno;

- ehc->saved_xfer_mode[devno] = dev->xfer_mode;

- if (ata_ncq_enabled(dev))

- ehc->saved_ncq_enabled |= 1 << devno;

- ap->pflags |= ATA_PFLAG_EH_IN_PROGRESS;

- ap->pflags &= ~ATA_PFLAG_EH_PENDING;

- ap->excl_link = NULL; /* don't maintain exclusion over EH */

- spin_unlock_irqrestore(ap->lock, flags);

- /* invoke EH, skip if unloading or suspended */

- if (!(ap->pflags & (ATA_PFLAG_UNLOADING | ATA_PFLAG_SUSPENDED)))

- ap->ops->error_handler(ap);

- /* if unloading, commence suicide */

- if ((ap->pflags & ATA_PFLAG_UNLOADING) &&

- !(ap->pflags & ATA_PFLAG_UNLOADED))

- ata_eh_unload(ap);

- ata_eh_finish(ap);

- /* process port suspend request */

- ata_eh_handle_port_suspend(ap);

- /* Exception might have happened after ->error_handler

- * recovered the port but before this point. Repeat

- * EH in such case.

- spin_lock_irqsave(ap->lock, flags);

- if (ap->pflags & ATA_PFLAG_EH_PENDING) {

- if (--ap->eh_tries) {

- spin_unlock_irqrestore(ap->lock, flags);

- "EH pending after %d tries, giving up\n",

- ATA_EH_MAX_TRIES);

- ap->pflags &= ~ATA_PFLAG_EH_PENDING;

- /* this run is complete, make sure EH info is clear */

- ata_for_each_link(link, ap, HOST_FIRST)

- memset(&link->eh_info, 0, sizeof(link->eh_info));

- /* end eh (clear host_eh_scheduled) while holding

- * ap->lock such that if exception occurs after this

- * point but before EH completion, SCSI midlayer will

- ap->ops->end_eh(ap);

- spin_unlock_irqrestore(ap->lock, flags);

- ata_eh_release(ap);

- WARN_ON(ata_qc_from_tag(ap, ap->link.active_tag) == NULL);

- ap->ops->eng_timeout(ap);

- WARN_ON(!ap->ops->error_handler);

- if (!ap->ops->error_handler)

- while (ata_eh_reset_timeouts[max_tries] != ULONG_MAX)

-const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };

-const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };

-const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };

-int sata_link_debounce(struct ata_link *link, const unsigned long *params,

- unsigned long interval = params[0];

- unsigned long duration = params[1];

-int sata_link_resume(struct ata_link *link, const unsigned long *params,

-int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,

- * ata_sas_port_start - Set port up for dma.

- * @ap: Port to initialize

- * Called just after data structures for each port are

- * May be used as the port_start() entry in ata_port_operations.

- * Inherited from caller.

-int ata_sas_port_start(struct ata_port *ap)

- * the port is marked as frozen at allocation time, but if we don't

- * have new eh, we won't thaw it

- if (!ap->ops->error_handler)

- ap->pflags &= ~ATA_PFLAG_FROZEN;

-EXPORT_SYMBOL_GPL(ata_sas_port_start);

- * ata_sas_port_stop - Undo ata_sas_port_start()

- * @ap: Port to shut down

- * May be used as the port_stop() entry in ata_port_operations.

- * Inherited from caller.

-void ata_sas_port_stop(struct ata_port *ap)

-EXPORT_SYMBOL_GPL(ata_sas_port_stop);

- * ata_sas_async_probe - simply schedule probing and return

- * @ap: Port to probe

- * For batch scheduling of probe for sas attached ata devices, assumes

- * the port has already been through ata_sas_port_init()

-void ata_sas_async_probe(struct ata_port *ap)

- __ata_port_probe(ap);

-EXPORT_SYMBOL_GPL(ata_sas_async_probe);

-int ata_sas_sync_probe(struct ata_port *ap)

- return ata_port_probe(ap);

-EXPORT_SYMBOL_GPL(ata_sas_sync_probe);

- * ata_sas_port_init - Initialize a SATA device

- * @ap: SATA port to initialize

- * PCI/etc. bus probe sem.

- * Zero on success, non-zero on error.

-int ata_sas_port_init(struct ata_port *ap)

- int rc = ap->ops->port_start(ap);

- ap->print_id = atomic_inc_return(&ata_print_id);

-EXPORT_SYMBOL_GPL(ata_sas_port_init);

- * ata_sas_port_destroy - Destroy a SATA port allocated by ata_sas_port_alloc

- * @ap: SATA port to destroy

-void ata_sas_port_destroy(struct ata_port *ap)

- if (ap->ops->port_stop)

- ap->ops->port_stop(ap);

-EXPORT_SYMBOL_GPL(ata_sas_port_destroy);

- rc = kstrtol(buf, 10, &input);

- * ata_dump_status - user friendly display of error info

- * @ap: the port in question

- * @tf: ptr to filled out taskfile

- * Decode and dump the ATA error/status registers for the user so

- * that they have some idea what really happened at the non

- * make-believe layer.

- * inherited from caller

-static void ata_dump_status(struct ata_port *ap, struct ata_taskfile *tf)

- u8 stat = tf->status, err = tf->error;

- if (stat & ATA_BUSY) {

- ata_port_warn(ap, "status=0x%02x {Busy} ", stat);

- ata_port_warn(ap, "status=0x%02x { %s%s%s%s%s%s%s} ", stat,

- stat & ATA_DRDY ? "DriveReady " : "",

- stat & ATA_DF ? "DeviceFault " : "",

- stat & ATA_DSC ? "SeekComplete " : "",

- stat & ATA_DRQ ? "DataRequest " : "",

- stat & ATA_CORR ? "CorrectedError " : "",

- stat & ATA_SENSE ? "Sense " : "",

- stat & ATA_ERR ? "Error " : "");

- ata_port_warn(ap, "error=0x%02x {%s%s%s%s%s%s", err,

- err & ATA_ABORTED ?

- "DriveStatusError " : "",

- (err & ATA_ABORTED ?

- "BadCRC " : "Sector ") : "",

- err & ATA_UNC ? "UncorrectableError " : "",

- err & ATA_IDNF ? "SectorIdNotFound " : "",

- err & ATA_TRK0NF ? "TrackZeroNotFound " : "",

- err & ATA_AMNF ? "AddrMarkNotFound " : "");

- * @verbose: be verbose

- u8 *asc, u8 *ascq, int verbose)

- goto translate_done;

- pr_err("ata%u: translated ATA stat/err 0x%02x/%02x to SCSI SK/ASC/ASCQ 0x%x/%02x/%02x\n",

- id, drv_stat, drv_err, *sk, *asc, *ascq);

- int verbose = qc->ap->ops->error_handler == NULL;

- &sense_key, &asc, &ascq, verbose);

- int verbose = qc->ap->ops->error_handler == NULL;

- &sense_key, &asc, &ascq, verbose);

- if (!ap->ops->error_handler)

- struct ata_port *ap = qc->ap;

- if (need_sense && !ap->ops->error_handler)

- ata_dump_status(ap, &qc->result_tf);

-static void atapi_sense_complete(struct ata_queued_cmd *qc)

- if (qc->err_mask && ((qc->err_mask & AC_ERR_DEV) == 0)) {

- /* FIXME: not quite right; we don't want the

- * translation of taskfile registers into

- * a sense descriptors, since that's only

- * correct for ATA, not ATAPI

- ata_gen_passthru_sense(qc);

-/* is it pointless to prefer PIO for "safety reasons"? */

-static inline int ata_pio_use_silly(struct ata_port *ap)

- return (ap->flags & ATA_FLAG_PIO_DMA);

-static void atapi_request_sense(struct ata_queued_cmd *qc)

- struct ata_port *ap = qc->ap;

- struct scsi_cmnd *cmd = qc->scsicmd;

- memset(cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);

-#ifdef CONFIG_ATA_SFF

- if (ap->ops->sff_tf_read)

- ap->ops->sff_tf_read(ap, &qc->tf);

- /* fill these in, for the case where they are -not- overwritten */

- cmd->sense_buffer[0] = 0x70;

- cmd->sense_buffer[2] = qc->tf.error >> 4;

- ata_qc_reinit(qc);

- /* setup sg table and init transfer direction */

- sg_init_one(&qc->sgent, cmd->sense_buffer, SCSI_SENSE_BUFFERSIZE);

- ata_sg_init(qc, &qc->sgent, 1);

- qc->dma_dir = DMA_FROM_DEVICE;

- memset(&qc->cdb, 0, qc->dev->cdb_len);

- qc->cdb[0] = REQUEST_SENSE;

- qc->cdb[4] = SCSI_SENSE_BUFFERSIZE;

- qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;

- qc->tf.command = ATA_CMD_PACKET;

- if (ata_pio_use_silly(ap)) {

- qc->tf.protocol = ATAPI_PROT_DMA;

- qc->tf.feature |= ATAPI_PKT_DMA;

- qc->tf.protocol = ATAPI_PROT_PIO;

- qc->tf.lbam = SCSI_SENSE_BUFFERSIZE;

- qc->nbytes = SCSI_SENSE_BUFFERSIZE;

- qc->complete_fn = atapi_sense_complete;

- /* handle completion from new EH */

- if (unlikely(qc->ap->ops->error_handler &&

- (err_mask || qc->flags & ATA_QCFLAG_SENSE_VALID))) {

- /* successful completion or old EH failure path */

- if (unlikely(err_mask & AC_ERR_DEV)) {

- cmd->result = SAM_STAT_CHECK_CONDITION;

- atapi_request_sense(qc);

- } else if (unlikely(err_mask)) {

- /* FIXME: not quite right; we don't want the

- * translation of taskfile registers into

- * a sense descriptors, since that's only

- * correct for ATA, not ATAPI

- ata_gen_passthru_sense(qc);

- if (cmd->cmnd[0] == INQUIRY && (cmd->cmnd[1] & 0x03) == 0)

- atapi_fixup_inquiry(cmd);

- cmd->result = SAM_STAT_GOOD;

- if (!ap->ops->error_handler)

- return -EOPNOTSUPP;

- scsi_rescan_device(&(sdev->sdev_gendev));

- if (ap->ops->error_handler) {

- /* EH might have kicked in while host lock is

- qc = ata_qc_from_tag(ap, qc->tag);

- if (likely(!(qc->err_mask & AC_ERR_HSM))) {

- ata_sff_irq_on(ap);

- ata_qc_complete(qc);

- ata_port_freeze(ap);

- if (likely(!(qc->err_mask & AC_ERR_HSM)))

- ata_sff_irq_on(ap);

- ata_qc_complete(qc);

- const unsigned long *timing = sata_ehc_deb_timing(ehc);

-extern int ata_port_probe(struct ata_port *ap);

-extern void __ata_port_probe(struct ata_port *ap);

-extern int ata_bus_probe(struct ata_port *ap);

-static int arasan_cf_remove(struct platform_device *pdev)

- .remove = arasan_cf_remove,

-#include <asm/ide.h>

- int chip_rev = ep93xx_chip_revision();

- if (chip_rev == EP93XX_CHIP_REV_E1)

- ap->udma_mask = ATA_UDMA3;

- else if (chip_rev == EP93XX_CHIP_REV_E2)

- ap->udma_mask = ATA_UDMA4;

-static int ep93xx_pata_remove(struct platform_device *pdev)

- .remove = ep93xx_pata_remove,

-#include <asm/ide.h>

- void __iomem *base;

- base = (void __iomem *)base_mem_res->start;

- ap->ioaddr.data_addr = base + 0 + 0 * 4;

- ap->ioaddr.error_addr = base + 1 + 1 * 4;

- ap->ioaddr.feature_addr = base + 1 + 1 * 4;

- ap->ioaddr.nsect_addr = base + 1 + 2 * 4;

- ap->ioaddr.lbal_addr = base + 1 + 3 * 4;

- ap->ioaddr.lbam_addr = base + 1 + 4 * 4;

- ap->ioaddr.lbah_addr = base + 1 + 5 * 4;

- ap->ioaddr.device_addr = base + 1 + 6 * 4;

- ap->ioaddr.status_addr = base + 1 + 7 * 4;

- ap->ioaddr.command_addr = base + 1 + 7 * 4;

- base = (void __iomem *)ctl_mem_res->start;

- ap->ioaddr.altstatus_addr = base + 1;

- ap->ioaddr.ctl_addr = base + 1;

- ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx",

- (unsigned long)base_mem_res->start,

- (unsigned long)ctl_mem_res->start);

-#include <linux/of_address.h>

-#include <linux/of_device.h>

- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- ftide->base = devm_ioremap_resource(dev, res);

-static int pata_ftide010_remove(struct platform_device *pdev)

- .remove = pata_ftide010_remove,

-#include <asm/ide.h>

- priv->clk = devm_clk_get(&pdev->dev, NULL);

- dev_err(&pdev->dev, "Failed to get clock\n");

- ret = clk_prepare_enable(priv->clk);

- io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- priv->host_regs = devm_ioremap_resource(&pdev->dev, io_res);

- if (IS_ERR(priv->host_regs)) {

- ret = PTR_ERR(priv->host_regs);

- clk_disable_unprepare(priv->clk);

-static int pata_imx_remove(struct platform_device *pdev)

- clk_disable_unprepare(priv->clk);

- .remove = pata_imx_remove,

- cmd = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- ctl = platform_get_resource(pdev, IORESOURCE_MEM, 1);

- ixpp->cmd = devm_ioremap_resource(dev, cmd);

- ixpp->ctl = devm_ioremap_resource(dev, ctl);

- if (IS_ERR(ixpp->cmd) || IS_ERR(ixpp->ctl))

- irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);

-#include <linux/of_platform.h>

-mpc52xx_ata_remove(struct platform_device *op)

- .remove = mpc52xx_ata_remove,

-static int pxa_ata_remove(struct platform_device *pdev)

- .remove = pxa_ata_remove,

-static int rb532_pata_driver_remove(struct platform_device *pdev)

- .remove = rb532_pata_driver_remove,

- * during DMA operation. In both cases we need to reset the engine,

- * so no actual eng_timeout handler is required.

-#include <linux/of_address.h>

-#include <linux/of_platform.h>

-static int sata_dwc_remove(struct platform_device *ofdev)

- .remove = sata_dwc_remove,

-#include <linux/of_address.h>

-#include <linux/of_irq.h>

-#include <linux/of_platform.h>

-static int sata_fsl_remove(struct platform_device *ofdev)

- .remove = sata_fsl_remove,

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-static int gemini_sata_remove(struct platform_device *pdev)

- .remove = gemini_sata_remove,

-#include <linux/of_device.h>

- static const unsigned long timing[] = { 5, 100, 500};

- const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);

- const unsigned long *timing =

-static int mv_platform_remove(struct platform_device *pdev)

- .remove = mv_platform_remove,

- const unsigned long *timing = sata_ehc_deb_timing(ehc);

-#include <linux/of_device.h>

- struct resource *mem;

- mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- priv->base = devm_ioremap_resource(dev, mem);

-static int sata_rcar_remove(struct platform_device *pdev)

- .remove = sata_rcar_remove,

- unsigned long timeout_msec)

- unsigned long timeout_msec = 0;

-/* TODO: inherit from base port_ops after converting to new EH */

- info->flags = FBINFO_FLAG_DEFAULT;

- fbdev->info->flags = FBINFO_FLAG_DEFAULT;

-#include <linux/string.h>

- acpi_device_notify_remove(dev);

- if (platform_notify_remove)

- platform_notify_remove(dev);

-#ifdef CONFIG_SWIOTLB

- dev->dma_io_tlb_mem = &io_tlb_default_mem;

- dev_set_name(dev, "%s", dev->init_name);

- if (!dev_name(dev) && dev->bus && dev->bus->dev_name)

- dev_set_name(dev, "%s%u", dev->bus->dev_name, dev->id);

- if (!dev_name(dev)) {

- s = kstrdup(dev_name(dev), GFP_KERNEL);

- strreplace(s, '!', '/');

- unsigned long nr_vmemmap_pages = mem->nr_vmemmap_pages;

- unsigned long nr_vmemmap_pages,

- mem->nr_vmemmap_pages = nr_vmemmap_pages;

- MEM_ONLINE, 0, NULL);

- unsigned long nr_vmemmap_pages,

- return add_memory_block(block_id, MEM_OFFLINE, nr_vmemmap_pages, group);

- unsigned long vmemmap_pages,

- ret = add_hotplug_memory_block(block_id, vmemmap_pages, group);

-#include <linux/hugetlb.h>

- "Node %d FileHugePages: %8lu kB\n"

- "Node %d FilePmdMapped: %8lu kB\n"

- of_platform_register_reconfig_notifier();

- bool "Register Map support" if KUNIT_ALL_TESTS

- ret = mas_store_gfp(&mas, entry, GFP_KERNEL);

- ret = mas_store_gfp(&mas, lower, GFP_KERNEL);

- ret = mas_store_gfp(&mas, upper, GFP_KERNEL);

- entry = kcalloc(last - first + 1, sizeof(unsigned long), GFP_KERNEL);

- ret = mas_store_gfp(&mas, entry, GFP_KERNEL);

- long *cache_present;

- rbnode = kzalloc(sizeof(*rbnode), GFP_KERNEL);

-#ifdef CONFIG_64BIT

- u64 *cache = base;

-#ifdef CONFIG_64BIT

- const u64 *cache = base;

- return cache[idx];

-#ifdef CONFIG_64BIT

- const u64 *valp = (const u64 *)val;

- for (i = 0; i < val_count; i++)

- writeq(swab64(valp[i]), ctx->regs + reg);

-#ifdef CONFIG_64BIT

- writesq(ctx->regs + reg, (const u64 *)val, val_count);

-#ifdef CONFIG_64BIT

- readsq(ctx->regs + reg, (u64 *)val, val_count);

-#ifdef CONFIG_64BIT

- swab64_array(val, val_count);

-#ifdef CONFIG_64BIT

-static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)

- put_unaligned_be64((u64) val << shift, buf);

-static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)

- put_unaligned_le64((u64) val << shift, buf);

-static void regmap_format_64_native(void *buf, unsigned int val,

- unsigned int shift)

- u64 v = (u64) val << shift;

- memcpy(buf, &v, sizeof(v));

-#ifdef CONFIG_64BIT

-static unsigned int regmap_parse_64_be(const void *buf)

- return get_unaligned_be64(buf);

-static unsigned int regmap_parse_64_le(const void *buf)

- return get_unaligned_le64(buf);

-static void regmap_parse_64_be_inplace(void *buf)

- u64 v = get_unaligned_be64(buf);

- memcpy(buf, &v, sizeof(v));

-static void regmap_parse_64_le_inplace(void *buf)

- u64 v = get_unaligned_le64(buf);

- memcpy(buf, &v, sizeof(v));

-static unsigned int regmap_parse_64_native(const void *buf)

- memcpy(&v, buf, sizeof(v));

-#ifdef CONFIG_64BIT

- switch (reg_endian) {

- case REGMAP_ENDIAN_BIG:

- map->format.format_reg = regmap_format_64_be;

- case REGMAP_ENDIAN_LITTLE:

- map->format.format_reg = regmap_format_64_le;

- case REGMAP_ENDIAN_NATIVE:

- map->format.format_reg = regmap_format_64_native;

-#ifdef CONFIG_64BIT

- switch (val_endian) {

- case REGMAP_ENDIAN_BIG:

- map->format.format_val = regmap_format_64_be;

- map->format.parse_val = regmap_parse_64_be;

- map->format.parse_inplace = regmap_parse_64_be_inplace;

- case REGMAP_ENDIAN_LITTLE:

- map->format.format_val = regmap_format_64_le;

- map->format.parse_val = regmap_parse_64_le;

- map->format.parse_inplace = regmap_parse_64_le_inplace;

- case REGMAP_ENDIAN_NATIVE:

- map->format.format_val = regmap_format_64_native;

- map->format.parse_val = regmap_parse_64_native;

-#ifdef CONFIG_64BIT

- lastval = (unsigned int)u64p[val_count - 1];

-#ifdef CONFIG_64BIT

- pr_cont("%llx", u64p[i]);

-#ifdef CONFIG_64BIT

- ival = *(u64 *)(val + (i * val_bytes));

-#ifdef CONFIG_64BIT

- bvec_set_page(&bvec, page, offset, len);

- struct drbd_genlmsghdr *d_in = info->userhdr;

- unsigned flags = ((struct drbd_genlmsghdr*)info->userhdr)->flags;

- return 0 != (flags & DRBD_GENL_F_SET_DEFAULTS);

- struct drbd_genlmsghdr *dh = info->userhdr;

- __invalidate_device(disk->part0, true);

- disk_force_media_change(lo->lo_disk, DISK_EVENT_MEDIA_CHANGE);

-static void nbd_clear_sock_ioctl(struct nbd_device *nbd,

- struct block_device *bdev)

- __invalidate_device(bdev, true);

- nbd_bdev_reset(nbd);

- nbd_clear_sock_ioctl(nbd, bdev);

- pr_info("rq %p timed out\n", rq);

- struct list_head *tmp;

- list_for_each(tmp, &rbd_dev_list) {

- rbd_dev = list_entry(tmp, struct rbd_device, node);

-int swim3_init(void)

- | UBLK_F_USER_COPY)

-#define UBLK_PARAM_TYPE_ALL (UBLK_PARAM_TYPE_BASIC | \

- UBLK_PARAM_TYPE_DISCARD | UBLK_PARAM_TYPE_DEVT)

- return ublk_rq_has_data(req) && req_op(req) == REQ_OP_READ;

- if (req_op(req) != REQ_OP_READ && req_op(req) != REQ_OP_WRITE)

- if (req && likely(!blk_should_fake_timeout(req->q)))

- if (ublk_support_user_copy(ubq) && ub_cmd->addr) {

- if (req_op(req) == REQ_OP_READ && ubuf_dir == ITER_SOURCE)

- if (req_op(req) == REQ_OP_WRITE && ubuf_dir == ITER_DEST)

- * Has to drop the reference since ->free_disk won't be

- * called in case of add_disk failure.

- goto out_put_disk;

- set_bit(UB_STATE_USED, &ub->state);

- if (ub->dev_info.flags & UBLK_F_USER_COPY)

- dev_path = kmalloc(header->dev_path_len + 1, GFP_KERNEL);

- if (copy_from_user(dev_path, argp, header->dev_path_len))

- dev_path[header->dev_path_len] = 0;

- struct btintel_loc_aware_reg ppag_cmd;

- bt_dev_warn(hdev, "PPAG-BT: domain is not bluetooth");

- /* PPAG mode, BIT0 = 0 Disabled, BIT0 = 1 Enabled */

- if (!(ppag.mode & BIT(0))) {

- bt_dev_dbg(hdev, "PPAG-BT: disabled");

- ppag_cmd.mcc = cpu_to_le32(0);

- ppag_cmd.sel = cpu_to_le32(0); /* 0 - Enable , 1 - Disable, 2 - Testing mode */

- ppag_cmd.delta = cpu_to_le32(0);

- skb = __hci_cmd_sync(hdev, 0xfe19, sizeof(ppag_cmd), &ppag_cmd, HCI_CMD_TIMEOUT);

-struct btintel_loc_aware_reg {

-#include <linux/of_device.h>

-#define FIRMWARE_W8987 "nxp/uartuart8987_bt.bin"

-#define FIRMWARE_W8997 "nxp/uartuart8997_bt_v4.bin"

-#define FIRMWARE_W9098 "nxp/uartuart9098_bt_v1.bin"

-#define FIRMWARE_IW416 "nxp/uartiw416_bt_v0.bin"

-#define FIRMWARE_IW612 "nxp/uartspi_n61x_v1.bin.se"

-#define FIRMWARE_HELPER "nxp/helper_uart_3000000.bin"

-static int ps_init_work(struct hci_dev *hdev)

- psdata->h2c_ps_interval = PS_DEFAULT_TIMEOUT_PERIOD_MS;

- psdata->ps_state = PS_STATE_AWAKE;

- psdata->target_ps_mode = DEFAULT_PS_MODE;

- psdata->c2h_wakeupmode = BT_HOST_WAKEUP_METHOD_NONE;

- psdata->c2h_wakeup_gpio = 0xff;

- switch (DEFAULT_H2C_WAKEUP_MODE) {

- case WAKEUP_METHOD_DTR:

- psdata->h2c_wakeupmode = WAKEUP_METHOD_DTR;

- case WAKEUP_METHOD_BREAK:

- psdata->h2c_wakeupmode = WAKEUP_METHOD_BREAK;

- psdata->cur_psmode = PS_MODE_DISABLE;

- psdata->cur_h2c_wakeupmode = WAKEUP_METHOD_INVALID;

-static void ps_init_timer(struct hci_dev *hdev)

- struct btnxpuart_dev *nxpdev = hci_get_drvdata(hdev);

- struct ps_data *psdata = &nxpdev->psdata;

- switch (psdata->h2c_wakeupmode) {

- /* Wait till FW is downloaded and CTS becomes low */

- err = serdev_device_wait_for_cts(nxpdev->serdev, 1, 60000);

- bt_dev_err(hdev, "CTS is still high. FW Download failed.");

- usleep_range(800 * USEC_PER_MSEC, 1 * USEC_PER_SEC);

- uart_config.clkdiv.address = __cpu_to_le32(CLKDIVADDR);

- uart_config.uartdiv.address = __cpu_to_le32(UARTDIVADDR);

- uart_config.mcr.address = __cpu_to_le32(UARTMCRADDR);

- uart_config.re_init.address = __cpu_to_le32(UARTREINITADDR);

- uart_config.icr.address = __cpu_to_le32(UARTICRADDR);

- uart_config.fcr.address = __cpu_to_le32(UARTFCRADDR);

- if (chip_id == 0xffff) {

-static char *nxp_get_fw_name_from_chipid(struct hci_dev *hdev, u16 chipid)

-static int nxp_set_ind_reset(struct hci_dev *hdev, void *data)

- struct btnxpuart_dev *nxpdev = hci_get_drvdata(hdev);

- struct sk_buff *skb;

- skb = nxp_drv_send_cmd(hdev, HCI_NXP_IND_RESET, 1, &pcmd);

- return PTR_ERR(skb);

- status = skb_pull_data(skb, 1);

- if (!status || *status)

- set_bit(BTNXPUART_FW_DOWNLOADING, &nxpdev->tx_state);

- err = nxp_download_firmware(hdev);

- serdev_device_set_baudrate(nxpdev->serdev, nxpdev->fw_init_baudrate);

- nxpdev->current_baudrate = nxpdev->fw_init_baudrate;

- if (nxpdev->current_baudrate != HCI_NXP_SEC_BAUDRATE) {

- nxpdev->new_baudrate = HCI_NXP_SEC_BAUDRATE;

- nxp_set_baudrate_cmd(hdev, NULL);

- hci_cmd_sync_queue(hdev, send_wakeup_method_cmd, NULL, NULL);

- hci_cmd_sync_queue(hdev, send_ps_cmd, NULL, NULL);

- serdev_device_set_flow_control(nxpdev->serdev, true);

- set_bit(BTNXPUART_FW_DOWNLOADING, &nxpdev->tx_state);

- init_waitqueue_head(&nxpdev->fw_dnld_done_wait_q);

- init_waitqueue_head(&nxpdev->check_boot_sign_wait_q);

- device_property_read_u32(&nxpdev->serdev->dev, "fw-init-baudrate",

- &nxpdev->fw_init_baudrate);

- if (!nxpdev->fw_init_baudrate)

- nxpdev->fw_init_baudrate = FW_INIT_BAUDRATE;

- nxpdev->hdev->stat.byte_rx += count;

- ps_init_work(hdev);

- ps_init_timer(hdev);

- rom_ver = ((soc_ver & 0x00000f00) >> 0x04) | (soc_ver & 0x0000000f);

- if (qca_is_wcn399x(soc_type)) {

- } else if (soc_type == QCA_QCA6390) {

- } else if (soc_type == QCA_WCN6750) {

- } else if (soc_type == QCA_WCN6855) {

- if (firmware_name)

- else if (qca_is_wcn399x(soc_type)) {

- if (le32_to_cpu(ver.soc_id) == QCA_WCN3991_SOC_ID) {

- "qca/crnv%02xu.bin", rom_ver);

- "qca/crnv%02x.bin", rom_ver);

- else if (soc_type == QCA_QCA6390)

- snprintf(config.fwname, sizeof(config.fwname),

- "qca/htnv%02x.bin", rom_ver);

- else if (soc_type == QCA_WCN6750)

- snprintf(config.fwname, sizeof(config.fwname),

- "qca/msnv%02x.bin", rom_ver);

- else if (soc_type == QCA_WCN6855)

- snprintf(config.fwname, sizeof(config.fwname),

- "qca/hpnv%02x.bin", rom_ver);

- snprintf(config.fwname, sizeof(config.fwname),

- "qca/nvm_%08x.bin", soc_ver);

- if (soc_type >= QCA_WCN3991) {

-static inline bool qca_is_wcn399x(enum qca_btsoc_type soc_type)

- return soc_type == QCA_WCN3990 || soc_type == QCA_WCN3991 ||

- soc_type == QCA_WCN3998;

-static inline bool qca_is_wcn6750(enum qca_btsoc_type soc_type)

- return soc_type == QCA_WCN6750;

-static inline bool qca_is_wcn6855(enum qca_btsoc_type soc_type)

- return soc_type == QCA_WCN6855;

-static inline bool qca_is_wcn399x(enum qca_btsoc_type soc_type)

-static inline bool qca_is_wcn6750(enum qca_btsoc_type soc_type)

-static inline bool qca_is_wcn6855(enum qca_btsoc_type soc_type)

- .fw_name = "rtl_bt/rtl8723a_fw.bin",

- .cfg_name = NULL },

- .fw_name = "rtl_bt/rtl8723bs_fw.bin",

- .cfg_name = "rtl_bt/rtl8723bs_config" },

- .fw_name = "rtl_bt/rtl8723b_fw.bin",

- .cfg_name = "rtl_bt/rtl8723b_config" },

- .fw_name = "rtl_bt/rtl8723cs_cg_fw.bin",

- .cfg_name = "rtl_bt/rtl8723cs_cg_config" },

- .fw_name = "rtl_bt/rtl8723cs_vf_fw.bin",

- .cfg_name = "rtl_bt/rtl8723cs_vf_config" },

- .fw_name = "rtl_bt/rtl8723cs_xx_fw.bin",

- .cfg_name = "rtl_bt/rtl8723cs_xx_config" },

- .fw_name = "rtl_bt/rtl8723d_fw.bin",

- .cfg_name = "rtl_bt/rtl8723d_config" },

- .fw_name = "rtl_bt/rtl8723ds_fw.bin",

- .cfg_name = "rtl_bt/rtl8723ds_config" },

- .fw_name = "rtl_bt/rtl8821a_fw.bin",

- .cfg_name = "rtl_bt/rtl8821a_config" },

- .fw_name = "rtl_bt/rtl8821c_fw.bin",

- .cfg_name = "rtl_bt/rtl8821c_config" },

- .fw_name = "rtl_bt/rtl8821cs_fw.bin",

- .cfg_name = "rtl_bt/rtl8821cs_config" },

- .fw_name = "rtl_bt/rtl8761a_fw.bin",

- .cfg_name = "rtl_bt/rtl8761a_config" },

- .fw_name = "rtl_bt/rtl8761b_fw.bin",

- .cfg_name = "rtl_bt/rtl8761b_config" },

- .fw_name = "rtl_bt/rtl8761bu_fw.bin",

- .cfg_name = "rtl_bt/rtl8761bu_config" },

- .fw_name = "rtl_bt/rtl8822cs_fw.bin",

- .cfg_name = "rtl_bt/rtl8822cs_config" },

- .fw_name = "rtl_bt/rtl8822cs_fw.bin",

- .cfg_name = "rtl_bt/rtl8822cs_config" },

- .fw_name = "rtl_bt/rtl8822cu_fw.bin",

- .cfg_name = "rtl_bt/rtl8822cu_config" },

- .fw_name = "rtl_bt/rtl8822b_fw.bin",

- .cfg_name = "rtl_bt/rtl8822b_config" },

- .fw_name = "rtl_bt/rtl8852au_fw.bin",

- .cfg_name = "rtl_bt/rtl8852au_config" },

- .fw_name = "rtl_bt/rtl8852bs_fw.bin",

- .cfg_name = "rtl_bt/rtl8852bs_config" },

- .fw_name = "rtl_bt/rtl8852bu_fw.bin",

- .cfg_name = "rtl_bt/rtl8852bu_config" },

- .fw_name = "rtl_bt/rtl8852cu_fw.bin",

- .cfg_name = "rtl_bt/rtl8852cu_config" },

- .fw_name = "rtl_bt/rtl8851bu_fw.bin",

- .cfg_name = "rtl_bt/rtl8851bu_config" },

- opcode = hci_opcode_pack(0x3f, 0x66);

- cmd[0] = opcode & 0xff;

- cmd[1] = opcode >> 8;

- skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL);

- skb_put_data(skb, cmd, sizeof(cmd));

- btrtl_dev->fw_len = rtl_load_file(hdev, btrtl_dev->ic_info->fw_name,

- &btrtl_dev->fw_data);

- return btrtl_setup_rtl8723a(hdev, btrtl_dev);

- return btrtl_setup_rtl8723b(hdev, btrtl_dev);

-static const struct usb_device_id blacklist_table[] = {

- kfree_skb(data->sco_skb);

-static int btusb_intel_diagnostics(struct hci_dev *hdev, struct sk_buff *skb)

- struct intel_tlv *tlv = (void *)&skb->data[5];

- /* The first event is always an event type TLV */

- if (tlv->type != INTEL_TLV_TYPE_ID)

- switch (tlv->val[0]) {

- case INTEL_TLV_SYSTEM_EXCEPTION:

- case INTEL_TLV_FATAL_EXCEPTION:

- case INTEL_TLV_DEBUG_EXCEPTION:

- case INTEL_TLV_TEST_EXCEPTION:

- /* Generate devcoredump from exception */

- if (!hci_devcd_init(hdev, skb->len)) {

- hci_devcd_append(hdev, skb);

- hci_devcd_complete(hdev);

- bt_dev_err(hdev, "Failed to generate devcoredump");

- bt_dev_err(hdev, "Invalid exception type %02X", tlv->val[0]);

- return hci_recv_frame(hdev, skb);

-static int btusb_recv_event_intel(struct hci_dev *hdev, struct sk_buff *skb)

- struct hci_event_hdr *hdr = (void *)skb->data;

- const char diagnostics_hdr[] = { 0x87, 0x80, 0x03 };

- if (skb->len > HCI_EVENT_HDR_SIZE && hdr->evt == 0xff &&

- const void *ptr = skb->data + HCI_EVENT_HDR_SIZE + 1;

- unsigned int len = skb->len - HCI_EVENT_HDR_SIZE - 1;

- if (btintel_test_flag(hdev, INTEL_BOOTLOADER)) {

- switch (skb->data[2]) {

- /* When switching to the operational firmware

- * the device sends a vendor specific event

- * indicating that the bootup completed.

- btintel_bootup(hdev, ptr, len);

- /* When the firmware loading completes the

- * device sends out a vendor specific event

- * indicating the result of the firmware

- btintel_secure_send_result(hdev, ptr, len);

- /* Handle all diagnostics events separately. May still call

- if (len >= sizeof(diagnostics_hdr) &&

- memcmp(&skb->data[2], diagnostics_hdr,

- sizeof(diagnostics_hdr)) == 0) {

- return btusb_intel_diagnostics(hdev, skb);

- return hci_recv_frame(hdev, skb);

-#define MTK_BT_RESET_WAIT_MS 100

-#define MTK_BT_RESET_NUM_TRIES 10

- snprintf(fw_bin_name, sizeof(fw_bin_name),

- "mediatek/BT_RAM_CODE_MT%04x_1_%x_hdr.bin",

- dev_id & 0xffff, (fw_version & 0xff) + 1);

-static void btusb_mtk_cmd_timeout(struct hci_dev *hdev)

- struct btusb_data *data = hci_get_drvdata(hdev);

- int err, retry = 0;

- /* It's MediaTek specific bluetooth reset mechanism via USB */

- if (test_and_set_bit(BTUSB_HW_RESET_ACTIVE, &data->flags)) {

- bt_dev_err(hdev, "last reset failed? Not resetting again");

- err = usb_autopm_get_interface(data->intf);

- btusb_stop_traffic(data);

- usb_kill_anchored_urbs(&data->tx_anchor);

- /* It's Device EndPoint Reset Option Register */

- bt_dev_dbg(hdev, "Initiating reset mechanism via uhw");

- btusb_mtk_uhw_reg_write(data, MTK_EP_RST_OPT, MTK_EP_RST_IN_OUT_OPT);

- btusb_mtk_uhw_reg_read(data, MTK_BT_WDT_STATUS, &val);

- /* Reset the bluetooth chip via USB interface. */

- btusb_mtk_uhw_reg_write(data, MTK_BT_SUBSYS_RST, 1);

- btusb_mtk_uhw_reg_write(data, MTK_UDMA_INT_STA_BT, 0x000000FF);

- btusb_mtk_uhw_reg_read(data, MTK_UDMA_INT_STA_BT, &val);

- btusb_mtk_uhw_reg_write(data, MTK_UDMA_INT_STA_BT1, 0x000000FF);

- btusb_mtk_uhw_reg_read(data, MTK_UDMA_INT_STA_BT1, &val);

- /* MT7921 need to delay 20ms between toggle reset bit */

- btusb_mtk_uhw_reg_write(data, MTK_BT_SUBSYS_RST, 0);

- btusb_mtk_uhw_reg_read(data, MTK_BT_SUBSYS_RST, &val);

- /* Poll the register until reset is completed */

- btusb_mtk_uhw_reg_read(data, MTK_BT_MISC, &val);

- if (val & MTK_BT_RST_DONE) {

- bt_dev_dbg(hdev, "Bluetooth Reset Successfully");

- bt_dev_dbg(hdev, "Polling Bluetooth Reset CR");

- msleep(MTK_BT_RESET_WAIT_MS);

- } while (retry < MTK_BT_RESET_NUM_TRIES);

- btusb_mtk_id_get(data, 0x70010200, &val);

- bt_dev_err(hdev, "Can't get device id, subsys reset fail.");

- usb_queue_reset_device(data->intf);

- clear_bit(BTUSB_HW_RESET_ACTIVE, &data->flags);

- match = usb_match_id(intf, blacklist_table);

- data->recv_event = btusb_recv_event_intel;

- hdev->cmd_timeout = btusb_mtk_cmd_timeout;

-#include <linux/of_device.h>

- const char *flags, int count)

- if (test_bit(HCI_UART_PROTO_SET, &hu->flags))

- unsigned char *buf, size_t nr,

- void **cookie, unsigned long offset)

- const unsigned char *data, size_t count)

-static __poll_t hci_uart_tty_poll(struct tty_struct *tty,

- struct file *filp, poll_table *wait)

- .poll = hci_uart_tty_poll,

- clk_prepare_enable(sysclk);

-#include <linux/of_device.h>

-struct qca_memdump_data {

- char *memdump_buf_head;

- char *memdump_buf_tail;

- struct qca_memdump_data *qca_memdump;

- if (qca_is_wcn399x(qcadev->btsoc_type) ||

- qca_is_wcn6750(qcadev->btsoc_type))

- struct qca_memdump_data *qca_memdump = qca->qca_memdump;

- char *memdump_buf;

- char nullBuff[QCA_DUMP_PACKET_SIZE] = { 0 };

- qca_memdump = kzalloc(sizeof(struct qca_memdump_data),

- dump_size = __le32_to_cpu(dump->dump_size);

- if (!(dump_size)) {

- qca->qca_memdump = NULL;

- bt_dev_info(hu->hdev, "QCA collecting dump of size:%u",

- msecs_to_jiffies(MEMDUMP_TIMEOUT_MS)

- skb_pull(skb, sizeof(dump_size));

- memdump_buf = vmalloc(dump_size);

- qca_memdump->ram_dump_size = dump_size;

- qca_memdump->memdump_buf_head = memdump_buf;

- qca_memdump->memdump_buf_tail = memdump_buf;

- memdump_buf = qca_memdump->memdump_buf_tail;

- if (!memdump_buf) {

- qca->qca_memdump = NULL;

- (soc_type != QCA_QCA6390) &&

- seq_no != QCA_LAST_SEQUENCE_NUM) {

- memcpy(memdump_buf, nullBuff, QCA_DUMP_PACKET_SIZE);

- memdump_buf = memdump_buf + QCA_DUMP_PACKET_SIZE;

- rx_size = qca_memdump->received_dump + skb->len;

- (seq_no != qca_memdump->current_seq_no))

- memcpy(memdump_buf, (unsigned char *)skb->data,

- memdump_buf = memdump_buf + skb->len;

- qca_memdump->memdump_buf_tail = memdump_buf;

- qca_memdump->current_seq_no = seq_no + 1;

- qca_memdump->received_dump += skb->len;

- "QCA memdump received %d, no space for packet %d",

- qca_memdump->received_dump, seq_no);

- qca->qca_memdump = qca_memdump;

- "QCA memdump Done, received %d, total %d",

- qca_memdump->received_dump,

- qca_memdump->ram_dump_size);

- memdump_buf = qca_memdump->memdump_buf_head;

- dev_coredumpv(&hu->serdev->dev, memdump_buf,

- qca_memdump->received_dump, GFP_KERNEL);

- if (qca_is_wcn399x(qca_soc_type(hu)) ||

- qca_is_wcn6750(qca_soc_type(hu)) ||

- qca_is_wcn6855(qca_soc_type(hu)))

- if (qca_is_wcn399x(qca_soc_type(hu)) ||

- qca_is_wcn6750(qca_soc_type(hu)) ||

- qca_is_wcn6855(qca_soc_type(hu))) {

- if (qca_is_wcn399x(soc_type) ||

- qca_is_wcn6750(soc_type) ||

- qca_is_wcn6855(soc_type))

- if (soc_type == QCA_WCN3990) {

- if (qca_is_wcn399x(soc_type) ||

- qca_is_wcn6750(soc_type) ||

- qca_is_wcn6855(soc_type))

- if (soc_type == QCA_WCN3990) {

- vfree(qca->qca_memdump->memdump_buf_head);

- if (qca_is_wcn399x(soc_type)) {

- if (qca_is_wcn399x(soc_type) ||

- qca_is_wcn6750(soc_type) ||

- qca_is_wcn6855(soc_type)) {

- bt_dev_info(hdev, "setting up %s",

- qca_is_wcn399x(soc_type) ? "wcn399x" :

- (soc_type == QCA_WCN6750) ? "wcn6750" :

- (soc_type == QCA_WCN6855) ? "wcn6855" : "ROME/QCA6390");

- if (qca_is_wcn399x(soc_type) ||

- qca_is_wcn6750(soc_type) ||

- qca_is_wcn6855(soc_type)) {

- if (!(qca_is_wcn399x(soc_type) ||

- qca_is_wcn6750(soc_type) ||

- qca_is_wcn6855(soc_type))) {

- if (qca_is_wcn399x(soc_type)) {

- } else if (soc_type == QCA_WCN6750 || soc_type == QCA_WCN6855) {

- } else if (qcadev->bt_en) {

- (qca_is_wcn399x(data->soc_type) ||

- qca_is_wcn6750(data->soc_type) ||

- qca_is_wcn6855(data->soc_type))) {

- data->soc_type == QCA_WCN6855))

- qcadev->btsoc_type = data->soc_type;

- qcadev->btsoc_type = QCA_ROME;

- if ((qca_is_wcn399x(qcadev->btsoc_type) ||

- qca_is_wcn6750(qcadev->btsoc_type) ||

- qca_is_wcn6855(qcadev->btsoc_type)) &&

- qca_power_shutdown(&qcadev->serdev_hu);

- else if (qcadev->susclk)

- clk_disable_unprepare(qcadev->susclk);

- depends on ARCH_OMAP2PLUS

-static int parse_mc_ranges(struct device *dev,

- int *mc_addr_cells,

- int *mc_size_cells,

- const __be32 **ranges_start)

- const __be32 *prop;

- int range_tuple_cell_count;

- struct device_node *mc_node = dev->of_node;

- *ranges_start = of_get_property(mc_node, "ranges", &ranges_len);

- if (!(*ranges_start) || !ranges_len) {

- "missing or empty ranges property for device tree node '%pOFn'\n",

- *paddr_cells = of_n_addr_cells(mc_node);

- prop = of_get_property(mc_node, "#address-cells", NULL);

- *mc_addr_cells = be32_to_cpup(prop);

- *mc_addr_cells = *paddr_cells;

- prop = of_get_property(mc_node, "#size-cells", NULL);

- *mc_size_cells = be32_to_cpup(prop);

- *mc_size_cells = of_n_size_cells(mc_node);

- range_tuple_cell_count = *paddr_cells + *mc_addr_cells +

- tuple_len = range_tuple_cell_count * sizeof(__be32);

- if (ranges_len % tuple_len != 0) {

- dev_err(dev, "malformed ranges property '%pOFn'\n", mc_node);

- return ranges_len / tuple_len;

- int mc_addr_cells;

- int mc_size_cells;

- const __be32 *ranges_start;

- const __be32 *cell;

- ret = parse_mc_ranges(dev,

- *num_ranges = ret;

- cell = ranges_start;

- for (i = 0; i < *num_ranges; ++i) {

- struct fsl_mc_addr_translation_range *range = &(*ranges)[i];

- range->mc_region_type = of_read_number(cell, 1);

- range->start_mc_offset = of_read_number(cell + 1,

- mc_addr_cells - 1);

- cell += mc_addr_cells;

- range->start_phys_addr = of_read_number(cell, paddr_cells);

- cell += paddr_cells;

- range->end_mc_offset = range->start_mc_offset +

- of_read_number(cell, mc_size_cells);

- cell += mc_size_cells;

-#include <linux/of_device.h>

-#include <linux/of_address.h>

- base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);

- const struct firmware *firmware,

- size_t remainder = firmware->size;

- const u8 *buf = firmware->data;

- memcpy(buf, firmware->data, size);

- if (fw_name == mhi_cntrl->edl_image) {

- ret = mhi_alloc_bhie_table(mhi_cntrl, &mhi_cntrl->fbc_image,

- mhi_firmware_copy(mhi_cntrl, firmware, mhi_cntrl->fbc_image);

- mhi_cntrl->mhi_chan = vzalloc(mhi_cntrl->max_chan *

- MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 128, 2),

- MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 128, 3),

- MHI_EVENT_CONFIG_HW_DATA(2, 1024, 100),

- MHI_EVENT_CONFIG_HW_DATA(3, 2048, 101)

-#include <linux/of_device.h>

- * if we have a timeout error, there's nothing we can

- * do besides rebooting the board. So let's BUG on any

- * of such errors and handle the others. timeout error

- * is severe and not expected to occur.

- BUG_ON(status & L3_STATUS_0_TIMEOUT_MASK);

- /* No timeout error for debug sources */

-#include <linux/of_platform.h>

- struct resource *r;

- r = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- rsb->regs = devm_ioremap_resource(dev, r);

- struct resource *res;

- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- gmi->base = devm_ioremap_resource(dev, res);

-#include <linux/of_device.h>

- SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),

- if (sysc_soc->soc == SOC_3430) {

- usleep_range(ddata->cfg.srst_udelay,

- ddata->cfg.srst_udelay * 2);

- sysc_soc->soc = (int)match->data;

- if (sysc_soc->soc == SOC_3430)

- struct resource *res;

- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- syscfg->base = devm_ioremap_resource(&pdev->dev, res);

-#include <linux/of_platform.h>

-#include <linux/of_device.h>

-#include <linux/of_platform.h>

- depends on (X86 || IA64) && PCI

- depends on (X86 || PPC_MAPLE) && PCI

- depends on (ARCH_AT91 || COMPILE_TEST) && HAVE_CLK && OF

- depends on X86_32 && PCI

- depends on PPC_PASEMI

- depends on SOC_IMX31

- depends on HAS_IOMEM && HAVE_CLK

- depends on HW_RANDOM

- depends on MACH_JZ4780 || MACH_X1000

- depends on HW_RANDOM

- depends on MACH_X1830

- depends on HW_RANDOM && ARCH_HISI

- depends on HW_RANDOM && (ARCH_STI || COMPILE_TEST)

- depends on HW_RANDOM && ARCH_XGENE

- depends on HW_RANDOM && (ARCH_STM32 || COMPILE_TEST)

- depends on HW_RANDOM && MACH_PIC32

- depends on HW_RANDOM && PCI && ARCH_THUNDER

- platform_set_drvdata(pdev, trng);

-#include <linux/of_device.h>

- platform_set_drvdata(pdev, ba431);

- dev_err(&pdev->dev, "BA431 registration failed (%d)\n", ret);

- { .compatible = "silex-insight,ba431-rng", .data = NULL },

-#include <linux/of_address.h>

-#include <linux/of_platform.h>

-static int cc_trng_clk_init(struct cctrng_drvdata *drvdata)

- struct device *dev = &(drvdata->pdev->dev);

- clk = devm_clk_get_optional(dev, NULL);

- return dev_err_probe(dev, PTR_ERR(clk),

- "Error getting clock\n");

- drvdata->clk = clk;

- rc = clk_prepare_enable(drvdata->clk);

- dev_err(dev, "Failed to enable clock\n");

-static void cc_trng_clk_fini(struct cctrng_drvdata *drvdata)

- clk_disable_unprepare(drvdata->clk);

- if (IS_ERR(drvdata->cc_base)) {

- dev_err(dev, "Failed to ioremap registers");

- return PTR_ERR(drvdata->cc_base);

- dev_err(dev, "Failed to get legal sampling ratio for rosc\n");

- rc = cc_trng_clk_init(drvdata);

- dev_err(dev, "cc_trng_clk_init failed\n");

- dev_err(dev, "Could not register to interrupt %d\n", irq);

- goto post_clk_err;

- dev_err(dev, "cc_trng_pm_init failed\n");

- goto post_clk_err;

- dev_err(dev, "cc_trng_pm_get returned %x\n", rc);

- cc_trng_clk_fini(drvdata);

-static int __init cctrng_mod_init(void)

- /* Compile time assertion checks */

- BUILD_BUG_ON(CCTRNG_DATA_BUF_WORDS < 6);

- BUILD_BUG_ON((CCTRNG_DATA_BUF_WORDS & (CCTRNG_DATA_BUF_WORDS-1)) != 0);

- return platform_driver_register(&cctrng_driver);

-module_init(cctrng_mod_init);

-static void __exit cctrng_mod_exit(void)

- platform_driver_unregister(&cctrng_driver);

-module_exit(cctrng_mod_exit);

- if (!rng->reg_base) {

- dev_err(&pdev->dev, "Error while mapping CSRs, exiting\n");

- dev_err(&pdev->dev, "Could not register hwrng device.\n");

-static void cn10k_rng_remove(struct pci_dev *pdev)

- /* Nothing to do */

- .remove = cn10k_rng_remove,

-#include <linux/random.h>

-#include <linux/sched/signal.h>

-static int __maybe_unused exynos_trng_suspend(struct device *dev)

-static int __maybe_unused exynos_trng_resume(struct device *dev)

-static SIMPLE_DEV_PM_OPS(exynos_trng_pm_ops, exynos_trng_suspend,

- .pm = &exynos_trng_pm_ops,

- if (IS_ERR(rngc->clk)) {

- dev_err(&pdev->dev, "Can not get rng_clk\n");

- return PTR_ERR(rngc->clk);

- dev_err(rngc->dev, "Can't get interrupt working.\n");

- dev_err(rngc->dev, "self test failed\n");

- dev_err(&pdev->dev, "hwrng registration failed\n");

- priv->version = (enum ingenic_rng_version)of_device_get_match_data(&pdev->dev);

-#include <linux/of_device.h>

-#define CFG_RDY_CLR BIT(12)

-#define CFG_INT_MASK BIT(11)

- if (IS_ERR(trng->base)) {

- pr_err("%s: Failed to map DTRNG registers\n", __func__);

- ret = PTR_ERR(trng->base);

- return PTR_ERR(trng->base);

- trng->clk = devm_clk_get(&pdev->dev, NULL);

- if (IS_ERR(trng->clk)) {

- ret = PTR_ERR(trng->clk);

- pr_crit("%s: Cannot get DTRNG clock\n", __func__);

- return PTR_ERR(trng->clk);

- ret = clk_prepare_enable(trng->clk);

- pr_crit("%s: Unable to enable DTRNG clock\n", __func__);

- ret = hwrng_register(&trng->rng);

- dev_err(&pdev->dev, "Failed to register hwrng\n");

- goto err_unprepare_clk;

- clk_disable_unprepare(trng->clk);

-static int ingenic_trng_remove(struct platform_device *pdev)

- struct ingenic_trng *trng = platform_get_drvdata(pdev);

- unsigned int ctrl;

- hwrng_unregister(&trng->rng);

- ctrl = readl(trng->base + TRNG_REG_CFG_OFFSET);

- ctrl &= ~CFG_GEN_EN;

- writel(ctrl, trng->base + TRNG_REG_CFG_OFFSET);

- clk_disable_unprepare(trng->clk);

- .remove = ingenic_trng_remove,

-#include <linux/of_address.h>

-#include <linux/of_platform.h>

-static struct clk *rng_clk;

- rng_clk = devm_clk_get(&dev->dev, NULL);

- if (IS_ERR(rng_clk)) {

- dev_err(&dev->dev, "could not get rng clock\n");

- ret = PTR_ERR(rng_clk);

- clk_prepare_enable(rng_clk);

- clk_disable_unprepare(rng_clk);

-#include <linux/of_irq.h>

-#include <linux/of_device.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of_address.h>

-#include <linux/of_platform.h>

-#include <linux/of.h>

-#include <linux/of_device.h>

-#define TRNGEN BIT(8)

-#define PRNGEN BIT(9)

-#define PRNGCONT BIT(10)

-#define TRNGMOD BIT(11)

-#define SEEDLOAD BIT(12)

-#define RNGPOLY1 0x08

-#define RNGPOLY2 0x0C

-#define RNGNUMGEN1 0x10

-#define RNGNUMGEN2 0x14

-#define RCNT_MASK 0x7F

- priv->clk = devm_clk_get(&pdev->dev, NULL);

- if (IS_ERR(priv->clk))

- return PTR_ERR(priv->clk);

- ret = clk_prepare_enable(priv->clk);

- /* enable TRNG in enhanced mode */

- v = TRNGEN | TRNGMOD;

- writel(v, priv->base + RNGCON);

- ret = devm_hwrng_register(&pdev->dev, &priv->rng);

- goto err_register;

- platform_set_drvdata(pdev, priv);

- clk_disable_unprepare(priv->clk);

-static int pic32_rng_remove(struct platform_device *pdev)

- struct pic32_rng *rng = platform_get_drvdata(pdev);

- writel(0, rng->base + RNGCON);

- clk_disable_unprepare(rng->clk);

- .remove = pic32_rng_remove,

- .of_match_table = of_match_ptr(pic32_rng_of_match),

-#include <linux/of_platform.h>

- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- if (res->start % 4 != 0 || resource_size(res) < 4) {

- dev_err(&pdev->dev,

- "address must be at least four bytes wide and 32-bit aligned\n");

- priv->io_base = devm_ioremap_resource(&pdev->dev, res);

- if (IS_ERR(priv->io_base)) {

- return PTR_ERR(priv->io_base);

-#include <linux/of_platform.h>

-#include <linux/of_irq.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

- .probe_new = ipmb_probe,

-static struct class *ipmi_class;

- device_create(ipmi_class, device, dev, NULL, "ipmi%d", if_num);

- device_destroy(ipmi_class, dev);

- ipmi_class = class_create("ipmi");

- if (IS_ERR(ipmi_class)) {

- pr_err("ipmi: can't register device class\n");

- return PTR_ERR(ipmi_class);

- class_destroy(ipmi_class);

- device_destroy(ipmi_class, entry->dev);

- class_destroy(ipmi_class);

- .probe_new = ipmi_ipmb_probe,

- io.si_type = (enum si_type) match->data;

- request_module("acpi_ipmi");

- if (info->addr_src == SI_SMBIOS)

- request_module("acpi_ipmi");

- .probe_new = ssif_probe,

- while (!data_to_read) {

- spin_lock(&kcs_bmc->lock);

- spin_unlock(&kcs_bmc->lock);

-#include <linux/of_device.h>

- .probe_new = ssif_bmc_probe,

- [DEVMEM_MINOR] = { "mem", 0, &mem_fops, FMODE_UNSIGNED_OFFSET },

- [3] = { "null", 0666, &null_fops, FMODE_NOWAIT },

- [4] = { "port", 0, &port_fops, 0 },

- [5] = { "zero", 0666, &zero_fops, FMODE_NOWAIT },

- [7] = { "full", 0666, &full_fops, 0 },

- [8] = { "random", 0666, &random_fops, FMODE_NOWAIT },

- [9] = { "urandom", 0666, &urandom_fops, FMODE_NOWAIT },

- [11] = { "kmsg", 0644, &kmsg_fops, 0 },

- len += get_event_name(eventname, event, event_entry);

-struct class *tpm_class;

-struct class *tpmrm_class;

- chip->dev.class = tpm_class;

- tpm_class = class_create("tpm");

- if (IS_ERR(tpm_class)) {

- return PTR_ERR(tpm_class);

- tpm_class->shutdown_pre = tpm_class_shutdown;

- tpmrm_class = class_create("tpmrm");

- if (IS_ERR(tpmrm_class)) {

- rc = PTR_ERR(tpmrm_class);

- class_destroy(tpmrm_class);

- class_destroy(tpm_class);

- class_destroy(tpmrm_class);

-extern struct class *tpm_class;

-extern struct class *tpmrm_class;

- chip->devs.class = tpmrm_class;

-static int crb_check_flags(struct tpm_chip *chip)

- ret = crb_request_locality(chip, 0);

- ret = tpm2_get_tpm_pt(chip, TPM2_PT_MANUFACTURER, &val, NULL);

- if (val == 0x414D4400U /* AMD */)

- chip->flags |= TPM_CHIP_FLAG_HWRNG_DISABLED;

- crb_relinquish_locality(chip, 0);

- rc = crb_check_flags(chip);

-#include <linux/of_platform.h>

-#include <linux/of_device.h>

-#include <linux/dmi.h>

-static int interrupts;

-module_param(interrupts, int, 0444);

-static int tpm_tis_disable_irq(const struct dmi_system_id *d)

- if (interrupts == -1) {

- pr_notice("tpm_tis: %s detected: disabling interrupts.\n", d->ident);

-static const struct dmi_system_id tpm_tis_dmi_table[] = {

- .callback = tpm_tis_disable_irq,

- .ident = "Framework Laptop (12th Gen Intel Core)",

- DMI_MATCH(DMI_SYS_VENDOR, "Framework"),

- DMI_MATCH(DMI_PRODUCT_NAME, "Laptop (12th Gen Intel Core)"),

- .callback = tpm_tis_disable_irq,

- .ident = "Framework Laptop (13th Gen Intel Core)",

- DMI_MATCH(DMI_SYS_VENDOR, "Framework"),

- DMI_MATCH(DMI_PRODUCT_NAME, "Laptop (13th Gen Intel Core)"),

- .callback = tpm_tis_disable_irq,

- .ident = "ThinkPad T490s",

- DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),

- DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad T490s"),

- .callback = tpm_tis_disable_irq,

- .ident = "ThinkStation P360 Tiny",

- DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),

- DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkStation P360 Tiny"),

- .callback = tpm_tis_disable_irq,

- .ident = "ThinkPad L490",

- DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),

- DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad L490"),

- .callback = tpm_tis_disable_irq,

- .ident = "ThinkPad L590",

- DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),

- DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad L590"),

- .callback = tpm_tis_disable_irq,

- .ident = "ThinkStation P620",

- DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),

- DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkStation P620"),

- .callback = tpm_tis_disable_irq,

- .ident = "TUXEDO InfinityBook S 15/17 Gen7",

- DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),

- DMI_MATCH(DMI_PRODUCT_NAME, "TUXEDO InfinityBook S 15/17 Gen7"),

- .callback = tpm_tis_disable_irq,

- .ident = "UPX-TGL",

- DMI_MATCH(DMI_SYS_VENDOR, "AAEON"),

- DMI_MATCH(DMI_PRODUCT_NAME, "UPX-TGL01"),

- dmi_check_system(tpm_tis_dmi_table);

-static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)

- if (count < TPM_HEADER_SIZE) {

- if (status & TPM_STS_DATA_AVAIL) { /* retry? */

- tpm_tis_ready(chip);

- rc = tpm_tis_send_data(chip, buf, len);

- rc = tpm_tis_verify_crc(priv, len, buf);

- dev_err(&chip->dev, "CRC mismatch for command.\n");

-#include <linux/of_device.h>

-int tpm_tis_spi_transfer(struct tpm_tis_data *data, u32 addr, u16 len,

- u8 *in, const u8 *out)

-#include <linux/of_device.h>

-static int __init tpm_tis_synquacer_module_init(void)

- rc = platform_driver_register(&tis_synquacer_drv);

-static void __exit tpm_tis_synquacer_module_exit(void)

- platform_driver_unregister(&tis_synquacer_drv);

-module_init(tpm_tis_synquacer_module_init);

-module_exit(tpm_tis_synquacer_module_exit);

-static int tpk_printk(const unsigned char *buf, int count)

-static int tpk_write(struct tty_struct *tty,

- const unsigned char *buf, int count)

- depends on OF && HAS_DMA

-config COMMON_CLK_OXNAS

- bool "Clock driver for the OXNAS SoC Family"

- depends on ARCH_OXNAS || COMPILE_TEST

- Support for the OXNAS SoC Family clocks.

-obj-$(CONFIG_COMMON_CLK_OXNAS) += clk-oxnas.o

-#include <linux/of_address.h>

-#include <linux/of_platform.h>

- struct resource *res;

- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- base = devm_ioremap_resource(&pdev->dev, res);

-#include <linux/of_platform.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_platform.h>

-#include <linux/of_device.h>

- aspeed_clk_data->num = ASPEED_NUM_CLKS;

-#include <linux/of_device.h>

- aspeed_g6_clk_data->num = ASPEED_G6_NUM_CLKS;

- struct resource *res;

- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- base = devm_ioremap_resource(dev, res);

-#include <linux/of_address.h>

-#include <linux/of_device.h>

- struct resource *res;

- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- pll_base = devm_ioremap_resource(&pdev->dev, res);

- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);

- sys_base = devm_ioremap_resource(&pdev->dev, res);

- .of_match_table = of_match_ptr(clk_cdce925_of_match),

-#include <linux/of_device.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

- struct resource *res;

- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- base = devm_ioremap_resource(dev, res);

- struct resource *res;

- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- base = devm_ioremap_resource(dev, res);

- gemini_clk_data->num = GEMINI_NUM_CLKS;

-#include <linux/of_device.h>

- struct resource *mem;

- mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- pll_clk->regs = devm_ioremap_resource(dev, mem);

-#include <linux/of_platform.h>

- return regmap_write(lmk->regmap, reg,

- FIELD_PREP(LMK04832_BIT_CLKIN_SEL_MUX,

- LMK04832_VAL_CLKIN_SEL_MUX_SPI_RDBK) |

- FIELD_PREP(LMK04832_BIT_CLKIN_SEL_TYPE,

- LMK04832_VAL_CLKIN_SEL_TYPE_OUT));

- goto err_disable_vco;

- clk_disable_unprepare(lmk->vco.clk);

- m10v_clk_data->num = M10V_NUM_CLKS;

-// SPDX-License-Identifier: GPL-2.0-only

-#include <linux/clk-provider.h>

-#include <linux/kernel.h>

-#include <linux/init.h>

-#include <linux/of.h>

-#include <linux/of_device.h>

-#include <linux/platform_device.h>

-#include <linux/stringify.h>

-#include <linux/regmap.h>

-#include <linux/mfd/syscon.h>

-#include <dt-bindings/clock/oxsemi,ox810se.h>

-#include <dt-bindings/clock/oxsemi,ox820.h>

-/* Standard regmap gate clocks */

-struct clk_oxnas_gate {

- struct regmap *regmap;

-struct oxnas_stdclk_data {

- struct clk_hw_onecell_data *onecell_data;

- struct clk_oxnas_gate **gates;

- unsigned int ngates;

- struct clk_oxnas_pll **plls;

- unsigned int nplls;

-/* Regmap offsets */

-#define CLK_STAT_REGOFFSET 0x24

-#define CLK_SET_REGOFFSET 0x2c

-#define CLK_CLR_REGOFFSET 0x30

-static inline struct clk_oxnas_gate *to_clk_oxnas_gate(struct clk_hw *hw)

- return container_of(hw, struct clk_oxnas_gate, hw);

-static int oxnas_clk_gate_is_enabled(struct clk_hw *hw)

- struct clk_oxnas_gate *std = to_clk_oxnas_gate(hw);

- ret = regmap_read(std->regmap, CLK_STAT_REGOFFSET, &val);

- return val & BIT(std->bit);

-static int oxnas_clk_gate_enable(struct clk_hw *hw)

- struct clk_oxnas_gate *std = to_clk_oxnas_gate(hw);

- regmap_write(std->regmap, CLK_SET_REGOFFSET, BIT(std->bit));

-static void oxnas_clk_gate_disable(struct clk_hw *hw)

- struct clk_oxnas_gate *std = to_clk_oxnas_gate(hw);

- regmap_write(std->regmap, CLK_CLR_REGOFFSET, BIT(std->bit));

-static const struct clk_ops oxnas_clk_gate_ops = {

- .enable = oxnas_clk_gate_enable,

- .disable = oxnas_clk_gate_disable,

- .is_enabled = oxnas_clk_gate_is_enabled,

-static const char *const osc_parents[] = {

-static const char *const eth_parents[] = {

-#define OXNAS_GATE(_name, _bit, _parents) \

-struct clk_oxnas_gate _name = { \

- .hw.init = &(struct clk_init_data) { \

- .ops = &oxnas_clk_gate_ops, \

- .parent_names = _parents, \

- .num_parents = ARRAY_SIZE(_parents), \

- .flags = (CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED), \

-static OXNAS_GATE(ox810se_leon, 0, osc_parents);

-static OXNAS_GATE(ox810se_dma_sgdma, 1, osc_parents);

-static OXNAS_GATE(ox810se_cipher, 2, osc_parents);

-static OXNAS_GATE(ox810se_sata, 4, osc_parents);

-static OXNAS_GATE(ox810se_audio, 5, osc_parents);

-static OXNAS_GATE(ox810se_usbmph, 6, osc_parents);

-static OXNAS_GATE(ox810se_etha, 7, eth_parents);

-static OXNAS_GATE(ox810se_pciea, 8, osc_parents);

-static OXNAS_GATE(ox810se_nand, 9, osc_parents);

-static struct clk_oxnas_gate *ox810se_gates[] = {

- &ox810se_dma_sgdma,

-static OXNAS_GATE(ox820_leon, 0, osc_parents);

-static OXNAS_GATE(ox820_dma_sgdma, 1, osc_parents);

-static OXNAS_GATE(ox820_cipher, 2, osc_parents);

-static OXNAS_GATE(ox820_sd, 3, osc_parents);

-static OXNAS_GATE(ox820_sata, 4, osc_parents);

-static OXNAS_GATE(ox820_audio, 5, osc_parents);

-static OXNAS_GATE(ox820_usbmph, 6, osc_parents);

-static OXNAS_GATE(ox820_etha, 7, eth_parents);

-static OXNAS_GATE(ox820_pciea, 8, osc_parents);

-static OXNAS_GATE(ox820_nand, 9, osc_parents);

-static OXNAS_GATE(ox820_ethb, 10, eth_parents);

-static OXNAS_GATE(ox820_pcieb, 11, osc_parents);

-static OXNAS_GATE(ox820_ref600, 12, osc_parents);

-static OXNAS_GATE(ox820_usbdev, 13, osc_parents);

-static struct clk_oxnas_gate *ox820_gates[] = {

-static struct clk_hw_onecell_data ox810se_hw_onecell_data = {

- [CLK_810_LEON] = &ox810se_leon.hw,

- [CLK_810_DMA_SGDMA] = &ox810se_dma_sgdma.hw,

- [CLK_810_CIPHER] = &ox810se_cipher.hw,

- [CLK_810_SATA] = &ox810se_sata.hw,

- [CLK_810_AUDIO] = &ox810se_audio.hw,

- [CLK_810_USBMPH] = &ox810se_usbmph.hw,

- [CLK_810_ETHA] = &ox810se_etha.hw,

- [CLK_810_PCIEA] = &ox810se_pciea.hw,

- [CLK_810_NAND] = &ox810se_nand.hw,

- .num = ARRAY_SIZE(ox810se_gates),

-static struct clk_hw_onecell_data ox820_hw_onecell_data = {

- [CLK_820_LEON] = &ox820_leon.hw,

- [CLK_820_DMA_SGDMA] = &ox820_dma_sgdma.hw,

- [CLK_820_CIPHER] = &ox820_cipher.hw,

- [CLK_820_SD] = &ox820_sd.hw,

- [CLK_820_SATA] = &ox820_sata.hw,

- [CLK_820_AUDIO] = &ox820_audio.hw,

- [CLK_820_USBMPH] = &ox820_usbmph.hw,

- [CLK_820_ETHA] = &ox820_etha.hw,

- [CLK_820_PCIEA] = &ox820_pciea.hw,

- [CLK_820_NAND] = &ox820_nand.hw,

- [CLK_820_ETHB] = &ox820_ethb.hw,

- [CLK_820_PCIEB] = &ox820_pcieb.hw,

- [CLK_820_REF600] = &ox820_ref600.hw,

- [CLK_820_USBDEV] = &ox820_usbdev.hw,

- .num = ARRAY_SIZE(ox820_gates),

-static struct oxnas_stdclk_data ox810se_stdclk_data = {

- .onecell_data = &ox810se_hw_onecell_data,

- .gates = ox810se_gates,

- .ngates = ARRAY_SIZE(ox810se_gates),

-static struct oxnas_stdclk_data ox820_stdclk_data = {

- .onecell_data = &ox820_hw_onecell_data,

- .gates = ox820_gates,

- .ngates = ARRAY_SIZE(ox820_gates),

-static const struct of_device_id oxnas_stdclk_dt_ids[] = {

- { .compatible = "oxsemi,ox810se-stdclk", &ox810se_stdclk_data },

- { .compatible = "oxsemi,ox820-stdclk", &ox820_stdclk_data },

-static int oxnas_stdclk_probe(struct platform_device *pdev)

- struct device_node *np = pdev->dev.of_node, *parent_np;

- const struct oxnas_stdclk_data *data;

- struct regmap *regmap;

- data = of_device_get_match_data(&pdev->dev);

- parent_np = of_get_parent(np);

- regmap = syscon_node_to_regmap(parent_np);

- of_node_put(parent_np);

- if (IS_ERR(regmap)) {

- dev_err(&pdev->dev, "failed to have parent regmap\n");

- return PTR_ERR(regmap);

- for (i = 0 ; i < data->ngates ; ++i)

- data->gates[i]->regmap = regmap;

- for (i = 0; i < data->onecell_data->num; i++) {

- if (!data->onecell_data->hws[i])

- ret = devm_clk_hw_register(&pdev->dev,

- data->onecell_data->hws[i]);

- return of_clk_add_hw_provider(np, of_clk_hw_onecell_get,

- data->onecell_data);

-static struct platform_driver oxnas_stdclk_driver = {

- .probe = oxnas_stdclk_probe,

- .name = "oxnas-stdclk",

- .suppress_bind_attrs = true,

- .of_match_table = oxnas_stdclk_dt_ids,

-builtin_platform_driver(oxnas_stdclk_driver);

-#include <linux/of_device.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of_platform.h>

- clk_data->num = CLK_MAX;

-#include <linux/of_platform.h>

- vc5->chip_info = device_get_match_data(&client->dev);

-#include <linux/of_platform.h>

- vc7->chip_info = device_get_match_data(&client->dev);

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-obj-$(CONFIG_MXC_CLK_SCU) += clk-imx-scu.o clk-imx-lpcg-scu.o

- val = readl(divider->reg);

- val &= ~((clk_div_mask(divider->width) << divider->shift) |

- (clk_div_mask(PCG_DIV_WIDTH) << PCG_DIV_SHIFT));

- writel(val, divider->reg);

-static int imx_clk_gpr_mux_determine_rate(struct clk_hw *hw,

- struct clk_rate_request *req)

- return clk_mux_determine_rate_flags(hw, req, 0);

- .determine_rate = imx_clk_gpr_mux_determine_rate,

-static int __init __mx25_clocks_init(void __iomem *ccm_base)

-static const char * const imx8mp_sai4_sels[] = {"osc_24m", "audio_pll1_out", "audio_pll2_out",

- "video_pll1_out", "sys_pll1_133m", "osc_hdmi",

- "clk_ext1", "clk_ext2", };

- hws[IMX8MP_CLK_SAI4] = imx8m_clk_hw_composite("sai4", imx8mp_sai4_sels, ccm_base + 0xa700);

-#include <linux/of_address.h>

-#include <linux/of_device.h>

- struct resource *res;

- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- base = devm_ioremap_resource(&pdev->dev, res);

-#include <linux/of_device.h>

- clks[IMX8ULP_CLK_SPLL2] = imx_clk_hw_pllv4(IMX_PLLV4_IMX8ULP, "spll2", "spll2_pre_sel", base + 0x500);

- { IMX93_CLK_PDM_GATE, "pdm", "pdm_root", 0x9ac0, },

- PLL_1443X_RATE(393216000U, 262, 2, 3, 9437),

- PLL_1443X_RATE(361267200U, 361, 3, 3, 17511),

- * a) 6MHz <= prate <= 25MHz

- * b) 1 <= p <= 63 (1 <= p <= 4 prate = 24MHz)

- * c) 64 <= m <= 1023

- * e) -32768 <= k <= 32767

- for (pdiv = 1; pdiv <= 7; pdiv++) {

- for (i = 0; i < ARRAY_SIZE(pllv4_mult_table); i++) {

- round_rate = parent_rate * pllv4_mult_table[i];

- if (rate >= round_rate) {

-static bool clk_pllv4_is_valid_mult(unsigned int mult)

- for (i = 0; i < ARRAY_SIZE(pllv4_mult_table); i++) {

- if (pllv4_mult_table[i] == mult)

- if (!clk_pllv4_is_valid_mult(mult))

- if (type == IMX_PLLV4_IMX8ULP) {

-#include <linux/of_platform.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

- struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- base = devm_ioremap_resource(&pdev->dev, res);

- struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- base = devm_ioremap_resource(&pdev->dev, res);

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

- struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- base = devm_ioremap_resource(&pdev->dev, res);

- if (IS_ERR(base)) {

- pr_err("%s(): ioremap failed\n", __func__);

- struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- base = devm_ioremap_resource(&pdev->dev, res);

- if (IS_ERR(base)) {

- pr_err("%s(): ioremap failed\n", __func__);

- struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

- base = devm_ioremap_resource(&pdev->dev, res);

- if (IS_ERR(base)) {

- pr_err("%s(): ioremap failed\n", __func__);

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/of_device.h>

-static struct clk_hw_onecell_data a1_periphs_clks = {

- [CLKID_XTAL_IN] = &xtal_in.hw,

- [CLKID_FIXPLL_IN] = &fixpll_in.hw,

- [CLKID_USB_PHY_IN] = &usb_phy_in.hw,

- [CLKID_USB_CTRL_IN] = &usb_ctrl_in.hw,

- [CLKID_HIFIPLL_IN] = &hifipll_in.hw,

- [CLKID_SYSPLL_IN] = &syspll_in.hw,

- [CLKID_DDS_IN] = &dds_in.hw,

- [CLKID_SYS] = &sys.hw,

- [CLKID_CLKTREE] = &clktree.hw,

- [CLKID_RESET_CTRL] = &reset_ctrl.hw,

- [CLKID_ANALOG_CTRL] = &analog_ctrl.hw,

- [CLKID_PWR_CTRL] = &pwr_ctrl.hw,

- [CLKID_PAD_CTRL] = &pad_ctrl.hw,

- [CLKID_SYS_CTRL] = &sys_ctrl.hw,

- [CLKID_TEMP_SENSOR] = &temp_sensor.hw,

- [CLKID_AM2AXI_DIV] = &am2axi_dev.hw,

- [CLKID_SPICC_B] = &spicc_b.hw,

- [CLKID_SPICC_A] = &spicc_a.hw,

- [CLKID_MSR] = &msr.hw,

- [CLKID_AUDIO] = &audio.hw,

- [CLKID_JTAG_CTRL] = &jtag_ctrl.hw,

- [CLKID_SARADC_EN] = &saradc_en.hw,

- [CLKID_PWM_EF] = &pwm_ef.hw,

- [CLKID_PWM_CD] = &pwm_cd.hw,

- [CLKID_PWM_AB] = &pwm_ab.hw,

- [CLKID_CEC] = &cec.hw,

- [CLKID_I2C_S] = &i2c_s.hw,

- [CLKID_IR_CTRL] = &ir_ctrl.hw,

- [CLKID_I2C_M_D] = &i2c_m_d.hw,

- [CLKID_I2C_M_C] = &i2c_m_c.hw,

- [CLKID_I2C_M_B] = &i2c_m_b.hw,

- [CLKID_I2C_M_A] = &i2c_m_a.hw,

- [CLKID_ACODEC] = &acodec.hw,

- [CLKID_OTP] = &otp.hw,

- [CLKID_SD_EMMC_A] = &sd_emmc_a.hw,

- [CLKID_USB_PHY] = &usb_phy.hw,

- [CLKID_USB_CTRL] = &usb_ctrl.hw,

- [CLKID_SYS_DSPB] = &sys_dspb.hw,

- [CLKID_SYS_DSPA] = &sys_dspa.hw,

- [CLKID_DMA] = &dma.hw,

- [CLKID_IRQ_CTRL] = &irq_ctrl.hw,

- [CLKID_NIC] = &nic.hw,

- [CLKID_GIC] = &gic.hw,

- [CLKID_UART_C] = &uart_c.hw,

- [CLKID_UART_B] = &uart_b.hw,

- [CLKID_UART_A] = &uart_a.hw,

- [CLKID_SYS_PSRAM] = &sys_psram.hw,

- [CLKID_RSA] = &rsa.hw,

- [CLKID_CORESIGHT] = &coresight.hw,

- [CLKID_AM2AXI_VAD] = &am2axi_vad.hw,

- [CLKID_AUDIO_VAD] = &audio_vad.hw,

- [CLKID_AXI_DMC] = &axi_dmc.hw,

- [CLKID_AXI_PSRAM] = &axi_psram.hw,

- [CLKID_RAMB] = &ramb.hw,

- [CLKID_RAMA] = &rama.hw,

- [CLKID_AXI_SPIFC] = &axi_spifc.hw,

- [CLKID_AXI_NIC] = &axi_nic.hw,

- [CLKID_AXI_DMA] = &axi_dma.hw,

- [CLKID_CPU_CTRL] = &cpu_ctrl.hw,

- [CLKID_ROM] = &rom.hw,

- [CLKID_PROC_I2C] = &prod_i2c.hw,

- [CLKID_DSPA_SEL] = &dspa_sel.hw,

- [CLKID_DSPB_SEL] = &dspb_sel.hw,

- [CLKID_DSPA_EN] = &dspa_en.hw,

- [CLKID_DSPA_EN_NIC] = &dspa_en_nic.hw,

- [CLKID_DSPB_EN] = &dspb_en.hw,

- [CLKID_DSPB_EN_NIC] = &dspb_en_nic.hw,

- [CLKID_RTC] = &rtc.hw,

- [CLKID_CECA_32K] = &ceca_32k_out.hw,

- [CLKID_CECB_32K] = &cecb_32k_out.hw,

- [CLKID_24M] = &clk_24m.hw,

- [CLKID_12M] = &clk_12m.hw,

- [CLKID_FCLK_DIV2_DIVN] = &fclk_div2_divn.hw,

- [CLKID_GEN] = &gen.hw,

- [CLKID_SARADC_SEL] = &saradc_sel.hw,

- [CLKID_SARADC] = &saradc.hw,

- [CLKID_PWM_A] = &pwm_a.hw,

- [CLKID_PWM_B] = &pwm_b.hw,

- [CLKID_PWM_C] = &pwm_c.hw,

- [CLKID_PWM_D] = &pwm_d.hw,

- [CLKID_PWM_E] = &pwm_e.hw,

- [CLKID_PWM_F] = &pwm_f.hw,

- [CLKID_SPICC] = &spicc.hw,

- [CLKID_TS] = &ts.hw,

- [CLKID_SPIFC] = &spifc.hw,

- [CLKID_USB_BUS] = &usb_bus.hw,

- [CLKID_SD_EMMC] = &sd_emmc.hw,

- [CLKID_PSRAM] = &psram.hw,

- [CLKID_DMC] = &dmc.hw,

- [CLKID_SYS_A_SEL] = &sys_a_sel.hw,

- [CLKID_SYS_A_DIV] = &sys_a_div.hw,

- [CLKID_SYS_A] = &sys_a.hw,

- [CLKID_SYS_B_SEL] = &sys_b_sel.hw,

- [CLKID_SYS_B_DIV] = &sys_b_div.hw,

- [CLKID_SYS_B] = &sys_b.hw,

- [CLKID_DSPA_A_SEL] = &dspa_a_sel.hw,

- [CLKID_DSPA_A_DIV] = &dspa_a_div.hw,

- [CLKID_DSPA_A] = &dspa_a.hw,

- [CLKID_DSPA_B_SEL] = &dspa_b_sel.hw,

- [CLKID_DSPA_B_DIV] = &dspa_b_div.hw,

- [CLKID_DSPA_B] = &dspa_b.hw,

- [CLKID_DSPB_A_SEL] = &dspb_a_sel.hw,

- [CLKID_DSPB_A_DIV] = &dspb_a_div.hw,

- [CLKID_DSPB_A] = &dspb_a.hw,

- [CLKID_DSPB_B_SEL] = &dspb_b_sel.hw,

- [CLKID_DSPB_B_DIV] = &dspb_b_div.hw,

- [CLKID_DSPB_B] = &dspb_b.hw,

- [CLKID_RTC_32K_IN] = &rtc_32k_in.hw,

- [CLKID_RTC_32K_DIV] = &rtc_32k_div.hw,

- [CLKID_RTC_32K_XTAL] = &rtc_32k_xtal.hw,

- [CLKID_RTC_32K_SEL] = &rtc_32k_sel.hw,

- [CLKID_CECB_32K_IN] = &cecb_32k_in.hw,

- [CLKID_CECB_32K_DIV] = &cecb_32k_div.hw,

- [CLKID_CECB_32K_SEL_PRE] = &cecb_32k_sel_pre.hw,

- [CLKID_CECB_32K_SEL] = &cecb_32k_sel.hw,

- [CLKID_CECA_32K_IN] = &ceca_32k_in.hw,

- [CLKID_CECA_32K_DIV] = &ceca_32k_div.hw,

- [CLKID_CECA_32K_SEL_PRE] = &ceca_32k_sel_pre.hw,

- [CLKID_CECA_32K_SEL] = &ceca_32k_sel.hw,

- [CLKID_DIV2_PRE] = &fclk_div2_divn_pre.hw,

- [CLKID_24M_DIV2] = &clk_24m_div2.hw,

- [CLKID_GEN_SEL] = &gen_sel.hw,

- [CLKID_GEN_DIV] = &gen_div.hw,

- [CLKID_SARADC_DIV] = &saradc_div.hw,

- [CLKID_PWM_A_SEL] = &pwm_a_sel.hw,

- [CLKID_PWM_A_DIV] = &pwm_a_div.hw,

- [CLKID_PWM_B_SEL] = &pwm_b_sel.hw,

- [CLKID_PWM_B_DIV] = &pwm_b_div.hw,

- [CLKID_PWM_C_SEL] = &pwm_c_sel.hw,

- [CLKID_PWM_C_DIV] = &pwm_c_div.hw,

- [CLKID_PWM_D_SEL] = &pwm_d_sel.hw,

- [CLKID_PWM_D_DIV] = &pwm_d_div.hw,

- [CLKID_PWM_E_SEL] = &pwm_e_sel.hw,

- [CLKID_PWM_E_DIV] = &pwm_e_div.hw,

- [CLKID_PWM_F_SEL] = &pwm_f_sel.hw,

- [CLKID_PWM_F_DIV] = &pwm_f_div.hw,

- [CLKID_SPICC_SEL] = &spicc_sel.hw,

- [CLKID_SPICC_DIV] = &spicc_div.hw,

- [CLKID_SPICC_SEL2] = &spicc_sel2.hw,

- [CLKID_TS_DIV] = &ts_div.hw,

- [CLKID_SPIFC_SEL] = &spifc_sel.hw,

- [CLKID_SPIFC_DIV] = &spifc_div.hw,

- [CLKID_SPIFC_SEL2] = &spifc_sel2.hw,

- [CLKID_USB_BUS_SEL] = &usb_bus_sel.hw,

- [CLKID_USB_BUS_DIV] = &usb_bus_div.hw,

- [CLKID_SD_EMMC_SEL] = &sd_emmc_sel.hw,

- [CLKID_SD_EMMC_DIV] = &sd_emmc_div.hw,

- [CLKID_SD_EMMC_SEL2] = &sd_emmc_sel2.hw,

- [CLKID_PSRAM_SEL] = &psram_sel.hw,

- [CLKID_PSRAM_DIV] = &psram_div.hw,

- [CLKID_PSRAM_SEL2] = &psram_sel2.hw,

- [CLKID_DMC_SEL] = &dmc_sel.hw,

- [CLKID_DMC_DIV] = &dmc_div.hw,

- [CLKID_DMC_SEL2] = &dmc_sel2.hw,

- return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,

- &a1_periphs_clks);

-/* include the CLKIDs that have been made part of the DT binding */

-#include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h>

- * CLKID index values for internal clocks

- * These indices are entirely contrived and do not map onto the hardware.

- * It has now been decided to expose everything by default in the DT header:

- * include/dt-bindings/clock/a1-peripherals-clkc.h.

- * Only the clocks ids we don't want to expose, such as the internal muxes and

- * dividers of composite clocks, will remain defined here.

-#define CLKID_XTAL_IN 0

-#define CLKID_DSPA_SEL 61

-#define CLKID_DSPB_SEL 62

-#define CLKID_SARADC_SEL 74

-#define CLKID_SYS_A_SEL 89

-#define CLKID_SYS_A_DIV 90

-#define CLKID_SYS_A 91

-#define CLKID_SYS_B_SEL 92

-#define CLKID_SYS_B_DIV 93

-#define CLKID_SYS_B 94

-#define CLKID_DSPA_A_DIV 96

-#define CLKID_DSPA_A 97

-#define CLKID_DSPA_B_DIV 99

-#define CLKID_DSPA_B 100

-#define CLKID_DSPB_A_DIV 102

-#define CLKID_DSPB_A 103

-#define CLKID_DSPB_B_DIV 105

-#define CLKID_DSPB_B 106

-#define CLKID_RTC_32K_IN 107

-#define CLKID_RTC_32K_DIV 108

-#define CLKID_RTC_32K_XTAL 109

-#define CLKID_RTC_32K_SEL 110

-#define CLKID_CECB_32K_IN 111

-#define CLKID_CECB_32K_DIV 112

-#define CLKID_CECA_32K_IN 115

-#define CLKID_CECA_32K_DIV 116

-#define CLKID_DIV2_PRE 119

-#define CLKID_24M_DIV2 120

-#define CLKID_GEN_DIV 122

-#define CLKID_SARADC_DIV 123

-#define CLKID_PWM_A_DIV 125

-#define CLKID_PWM_B_DIV 127

-#define CLKID_PWM_C_DIV 129

-#define CLKID_PWM_D_DIV 131

-#define CLKID_PWM_E_DIV 133

-#define CLKID_PWM_F_DIV 135

-#define CLKID_SPICC_SEL 136

-#define CLKID_SPICC_DIV 137

-#define CLKID_SPICC_SEL2 138

-#define CLKID_TS_DIV 139

-#define CLKID_SPIFC_SEL 140

-#define CLKID_SPIFC_DIV 141

-#define CLKID_SPIFC_SEL2 142

-#define CLKID_USB_BUS_SEL 143

-#define CLKID_USB_BUS_DIV 144

-#define CLKID_SD_EMMC_SEL 145

-#define CLKID_SD_EMMC_DIV 146

-#define CLKID_PSRAM_SEL 148

-#define CLKID_PSRAM_DIV 149

-#define CLKID_PSRAM_SEL2 150

-#define CLKID_DMC_SEL 151

-#define CLKID_DMC_DIV 152

-#define CLKID_DMC_SEL2 153

-#define NR_CLKS 154

-#include <linux/of_device.h>

-static struct clk_hw_onecell_data a1_pll_clks = {

- [CLKID_FIXED_PLL_DCO] = &fixed_pll_dco.hw,

- [CLKID_FIXED_PLL] = &fixed_pll.hw,

- [CLKID_FCLK_DIV2_DIV] = &fclk_div2_div.hw,

- [CLKID_FCLK_DIV3_DIV] = &fclk_div3_div.hw,

- [CLKID_FCLK_DIV5_DIV] = &fclk_div5_div.hw,

- [CLKID_FCLK_DIV7_DIV] = &fclk_div7_div.hw,

- [CLKID_FCLK_DIV2] = &fclk_div2.hw,

- [CLKID_FCLK_DIV3] = &fclk_div3.hw,

- [CLKID_FCLK_DIV5] = &fclk_div5.hw,

- [CLKID_FCLK_DIV7] = &fclk_div7.hw,

- [CLKID_HIFI_PLL] = &hifi_pll.hw,

- [NR_PLL_CLKS] = NULL,

- .num = NR_PLL_CLKS,

- return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,

-/* include the CLKIDs that have been made part of the DT binding */

-#include <dt-bindings/clock/amlogic,a1-pll-clkc.h>

- * CLKID index values for internal clocks

- * These indices are entirely contrived and do not map onto the hardware.

- * It has now been decided to expose everything by default in the DT header:

- * include/dt-bindings/clock/a1-pll-clkc.h. Only the clocks ids we don't want

- * to expose, such as the internal muxes and dividers of composite clocks,

- * will remain defined here.

-#define CLKID_FIXED_PLL_DCO 0

-#define CLKID_FCLK_DIV2_DIV 2

-#define CLKID_FCLK_DIV3_DIV 3

-#define CLKID_FCLK_DIV5_DIV 4

-#define CLKID_FCLK_DIV7_DIV 5

-#define NR_PLL_CLKS 11

-#include "axg-aoclk.h"

-static const struct clk_hw_onecell_data axg_aoclk_onecell_data = {

- [CLKID_AO_REMOTE] = &axg_aoclk_remote.hw,

- [CLKID_AO_I2C_MASTER] = &axg_aoclk_i2c_master.hw,

- [CLKID_AO_I2C_SLAVE] = &axg_aoclk_i2c_slave.hw,

- [CLKID_AO_UART1] = &axg_aoclk_uart1.hw,

- [CLKID_AO_UART2] = &axg_aoclk_uart2.hw,

- [CLKID_AO_IR_BLASTER] = &axg_aoclk_ir_blaster.hw,

- [CLKID_AO_SAR_ADC] = &axg_aoclk_saradc.hw,

- [CLKID_AO_CLK81] = &axg_aoclk_clk81.hw,

- [CLKID_AO_SAR_ADC_SEL] = &axg_aoclk_saradc_mux.hw,

- [CLKID_AO_SAR_ADC_DIV] = &axg_aoclk_saradc_div.hw,

- [CLKID_AO_SAR_ADC_CLK] = &axg_aoclk_saradc_gate.hw,

- [CLKID_AO_CTS_OSCIN] = &axg_aoclk_cts_oscin.hw,

- [CLKID_AO_32K_PRE] = &axg_aoclk_32k_pre.hw,

- [CLKID_AO_32K_DIV] = &axg_aoclk_32k_div.hw,

- [CLKID_AO_32K_SEL] = &axg_aoclk_32k_sel.hw,

- [CLKID_AO_32K] = &axg_aoclk_32k.hw,

- [CLKID_AO_CTS_RTC_OSCIN] = &axg_aoclk_cts_rtc_oscin.hw,

- .hw_data = &axg_aoclk_onecell_data,

-/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */

- * Author: Neil Armstrong <narmstrong@baylibre.com>

- * Author: Qiufang Dai <qiufang.dai@amlogic.com>

-#ifndef __AXG_AOCLKC_H

-#define __AXG_AOCLKC_H

-#include <dt-bindings/clock/axg-aoclkc.h>

-#include <dt-bindings/reset/axg-aoclkc.h>

-#endif /* __AXG_AOCLKC_H */

-#include <linux/of_device.h>

-static struct clk_hw_onecell_data axg_audio_hw_onecell_data = {

- [AUD_CLKID_DDR_ARB] = &ddr_arb.hw,

- [AUD_CLKID_PDM] = &pdm.hw,

- [AUD_CLKID_TDMIN_A] = &tdmin_a.hw,

- [AUD_CLKID_TDMIN_B] = &tdmin_b.hw,

- [AUD_CLKID_TDMIN_C] = &tdmin_c.hw,

- [AUD_CLKID_TDMIN_LB] = &tdmin_lb.hw,

- [AUD_CLKID_TDMOUT_A] = &tdmout_a.hw,

- [AUD_CLKID_TDMOUT_B] = &tdmout_b.hw,

- [AUD_CLKID_TDMOUT_C] = &tdmout_c.hw,

- [AUD_CLKID_FRDDR_A] = &frddr_a.hw,

- [AUD_CLKID_FRDDR_B] = &frddr_b.hw,

- [AUD_CLKID_FRDDR_C] = &frddr_c.hw,

- [AUD_CLKID_TODDR_A] = &toddr_a.hw,

- [AUD_CLKID_TODDR_B] = &toddr_b.hw,

- [AUD_CLKID_TODDR_C] = &toddr_c.hw,

- [AUD_CLKID_LOOPBACK] = &loopback.hw,

- [AUD_CLKID_SPDIFIN] = &spdifin.hw,

- [AUD_CLKID_SPDIFOUT] = &spdifout.hw,

- [AUD_CLKID_RESAMPLE] = &resample.hw,

- [AUD_CLKID_POWER_DETECT] = &power_detect.hw,

- [AUD_CLKID_MST_A_MCLK_SEL] = &mst_a_mclk_sel.hw,

- [AUD_CLKID_MST_B_MCLK_SEL] = &mst_b_mclk_sel.hw,

- [AUD_CLKID_MST_C_MCLK_SEL] = &mst_c_mclk_sel.hw,

- [AUD_CLKID_MST_D_MCLK_SEL] = &mst_d_mclk_sel.hw,

- [AUD_CLKID_MST_E_MCLK_SEL] = &mst_e_mclk_sel.hw,

- [AUD_CLKID_MST_F_MCLK_SEL] = &mst_f_mclk_sel.hw,

- [AUD_CLKID_MST_A_MCLK_DIV] = &mst_a_mclk_div.hw,

- [AUD_CLKID_MST_B_MCLK_DIV] = &mst_b_mclk_div.hw,

- [AUD_CLKID_MST_C_MCLK_DIV] = &mst_c_mclk_div.hw,

- [AUD_CLKID_MST_D_MCLK_DIV] = &mst_d_mclk_div.hw,

- [AUD_CLKID_MST_E_MCLK_DIV] = &mst_e_mclk_div.hw,

- [AUD_CLKID_MST_F_MCLK_DIV] = &mst_f_mclk_div.hw,

- [AUD_CLKID_MST_A_MCLK] = &mst_a_mclk.hw,

- [AUD_CLKID_MST_B_MCLK] = &mst_b_mclk.hw,

- [AUD_CLKID_MST_C_MCLK] = &mst_c_mclk.hw,

- [AUD_CLKID_MST_D_MCLK] = &mst_d_mclk.hw,

- [AUD_CLKID_MST_E_MCLK] = &mst_e_mclk.hw,

- [AUD_CLKID_MST_F_MCLK] = &mst_f_mclk.hw,

- [AUD_CLKID_SPDIFOUT_CLK_SEL] = &spdifout_clk_sel.hw,

- [AUD_CLKID_SPDIFOUT_CLK_DIV] = &spdifout_clk_div.hw,

- [AUD_CLKID_SPDIFOUT_CLK] = &spdifout_clk.hw,

- [AUD_CLKID_SPDIFIN_CLK_SEL] = &spdifin_clk_sel.hw,

- [AUD_CLKID_SPDIFIN_CLK_DIV] = &spdifin_clk_div.hw,

- [AUD_CLKID_SPDIFIN_CLK] = &spdifin_clk.hw,

- [AUD_CLKID_PDM_DCLK_SEL] = &pdm_dclk_sel.hw,

- [AUD_CLKID_PDM_DCLK_DIV] = &pdm_dclk_div.hw,

- [AUD_CLKID_PDM_DCLK] = &pdm_dclk.hw,

- [AUD_CLKID_PDM_SYSCLK_SEL] = &pdm_sysclk_sel.hw,

- [AUD_CLKID_PDM_SYSCLK_DIV] = &pdm_sysclk_div.hw,

- [AUD_CLKID_PDM_SYSCLK] = &pdm_sysclk.hw,

- [AUD_CLKID_MST_A_SCLK_PRE_EN] = &mst_a_sclk_pre_en.hw,

- [AUD_CLKID_MST_B_SCLK_PRE_EN] = &mst_b_sclk_pre_en.hw,

- [AUD_CLKID_MST_C_SCLK_PRE_EN] = &mst_c_sclk_pre_en.hw,

- [AUD_CLKID_MST_D_SCLK_PRE_EN] = &mst_d_sclk_pre_en.hw,

- [AUD_CLKID_MST_E_SCLK_PRE_EN] = &mst_e_sclk_pre_en.hw,

- [AUD_CLKID_MST_F_SCLK_PRE_EN] = &mst_f_sclk_pre_en.hw,

- [AUD_CLKID_MST_A_SCLK_DIV] = &mst_a_sclk_div.hw,

- [AUD_CLKID_MST_B_SCLK_DIV] = &mst_b_sclk_div.hw,

- [AUD_CLKID_MST_C_SCLK_DIV] = &mst_c_sclk_div.hw,

- [AUD_CLKID_MST_D_SCLK_DIV] = &mst_d_sclk_div.hw,

- [AUD_CLKID_MST_E_SCLK_DIV] = &mst_e_sclk_div.hw,

- [AUD_CLKID_MST_F_SCLK_DIV] = &mst_f_sclk_div.hw,

- [AUD_CLKID_MST_A_SCLK_POST_EN] = &mst_a_sclk_post_en.hw,

- [AUD_CLKID_MST_B_SCLK_POST_EN] = &mst_b_sclk_post_en.hw,

- [AUD_CLKID_MST_C_SCLK_POST_EN] = &mst_c_sclk_post_en.hw,

- [AUD_CLKID_MST_D_SCLK_POST_EN] = &mst_d_sclk_post_en.hw,

- [AUD_CLKID_MST_E_SCLK_POST_EN] = &mst_e_sclk_post_en.hw,

- [AUD_CLKID_MST_F_SCLK_POST_EN] = &mst_f_sclk_post_en.hw,

- [AUD_CLKID_MST_A_SCLK] = &mst_a_sclk.hw,

- [AUD_CLKID_MST_B_SCLK] = &mst_b_sclk.hw,

- [AUD_CLKID_MST_C_SCLK] = &mst_c_sclk.hw,

- [AUD_CLKID_MST_D_SCLK] = &mst_d_sclk.hw,

- [AUD_CLKID_MST_E_SCLK] = &mst_e_sclk.hw,

- [AUD_CLKID_MST_F_SCLK] = &mst_f_sclk.hw,

- [AUD_CLKID_MST_A_LRCLK_DIV] = &mst_a_lrclk_div.hw,

- [AUD_CLKID_MST_B_LRCLK_DIV] = &mst_b_lrclk_div.hw,

- [AUD_CLKID_MST_C_LRCLK_DIV] = &mst_c_lrclk_div.hw,

- [AUD_CLKID_MST_D_LRCLK_DIV] = &mst_d_lrclk_div.hw,

- [AUD_CLKID_MST_E_LRCLK_DIV] = &mst_e_lrclk_div.hw,

- [AUD_CLKID_MST_F_LRCLK_DIV] = &mst_f_lrclk_div.hw,

- [AUD_CLKID_MST_A_LRCLK] = &mst_a_lrclk.hw,

- [AUD_CLKID_MST_B_LRCLK] = &mst_b_lrclk.hw,

- [AUD_CLKID_MST_C_LRCLK] = &mst_c_lrclk.hw,

- [AUD_CLKID_MST_D_LRCLK] = &mst_d_lrclk.hw,

- [AUD_CLKID_MST_E_LRCLK] = &mst_e_lrclk.hw,

- [AUD_CLKID_MST_F_LRCLK] = &mst_f_lrclk.hw,

- [AUD_CLKID_TDMIN_A_SCLK_SEL] = &tdmin_a_sclk_sel.hw,

- [AUD_CLKID_TDMIN_B_SCLK_SEL] = &tdmin_b_sclk_sel.hw,

- [AUD_CLKID_TDMIN_C_SCLK_SEL] = &tdmin_c_sclk_sel.hw,

- [AUD_CLKID_TDMIN_LB_SCLK_SEL] = &tdmin_lb_sclk_sel.hw,

- [AUD_CLKID_TDMOUT_A_SCLK_SEL] = &tdmout_a_sclk_sel.hw,

- [AUD_CLKID_TDMOUT_B_SCLK_SEL] = &tdmout_b_sclk_sel.hw,

- [AUD_CLKID_TDMOUT_C_SCLK_SEL] = &tdmout_c_sclk_sel.hw,

- [AUD_CLKID_TDMIN_A_SCLK_PRE_EN] = &tdmin_a_sclk_pre_en.hw,

- [AUD_CLKID_TDMIN_B_SCLK_PRE_EN] = &tdmin_b_sclk_pre_en.hw,

- [AUD_CLKID_TDMIN_C_SCLK_PRE_EN] = &tdmin_c_sclk_pre_en.hw,

- [AUD_CLKID_TDMIN_LB_SCLK_PRE_EN] = &tdmin_lb_sclk_pre_en.hw,

- [AUD_CLKID_TDMOUT_A_SCLK_PRE_EN] = &tdmout_a_sclk_pre_en.hw,

- [AUD_CLKID_TDMOUT_B_SCLK_PRE_EN] = &tdmout_b_sclk_pre_en.hw,

- [AUD_CLKID_TDMOUT_C_SCLK_PRE_EN] = &tdmout_c_sclk_pre_en.hw,

- [AUD_CLKID_TDMIN_A_SCLK_POST_EN] = &tdmin_a_sclk_post_en.hw,

- [AUD_CLKID_TDMIN_B_SCLK_POST_EN] = &tdmin_b_sclk_post_en.hw,

- [AUD_CLKID_TDMIN_C_SCLK_POST_EN] = &tdmin_c_sclk_post_en.hw,

- [AUD_CLKID_TDMIN_LB_SCLK_POST_EN] = &tdmin_lb_sclk_post_en.hw,

- [AUD_CLKID_TDMOUT_A_SCLK_POST_EN] = &tdmout_a_sclk_post_en.hw,

- [AUD_CLKID_TDMOUT_B_SCLK_POST_EN] = &tdmout_b_sclk_post_en.hw,

- [AUD_CLKID_TDMOUT_C_SCLK_POST_EN] = &tdmout_c_sclk_post_en.hw,

- [AUD_CLKID_TDMIN_A_SCLK] = &tdmin_a_sclk.hw,

- [AUD_CLKID_TDMIN_B_SCLK] = &tdmin_b_sclk.hw,

- [AUD_CLKID_TDMIN_C_SCLK] = &tdmin_c_sclk.hw,

- [AUD_CLKID_TDMIN_LB_SCLK] = &tdmin_lb_sclk.hw,

- [AUD_CLKID_TDMOUT_A_SCLK] = &axg_tdmout_a_sclk.hw,

- [AUD_CLKID_TDMOUT_B_SCLK] = &axg_tdmout_b_sclk.hw,

- [AUD_CLKID_TDMOUT_C_SCLK] = &axg_tdmout_c_sclk.hw,

- [AUD_CLKID_TDMIN_A_LRCLK] = &tdmin_a_lrclk.hw,

- [AUD_CLKID_TDMIN_B_LRCLK] = &tdmin_b_lrclk.hw,

- [AUD_CLKID_TDMIN_C_LRCLK] = &tdmin_c_lrclk.hw,

- [AUD_CLKID_TDMIN_LB_LRCLK] = &tdmin_lb_lrclk.hw,

- [AUD_CLKID_TDMOUT_A_LRCLK] = &tdmout_a_lrclk.hw,

- [AUD_CLKID_TDMOUT_B_LRCLK] = &tdmout_b_lrclk.hw,

- [AUD_CLKID_TDMOUT_C_LRCLK] = &tdmout_c_lrclk.hw,

- [AUD_CLKID_TOP] = &axg_aud_top,

-static struct clk_hw_onecell_data g12a_audio_hw_onecell_data = {

- [AUD_CLKID_DDR_ARB] = &ddr_arb.hw,

- [AUD_CLKID_PDM] = &pdm.hw,

- [AUD_CLKID_TDMIN_A] = &tdmin_a.hw,

- [AUD_CLKID_TDMIN_B] = &tdmin_b.hw,

- [AUD_CLKID_TDMIN_C] = &tdmin_c.hw,

- [AUD_CLKID_TDMIN_LB] = &tdmin_lb.hw,

- [AUD_CLKID_TDMOUT_A] = &tdmout_a.hw,

- [AUD_CLKID_TDMOUT_B] = &tdmout_b.hw,

- [AUD_CLKID_TDMOUT_C] = &tdmout_c.hw,

- [AUD_CLKID_FRDDR_A] = &frddr_a.hw,

- [AUD_CLKID_FRDDR_B] = &frddr_b.hw,

- [AUD_CLKID_FRDDR_C] = &frddr_c.hw,

- [AUD_CLKID_TODDR_A] = &toddr_a.hw,

- [AUD_CLKID_TODDR_B] = &toddr_b.hw,

- [AUD_CLKID_TODDR_C] = &toddr_c.hw,

- [AUD_CLKID_LOOPBACK] = &loopback.hw,

- [AUD_CLKID_SPDIFIN] = &spdifin.hw,

- [AUD_CLKID_SPDIFOUT] = &spdifout.hw,

- [AUD_CLKID_RESAMPLE] = &resample.hw,

- [AUD_CLKID_POWER_DETECT] = &power_detect.hw,

- [AUD_CLKID_SPDIFOUT_B] = &spdifout_b.hw,

- [AUD_CLKID_MST_A_MCLK_SEL] = &mst_a_mclk_sel.hw,

- [AUD_CLKID_MST_B_MCLK_SEL] = &mst_b_mclk_sel.hw,

- [AUD_CLKID_MST_C_MCLK_SEL] = &mst_c_mclk_sel.hw,

- [AUD_CLKID_MST_D_MCLK_SEL] = &mst_d_mclk_sel.hw,

- [AUD_CLKID_MST_E_MCLK_SEL] = &mst_e_mclk_sel.hw,

- [AUD_CLKID_MST_F_MCLK_SEL] = &mst_f_mclk_sel.hw,

- [AUD_CLKID_MST_A_MCLK_DIV] = &mst_a_mclk_div.hw,

- [AUD_CLKID_MST_B_MCLK_DIV] = &mst_b_mclk_div.hw,

- [AUD_CLKID_MST_C_MCLK_DIV] = &mst_c_mclk_div.hw,

- [AUD_CLKID_MST_D_MCLK_DIV] = &mst_d_mclk_div.hw,

- [AUD_CLKID_MST_E_MCLK_DIV] = &mst_e_mclk_div.hw,

- [AUD_CLKID_MST_F_MCLK_DIV] = &mst_f_mclk_div.hw,

- [AUD_CLKID_MST_A_MCLK] = &mst_a_mclk.hw,

- [AUD_CLKID_MST_B_MCLK] = &mst_b_mclk.hw,

- [AUD_CLKID_MST_C_MCLK] = &mst_c_mclk.hw,

- [AUD_CLKID_MST_D_MCLK] = &mst_d_mclk.hw,

- [AUD_CLKID_MST_E_MCLK] = &mst_e_mclk.hw,

- [AUD_CLKID_MST_F_MCLK] = &mst_f_mclk.hw,

- [AUD_CLKID_SPDIFOUT_CLK_SEL] = &spdifout_clk_sel.hw,

- [AUD_CLKID_SPDIFOUT_CLK_DIV] = &spdifout_clk_div.hw,

- [AUD_CLKID_SPDIFOUT_CLK] = &spdifout_clk.hw,

- [AUD_CLKID_SPDIFOUT_B_CLK_SEL] = &spdifout_b_clk_sel.hw,

- [AUD_CLKID_SPDIFOUT_B_CLK_DIV] = &spdifout_b_clk_div.hw,

- [AUD_CLKID_SPDIFOUT_B_CLK] = &spdifout_b_clk.hw,