diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2012-01-09 16:14:07 +0000 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-01-09 16:14:07 +0000 |
| commit | 142f2101a86ade2d6c9dfbedf82e1b5b31c8fce6 (patch) | |
| tree | 8cced517382b7087df4e89a9e2a00ccac9676a92 /arch/arm/mach-imx/src.c | |
| parent | 155bc27fdfbdf65a07a4f8ef3eafa25e57d8b511 (diff) | |
| parent | a07613a54d700a974f3a4a657da78ef5d097315d (diff) | |
Merge branch 'samsung/cleanup' into samsung/driver
Conflicts:
arch/arm/mach-s5p64x0/cpu.c -> common.c
More changes to a file that got moved into common.c,
see previous conflict resolutions.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-imx/src.c')
| -rw-r--r-- | arch/arm/mach-imx/src.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c index a8e33681b732..4bde04f99e38 100644 --- a/arch/arm/mach-imx/src.c +++ b/arch/arm/mach-imx/src.c @@ -19,6 +19,7 @@ #define SRC_SCR 0x000 #define SRC_GPR1 0x020 +#define BP_SRC_SCR_WARM_RESET_ENABLE 0 #define BP_SRC_SCR_CORE1_RST 14 #define BP_SRC_SCR_CORE1_ENABLE 22 @@ -46,11 +47,33 @@ void imx_set_cpu_jump(int cpu, void *jump_addr) src_base + SRC_GPR1 + cpu * 8); } +void imx_src_prepare_restart(void) +{ + u32 val; + + /* clear enable bits of secondary cores */ + val = readl_relaxed(src_base + SRC_SCR); + val &= ~(0x7 << BP_SRC_SCR_CORE1_ENABLE); + writel_relaxed(val, src_base + SRC_SCR); + + /* clear persistent entry register of primary core */ + writel_relaxed(0, src_base + SRC_GPR1); +} + void __init imx_src_init(void) { struct device_node *np; + u32 val; np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-src"); src_base = of_iomap(np, 0); WARN_ON(!src_base); + + /* + * force warm reset sources to generate cold reset + * for a more reliable restart + */ + val = readl_relaxed(src_base + SRC_SCR); + val &= ~(1 << BP_SRC_SCR_WARM_RESET_ENABLE); + writel_relaxed(val, src_base + SRC_SCR); } |