diff options
| author | Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com> | 2025-06-17 17:08:20 +0530 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2025-08-12 10:41:22 -0500 |
| commit | d6111177f6504b013d0424657e131ae9a36ab5e2 (patch) | |
| tree | b599ab0ad8972223606b3c6a6b6f926735d96df6 | |
| parent | 46952305d2b64e9a2498c53046a832b51c93e5a8 (diff) | |
arm64: dts: qcom: sa8775p: Remove max link speed property for PCIe EP
The maximum link speed was previously restricted to Gen3 due to the
absence of Gen4 equalization support in the driver.
As Gen4 equalization is already supported by the PCIe controller
driver, remove the max-link-speed property.
Signed-off-by: Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250617-update_phy-v5-2-2df83ed6a373@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/lemans.dtsi | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi index 9b7fa4c932e3..64f5378c6a47 100644 --- a/arch/arm64/boot/dts/qcom/lemans.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi @@ -7711,7 +7711,6 @@ power-domains = <&gcc PCIE_0_GDSC>; phys = <&pcie0_phy>; phy-names = "pciephy"; - max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */ num-lanes = <2>; linux,pci-domain = <0>; @@ -7882,7 +7881,6 @@ power-domains = <&gcc PCIE_1_GDSC>; phys = <&pcie1_phy>; phy-names = "pciephy"; - max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */ num-lanes = <4>; linux,pci-domain = <1>; |