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| author | Qiang Yu <quic_qianyu@quicinc.com> | 2025-04-11 19:31:20 +0800 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2025-04-11 17:09:04 +0530 |
| commit | 0cc22f5a861c3149171485349dafac3047212a5d (patch) | |
| tree | 41ad02df686190515759b680f89955b79708f158 /rust/helpers/platform.c | |
| parent | ea57d7fe4f5af517b5ce91fdff96cc33be932690 (diff) | |
phy: qcom: qmp-pcie: Add PHY register retention support
Some QCOM PCIe PHYs support no_csr reset. Unlike BCR reset which resets the
whole PHY (hardware and register), no_csr reset only resets PHY hardware
but retains register values, which means PHY setting can be skipped during
PHY init if PCIe link is enabled in bootloader and only no_csr is toggled
after that.
Hence, determine whether the PHY has been enabled in bootloader by
verifying QPHY_START_CTRL register. If it's programmed and no_csr reset is
available, skip BCR reset and PHY register setting to establish the PCIe
link with bootloader - programmed PHY settings.
Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
Signed-off-by: Wenbin Yao <quic_wenbyao@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tested-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com>
Link: https://lore.kernel.org/r/20250411113120.651363-3-quic_wenbyao@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'rust/helpers/platform.c')
0 files changed, 0 insertions, 0 deletions
