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| author | Heiner Kallweit <hkallweit1@gmail.com> | 2018-09-19 22:00:24 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2018-09-19 23:06:30 -0700 |
| commit | 7a67e11d901e17c3222d226c345be555106faae6 (patch) | |
| tree | b155be80d074aa4c13b885533d8a1eeb2177aa05 /scripts/gdb/vmlinux-gdb.py | |
| parent | c8c618afc2b22067d6f37e2e41d9bba209fe0036 (diff) | |
r8169: simplify RTL8169 PHY initialization
PCI_LATENCY_TIMER is ignored on PCIe, therefore we have to do this
for the PCI chips (version <= 06) only. Also we can move setting
PCI_CACHE_LINE_SIZE.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'scripts/gdb/vmlinux-gdb.py')
0 files changed, 0 insertions, 0 deletions