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authorDavid Lechner <dlechner@baylibre.com>2024-03-14 12:43:38 -0500
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2024-03-25 20:10:14 +0000
commit346ae0e8276fe6fc5f0b7496e53343e1739ff5b0 (patch)
tree03b0e10f7dd5ee7b53f615bf1be53644e1fb8ed8 /tools/perf/scripts/python/flamegraph.py
parentfcdb03e4310695013f6a6c5a29485b02b13e2662 (diff)
iio: adc: ad7944: Add support for "3-wire mode"
This adds support for AD7944 ADCs wired in "3-wire mode". (NOTE: 3-wire is the datasheet name for this wiring configuration and has nothing to do with SPI_3WIRE.) In the 3-wire mode, the SPI controller CS line can be wired to the CNV line on the ADC and used to trigger conversions rather that using a separate GPIO line. The turbo/chain mode compatibility check at the end of the probe function is technically can't be triggered right now but adding it now anyway so that we don't forget to add it later when support for daisy-chaining is added. Reviewed-by: Nuno Sa <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20240314-mainline-ad7944-3-wire-mode-v2-1-d469da0705d2@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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