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| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2025-07-10 09:34:44 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2025-07-15 11:03:41 +0200 |
| commit | 7f311e5ac36b6cf9cc0734d89546e643f33b684a (patch) | |
| tree | ab416394a73802bae9a6136e29e3f61a6bc97878 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 49a27c6c392dec46c826ee586f7ec8973acaeed7 (diff) | |
arm64: tesla/google: MAINTAINERS: Reference "SoC clean" maintainer profile
Effectively all Tesla FSD and Google GS101 DTS patches go via Samsung
SoC maintainer, who applies the same rules as for Samsung SoC: DTS must
be fully DT bindings compliant (`dtbs_check W=1`). Existing sources
already are compliant, so just document that implicit rule by mentioning
respective maintainer profile in their entries.
Cc: Peter Griffin <peter.griffin@linaro.org>
Cc: André Draszik <andre.draszik@linaro.org>
Cc: Tudor Ambarus <tudor.ambarus@linaro.org>
Cc: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20250710073443.13788-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions