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authorUmesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>2022-11-10 17:19:12 +0000
committerJohn Harrison <John.C.Harrison@Intel.com>2022-11-21 12:53:34 -0800
commite746f84b8e813816951b63485134927ed6763a1b (patch)
tree565575200adf0faa19316a571fa722f86c21755f /tools/perf/scripts/python/mem-phys-addr.py
parent67b5655b2e717b8b681f8acd9cbddd2d687d5d4e (diff)
i915/uncore: Acquire fw before loop in intel_uncore_read64_2x32
PMU reads the GT timestamp as a 2x32 mmio read and since upper and lower 32 bit registers are read in a loop, there is a latency involved between getting the GT timestamp and the CPU timestamp. As part of the resolution, refactor intel_uncore_read64_2x32 to acquire forcewake and uncore lock prior to reading upper and lower regs. Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221110171913.670286-2-umesh.nerlige.ramappa@intel.com
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