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authorBrian Masney <masneyb@onstation.org>2019-11-21 20:26:42 -0500
committerRob Clark <robdclark@chromium.org>2020-01-02 14:20:42 -0800
commitb435f8b4f6a08f5bbf001cfd4bed22070e3774fd (patch)
tree3d35a6ac0b1af4044b00f0dad4a8c65763ab506f /tools/perf/scripts/python
parent15ab987c423df561e0949d77fb5043921ae59956 (diff)
dt-bindings: drm/msm/gpu: document second interconnect
Some A3xx and all A4xx Adreno GPUs do not have GMEM inside the GPU core and must use the On Chip MEMory (OCMEM) in order to be functional. There's a separate interconnect path that needs to be setup to OCMEM. Let's document this second interconnect path that's available. Since there's now two available interconnects, let's add the interconnect-names property. Signed-off-by: Brian Masney <masneyb@onstation.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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