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2018-02-28nvme-multipath: fix sysfs dangerously created linksBaegjae Sung
If multipathing is enabled, each NVMe subsystem creates a head namespace (e.g., nvme0n1) and multiple private namespaces (e.g., nvme0c0n1 and nvme0c1n1) in sysfs. When creating links for private namespaces, links of head namespace are used, so the namespace creation order must be followed (e.g., nvme0n1 -> nvme0c1n1). If the order is not followed, links of sysfs will be incomplete or kernel panic will occur. The kernel panic was: kernel BUG at fs/sysfs/symlink.c:27! Call Trace: nvme_mpath_add_disk_links+0x5d/0x80 [nvme_core] nvme_validate_ns+0x5c2/0x850 [nvme_core] nvme_scan_work+0x1af/0x2d0 [nvme_core] Correct order Context A Context B nvme0n1 nvme0c0n1 nvme0c1n1 Incorrect order Context A Context B nvme0c1n1 nvme0n1 nvme0c0n1 The nvme_mpath_add_disk (for creating head namespace) is called just before the nvme_mpath_add_disk_links (for creating private namespaces). In nvme_mpath_add_disk, the first context acquires the lock of subsystem and creates a head namespace, and other contexts do nothing by checking GENHD_FL_UP of a head namespace after waiting to acquire the lock. We verified the code with or without multipathing using three vendors of dual-port NVMe SSDs. Signed-off-by: Baegjae Sung <baegjae@gmail.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Keith Busch <keith.busch@intel.com>
2018-02-28dt-bindings: at24: sort manufacturers alphabeticallyPeter Rosin
Makes them easier to find. Signed-off-by: Peter Rosin <peda@axentia.se> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2018-02-28ALSA: x86: Fix potential crash at error pathTakashi Iwai
When LPE audio driver gets some error at probing, it may lead to a crash because of canceling the pending work in hdmi_lpe_audio_free(), since some of ports might be still not initialized. For assuring the proper free of each port, initialize all ports at the beginning of the probe. Fixes: b4eb0d522fcb ("ALSA: x86: Split snd_intelhad into card and PCM specific structures") Signed-off-by: Takashi Iwai <tiwai@suse.de>
2018-02-28ALSA: x86: Fix missing spinlock and mutex initializationsTakashi Iwai
The commit change for supporting the multiple ports moved involved some code shuffling, and there the initializations of spinlock and mutex in snd_intelhad object were dropped mistakenly. This patch adds the missing initializations again for each port. Fixes: b4eb0d522fcb ("ALSA: x86: Split snd_intelhad into card and PCM specific structures") Cc: <stable@vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2018-02-28ALSA: control: Fix memory corruption risk in snd_ctl_elem_readRichard Fitzgerald
The patch "ALSA: control: code refactoring for ELEM_READ/ELEM_WRITE operations" introduced a potential for kernel memory corruption due to an incorrect if statement allowing non-readable controls to fall through and call the get function. For TLV controls a driver can omit SNDRV_CTL_ELEM_ACCESS_READ to ensure that only the TLV get function can be called. Instead the normal get() can be invoked unexpectedly and as the driver expects that this will only be called for controls <= 512 bytes, potentially try to copy >512 bytes into the 512 byte return array, so corrupting kernel memory. The problem is an attempt to refactor the snd_ctl_elem_read function to invert the logic so that it conditionally aborted if the control is unreadable instead of conditionally executing. But the if statement wasn't inverted correctly. The correct inversion of if (a && !b) is if (!a || b) Fixes: becf9e5d553c2 ("ALSA: control: code refactoring for ELEM_READ/ELEM_WRITE operations") Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Cc: <stable@vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2018-02-28ARM: dts: imx7s: add spba-bus abstractionStefan Agner
According to the i.MX 7Solo/Dual Application Processor Reference Manual the ECSPI1/2/3, UART1/2/3 and SAI1/2/3 peripherals are connected through the SPBA bus. Other similar SoCs such as i.MX 6UL add this bus abstraction. This adds the bus also to the i.MX 7 device tree. The i.MX SDMA driver uses this abstraction to configure watermark levels slightly differently, so this might change behavior slightly. There have no issues been observed before or after the patch. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-28ARM: dts: imx7s: add Keypad Port moduleStefan Agner
Add the Keypad Port module. Add it disabled by default since only some boards use it. Boards which do need to specify additional properties as documented in the device tree bindings. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-28ARM: dts: imx7s: add CAAM device nodeRui Miguel Silva
Add CAAM device node to the i.MX7s device tree. Cc: Sascha Hauer <kernel@pengutronix.de> Cc: devicetree@vger.kernel.org Cc: "Horia Geantă" <horia.geanta@nxp.com> Cc: Aymen Sghaier <aymen.sghaier@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-28ARM: dts: imx7s: add snvs rtc clockAnson Huang
Add i.MX7 SNVS RTC clock. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-28dt-bindings: arm: Document Renesas R-Car M3-N-based Salvator-X boardGeert Uytterhoeven
The Renesas Salvator-X development board can be equipped with an R-Car H3, M3-W, or M3-N SiP, which are pin-compatible. Document board part number and compatible values for the version with R-Car M3-N. The board part number was extracted from a big patch by Takeshi Kihara in the BSP. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-28dt-bindings: arm: Document Renesas R-Car M3-N-based Salvator-XS boardGeert Uytterhoeven
The Renesas Salvator-XS development board can be equipped with an R-Car H3, M3-W, or M3-N SiP, which are pin-compatible. Document board part number and compatible values for the version with R-Car M3-N. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-28dt-bindings: arm: Document Renesas V3MSK and Wheat board part numbersGeert Uytterhoeven
The DT binding documentation for the Renesas V3MSK and Wheat boards lacked board part numbers. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> [simon: corrected Wheat part number] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-28clk: imx: imx7d: add the Keypad Port module clockStefan Agner
According to the i.MX7D Reference Manual, the Keypad Port module (KPP) requires this clock gate to be enabled. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-28ARM: dts: imx6dl-icore-rqs: Fix invalid PHY address assignment for ethernetShyam Saini
Add "reg" property for ethernet to fix this issue. Errors in boot logs: mdio_bus 2188000.ethernet-1: /soc/aips-bus@02100000/ethernet@02188000/mdio/ethernet-phy has invalid PHY address mdio_bus 2188000.ethernet-1: scan phy ethernet-phy at address 0 mdio_bus 2188000.ethernet-1: scan phy ethernet-phy at address 1 mdio_bus 2188000.ethernet-1: scan phy ethernet-phy at address 2 mdio_bus 2188000.ethernet-1: scan phy ethernet-phy at address 3 Reported-by: Shyam Saini <shyam@amarulasolutions.com> Suggested-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Shyam Saini <shyam@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-28ARM: dts: imx6ul: add wdog3 nodeJörg Krause
The i.MX6UL(L) has a WDOG3 located at start address 0x021E0000 in the AIPS-2 memory region [1]. [1] i.MX 6UltraLite Applications Processor Reference Manual, Rev. 1, 04/2016, Table-2-3 AIPS-2 memory map, p. 166 Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-28ARM: dts: imx7: add CPU PMU supportStefan Agner
Enable support for ARM Performance Monitoring Units available on the Cortex-A7 CPU. There is only a single interrupt for the PMU in both variants of the family, i.MX 7Solo and 7Dual. Tested with perf on a i.MX 7Dual: hw perfevents: enabled with armv7_cortex_a7 PMU driver, 5 counters available Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-28ARM: dts: imx6dl-colibri-eval-v3: Add chosen nodeStefan Agner
Add Colibri UART_A as default serial console. Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-28arm64: dts: fsl: fix ifc simple-bus unit address format warningsShawn Guo
It fixes LS family SoCs device tree dtc warning in IFC child nodes. Warning (simple_bus_reg): Node /soc/ifc@1530000/nor@0,0 simple-bus unit address format error, expected "0" Warning (simple_bus_reg): Node /soc/ifc@1530000/nand@1,0 simple-bus unit address format error, expected "100000000" Warning (simple_bus_reg): Node /soc/ifc@1530000/board-control@2,0 simple-bus unit address format error, expected "200000000" Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-28ARM: dts: imx6: Pass memory unit-adressFabio Estevam
Pass the memory unit-adress to fix the following build warnings with W=1: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name There are cases where dts passes an empty memory node, which will be filled by the bootloader. Passing the memory base address still allows the bootloader to fill the memory size. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-By: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-28Merge branch 'drm-fixes-4.16' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie
into drm-fixes - Powerplay fixes for cards with no displays attached - Couple of DC fixes - radeon workaround for PPC64 * 'drm-fixes-4.16' of git://people.freedesktop.org/~agd5f/linux: drm/radeon: insist on 32-bit DMA for Cedar on PPC64/PPC64LE drm/amd/display: VGA black screen from s3 when attached to hook drm/amdgpu: Unify the dm resume calls into one drm/amdgpu: Add a missing lock for drm_mm_takedown Revert "drm/radeon/pm: autoswitch power state when in balanced mode" drm/amd/powerplay/smu7: allow mclk switching with no displays drm/amd/powerplay/vega10: allow mclk switching with no displays
2018-02-28clk: imx7d: add CAAM clockRui Miguel Silva
Add CAAM clock so that we could use the Cryptographic Acceleration and Assurance Module (CAAM) hardware block. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-clk@vger.kernel.org Cc: "Horia Geantă" <horia.geanta@nxp.com> Cc: Aymen Sghaier <aymen.sghaier@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-27ARM: dts: bcm283x: Move arm-pmu out of soc nodeStefan Wahren
The ARM PMU doesn't have a reg address, so fix the following DTC warning (requires W=1): Node /soc/arm-pmu missing or empty reg/ranges property Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-02-27ARM: dts: bcm283x: Fix unit address of local_intcStefan Wahren
This patch fixes the following DTC warning (requires W=1): Node /soc/local_intc simple-bus unit address format error, expected "40000000" Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-02-27ARM: dts: NSP: Fix amount of RAM on BCM958625HRFlorian Fainelli
Jon attempted to fix the amount of RAM on the BCM958625HR in commit c53beb47f621 ("ARM: dts: NSP: Correct RAM amount for BCM958625HR board") but it seems like we tripped over some poorly documented schematics. The top-level page of the schematics says the board has 2GB, but when you end-up scrolling to page 6, you see two chips of 4GBit (512MB) but what the bootloader really initializes only 512MB, any attempt to use more than that results in data aborts. Fix this again back to 512MB. Fixes: c53beb47f621 ("ARM: dts: NSP: Correct RAM amount for BCM958625HR board") Acked-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-02-27nbd: fix return value in error handling pathGustavo A. R. Silva
It seems that the proper value to return in this particular case is the one contained into variable new_index instead of ret. Addresses-Coverity-ID: 1465148 ("Copy-paste error") Fixes: e46c7287b1c2 ("nbd: add a basic netlink interface") Reviewed-by: Omar Sandoval <osandov@fb.com> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-02-27Merge branch 'fixes-v4.16-rc4' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security Pull seccomp fix from James Morris: "This disables the seccomp samples when cross compiling. We've seen too many build issues here, so it's best to just disable it, especially since they're just the samples" * 'fixes-v4.16-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security: samples/seccomp: do not compile when cross compiled
2018-02-27Merge tag 'seccomp-v4.16-rc4' of ↵James Morris
https://git.kernel.org/pub/scm/linux/kernel/git/kees/linux into fixes-v4.16-rc4 - do not build samples when cross compiling (Michal Hocko) From Kees: "This disables the seccomp samples when cross compiling. We're seen too many build issues here, so it's best to just disable it, especially since they're just the samples."
2018-02-27bcache: fix kcrashes with fio in RAID5 backend devTang Junhui
Kernel crashed when run fio in a RAID5 backend bcache device, the call trace is bellow: [ 440.012034] kernel BUG at block/blk-ioc.c:146! [ 440.012696] invalid opcode: 0000 [#1] SMP NOPTI [ 440.026537] CPU: 2 PID: 2205 Comm: md127_raid5 Not tainted 4.15.0 #8 [ 440.027441] Hardware name: HP ProLiant MicroServer Gen8, BIOS J06 07/16 /2015 [ 440.028615] RIP: 0010:put_io_context+0x8b/0x90 [ 440.029246] RSP: 0018:ffffa8c882b43af8 EFLAGS: 00010246 [ 440.029990] RAX: 0000000000000000 RBX: ffffa8c88294fca0 RCX: 0000000000 0f4240 [ 440.031006] RDX: 0000000000000004 RSI: 0000000000000286 RDI: ffffa8c882 94fca0 [ 440.032030] RBP: ffffa8c882b43b10 R08: 0000000000000003 R09: ffff949cb8 0c1700 [ 440.033206] R10: 0000000000000104 R11: 000000000000b71c R12: 00000000000 01000 [ 440.034222] R13: 0000000000000000 R14: ffff949cad84db70 R15: ffff949cb11 bd1e0 [ 440.035239] FS: 0000000000000000(0000) GS:ffff949cba280000(0000) knlGS: 0000000000000000 [ 440.060190] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 440.084967] CR2: 00007ff0493ef000 CR3: 00000002f1e0a002 CR4: 00000000001 606e0 [ 440.110498] Call Trace: [ 440.135443] bio_disassociate_task+0x1b/0x60 [ 440.160355] bio_free+0x1b/0x60 [ 440.184666] bio_put+0x23/0x30 [ 440.208272] search_free+0x23/0x40 [bcache] [ 440.231448] cached_dev_write_complete+0x31/0x70 [bcache] [ 440.254468] closure_put+0xb6/0xd0 [bcache] [ 440.277087] request_endio+0x30/0x40 [bcache] [ 440.298703] bio_endio+0xa1/0x120 [ 440.319644] handle_stripe+0x418/0x2270 [raid456] [ 440.340614] ? load_balance+0x17b/0x9c0 [ 440.360506] handle_active_stripes.isra.58+0x387/0x5a0 [raid456] [ 440.380675] ? __release_stripe+0x15/0x20 [raid456] [ 440.400132] raid5d+0x3ed/0x5d0 [raid456] [ 440.419193] ? schedule+0x36/0x80 [ 440.437932] ? schedule_timeout+0x1d2/0x2f0 [ 440.456136] md_thread+0x122/0x150 [ 440.473687] ? wait_woken+0x80/0x80 [ 440.491411] kthread+0x102/0x140 [ 440.508636] ? find_pers+0x70/0x70 [ 440.524927] ? kthread_associate_blkcg+0xa0/0xa0 [ 440.541791] ret_from_fork+0x35/0x40 [ 440.558020] Code: c2 48 00 5b 41 5c 41 5d 5d c3 48 89 c6 4c 89 e7 e8 bb c2 48 00 48 8b 3d bc 36 4b 01 48 89 de e8 7c f7 e0 ff 5b 41 5c 41 5d 5d c3 <0f> 0b 0f 1f 00 0f 1f 44 00 00 55 48 8d 47 b8 48 89 e5 41 57 41 [ 440.610020] RIP: put_io_context+0x8b/0x90 RSP: ffffa8c882b43af8 [ 440.628575] ---[ end trace a1fd79d85643a73e ]-- All the crash issue happened when a bypass IO coming, in such scenario s->iop.bio is pointed to the s->orig_bio. In search_free(), it finishes the s->orig_bio by calling bio_complete(), and after that, s->iop.bio became invalid, then kernel would crash when calling bio_put(). Maybe its upper layer's faulty, since bio should not be freed before we calling bio_put(), but we'd better calling bio_put() first before calling bio_complete() to notify upper layer ending this bio. This patch moves bio_complete() under bio_put() to avoid kernel crash. [mlyle: fixed commit subject for character limits] Reported-by: Matthias Ferdinand <bcache@mfedv.net> Tested-by: Matthias Ferdinand <bcache@mfedv.net> Signed-off-by: Tang Junhui <tang.junhui@zte.com.cn> Reviewed-by: Michael Lyle <mlyle@lyle.org> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-02-27bcache: correct flash only vols (check all uuids)Coly Li
Commit 2831231d4c3f ("bcache: reduce cache_set devices iteration by devices_max_used") adds c->devices_max_used to reduce iteration of c->uuids elements, this value is updated in bcache_device_attach(). But for flash only volume, when calling flash_devs_run(), the function bcache_device_attach() is not called yet and c->devices_max_used is not updated. The unexpected result is, the flash only volume won't be run by flash_devs_run(). This patch fixes the issue by iterate all c->uuids elements in flash_devs_run(). c->devices_max_used will be updated properly when bcache_device_attach() gets called. [mlyle: commit subject edited for character limit] Fixes: 2831231d4c3f ("bcache: reduce cache_set devices iteration by devices_max_used") Reported-by: Tang Junhui <tang.junhui@zte.com.cn> Signed-off-by: Coly Li <colyli@suse.de> Reviewed-by: Michael Lyle <mlyle@lyle.org> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-02-27Merge branch 'fixes-v4.16-rc4' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security Pull tpm fixes from James Morris: "Bugfixes for TPM, from Jeremy Boone, via Jarkko Sakkinen" * 'fixes-v4.16-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security: tpm: fix potential buffer overruns caused by bit glitches on the bus tpm: st33zp24: fix potential buffer overruns caused by bit glitches on the bus tpm_i2c_infineon: fix potential buffer overruns caused by bit glitches on the bus tpm_i2c_nuvoton: fix potential buffer overruns caused by bit glitches on the bus tpm_tis: fix potential buffer overruns caused by bit glitches on the bus
2018-02-27ARM: dts: am4372: Mark omap_l3_noc with ti,no-idleDave Gerlach
We can never idle the l3_main hwmod so mark the omap_l3_noc node with ti,no-idle. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-27ARM: dts: am4372: Mark emif with ti,no-idleDave Gerlach
We can never idle the emif hwmod from within the HLOS so mark the emif node with ti,no-idle. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-27ARM: dts: am33xx: Mark emif with ti,no-idleDave Gerlach
We can never idle the emif hwmod from within the HLOS so mark the emif node with ti,no-idle. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-27ARM: dts: am4372: Add soc nodeDave Gerlach
Add soc node for am4372 with pm-sram phandle to both pm-sram-code and pm-sram-data regions. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-27ARM: dts: am33xx: Add pm-sram phandle to soc nodeDave Gerlach
Add a phandle to point to both the pm-sram-code and pm-sram-data nodes so that the pm code can locate the sram regions needed to copy low level PM code. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-27ARM: dts: am4372: Update emif nodeDave Gerlach
Now that we will use ti-emif-sram driver for am4372 PM, update the emif DT node with the required sram property. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-27ARM: dts: am33xx: Update emif nodeDave Gerlach
Now that we will use ti-emif-sram driver for am335x PM, update the emif DT node with the required sram property. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-27ARM: dts: am4372: Reserve pm code and data regions in ocmcram sram nodeDave Gerlach
Add a 'pm_sram_code' reserved region to the ocmcram node to be exposed by the mmio-sram driver as a pool but also mark it protect-exec so that it can run code copied to it using sram_exec_copy. Add another 'pm_sram_data' reserved region to the ocmcram node to act as the data space for any code running from the 'pm_sram_code' region that is exposed as a regular pool. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-27ARM: dts: am33xx: Reserve pm code and data regions in ocmcram sram nodeDave Gerlach
Add a 'pm_sram_code' reserved region to the ocmcram node to be exposed by the mmio-sram driver as a pool but also mark it protect-exec so that it can run code copied to it using sram_exec_copy. Add another 'pm_sram_data' reserved region to the ocmcram node to act as the data space for any code running from the 'pm_sram_code' region that is exposed as a regular pool. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-27arm64: dts: marvell: use reworked NAND controller driver on Armada 8KMiquel Raynal
Use the new bindings of the reworked Marvell NAND controller driver. Also adapt the nand controller node organization to distinguish which property is relevant for the controller, and which one is NAND chip specific. Expose the partitions as a subnode of the NAND chip. Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as the driver activates the arbiter by default for all boards (either needed or harmless). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-02-27arm64: dts: marvell: use reworked NAND controller driver on Armada 7KMiquel Raynal
Use the new bindings of the reworked Marvell NAND controller driver. Also adapt the nand controller node organization to distinguish which property is relevant for the controller, and which one is NAND chip specific. Expose the partitions as a subnode of the NAND chip. Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as the driver activates the arbiter by default for all boards (either needed or harmless). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-02-27ARM64: dts: marvell: armada-cp110: Add registers clock for sata nodeGregory CLEMENT
This extra clock is needed to access the registers of the AHCI SATA controller used on the Armada 7K/8K SoCs. The ahci drivers was already designed to support up to 5 clocks so there is only need to update the device tree to use it. It was not noticed until now because of wrong assumption in the clock drivers, but as this IP really needs 2 clocks, we had to declare both of them. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-02-27cpufreq: s3c24xx: Fix broken s3c_cpufreq_init()Viresh Kumar
commit a307a1e6bc0d "cpufreq: s3c: use cpufreq_generic_init()" accidentally broke cpufreq on s3c2410 and s3c2412. These two platforms don't have a CPU frequency table and used to skip calling cpufreq_table_validate_and_show() for them. But with the above commit, we started calling it unconditionally and that will eventually fail as the frequency table pointer is NULL. Fix this by calling cpufreq_table_validate_and_show() conditionally again. Fixes: a307a1e6bc0d "cpufreq: s3c: use cpufreq_generic_init()" Cc: 3.13+ <stable@vger.kernel.org> # v3.13+ Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-27ARM: dts: stm32: enable RTC on stm32h743i-evalAmelie Delaunay
This patch enables RTC on stm32h743i-eval. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-02-27ARM: dts: stm32: add RTC support on STM32H743Amelie Delaunay
This patch adds support for RTC on STM32H743 SoC. It also adds dt-bindings/interrupt-controller/irq.h include and uses it to configure RTC alarm interrupt. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-02-27ARM: dts: stm32: enable USB OTG HS on stm32h743i-evalAmelie Delaunay
This patch enables USB HS on stm32h743i-eval in OTG (DRD) mode. The USB connector used will determine the role of USB OTG controller. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-02-27ARM: dts: stm32: add USB OTG HS and FS support for STM32H743 SoCAmelie Delaunay
This patch adds support for USB OTG HS and FS on STM32H743 SoC: -USB OTG HS controller is the same than the one used on STM32F7 SoCs. -USB OTG FS controller is the same than the one used on STM32F4 SoCs. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-02-27ARM: dts: stm32: enable RTC on stm32f769-discoAmelie Delaunay
This patch enables RTC on stm32f769-disco. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-02-27ARM: dts: stm32: enable USB HS on stm32f769-discoAmelie Delaunay
This patch enables USB HS on stm32f749-disco in OTG (DRD) mode. The USB connector used will determine the role of USB OTG controller. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-02-27ARM: dts: stm32: select otg mode for usbotg_hs on stm32746g_evalAmelie Delaunay
Configure USB OTG HS in OTG (DRD) mode on STM32746G_eval. The USB connector used will determine the role of USB OTG controller. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>