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2023-06-09arm64: dts: imx8mq: Fix lcdif compatibleAlexander Stein
"fsl,imx8mq-lcdif" is compatible to "fsl,imx6sx-lcdif", adjust the list accordingly. Fixes the dtbs_check warning: imx8mq-tqma8mq-mba8mx.dtb: lcd-controller@30320000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx8mq-lcdif', 'fsl,imx28-lcdif'] is too long 'fsl,imx8mq-lcdif' is not one of ['fsl,imx23-lcdif', 'fsl,imx28-lcdif', 'fsl,imx6sx-lcdif', 'fsl,imx8mp-lcdif', 'fsl,imx93-lcdif'] 'fsl,imx6sx-lcdif' was expected Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-09arm64: dts: imx8mp: don't initialize audio clocks from CCM nodeLucas Stach
The audio clocks should be intitialized to the correct rate by the subsystem using them. There is no need to always initialize them from the CCM node assigned-clocks property. This way boards using the audio clocks in a non- standard way can change them without first duplicating the CCM clock setup. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-09arm64: dts: imx8mm-venice: Fix GSC vdd_bat data size.Nicolas Cavallari
On these boards, vdd_bat is 16bit, not 24bit. Reading them as 24bit values yield garbage values because of the additional byte, which is a configurable fan trippoint[1]. So set their mode to mode_voltage_16bit = 3 instead of mode_voltage_24bit = 1. [1]: http://trac.gateworks.com/wiki/gsc#SystemTemperatureandVoltageMonitor Only tested on GW7100. Signed-off-by: Nicolas Cavallari <nicolas.cavallari@green-communications.fr> Acked-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-09arm64: dts: imx8mp: Add coresight trace componentsFrank Li
Add coresight trace components (ETM, ETF, ETB and Funnel). ┌───────┐ ┌───────┐ ┌───────┐ │ CPU0 ├─►│ ETM0 ├─►│ │ └───────┘ └───────┘ │ │ │ │ ┌───────┐ ┌───────┐ │ ATP │ │ CPU1 ├─►│ ETM1 ├─►│ │ └───────┘ └───────┘ │ │ │ FUNNEL│ ┌───────┐ ┌───────┐ │ │ │ CPU2 ├─►│ ETM2 ├─►│ │ └───────┘ └───────┘ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ ┌───────┐ ┌───────┐ │ │ │ M7 │ │ DSP │ │ CPU3 ├─►│ ETM3 ├─►│ │ │ │ │ │ └───────┘ └───────┘ └───┬───┘ └──┬──┘ └──┬──┘ AXI │ │ │ ▲ ▼ ▼ ▼ │ ┌───────────────────────────┐ ┌─────┐ ┌─┴──┐ │ ATP FUNNEL ├──►│ETF ├─► │ETR │ └───────────────────────────┘ └─────┘ └────┘ Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-09arm64: dts: imx93: add ddr performance monitor nodeXu Yang
Add performance monitor. Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-06-09Merge tag 'renesas-dts-for-v6.5-tag2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.5 (take two) - Add IOMMU support for PCIe devices on R-Car Gen3 and RZ/G2 SoCs, - Add HSCIF1 serial port support on Renesas ULCB boards equipped with the Shimafuji Kingfisher extension, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: ulcb-kf: Add HSCIF1 node arm64: dts: renesas: ulcb-kf: Remove flow control for SCIF1 ARM: dts: iwg20d-q7-common: Fix backlight pwm specifier arm64: dts: renesas: Add IOMMU related properties into PCIe host nodes Link: https://lore.kernel.org/r/cover.1686304614.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09Merge tag 'amlogic-arm64-dt-for-v6.5' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt Amlogic ARM64 DT changes for v6.4: - Introduce initial DT for Amlogic C4 SoC based AW409 - add missing cache properties * tag 'amlogic-arm64-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: arm64: dts: add support for C3 based Amlogic AW409 arm64: dts: amlogic: add missing cache properties dt-bindings: arm: amlogic: add C3 bindings Link: https://lore.kernel.org/r/37e5de2f-47f1-a3f3-f1e4-4a304192e556@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09Merge tag 'amlogic-arm-dt-for-v6.5' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt Amlogic ARM DT changes for v6.5: - correct uart_B and uart_C clock references for meson8 & meson8b * tag 'amlogic-arm-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: ARM: dts: meson8: correct uart_B and uart_C clock references ARM: dts: meson8b: correct uart_B and uart_C clock references Link: https://lore.kernel.org/r/21b55df9-3eda-0a0f-cf76-79b1d7735314@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09Merge tag 'hisi-arm64-dt-for-6.5' of https://github.com/hisilicon/linux-hisi ↵Arnd Bergmann
into soc/dt ARM64: DT: HiSilicon ARM64 DT updates for v6.5 - Clean up the pinctrl-single node names and correct the #size-cells of the pinctrl controller nodes * tag 'hisi-arm64-dt-for-6.5' of https://github.com/hisilicon/linux-hisi: arm64: dts: hisilicon: Unify pinctrl-single pin group nodes Link: https://lore.kernel.org/r/6482C916.1010507@hisilicon.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09Merge tag 'hisi-arm32-dt-for-6.5' of https://github.com/hisilicon/linux-hisi ↵Arnd Bergmann
into soc/dt ARM: DT: HiSilicon ARM32 DT updates for v6.5 - Clean up the pinctrl-single node names and correct the pinctrl controller nodes of the hi3620 SoC * tag 'hisi-arm32-dt-for-6.5' of https://github.com/hisilicon/linux-hisi: ARM: dts: hisilicon: Unify pinctrl-single pin group nodes Link: https://lore.kernel.org/r/6482C732.3060300@hisilicon.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09Merge tag 'zynq-dt-for-v6.5' of https://github.com/Xilinx/linux-xlnx into soc/dtArnd Bergmann
ARM: Zynq DT changes for v6.5 - Setup 400k as default i2c frequency - Wire i2c recovery via gpio on zc702 * tag 'zynq-dt-for-v6.5' of https://github.com/Xilinx/linux-xlnx: ARM: zynq: dts: Add SCL & SDA GPIO entries for recovery ARM: zynq: dts: Setting default i2c clock frequency to 400kHz Link: https://lore.kernel.org/r/c5c99ba2-f004-306c-6251-551826f90df8@amd.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09Merge tag 'omap-for-v6.5/dt-pin-nodes-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt Clean-up for pinctrl-single node names for omaps for v6.5 To avoid producing lots of make dtbs checks warnings when the yaml binding for pinctrl-single gets merged, let's fix up the pin group node names. We want to do this rather than add non-standard node name workarounds to the yaml binding. Also included is a non-urgent fix to move gta04 model name out of the pinmux node that can wait for the merge window. * tag 'omap-for-v6.5/dt-pin-nodes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: Unify pinctrl-single pin group nodes for dra7 ARM: dts: Unify pinctrl-single pin group nodes for am4 ARM: dts: Unify pinctrl-single pin group nodes for am33xx ARM: dts: Unify pinctrl-single pin group nodes for ti81xx ARM: dts: Unify pinctrl-single pin group nodes for omap5 ARM: dts: Unify pinctrl-single pin group nodes for omap4 ARM: dts: Unify pinctrl-single pin group nodes for omap2 ARM: dts: Unify pinctrl-single pin group nodes for omap3 ARM: dts: gta04: Move model property out of pinctrl node Link: https://lore.kernel.org/r/pull-1685700720-242492@atomide.com-2 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09arm64: dts: add support for C3 based Amlogic AW409Xianwei Zhao
Amlogic C3 is an advanced edge AI processor designed for smart IP camera applications. Add basic support for the C3 based Amlogic AW409 board, which describes the following components: CPU, GIC, IRQ, Timer, UART. It's capable of booting up into the serial console. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/r/20230515093237.2203171-1-xianwei.zhao@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-08ARM: dts: stm32: fix i2s endpoint format property for stm32mp15xx-dkxOlivier Moysan
Use "dai-format" to configure DAI audio format as specified in audio-graph-port.yaml bindings. Fixes: 144d1ba70548 ("ARM: dts: stm32: Adapt STM32MP157 DK boards to stm32 DT diversity") Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-06-08ARM: dts: stm32: Fix audio routing on STM32MP15xx DHCOM PDK2Marek Vasut
The audio routing flow is not correct, the flow should be from source (second element in the pair) to sink (first element in the pair). The flow now is from "HP_OUT" to "Playback", where "Playback" is source and "HP_OUT" is sink, i.e. the direction is swapped and there is no direct link between the two either. Fill in the correct routing, where "HP_OUT" supplies the "Headphone Jack", "Line In Jack" supplies "LINE_IN" input, "Microphone Jack" supplies "MIC_IN" input and "Mic Bias" supplies "Microphone Jack". Fixes: 34e0c7847dcf ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board") Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-06-08arm64: dts: rockchip: Fix compatible for Bluetooth on rk3566-anbernicChris Morgan
The realtek Bluetooth module uses the same driver as the realtek,rtl8822cs-bt and the realtek,rtl8723bs-bt, however by selecting the 8723bs advanced power saving features are disabled that appear to interfere with normal operation of the bluetooth module. This change switches the compatible string to disable power saving. Without this patch evtest of a paired bluetooth controller fails, with this patch the controller operates as expected. Fixes: b6986b7920bb ("arm64: dts: rockchip: Update compatible for bluetooth") Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20230508160811.3568213-3-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-07arm64: dts: hisilicon: Unify pinctrl-single pin group nodesTony Lindgren
We want to unify the pinctrl-single pin group nodes to use naming "pins". Otherwise non-standad pin group names will add make dtbs checks errors when the pinctrl-single yaml binding gets merged. Let's also correct the pinctrl controller #size-cells to 0 while at it. Cc: Conor Dooley <conor+dt@kernel.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2023-06-07ARM: dts: hisilicon: Unify pinctrl-single pin group nodesTony Lindgren
We want to unify the pinctrl-single pin group nodes to use naming "pins". Otherwise non-standad pin group names will add make dtbs checks errors when the pinctrl-single yaml binding gets merged. Let's also correct the pinctrl controller #size-cells to 0 while at it and drop unnecessary ranges property. Cc: Conor Dooley <conor+dt@kernel.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2023-06-06arm64: dts: ti: k3-j7200-som: Enable I2CUdit Kumar
This patch enables wkup_i2c0 node in board dts file along with pin mux and speed. Also enables underneath eeprom CAV24C256WE. J7200 Datasheet (Table 6-106, Section 6.4 Pin Multiplexing) : https://www.ti.com/lit/ds/symlink/dra821u.pdf J7200 User Guide (Section 4.3, Table 4-2) : https://www.ti.com/lit/ug/spruiw7a/spruiw7a.pdf Signed-off-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20230419040007.3022780-3-u-kumar1@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-06-06arm64: dts: ti: k3-j7200: Fix physical address of pinKeerthy
wkup_pmx splits into multiple regions. Like wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12) wkup_pmx1 -> 2 pins (WKUP_PADCONFIG 14 - 15) wkup_pmx2 -> 59 pins (WKUP_PADCONFIG 26 - 84) wkup_pmx3 -> 8 pins (WKUP_PADCONFIG 93 - 100) With this split, pin offset needs to be adjusted to match with new pmx for all pins above wkup_pmx0. Example a pin under wkup_pmx1 should start from 0 instead of old offset(0x38 WKUP_PADCONFIG 14 offset) J7200 Datasheet (Table 6-106, Section 6.4 Pin Multiplexing) : https://www.ti.com/lit/ds/symlink/dra821u.pdf Fixes: 9ae21ac445e9 ("arm64: dts: ti: k3-j7200: Fix wakeup pinmux range") Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20230419040007.3022780-2-u-kumar1@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-06-06arm64: dts: ti: k3-am62a7-sk: Describe main_uart1 and wkup_uartNishanth Menon
wkup_uart and main_uart1 on this platform is used by tifs and DM firmwares. Describe them for completeness including the pinmux. Signed-off-by: Nishanth Menon <nm@ti.com> [bb@ti.com: updated pinmux and commit subject] Signed-off-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20230425221708.549675-1-bb@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-06-06arm64: dts: rockchip: Add SD card support to rock-5bLucas Tanure
Add sdmmc support for Rock Pi 5B board. Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230529170532.59804-2-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-06arm64: dts: rockchip: add PMIC to rock-5bSebastian Reichel
This adds PMIC support for the Radxa ROCK 5B Signed-off-by: shengfei Xu <xsf@rock-chips.com> Co-developed-by: shengfei Xu <xsf@rock-chips.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230529170532.59804-1-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-06arm64: dts: rockchip: Assign ES8316 MCLK rate on rk3588-rock-5bCristian Ciocaltea
The I2S0_8CH_MCLKOUT clock rate on Rock 5B board defaults to 12 MHz and it is used to provide the master clock (MCLK) for the ES8316 audio codec. On sound card initialization, this limits the allowed sample rates according to the MCLK/LRCK ratios supported by the codec, which results in the following non-standard rates: 15625, 30000, 31250, 46875. Hence, the very first access of the sound card fails: Broken configuration for playback: no configurations available: Invalid argument Setting of hwparams failed: Invalid argument However, all subsequent attempts will succeed, as the audio graph card will request a correct clock frequency, based on the stream sample rate and the multiplication factor. Assign MCLK to 12.288 MHz, which allows the codec to advertise most of the standard sample rates. Fixes: 55529fe3f32d ("arm64: dts: rockchip: Add rk3588-rock-5b analog audio") Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20230530181140.483936-4-cristian.ciocaltea@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-06arm64: dts: rockchip: Add Indiedroid Nova boardChris Morgan
The Indiedroid Nova is an SBC from a sub-brand of Ameridroid that includes the following hardware: - A 40-pin GPIO header - 2 USB-A 3.0 ports - 2 USB-A 2.0 ports - A USB-C 2.0 OTG port (used for USB power delivery) - A USB-C 3.0 port that can do display port output. - A Micro HDMI 2.1 port. - A 1GB ethernet port. - An RT8821CS based WiFi/Bluetooth module. - A user replaceable eMMC module. - An SDMMC card slot. - A MIPI DSI connector. - A MIPI CSI connector. - A 3.5mm TRRS audio jack with microphone input. - An 2 pin socket for an RTC battery. - A 4 pin socket for a debug port. - A power button (connected to PMIC), a reset button (connected to SoC reset), a boot button, and a recovery button (both connected to the ADC). - 4GB, 8GB, or 16GB of system RAM. This initial devicetree includes support for the WiFi, bluetooth, analog audio out/in, SDMMC, eMMC, RTC, UART debugging, and has the regulator values from the schematics. ADC, graphics output, GPU, USB, and wired ethernet are still pending additional upstream changes. Analog audio will require changes to handle a difference between the requested clock frequency of 12288000 and the actual clock freqency of 12287999 before it will work properly. This will be done in a subsequent patch series. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20230531161220.280744-6-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-06dt-bindings: arm: rockchip: Add Indiedroid NovaChris Morgan
Add Indiedroid Nova, an rk3588s based single board computer. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230531161220.280744-5-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-06dt-bindings: vendor-prefixes: add IndiedroidChris Morgan
Indiedroid is a sub-brand of Ameridroid for their line of single board computers. https://indiedroid.us/ Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230531161220.280744-4-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-06arm64: dts: rockchip: Add sdio node to rk3588Chris Morgan
Add SDIO node for rk3588/rk3588s. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230531161220.280744-3-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-06arm64: dts: rockchip: add default pinctrl for rk3588 emmcChris Morgan
Add a default pinctrl definition for the rk3588 emmc. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230531161220.280744-2-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-06arm64: dts: rockchip: Add DT node for ADC support in RK3588Shreeya Patel
Add DT node for ADC support in RK3588. Signed-off-by: Shreeya Patel <shreeya.patel@collabora.com> Link: https://lore.kernel.org/r/20230603185340.13838-8-shreeya.patel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-06-06Merge tag 'omap-for-v6.5/dt-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt Devicetree changes for omaps for v6.5 A non-urgent fix for gpmc,wait-pin property for am335x-myirtech-myc, and initial support for Epson Moverio BT-200 AR glasses. * tag 'omap-for-v6.5/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: omap4: add initial support for Epson Moverio BT-200 ARM: dts: am335x-myirtech: Add missing NAND wait pin definition Link: https://lore.kernel.org/r/pull-1685700720-242492@atomide.com-3 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-06Merge tag 'samsung-dt-6.5' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt Samsung DTS ARM changes for v6.5 1. Final cleanups and improvements as a result of dtbs_checks which rely on previously merged driver changes thus affecting older or out-of-tree kernels. The changes are necessary to achieve full dtbs_check compliance, which justifies affecting out-of-tree users. Changes affecting them are: - Drop simple-bus compatible from FIMC: Exynos4 and S5PV210, - Remove empty camera pinctrl configuration: Exynos4 and S5PV210, - Re-order MFC clock names to match Exynos and bindings: S5PV210. 2. Except above few more non-intrusive cleanups for dtbs_check for S5PV210. Fix also some typos. 3. Re-introduce Exynos4212 which was removed because of lack of upstream users. Artur Weber adds now Samsung Galaxy Tab3 with Exynos4212. * tag 'samsung-dt-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: s5pv210: Fix typo in comments, fix pinctrl header ARM: dts: s3c64xx: Fix some typos in comments ARM: dts: exynos: Fix some typos in comments dt-bindings: arm: samsung: Add Samsung Galaxy Tab3 family boards ARM: dts: exynos: Re-introduce Exynos4212 DTSI ARM: dts: exynos: Move common Exynos4x12 definitions to exynos4x12.dtsi ARM: dts: s5pv210: remove empty camera pinctrl configuration ARM: dts: s5pv210: add dummy 5V regulator for backlight on SMDKv210 ARM: dts: s5pv210: re-order MFC clock names to match Exynos and bindings ARM: dts: s5pv210: align USB node name with bindings ARM: dts: s5pv210: align pin configuration nodes with bindings ARM: dts: exynos: Remove empty camera pinctrl configuration in Odroid X/U3 ARM: dts: exynos: Remove empty camera pinctrl configuration in Universal C210 ARM: dts: exynos: Remove empty camera pinctrl configuration in Trats ARM: dts: s5pv210: drop simple-bus from FIMC ARM: dts: exynos: drop simple-bus from FIMC in Exynos4 Link: https://lore.kernel.org/r/20230602091501.15178-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-06Merge tag 'at91-dt-6.5' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt AT91 DT for 6.5 It contains: - gpio-line-names addition for at91-tse850-3 board - support for SMA connectors on lan966x-pcb8309 board - use drive-open-drain as boolean property as this is how code handles it - generic names for clock controller devices - use of the new clock controller bindings for at91sam9n12 slow clock controller - one blank line removal on sama5d2.dtsi * tag 'at91-dt-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sama5d2: remove extra line ARM: dts: at91: Return to boolean properties ARM: dts: lan966x: Add support for SMA connectors ARM: dts: at91: use clock-controller name for sckc nodes ARM: dts: at91: at91sam9n12: witch sckc to new clock bindings ARM: dts: at91: use clock-controller name for PMC nodes ARM: dts: at91: tse850: add properties for gpio-line-names Link: https://lore.kernel.org/r/20230530105945.11638-1-claudiu.beznea@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-06Merge tag 'ux500-dts-for-v6.5' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into soc/dt These are some Ux500 DTS updates for the v6.5 kernel cycle: - Define the SRAM nodes that will be the preferred way to specify SRAM segments to drivers going forward. - Fix up the naming of the STMPE nodes as we are merging proper YAML bindings which puts restrictions on those. - Disable charging on the Ux500 HREF boards because these do not have any real batteries connected. * tag 'ux500-dts-for-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: ux500: Add eSRAM nodes ARM: dts: ux500: Fix STMPE device nodes ARM: dts: ux500: Disable charging on HREF boards Link: https://lore.kernel.org/r/CACRpkdZ2YLzB-n+1M9u0UqVfct_LAR5cLvYyJhxHsXNR_TFzpQ@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-06arm64: tegra: Update USB phy-name for Jetson Orin NXJon Hunter
Running 'make dtbs_check' reports the following warning for the Jetson Orin NX platform ... arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767-0000.dtb: usb@3550000: phy-names:1: 'usb3-0' was expected Fix this by updating the phy-names:1 to be 'usb3-0' as expected. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-06arm64: tegra: Enable USB device for Jetson AGX OrinJon Hunter
Enable USB device support for the Jetson AGX Orin platform and update the mode for the usb2-0 port to be on-the-go. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-06arm64: tegra: Add Tegra234 pin controllersPrathamesh Shete
Add the device tree nodes for the MAIN and AON pin controllers found on the Tegra234 family of SoCs. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-06arm64: tegra: Support Jetson Orin Nano Developer KitThierry Reding
The NVIDIA Jetson Orin Nano Developer Kit is the combination of the NVIDIA Jetson Orin Nano (P3767, SKU 5) module and the P3768 carrier board. Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-06dt-bindings: tegra: Document Jetson Orin Nano Developer KitThierry Reding
The Jetson Orin Nano Developer Kit pairs the Jetson Orin Nano devkit module with the P3768 carrier board. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-06dt-bindings: tegra: Document Jetson Orin NanoThierry Reding
The Jetson Orin Nano is the little sibling of the Jetson Orin NX. Document the corresponding compatible strings for these devices. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-06dt-bindings: gpio: Remove FSI domain ports on Tegra234Prathamesh Shete
Ports S, T, U and V are in a separate controller that is part of the FSI domain. Remove their definitions from the MAIN controller definitions to get rid of the confusion. This technically breaks ABI compatibility with old device trees. However it doesn't cause issues in practice. The GPIO pins impacted by this are used for non-critical functionality. Fixes: a8b10f3d12cfc ("dt-bindings: gpio: Add Tegra234 support") Signed-off-by: Prathamesh Shete <pshete@nvidia.com> [treding@nvidia.com: rewrite commit message] Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-06riscv: dts: starfive: Add cpu scaling for JH7110 SoCMason Huo
Add the operating-points-v2 to support cpu scaling on StarFive JH7110 SoC. It supports up to 4 cpu frequency loads. Signed-off-by: Mason Huo <mason.huo@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-06-06riscv: dts: starfive: Enable axp15060 pmic for cpufreqMason Huo
The VisionFive 2 board has an embedded pmic axp15060, which supports the cpu DVFS through the dcdc2 regulator. This patch enables axp15060 pmic and configs the dcdc2. Signed-off-by: Mason Huo <mason.huo@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-06-05dt-bindings: usb: xilinx: Replace Manish by PiyushMichal Simek
Manish no longer works for AMD/Xilinx and there is also no activity from him. That's why proposing Piyush as the best candidate instead. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/504444f5c2f4e725ac39cba1d72032d5a00c7cda.1684828805.git.michal.simek@amd.com
2023-06-05dt-bindings: xilinx: Remove Rajan, Jolly and ManishMichal Simek
Rajan, Jolly and Manish are no longer work for AMD/Xilinx and there is no activity from them to continue to maintain bindings that's why remove them. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/9b252dd71c82593fa6b137eca2174d9ab6e57f7a.1684828606.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Used fixed-partitions for QSPI in k26Michal Simek
Using fixed partitions is recommended way how to describe QSPI. Also add label for qspi flash memory to be able to reference it in future. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/7368dc772d8dc29477a880ac2065e2ecb98cf3f5.1684767562.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Add pmu interrupt-affinityRadhey Shyam Pandey
Based on dt-binding "This property should present when there is more than a single SPI" that's also case that's why explicitly specify interrupt affinity to avoid incorrect usage. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/dde2e4b5ac6018adb9bfae05bb3800af6b7c0f0e.1684767562.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Set qspi tx-buswidth to 4Amit Kumar Mahapatra
All ZynqMP boards are setting up tx-buswidth to 1. Due to this the framework only issues 1-1-1 write commands to the GQSPI driver. But the GQSPI controller is capable of handling 1-4-4 write commands, so updated the tx-buswidth to 4. Using all 4 lines will increase the tx data transfer rate, as now the tx data will be transferred on four lines instead on single line. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1f1b0028106d83aa06e0777e91862a07df100fa1.1684767562.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Fix usb node drive strength and slew rateAshok Reddy Soma
As per design, all input/rx pins should have fast slew rate and 12mA drive strength. Rest all pins should be slow slew rate and 4mA drive strength. Fix usb nodes as per this and remove setting of slow slew rate for all the usb group pins. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/379071f44ceb27a0e32d74e13221640922d989d1.1684767562.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Describe TI phy as ethernet-phy-idMichal Simek
TI DP83867 is using strapping based on MIO pins. Tristate setup can influence PHY address. That's why switch description with ethernet-phy-id compatible string which enable calling reset. PHY itself setups phy address after power up or reset. Phy reset is done via gpio. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b49904649a363f40dc9c4d3fa275e42129562082.1684767562.git.michal.simek@amd.com
generated by cgit (git 2.34.1) at 2025-09-13 13:42:18 +0000