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2023-05-26arm64: dts: qcom: sdm845: Add stream-id of qspi to iommusVijaya Krishna Nivarthi
As part of DMA mode support to qspi driver. Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1682328761-17517-5-git-send-email-quic_vnivarth@quicinc.com
2023-05-26arm64: dts: qcom: sc7280: Add stream-id of qspi to iommusVijaya Krishna Nivarthi
As part of DMA mode support to qspi driver. Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1682328761-17517-4-git-send-email-quic_vnivarth@quicinc.com
2023-05-26arm64: dts: qcom: sc7180: Add stream-id of qspi to iommusVijaya Krishna Nivarthi
As part of DMA mode support to qspi driver. Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1682328761-17517-3-git-send-email-quic_vnivarth@quicinc.com
2023-05-26arm64: dts: qcom: msm8996: correct /soc/bus rangesKrzysztof Kozlowski
The bus@0 node should have reg or ranges to fix dtbs W=1 warnings: Warning (unit_address_vs_reg): /soc@0/bus@0: node has a unit name, but no reg or ranges property Warning (simple_bus_reg): /soc@0/bus@0: missing or empty reg/ranges property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # MSM8996 Kagura Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230420180746.860934-1-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: sdm630-nile: correct duplicated reserved memory nodeKrzysztof Kozlowski
SoC DTSI already comes with 85800000 reserved memory node, so assume the author wanted to update its length. This fixes dtbs W=1 warning: Warning (unique_unit_address_if_enabled): /reserved-memory/qhee-code@85800000: duplicate unit-address (also used in node /reserved-memory/reserved@85800000) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230419211921.79871-1-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: sm6125-sprout: align ADC channel node names with bindingsKrzysztof Kozlowski
Bindings expect ADC channel node names to follow specific pattern: sm6125-xiaomi-laurel-sprout.dtb: adc@3100: 'adc-chan@4d', 'adc-chan@4e', 'adc-chan@52', 'adc-chan@54' do not match any of the regexes: ... Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-6-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: sm8550-qrd: add missing PCIE1 PHY AUX clock frequencyKrzysztof Kozlowski
The SM8550 DTSI defines a fixed PCIE1 PHY AUX clock and expects boards to define frequency. Use the same as in MTP8550 to fix: sm8550-qrd.dtb: pcie-1-phy-aux-clk: 'clock-frequency' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-5-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: sm8250: add missing qcom,smmu-500 fallbackKrzysztof Kozlowski
Since commit 6c84bbd103d8 ("dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings") the SMMU is supposed to use qcom,smmu-500 compatible fallback: ['qcom,sm8250-smmu-500', 'qcom,adreno-smmu', 'qcom,smmu-500', 'arm,mmu-500'] is too long 'qcom,sm8250-smmu-500' is not one of ['qcom,msm8996-smmu-v2', 'qcom,msm8998-smmu-v2', 'qcom,sdm630-smmu-v2'] 'qcom,sm8250-smmu-500' is not one of ['qcom,msm8996-smmu-v2', 'qcom,sc7180-smmu-v2', 'qcom,sdm630-smmu-v2', 'qcom,sdm845-smmu-v2' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-4-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: qdu1000: add missing qcom,smmu-500 fallbackKrzysztof Kozlowski
Since commit 6c84bbd103d8 ("dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings") the SMMU is supposed to use qcom,smmu-500 compatible fallback: ['qcom,qdu1000-smmu-500', 'arm,mmu-500'] is too short ['qcom,qdu1000-smmu-500', 'arm,mmu-500'] is too long Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-3-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: ipq8074: drop incorrect SPI bus spi-max-frequencyKrzysztof Kozlowski
The spi-max-frequency property belongs to SPI devices, not SPI controller: ipq8074-hk01.dtb: spi@78b5000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-2-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: ipq6018: drop incorrect SPI bus spi-max-frequencyKrzysztof Kozlowski
The spi-max-frequency property belongs to SPI devices, not SPI controller: ipq6018-cp01-c1.dtb: spi@78b5000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416123730.300863-1-krzysztof.kozlowski@linaro.org
2023-05-26arm64: dts: qcom: add few more reserved memory regionVignesh Viswanathan
In IPQ SoCs, bootloader will collect the system RAM contents upon crash for the post morterm analysis. If we don't reserve the memory region used by bootloader, obviously linux will consume it and upon next boot on crash, bootloader will be loaded in the same region, which will lead to loose some of the data, sometimes we may miss out critical information. So lets reserve the region used by the bootloader. Similarly SBL copies some data into the reserved region and it will be used in the crash scenario. So reserve 1MB for SBL as well. While at it, drop the size padding in the reserved memory region, wherever applicable. Signed-off-by: Vignesh Viswanathan <quic_viswanat@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526110653.27777-4-quic_viswanat@quicinc.com
2023-05-26arm64: dts: qcom: enable the download mode supportVignesh Viswanathan
Like any other Qualcomm SoCs, IPQ8074 and IPQ6018 also supports the download mode to collect the RAM dumps if system crashes, to perform the post mortem analysis. Add support for the same. Signed-off-by: Vignesh Viswanathan <quic_viswanat@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526110653.27777-3-quic_viswanat@quicinc.com
2023-05-26arm64: dts: qcom: sm8450: add crypto nodesNeil Armstrong
Add crypto engine (CE) and CE BAM related nodes and definitions for the SM8450 SoC. Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> [Bhupesh: Corrected the compatible list] Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-12-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sm8350: Add Crypto Engine supportBhupesh Sharma
Add crypto engine (CE) and CE BAM related nodes and definitions to 'sm8350.dtsi'. Co-developed-by and Signed-off-by: Robert Foss <rfoss@kernel.org> [Bhupesh: Switch to '#interconnect-cells = <2>', available since commit 4f287e31ff5f] Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-11-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sm8250: Add Crypto Engine supportBhupesh Sharma
Add crypto engine (CE) and CE BAM related nodes and definitions to 'sm8250.dtsi'. Co-developed-by and Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-10-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sm8150: Add Crypto Engine supportBhupesh Sharma
Add crypto engine (CE) and CE BAM related nodes and definitions to 'sm8150.dtsi'. Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-9-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sm6115: Add Crypto Engine supportBhupesh Sharma
Add crypto engine (CE) and CE BAM related nodes and definitions to 'sm6115.dtsi'. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-8-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sdm845: Fix the slimbam DMA engine compatible stringBhupesh Sharma
As per documentation, Qualcomm SDM845 SoC supports SLIMBAM DMA engine v1.7.4, so use the correct compatible strings. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-5-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: sdm8550: Fix the BAM DMA engine compatible stringBhupesh Sharma
As per documentation, Qualcomm SM8550 SoC supports BAM DMA engine v1.7.4, so use the correct compatible strings. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526192210.3146896-4-bhupesh.sharma@linaro.org
2023-05-26arm64: dts: qcom: ipq9574: add QFPROM nodeKathiravan T
IPQ9574 has efuse region to determine the various HW quirks. Lets add the initial support and the individual fuses will be added as they are required. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526125305.19626-5-quic_kathirav@quicinc.com
2023-05-26arm64: dts: qcom: ipq6018: add QFPROM nodeKathiravan T
IPQ6018 has efuse region to determine the various HW quirks. Lets add the initial support and the individual fuses will be added as they are required. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526125305.19626-4-quic_kathirav@quicinc.com
2023-05-26arm64: dts: qcom: ipq5332: add QFPROM nodeKathiravan T
IPQ5332 has efuse region to determine the various HW quirks. Lets add the initial support and the individual fuses will be added as they are required. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526125305.19626-3-quic_kathirav@quicinc.com
2023-05-26dt-bindings: nvmem: qfprom: add compatible for few IPQ SoCsKathiravan T
Add the QFPROM compatible for IPQ5332, IPQ6018 and IPQ9574 Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526125305.19626-2-quic_kathirav@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: add support for RDP453 variantDevi Priya
Add the initial device tree support for the Reference Design Platform (RDP) 453 based on IPQ9574 family of SoCs. This patch adds support for Console UART, SPI NOR and SMPA1 regulator node. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526153152.777-3-quic_devipriy@quicinc.com
2023-05-26dt-bindings: arm: qcom: document AL02-C8 board based on IPQ9574 familyDevi Priya
Document AL02-C8 (Reference Design Platform 453) board based on IPQ9574 family of SoCs. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526153152.777-2-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: add support for RDP449 variantDevi Priya
Add the initial device tree support for the Reference Design Platform (RDP) 449 based on IPQ9574 family of SoCs. This patch adds support for Console UART, SPI NOR and SMPA1 regulator node. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230516135013.3547-3-quic_devipriy@quicinc.com
2023-05-26dt-bindings: arm: qcom: document AL02-C6 board based on IPQ9574 familyDevi Priya
Document AL02-C6 (Reference Design Platform 449) board based on IPQ9574 family of SoCs. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230516135013.3547-2-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: add support for RDP418 variantDevi Priya
Add the initial device tree support for the Reference Design Platform (RDP) 418 based on IPQ9574 family of SoCs. This patch adds support for Console UART, SPI NOR, eMMC and SMPA1 regulator node. Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230510104359.16678-3-quic_devipriy@quicinc.com
2023-05-26dt-bindings: arm: qcom: document AL02-C2 board based on IPQ9574 familyDevi Priya
Document AL02-C2 (Reference Design Platform 418) board based on IPQ9574 family of SoCs. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230510104359.16678-2-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: Add cpufreq supportDevi Priya
Add cpu freq nodes in the device tree to bump cpu frequency above 800MHz. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517172527.1968-4-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: Add SMPA1 regulator nodeDevi Priya
Add support for SMPA1 regulator node in IPQ9574. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517172527.1968-3-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: Add RPM related nodesDevi Priya
Add RPM Glink & RPM message RAM nodes to support frequency scaling on IPQ9574. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517172527.1968-2-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: Add support for APSS clock controllerDevi Priya
Add the APCS & A73 PLL nodes to support CPU frequency scaling. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230406061314.10916-5-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: ipq9574: rename al02-c7 dts to rdp433Devi Priya
Rename the dts after Reference Design Platform(RDP) to adopt standard naming convention. Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230425084010.15581-7-quic_devipriy@quicinc.com
2023-05-26arm64: dts: qcom: pm7250b: add missing spmi-vadc includeLuca Weiss
This file is using definitions from the spmi-vadc header, so we need to include it. Fixes: 11975b9b8135 ("arm64: dts: qcom: Add pm7250b PMIC") Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407-pm7250b-sid-v1-1-fc648478cc25@fairphone.com
2023-05-26dt-bindings: usb: tegra-xudc: Remove extraneous PHYsThierry Reding
The USB device controller on Tegra210 and later supports one USB 2/3 port, so only a single pair of PHYs is needed. Drop any of the extra PHYs from the bindings. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-05-26arm64: tegra: Fix PCIe regulator for Orin Jetson AGXJon Hunter
The PCIe slot on the Jetson Orin AGX is not working and PCIe cards are not detected. The regulator for the 3.3V regulator for the PCIe is using the wrong GPIO for turning on the regulator. Fix this by updating the 3.3V regulator to use the correct GPIO. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-05-26Merge tag 's32g2-dt-6.5' of https://github.com/chesterlintw/linux-s32g into ↵Arnd Bergmann
soc/dt DT changes for v6.5: - Add missing cache properties for s32g2 and s32v234. * tag 's32g2-dt-6.5' of https://github.com/chesterlintw/linux-s32g: arm64: dts: s32: add missing cache properties Link: https://lore.kernel.org/r/ZHC8PO8lDjTae7nV@linux-8mug Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-05-26Merge tag 'renesas-dts-for-v6.5-tag1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.5 - Add partial display support for the RZ/G2L and RZ/V2L SoCs and the RZ/G2L{,C} SMARC EVK development boards, - Add camera support for the RZ/GV2L SoC and the RZ/V2L and RZ/G2LC SMARC EVK development boards, - Add Multi-Function Timer Pulse Unit 3 support for the RZ/G2L and RZ/V2L SoCs, - Add PWM support for the R-Car V3U SoC. * tag 'renesas-dts-for-v6.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: r8a779a0: Add PWM nodes arm64: dts: renesas: r9a07g054: Add MTU3a node arm64: dts: renesas: r9a07g044: Add MTU3a node arm64: dts: renesas: rzg2lc-smarc: Enable CRU, CSI support arm64: dts: renesas: rzv2l-smarc: Enable CRU, CSI support arm64: dts: renesas: r9a07g054: Add CSI and CRU nodes arm64: dts: renesas: rzg2lc-smarc: Link DSI with ADV7535 arm64: dts: renesas: rzg2l-smarc: Link DSI with ADV7535 arm64: dts: renesas: r9a07g054: Add DSI node arm64: dts: renesas: r9a07g044: Add DSI node arm64: dts: renesas: r9a07g054: Add vspd node arm64: dts: renesas: r9a07g044: Add vspd node arm64: dts: renesas: r9a07g054: Add fcpvd node arm64: dts: renesas: r9a07g044: Add fcpvd node Link: https://lore.kernel.org/r/cover.1685094244.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-05-26Merge tag 'dt-cleanup-6.5' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt Minor improvements in ARM DTS for v6.5 Minor improvements to fix dtbs_check warnings: 1. STE: Align UART nodes with bindings. 2. EN7523: add missing cache properties. * tag 'dt-cleanup-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: ARM: dts: en7523: add missing cache properties ARM: dts: ste: align UART node name with bindings Link: https://lore.kernel.org/r/20230517131255.471002-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-05-26Merge tag 'dt64-cleanup-6.5' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt Minor improvements in ARM64 DTS for v6.5 Mostly minor improvements to fix dtbs_check warnings: 1. mba6ulx: use non-deprecated property for GPIO keys wake-up, 2. Add missing cache properties (APM, Amazon, HiSilicon, Realtek, Synaptics, AllWinner, Microchip). Few older minor and major fixes which were waiting on mailing lists for longer time for Microchip SparX-5: 1. Fix secondary CPU bring-up and crash when talking to PSCI on reference boards (Robert Marko), 2. Simplify CPU address-cells (Robert Marko), 3. Align pinctrl node names with bindings (Michael Walle). * tag 'dt64-cleanup-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: arm64: dts: sparx5: rename pinctrl nodes arm64: dts: microchip: sparx5: correct CPU address-cells arm64: dts: microchip: sparx5: do not use PSCI on reference boards arm64: dts: microchip: add missing cache properties arm64: dts: allwinner: a64: add missing cache properties arm64: dts: synaptics: add missing cache properties arm64: dts: realtek: add missing cache properties arm64: dts: hisilicon: add missing cache properties arm64: dts: amazon: add missing cache properties arm64: dts: apm: add missing cache properties arm64: dts: mba6ulx: correct GPIO keys wakeup Link: https://lore.kernel.org/r/20230517131255.471002-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-05-25dt-bindings: interrupt-controller: sifive,plic: Sort compatible valuesGeert Uytterhoeven
Restore alphabetical sort order of the supported SiFive-compatible values. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-05-25dt-bindings: timer: sifive,clint: Clean up compatible value sectionGeert Uytterhoeven
Replace the sentences in the description listing some supported variants by comments on the individual compatible values, to ease future maintenance. While at it, restore alphabetical sort order. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-05-25arm64: dts: qcom: Add msm8939 Sony Xperia M4 AquaBryan O'Donoghue
Add a basic booting DTS for the Sony Xperia M4 Aqua aka "tulip". Tulip is paired with: - wcn3660 - smb1360 battery charger - 720p Truly NT35521 Panel Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407194905.611461-6-bryan.odonoghue@linaro.org
2023-05-25arm64: dts: qcom: Add Square apq8039-t2 boardBryan O'Donoghue
The apq8039-t2 is an apq8039 based board paired with a wcn3680b WiFi chipset. Co-developed-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Co-developed-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Jun Nie <jun.nie@linaro.org> Co-developed-by: Benjamin Li <benl@squareup.com> Signed-off-by: Benjamin Li <benl@squareup.com> Co-developed-by: James Willcox <jwillcox@squareup.com> Signed-off-by: James Willcox <jwillcox@squareup.com> Co-developed-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org> Co-developed-by: Joseph Gates <jgates@squareup.com> Signed-off-by: Joseph Gates <jgates@squareup.com> Co-developed-by: Max Chen <mchen@squareup.com> Signed-off-by: Max Chen <mchen@squareup.com> Co-developed-by: Zac Crosby <zac@squareup.com> Signed-off-by: Zac Crosby <zac@squareup.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407194905.611461-5-bryan.odonoghue@linaro.org
2023-05-25arm64: dts: qcom: Add msm8939-pm8916.dtsi includeStephan Gerhold
The msm8939-pm8916.dtsi include configures the regulator supplies of MSM8939 used together with PM8916, as recommended by Qualcomm. In rare cases where boards deviate from the recommended design they can just avoid using this include. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407194905.611461-4-bryan.odonoghue@linaro.org
2023-05-25arm64: dts: qcom: Add msm8939 SoCBryan O'Donoghue
Add msm8939 a derivative SoC of msm8916. This SoC contains a number of key differences to msm8916. - big.LITTLE Octa Core - quad 1.5GHz + quad 1.0GHz - DRAM 1x800 LPDDR3 - Camera 4+4 lane CSI - Venus @ 1080p60 HEVC - DSI x 2 - Adreno A405 - WiFi wcn3660/wcn3680b 802.11ac Co-developed-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Co-developed-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Jun Nie <jun.nie@linaro.org> Co-developed-by: Benjamin Li <benl@squareup.com> Signed-off-by: Benjamin Li <benl@squareup.com> Co-developed-by: James Willcox <jwillcox@squareup.com> Signed-off-by: James Willcox <jwillcox@squareup.com> Co-developed-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org> Co-developed-by: Joseph Gates <jgates@squareup.com> Signed-off-by: Joseph Gates <jgates@squareup.com> Co-developed-by: Max Chen <mchen@squareup.com> Signed-off-by: Max Chen <mchen@squareup.com> Co-developed-by: Zac Crosby <zac@squareup.com> Signed-off-by: Zac Crosby <zac@squareup.com> Co-developed-by: Vincent Knecht <vincent.knecht@mailoo.org> Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org> Co-developed-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407194905.611461-3-bryan.odonoghue@linaro.org
2023-05-25dt-bindings: vendor-prefixes: Add SquareBryan O'Donoghue
Add vendor prefix for Square (https://squareup.com). Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230407194905.611461-2-bryan.odonoghue@linaro.org
2023-05-24dt-bindings: arm: qcom: Add missing msm8960Rudraksha Gupta
The list of supported 'SoC's didn't include msm8960 even though qcom,msm8960-cdp exists. Signed-off-by: Rudraksha Gupta <guptarud@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230524230338.120619-1-guptarud@gmail.com
generated by cgit (git 2.34.1) at 2025-09-14 04:06:06 +0000