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2017-11-08nvmem: imx-ocotp: Enable i.MX7D OTP write supportBryan O'Donoghue
After applying patches for both banked access and write timings we can re-enable the OTP write interface on i.MX7D processors. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-08nvmem: imx-ocotp: Add i.MX7D timing write clock setup supportBryan O'Donoghue
This patch adds logic to correctly setup the write timing parameters when blowing an OTP fuse for the i.MX7S/D. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-08nvmem: imx-ocotp: Move i.MX6 write clock setup to dedicated functionBryan O'Donoghue
The i.MX7S/D has a different set of timing requirements, as a pre-cursor to adding the i.MX7 timing parameters, move the i.MX6 stuff to a dedicated function. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-08nvmem: imx-ocotp: Add support for banked OTP addressingBryan O'Donoghue
The i.MX7S/D takes the bank address in the CTRLn.ADDR field and the data value in one of the DATAx {0, 1, 2, 3} register fields. The current write routine is based on writing the CTRLn.ADDR field and writing a single DATA register only. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-08nvmem: imx-ocotp: Pass parameters via a structBryan O'Donoghue
It will be useful in later patches to know the register access mode and bit-shift to apply to a given input offset. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-08nvmem: imx-ocotp: Restrict OTP write to IMX6 processorsBryan O'Donoghue
i.MX7S/D have a different scheme for addressing the OTP registers inside the OCOTP block. Currently it's possible to address the wrong OTP registers given the disparity between IMX6 and IMX7 OTP addressing. Since OTP programming is one-time destructive its important we restrict this interface ASAP. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-08nvmem: uniphier: add UniPhier eFuse driverKeiji Hayashibara
Add eFuse driver for Socionext UniPhier series SoC. Note that eFuse device is under soc-glue and this register implements as read only. Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-08dt-bindings: nvmem: add description for UniPhier eFuseKeiji Hayashibara
Add uniphier-efuse dt-bindings documentation. Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-08gpio: Introduce struct gpio_irq_chip.firstThierry Reding
Some GPIO chips cannot support sparse IRQ numbering and therefore need to manually allocate their interrupt descriptors statically. For these cases, a driver can pass the first allocated IRQ via the struct gpio_irq_chip's "first" field and thereby cause the IRQ domain to map all IRQs during initialization. Suggested-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08gpio: Disambiguate struct gpio_irq_chip.nestedThierry Reding
The nested field in struct gpio_irq_chip currently has two meanings. On one hand it marks an IRQ chip as being nested (as opposed to chained), while on the other hand it also means that an IRQ chip uses nested thread handlers. However, nested IRQ chips can already be identified by the fact that they don't pass a parent handler (the driver would instead already have installed a nested handler using request_irq()). Therefore, the only use for the nested attribute is to inform gpiolib that an IRQ chip uses nested thread handlers (as opposed to regular, non-threaded handlers). To clarify its purpose, rename the field to "threaded". Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08gpio: Add Tegra186 supportThierry Reding
Tegra186 has two GPIO controllers that are largely register compatible between one another but are completely different from the controller found on earlier generations. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08gpio: Export gpiochip_irq_{map,unmap}()Thierry Reding
Export these functions so that drivers can explicitly use these when setting up their IRQ domain. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08gpio: Implement tighter IRQ chip integrationThierry Reding
Currently GPIO drivers are required to add the GPIO chip and its corresponding IRQ chip separately, which can result in a lot of boilerplate. Use the newly introduced struct gpio_irq_chip, embedded in struct gpio_chip, that drivers can fill in if they want the GPIO core to automatically register the IRQ chip associated with a GPIO chip. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08gpio: Move lock_key into struct gpio_irq_chipThierry Reding
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08gpio: Move irq_valid_mask into struct gpio_irq_chipThierry Reding
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08gpio: Move irq_nested into struct gpio_irq_chipThierry Reding
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08Merge tag 'kvm-ppc-fixes-4.14-2' of ↵Radim Krčmář
git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc PPC KVM fixes for 4.14 Just one fix here for a host crash that can occur with HV KVM as a result of resizing the guest hashed page table (HPT).
2017-11-08gpio: Move irq_chained_parent to struct gpio_irq_chipThierry Reding
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08gpio: Move irq_default_type to struct gpio_irq_chipThierry Reding
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08gpio: Move irq_handler to struct gpio_irq_chipThierry Reding
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08gpio: Move irqdomain into struct gpio_irq_chipThierry Reding
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08gpio: Move irqchip into struct gpio_irq_chipThierry Reding
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08gpio: Introduce struct gpio_irq_chipThierry Reding
This new structure will be used to group all fields related to interrupt handling in a GPIO chip. Doing so will properly namespace these fields and make it easier to distinguish which fields are used for IRQ support. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08nvmem: set nvmem->owner to nvmem->dev->driver->owner if unsetMasahiro Yamada
All nvmem drivers are supposed to set the owner field of struct nvmem_config, but this matches nvmem->dev->driver->owner. As far as I see in drivers/nvmem/ directory, all the drivers are the case. So, make nvmem_register() set the nvmem's owner to the associated driver's owner unless nvmem_config sets otherwise. Remove .owner settings in the drivers that are now redundant. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-08nvmem: qfprom: fix different address space warnings of sparseMasahiro Yamada
Fix the following sparse warnings: drivers/nvmem/qfprom.c:23:30: warning: incorrect type in initializer (different address spaces) drivers/nvmem/qfprom.c:23:30: expected void [noderef] <asn:2>*base drivers/nvmem/qfprom.c:23:30: got void *context drivers/nvmem/qfprom.c:36:30: warning: incorrect type in initializer (different address spaces) drivers/nvmem/qfprom.c:36:30: expected void [noderef] <asn:2>*base drivers/nvmem/qfprom.c:36:30: got void *context drivers/nvmem/qfprom.c:76:22: warning: incorrect type in assignment (different address spaces) drivers/nvmem/qfprom.c:76:22: expected void *static [toplevel] [assigned] priv drivers/nvmem/qfprom.c:76:22: got void [noderef] <asn:2>*[assigned] base The type of nvmem_config->priv is (void *), so sparse complains about assignment of the base address with (void __iomem *) type. Even if we cast it out, sparse still warns: warning: cast removes address space of expression Of course, we can shut up the sparse by marking __force, but a more correct way is to put the base address into driver private data. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-08nvmem: mtk-efuse: fix different address space warnings of sparseMasahiro Yamada
Fix the following sparse warnings: drivers/nvmem/mtk-efuse.c:24:30: warning: incorrect type in initializer (different address spaces) drivers/nvmem/mtk-efuse.c:24:30: expected void [noderef] <asn:2>*base drivers/nvmem/mtk-efuse.c:24:30: got void *context drivers/nvmem/mtk-efuse.c:37:30: warning: incorrect type in initializer (different address spaces) drivers/nvmem/mtk-efuse.c:37:30: expected void [noderef] <asn:2>*base drivers/nvmem/mtk-efuse.c:37:30: got void *context drivers/nvmem/mtk-efuse.c:69:23: warning: incorrect type in assignment (different address spaces) drivers/nvmem/mtk-efuse.c:69:23: expected void *priv drivers/nvmem/mtk-efuse.c:69:23: got void [noderef] <asn:2>*[assigned] base The type of nvmem_config->priv is (void *), so sparse complains about assignment of the base address with (void __iomem *) type. Even if we cast it out, sparse still warns: warning: cast removes address space of expression Of course, we can shut up the sparse by marking __force, but a more correct way is to put the base address into driver private data. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-08nvmem: mtk-efuse: use stack for nvmem_config instead of malloc'ing itMasahiro Yamada
nvmem_register() copies all the members of nvmem_config to nvmem_device. So, nvmem_config is one-time use data during probing. There is no point to keep it until the driver detach. Using stack should be no problem because nvmem_config is pretty small. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-08nvmem: imx-iim: use stack for nvmem_config instead of malloc'ing itMasahiro Yamada
nvmem_register() copies all the members of nvmem_config to nvmem_device. So, nvmem_config is one-time use data during probing. There is no point to keep it until the driver detach. Using stack should be no problem because nvmem_config is pretty small. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-08pinctrl: gemini: Fix GMAC groupsLinus Walleij
The GMII groups need to be split across GMAC0 and GMAC1 since GMAC0 is always available but GMAC1 masks GPIO2 lines 0-7 so we might want just one interface out. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08zd1201: remove unused variable framelenColin Ian King
Variable framelen is assigned but never read, hence it is redundant and can be removed. Cleans up clang warning: drivers/net/wireless/zydas/zd1201.c:234:3: warning: Value stored to 'framelen' is never read Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-11-08orinoco_usb: remove redundant pointer devColin Ian King
The pointer dev is assigned but never read, hence it is redundant and can be removed. Cleans up clang warning: drivers/net/wireless/intersil/orinoco/orinoco_usb.c:1468:2: warning: Value stored to 'dev' is never read Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-11-08iwlegacy: remove redundant pointer sta_privColin Ian King
Pointer sta_priv is assigned but never read, hence it is redundant and can be removed. Cleans up clang warning: drivers/net/wireless/intel/iwlegacy/4965-rs.c:2163:2: warning: Value stored to 'sta_priv' is never read Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-11-08driver core: Fix device link deferred probeAdrian Hunter
A device probe deferred because of a device link is never probed again because it is not added to the deferred_probe_pending_list. Add it, taking care of the race with driver_deferred_probe_trigger(). Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-08pinctrl: qcom: spmi-gpio: Add pmi8994 gpio supportRajendra Nayak
Update the binding and driver for pmi8994-gpios Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08pinctrl: ti-iodelay: remove redundant unused variable devColin Ian King
The pointer dev is being assigned but is never used, hence it is redundant and can be removed. Cleans up clang warnings: drivers/pinctrl/ti/pinctrl-ti-iodelay.c:582:2: warning: Value stored to 'dev' is never read drivers/pinctrl/ti/pinctrl-ti-iodelay.c:701:2: warning: Value stored to 'dev' is never read Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08pinctrl: max77620: Use common error handling code in max77620_pinconf_set()Markus Elfring
* Add a jump target so that a specific error message is stored only once at the end of this function implementation. * Replace two calls of the function "dev_err" by goto statements. * Adjust two condition checks. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08pinctrl: gemini: Implement clock skew/delay configLinus Walleij
This enabled pin config on the Gemini driver and implements pin skew/delay so that the ethernet pins clocking can be properly configured. Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08pinctrl: gemini: Use generic DT parserLinus Walleij
We can just use the generic Device Tree parser code in this driver and save some code. Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08pinctrl: Add skew-delay pin config and bindingsLinus Walleij
Some pin controllers (such as the Gemini) can control the expected clock skew and output delay on certain pins with a sub-nanosecond granularity. This is typically done by shunting in a number of double inverters in front of or behind the pin. Make it possible to configure this with a generic binding. Cc: devicetree@vger.kernel.org Acked-by: Rob Herring <robh@kernel.org> Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08rtlwifi: remove redundant initialization to cfg_cmdColin Ian King
cfg_cmd is initialized to zero and this value is never read, instead it is over-written in the start of a do-while loop. Remove the redundant initialization. Cleans up clang warning: drivers/net/wireless/realtek/rtlwifi/core.c:1750:22: warning: Value stored to 'cfg_cmd' during its initialization is never read Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-11-08MIPS: AR7: Defer registration of GPIOJonas Gorski
When called from prom init code, ar7_gpio_init() will fail as it will call gpiochip_add() which relies on a working kmalloc() to alloc the gpio_desc array and kmalloc is not useable yet at prom init time. Move ar7_gpio_init() to ar7_register_devices() (a device_initcall) where kmalloc works. Fixes: 14e85c0e69d5 ("gpio: remove gpio_descs global array") Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Yoshihiro YUNOMAE <yoshihiro.yunomae.ez@hitachi.com> Cc: Nicolas Schichan <nschichan@freebox.fr> Cc: linux-mips@linux-mips.org Cc: linux-serial@vger.kernel.org Cc: <stable@vger.kernel.org> # 3.19+ Patchwork: https://patchwork.linux-mips.org/patch/17542/ Signed-off-by: James Hogan <jhogan@kernel.org>
2017-11-08rtlwifi: remove redundant pointer tid_dataColin Ian King
tid_data is assigned but never read, hence it is redundant and can be removed. Cleans up clang warning: drivers/net/wireless/realtek/rtlwifi/base.c:1581:2: warning: Value stored to 'tid_data' is never read Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-11-08rtlwifi: drop unused ppsc->last_wakeup_timeArnd Bergmann
The calculation of ppsc->last_wakeup_time is not y2038-safe, but the variable is not used at all, so we can simply drop it. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-11-08rtlwifi: use ktime_get_real_seconds() for suspend timeArnd Bergmann
do_gettimeofday() is deprecated and slower than necessary for the purpose of reading the seconds. This changes rtl_op_suspend/resume to use ktime_get_real_seconds() instead, which is simpler and avoids confusion about whether it is y2038-safe or not. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-11-08rtlwifi: fix uninitialized rtlhal->last_suspend_sec timeArnd Bergmann
We set rtlhal->last_suspend_sec to an uninitialized stack variable, but unfortunately gcc never warned about this, I only found it while working on another patch. I opened a gcc bug for this. Presumably the value of rtlhal->last_suspend_sec is not all that important, but it does get used, so we probably want the patch backported to stable kernels. Cc: stable@vger.kernel.org Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82839 Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-11-08rtlwifi: rtl_pci: Extend recognized interrupt parameters from two to four ISRPing-Ke Shih
8822be checks H2CQ by int_d, so we extend to four ISR. Also, irq_mask is extended to four. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Cc: Yan-Hsuan Chuang <yhchuang@realtek.com> Cc: Birming Chiu <birming@realtek.com> Cc: Shaofu <shaofu@realtek.com> Cc: Steven Ting <steventing@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-11-08rtlwifi: rtl_pci: Add ID for 8822BEPing-Ke Shih
When the driver for the RTL8822BE is added, it will need an ID for further use. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Cc: Yan-Hsuan Chuang <yhchuang@realtek.com> Cc: Birming Chiu <birming@realtek.com> Cc: Shaofu <shaofu@realtek.com> Cc: Steven Ting <steventing@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-11-08rtlwifi: rtl_pci: Add fill_tx_special_desc to issue H2C data, and process ↵Ping-Ke Shih
TXOK in interrupt. With the RTL8822BE, an H2C tx queue is added to download FW and special data. This change implements the support code in rtl_pci. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Cc: Yan-Hsuan Chuang <yhchuang@realtek.com> Cc: Birming Chiu <birming@realtek.com> Cc: Shaofu <shaofu@realtek.com> Cc: Steven Ting <steventing@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-11-08rtlwifi: rtl_pci: Add support for 8822be TX/RX BDPing-Ke Shih
The number of TX/RX BD desc for 8822BE is 512. The TX/RX BD architecture of 8822BE is the same as 8192EE. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Cc: Yan-Hsuan Chuang <yhchuang@realtek.com> Cc: Birming Chiu <birming@realtek.com> Cc: Shaofu <shaofu@realtek.com> Cc: Steven Ting <steventing@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-11-08rtlwifi: rtl_pci: Simplify some code be eliminating extraneous variablesLarry Finger
In several places, the code assigns a variable inside an "if" or "case" block, but uses it only once. The code is simplified by eliminating the extraneous variable. With this change, one level of indenting is saved. This patch does not cause any functional changes in the binary code. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Cc: Ping-Ke Shih <pkshih@realtek.com> Cc: Yan-Hsuan Chuang <yhchuang@realtek.com> Cc: Birming Chiu <birming@realtek.com> Cc: Shaofu <shaofu@realtek.com> Cc: Steven Ting <steventing@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>