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2024-03-15Merge tag 'nand/for-6.9' into mtd/nextMiquel Raynal
Raw NAND The main series brought is an update of the Broadcom support to support all BCMBCA SoCs and their specificity (ECC, write protection, configuration straps), plus a few misc fixes and changes in the main driver. Device tree updates are also part of this PR, initially because of a misunderstanding on my side. The STM32_FMC2 controller driver is also upgraded to properly support MP1 and MP25 SoCs. A new compatible is added for an Atmel flavor. Among all these feature changes, there is as well a load of continuous read related fixes, avoiding more corner conditions and clarifying the logic. Finally a few miscellaneous fixes are made to the core, the lpx32xx_mlc, fsl_lbc, Meson and Atmel controller driver, as well as final one in the Hynix vendor driver. SPI-NAND The ESMT support has been extended to match 5 bytes ID to avoid collisions. Winbond support on its side receives support for W25N04KV chips.
2024-03-15mtd: rawnand: Ensure continuous reads are well disabledMiquel Raynal
The cont_read.ongoing flag should only be enabled at the beginning of a read operation, and also disabled at its end, so we never end up triggering nasty side effects outside of this scope. The mtd core being highly serialized, we should not be bothered by parallel accesses anyway. In case we reach the end of a read operation and the boolean was not properly disabled, it's a bug, but it's totally manageable. So warn, and then fix the boolean state. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240307115315.1942678-2-miquel.raynal@bootlin.com
2024-03-15mtd: rawnand: Constrain even more when continuous reads are enabledMiquel Raynal
As a matter of fact, continuous reads require additional handling at the operation level in order for them to work properly. The core helpers do have this additional logic now, but any time a controller implements its own page helper, this extra logic is "lost". This means we need another level of per-controller driver checks to ensure they can leverage continuous reads. This is for now unsupported, so in order to ensure continuous reads are enabled only when fully using the core page helpers, we need to add more initial checks. Also, as performance is not relevant during raw accesses, we also prevent these from enabling the feature. This should solve the issue seen with controllers such as the STM32 FMC2 when in sequencer mode. In this case, the continuous read feature would be enabled but not leveraged, and most importantly not disabled, leading to further operations to fail. Reported-by: Christophe Kerello <christophe.kerello@foss.st.com> Fixes: 003fe4b9545b ("mtd: rawnand: Support for sequential cache reads") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Christophe Kerello <christophe.kerello@foss.st.com> Link: https://lore.kernel.org/linux-mtd/20240307115315.1942678-1-miquel.raynal@bootlin.com
2024-03-15mtd: rawnand: brcmnand: Add support for getting ecc setting from strapWilliam Zhang
BCMBCA broadband SoC based board design does not specify ecc setting in dts but rather use the SoC NAND strap info to obtain the ecc strength and spare area size setting. Add brcm,nand-ecc-use-strap dts propety for this purpose and update driver to support this option. However these two options can not be used at the same time. Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: David Regan <dregan@broadcom.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240301173308.226004-1-william.zhang@broadcom.com
2024-03-15mtd: rawnand: brcmnand: fix sparse warningsWilliam Zhang
Fix the following sparse warnings: sparse warnings: (new ones prefixed by >>) >> drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c:79:41: sparse: sparse: cast removes address space '__iomem' of expression drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c:80:17: sparse: sparse: cast removes address space '__iomem' of expression drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c:80:17: sparse: sparse: cast removes address space '__iomem' of expression drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c:80:17: sparse: sparse: cast removes address space '__iomem' of expression Fixes: c52c16d1bee5 ("mtd: rawnand: brcmnand: Add BCMBCA read data bus interface") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202402270940.gmVLVRg0-lkp@intel.com/ Signed-off-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240227190258.200929-1-william.zhang@broadcom.com
2024-03-15mtd: nand: raw: atmel: Fix comment in timings preparationAlexander Dahl
Looks like a copy'n'paste mistake introduced when initially adding the dynamic timings feature with commit f9ce2eddf176 ("mtd: nand: atmel: Add ->setup_data_interface() hooks"). The context around this and especially the code itself suggests 'read' is meant instead of write. Signed-off-by: Alexander Dahl <ada@thorsis.com> Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240226122537.75097-1-ada@thorsis.com
2024-03-15mtd: rawnand: Ensure all continuous terms are always in syncMiquel Raynal
While crossing a LUN boundary, it is probably safer (and clearer) to keep all members of the continuous read structure aligned, including the pause page (which is the last page of the lun or the last page of the continuous read). Once these members properly in sync, we can use the rawnand_cap_cont_reads() helper everywhere to "prepare" the next continuous read if there is one. Fixes: bbcd80f53a5e ("mtd: rawnand: Prevent crossing LUN boundaries during sequential reads") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240223115545.354541-4-miquel.raynal@bootlin.com
2024-03-15mtd: rawnand: Add a helper for calculating a page indexMiquel Raynal
For LUN crossing boundaries, it is handy to know what is the index of the last page in a LUN. This helper will soon be reused. At the same time I rename page_per_lun to ppl in the calling function to clarify the lines. Cc: stable@vger.kernel.org # v6.7 Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240223115545.354541-3-miquel.raynal@bootlin.com
2024-03-15mtd: rawnand: Fix and simplify again the continuous read derivationsMiquel Raynal
We need to avoid the first page if we don't read it entirely. We need to avoid the last page if we don't read it entirely. While rather simple, this logic has been failed in the previous fix. This time I wrote about 30 unit tests locally to check each possible condition, hopefully I covered them all. Reported-by: Christophe Kerello <christophe.kerello@foss.st.com> Closes: https://lore.kernel.org/linux-mtd/20240221175327.42f7076d@xps-13/T/#m399bacb10db8f58f6b1f0149a1df867ec086bb0a Suggested-by: Christophe Kerello <christophe.kerello@foss.st.com> Fixes: 828f6df1bcba ("mtd: rawnand: Clarify conditions to enable continuous reads") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Christophe Kerello <christophe.kerello@foss.st.com> Link: https://lore.kernel.org/linux-mtd/20240223115545.354541-2-miquel.raynal@bootlin.com
2024-03-15mtd: rawnand: hynix: remove @nand_technology kernel-doc descriptionRandy Dunlap
Remove the extraneous kernel-doc description for @nand_technology to eliminate a kernel-doc warning: nand_hynix.c:39: warning: Excess struct member 'nand_technology' description in 'hynix_nand' Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Richard Weinberger <richard@nod.at> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: linux-mtd@lists.infradead.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240224014639.16145-1-rdunlap@infradead.org
2024-03-15dt-bindings: atmel-nand: add microchip,sam9x7-pmeccVarshini Rajendran
Add microchip,sam9x7-pmecc to DT bindings documentation. Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240223172520.671940-1-varshini.rajendran@microchip.com
2024-03-15mtd: rawnand: brcmnand: Support write protection setting from dtsWilliam Zhang
The write protection feature is controlled by the module parameter wp_on with default set to enabled. But not all the board use this feature especially in BCMBCA broadband board. And module parameter is not sufficient as different board can have different option. Add a device tree property and allow this feature to be configured through the board dts on per board basis. Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Reviewed-by: Kamal Dasu <kamal.dasu@broadcom.com> Reviewed-by: David Regan <dregan@broadcom.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240223034758.13753-14-william.zhang@broadcom.com
2024-03-15mtd: rawnand: brcmnand: Add BCMBCA read data bus interfaceWilliam Zhang
The BCMBCA broadband SoC integrates the NAND controller differently than STB, iProc and other SoCs. It has different endianness for NAND cache data. Add a SoC read data bus shim for BCMBCA to meet the specific SoC need and performance improvement using the optimized memcpy function on NAND cache memory. Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: David Regan <dregan@broadcom.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240223034758.13753-12-william.zhang@broadcom.com
2024-03-15mtd: rawnand: brcmnand: Rename bcm63138 nand driverWilliam Zhang
In preparing to support multiple BCMBCA SoCs, rename bcm63138 to bcmbca in the driver code and driver file name. Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: David Regan <dregan@broadcom.com> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240223034758.13753-11-william.zhang@broadcom.com
2024-03-15arm64: dts: broadcom: bcmbca: Update router boardsWilliam Zhang
Enable the nand controller and add WP pin connection property in actual board dts as they are board level properties now that they are disabled and moved out from SoC dtsi. Also remove the unnecessary brcm,nand-has-wp property from AC5300 board. This property is only needed for some old controller that this board does not apply. Signed-off-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/linux-mtd/20240223034758.13753-10-william.zhang@broadcom.com
2024-03-15arm64: dts: broadcom: bcmbca: Add NAND controller nodeWilliam Zhang
Add support for Broadcom STB NAND controller in BCMBCA ARMv8 chip dts files. Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: David Regan <dregan@broadcom.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/linux-mtd/20240223034758.13753-9-william.zhang@broadcom.com
2024-03-15ARM: dts: broadcom: bcmbca: Add NAND controller nodeWilliam Zhang
Add support for Broadcom STB NAND controller in BCMBCA ARMv7 chip dts files. Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: David Regan <dregan@broadcom.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/linux-mtd/20240223034758.13753-8-william.zhang@broadcom.com
2024-03-13mtd: spi-nor: core: correct type of iMuhammad Usama Anjum
The i should be signed to find out the end of the loop. Otherwise, i >= 0 is always true and loop becomes infinite. Make its type to be int. Fixes: 6a9eda34418f ("mtd: spi-nor: core: set mtd->eraseregions for non-uniform erase map") Signed-off-by: Muhammad Usama Anjum <usama.anjum@collabora.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240304090103.818092-1-usama.anjum@collabora.com
2024-03-13Merge tag 'spi-nor/for-6.9' into mtd/nextMiquel Raynal
SPI NOR gets the non uniform erase code cleaned. We stopped using bitmasks for erase types and flags, and instead introduced dedicated members. We then passed the SPI NOR erase map to MTD. Users can now determine the erase regions and make informed decisions on partitions size.
2024-02-26mtd: spi-nor: core: set mtd->eraseregions for non-uniform erase mapTakahiro Kuwano
Some of Infineon SPI NOR flash devices support hybrid sector layout that overlays 4KB sectors on a 256KB sector and SPI NOR framework recognizes that by parsing SMPT and construct params->erase_map. The hybrid sector layout is similar to CFI flash devices that have small sectors on top and/or bottom address. In case of CFI flash devices, the erase map information is parsed through CFI table and populated into mtd->eraseregions so that users can create MTD partitions that aligned with small sector boundaries. This patch provides the same capability to SPI NOR flash devices that have non-uniform erase map. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/35d0962986e493b06c13bdf7ada8130a9966dc02.1708404584.git.Takahiro.Kuwano@infineon.com Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2024-02-26mtd: spi-nor: core: get rid of SNOR_OVERLAID_REGION flagTakahiro Kuwano
Only SNOR_OVERLAID_REGION is defined for flags in the spi_nor_erase_region structure. It can be replaced by a boolean parameter. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/076416d5dc8328dec72d31db12b9bec96bf0ac66.1708404584.git.Takahiro.Kuwano@infineon.com Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2024-02-26mtd: spi-nor: core: get rid of SNOR_LAST_REGION flagTakahiro Kuwano
Introduce n_regions in spi_nor_erase_map structure and remove SNOR_LAST_REGION flag. Loop logics that depend on the flag are also reworked to use n_regions as loop condition. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Suggested-by: Tudor Ambarus <tudor.ambarus@linaro.org> Suggested-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/eded84294bd81e966d6f423e578fc2cfb9a4a5b6.1708404584.git.Takahiro.Kuwano@infineon.com [ta: update spi_nor_init_erase_cmd_list() and break the for loop sooner.] Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2024-02-26dt-bindings: mtd: brcmnand: Add ecc strap propertyWilliam Zhang
Add brcm,nand-ecc-use-strap to get ecc and spare area size settings from board boot strap for broadband board designs because they do not specify ecc setting in dts but rather using the strap setting. Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240223034758.13753-7-william.zhang@broadcom.com
2024-02-26dt-bindings: mtd: brcmnand: Add WP pin connection propertyWilliam Zhang
Add brcm,wp-not-connected property to have an option for disabling this feature on broadband board design that does not connect WP pin. Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240223034758.13753-6-william.zhang@broadcom.com
2024-02-26dt-bindings: mtd: brcmnand: Updates for bcmbca SoCsWilliam Zhang
Update the descriptions to reflect different families of broadband SoC and use the general name bcmbca for ARM based SoC. Remove the requirement of interrupts property to reflect the driver code and only require interrupt-names when interrupts property present. Also add myself to the list of maintainers. Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: David Regan <dregan@broadcom.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240223034758.13753-5-william.zhang@broadcom.com
2024-02-26mtd: rawnand: brcmnand: update log level messagesDavid Regan
Update log level messages so that more critical messages can be logged to console and help the troubleshooting with field devices. Signed-off-by: David Regan <dregan@broadcom.com> Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240223034758.13753-4-william.zhang@broadcom.com
2024-02-26mtd: rawnand: brcmnand: fix style issuesWilliam Zhang
Fix various style issues. Signed-off-by: David Regan <dregan@broadcom.com> Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240223034758.13753-3-william.zhang@broadcom.com
2024-02-26mtd: rawnand: brcmnand: exec_op helper functions return type fixesDavid Regan
Fix return types for exec_op reset and status helper functions. Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: http://lists.infradead.org/pipermail/linux-mtd/2023-December/102423.html Fixes: 3c8260ce7663 ("mtd: rawnand: brcmnand: exec_op implementation") Signed-off-by: David Regan <dregan@broadcom.com> Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240223034758.13753-2-william.zhang@broadcom.com
2024-02-26mtd: rawnand: stm32_fmc2: add MP25 supportChristophe Kerello
FMC2 IP supports up to 4 chip select. On MP1 SoC, only 2 of them are available when on MP25 SoC, the 4 chip select are available. Let's use a platform data structure for parameters that will differ. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240219140505.85794-4-christophe.kerello@foss.st.com
2024-02-26mtd: rawnand: stm32_fmc2: use dma_get_slave_caps to get DMA max burstChristophe Kerello
Use dma_get_slave_caps API to get the max burst size of a DMA channel. For MP1 SoCs, MDMA is used and the max burst size is 128. For MP25 SoC, DMA3 is used and the max burst size is 64. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240219140505.85794-3-christophe.kerello@foss.st.com
2024-02-26dt-bindings: mtd: st,stm32: add MP25 supportChristophe Kerello
Add a compatible string to support MP25 SoC. FMC2 IP supports up to 4 chip select. On MP1 SoC, only 2 of them are available when on MP25 SoC, the 4 chip select are available. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240219140505.85794-2-christophe.kerello@foss.st.com
2024-02-26mtd: rawnand: lpc32xx_mlc: fix irq handler prototypeArnd Bergmann
clang-16 warns about mismatched function prototypes: drivers/mtd/nand/raw/lpc32xx_mlc.c:783:29: error: cast from 'irqreturn_t (*)(int, struct lpc32xx_nand_host *)' (aka 'enum irqreturn (*)(int, struct lpc32xx_nand_host *)') to 'irq_handler_t' (aka 'enum irqreturn (*)(int, void *)') converts to incompatible function type [-Werror,-Wcast-function-type-strict] Change the interrupt handler to the normal way of just passing a void* pointer and converting it inside the function.. Fixes: 70f7cb78ec53 ("mtd: add LPC32xx MLC NAND driver") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240213100146.455811-1-arnd@kernel.org
2024-02-26mtd: rawnand: Prefer struct_size over open coded arithmeticErick Archer
This is an effort to get rid of all multiplications from allocation functions in order to prevent integer overflows [1]. As the "chip" variable is a pointer to "struct mtk_nfc_nand_chip" and this structure ends in a flexible array: struct mtk_nfc_nand_chip { [...] u8 sels[] __counted_by(nsels); }; the preferred way in the kernel is to use the struct_size() helper to do the arithmetic instead of the argument "size + count * size" in the devm_kzalloc() function. This way, the code is more readable and safer. Link: https://www.kernel.org/doc/html/latest/process/deprecated.html#open-coded-arithmetic-in-allocator-arguments [1] Link: https://github.com/KSPP/linux/issues/160 [2] Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Erick Archer <erick.archer@gmx.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240211091633.4545-1-erick.archer@gmx.com
2024-02-26mtd: rawnand: meson: fix scrambling mode value in command macroArseniy Krasnov
Scrambling mode is enabled by value (1 << 19). NFC_CMD_SCRAMBLER_ENABLE is already (1 << 19), so there is no need to shift it again in CMDRWGEN macro. Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com> Cc: <Stable@vger.kernel.org> Fixes: 8fae856c5350 ("mtd: rawnand: meson: add support for Amlogic NAND flash controller") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240210214551.441610-1-avkrasnov@salutedevices.com
2024-02-26mtd: rawnand: remove redundant assignment to variable bbtblocksColin Ian King
The variable bbtblocks is being assigned a value that is never read. The assignment is redundant and can be removed. Cleans up clang scan build warning: drivers/mtd/nand/raw/nand_bbt.c:579:3: warning: Value stored to 'bbtblocks' is never read [deadcode.DeadStores] Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240209174019.3933233-1-colin.i.king@gmail.com
2024-02-26mtd: spi-nor: core: rework struct spi_nor_erase_regionTakahiro Kuwano
Encoding bitmask flags into offset worsen the code readability. The erase type mask and flags should be stored in dedicated members. Also, erase_map.uniform_erase_type can be removed as it is redundant. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Suggested-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/8e5e9e4081ed9f16ea9dce30693304a4b54d19b1.1708404584.git.Takahiro.Kuwano@infineon.com [ta: remove spi_nor_region_end()] Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2024-02-26mtd: Remove support for Carillo Ranch driverMatthew Wilcox (Oracle)
As far as anybody can tell, this product never shipped. If it did, it shipped in 2007 and nobody has access to one any more. Remove the mtd NOR driver. Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20231208224703.1603264-2-willy@infradead.org
2024-02-26mtd: fix minor comment typo for struct mtd_masterMarcel Hamer
Minor typo in the suspend description. Signed-off-by: Marcel Hamer <marcel.hamer@windriver.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240216155022.79371-1-marcel.hamer@windriver.com
2024-02-26mtd: chips: remove redundant assignment to variable timeoColin Ian King
In two functions the variable timeo is being initialized with a value that is never read, it is being re-assigned later on. The initializations are redundant and can be removed. Cleans up clang scan build warning: warning: Value stored to 'timeo' during its initialization is never read [deadcode.DeadStores] Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240215140106.2062858-1-colin.i.king@gmail.com
2024-02-26mtd: lpc32xx: use typedef for dma_filter_fnKrzysztof Kozlowski
Use existing typedef for dma_filter_fn to avoid duplicating type definition. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240208202113.630190-1-krzysztof.kozlowski@linaro.org
2024-02-26dt-bindings: mtd: update references from partition.txt to mtd.yamlNayab Sayed
Commit f902baa917b6 ("dt-bindings: mtd: Remove useless file about partitions") removed the file partition.txt. Hence, in this commit, the lines mentioning this file are updated to reference mtd.yaml, which now includes partition{,s}.yaml. Signed-off-by: Nayab Sayed <nayabbasha.sayed@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240208-partition-txt-v1-1-4398af3b7bb2@microchip.com
2024-02-26mtd: maps: physmap-core: fix flash size larger than 32-bitBaruch Siach
mtd-ram can potentially be larger than 4GB. get_bitmask_order() uses fls() that is not guaranteed to work with values larger than 32-bit. Specifically on aarch64 fls() returns 0 when all 32 LSB bits are clear. Use fls64() instead. Fixes: ba32ce95cbd987 ("mtd: maps: Merge gpio-addr-flash.c into physmap-core.c") Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/9fbf3664ce00f8b07867f1011834015f21d162a5.1707388458.git.baruch@tkos.co.il
2024-02-26dt-bindings: mtd: spi-nor: add optional interrupts propertyJosua Mayer
Some spi flash memories have an interrupt signal which can be used for signalling on-chip events such as busy status or ecc errors to the host. Add binding for "interrupts" property so that boards wiring this signal may describe the connection. Signed-off-by: Josua Mayer <josua@solid-run.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Pratyush Yadav <pratyush@kernel.org> Acked-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20240219-mtd-flash-interrupt-binding-v7-1-206e30a656fa@solid-run.com Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2024-02-05mtd: flashchip: explicitly include <linux/wait.h>Tudor Ambarus
While reviewing the hyperbus sfdp proposal the following problem was noticed: In file included from ./include/linux/mtd/gen_probe.h:10, from drivers/mtd/hyperbus/hyperbus-sfdp.c:6: ./include/linux/mtd/flashchip.h:77:9: error: unknown type name ‘wait_queue_head_t’ 77 | wait_queue_head_t wq; /* Wait on here when we're waiting for the chip | ^~~~~~~~~~~~~~~~~ It is good practice to directly include all headers used, it avoids implicit dependencies and spurious breakage if someone rearranges headers and causes the implicit include to vanish. Explicitly include <linux/wait.h> in include/linux/mtd/flashchip. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240205100955.149755-1-tudor.ambarus@linaro.org
2024-02-05mtd: spinand: esmt: Extend IDs to 5 bytesEzra Buehler
According to the datasheets, the ESMT chips in question will return a 5 byte long identification code where the last 3 bytes are the JEDEC continuation codes (7Fh). Although, I would have expected 4 continuation codes as Powerchip Semiconductor (C8h, corresponding to the parameter page data) is located in bank 5 of the JEDEC database. By matching the full 5 bytes we can avoid clashes with GigaDevice NAND flashes. This fix allows the MT7688-based GARDENA smart Gateway to boot again. Fixes: aa08bf187f32 ("mtd: spinand: esmt: add support for F50D2G41KA") Signed-off-by: Ezra Buehler <ezra.buehler@husqvarnagroup.com> Reviewed-by: Martin Kurbanov <mmkurbanov@salutedevices.com> Tested-by: Martin Kurbanov <mmkurbanov@salutedevices.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240125200108.24374-3-ezra@easyb.ch
2024-02-05mtd: spinand: Add support for 5-byte IDsEzra Buehler
E.g. ESMT chips will return an identification code with a length of 5 bytes. In order to prevent ambiguity, flash chips would actually need to return IDs that are up to 17 or more bytes long due to JEDEC's continuation scheme. I understand that if a manufacturer ID is located in bank N of JEDEC's database (there are currently 16 banks), N - 1 continuation codes (7Fh) need to be added to the identification code (comprising of manufacturer ID and device ID). However, most flash chip manufacturers don't seem to implement this (correctly). Signed-off-by: Ezra Buehler <ezra.buehler@husqvarnagroup.com> Reviewed-by: Martin Kurbanov <mmkurbanov@salutedevices.com> Tested-by: Martin Kurbanov <mmkurbanov@salutedevices.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240125200108.24374-2-ezra@easyb.ch
2024-02-05mtd: ssfdc: Improve a size determination in ssfdcr_add_mtd()Markus Elfring
Replace the specification of a data structure by a pointer dereference as the parameter for the operator "sizeof" to make the corresponding size determination a bit safer according to the Linux coding style convention. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/b7ee7d1b-49a2-41d8-9c8f-3674f1aecc43@web.de
2024-02-05mtd: ssfdc: Fix indentation in ssfdcr_add_mtd()Markus Elfring
Replace eight space characters by one tab. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/4045abdd-fb88-4c1f-a947-cdb3d4e59aa6@web.de
2024-02-05mtd: ssfdc: One function call less in ssfdcr_add_mtd() after error detectionMarkus Elfring
The kfree() function was called in one case by the ssfdcr_add_mtd() function during error handling even if the passed data structure member contained a null pointer. This issue was detected by using the Coccinelle software. Thus use another label. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/56d92e42-db9e-4767-bcb1-9686bdf34a03@web.de
2024-02-05dt-bindings: mtd: avoid automatically select from mtd.yamlZhenhua Huang
The mtd binding is always $ref'ed by other bindings, default selector should be from other binding files which ref'ed it. Now, "$nodename" in mtd.yaml turns into a "select" automatically such that a few binding check issues reported because it conflicts with sram devices(eg, qcom,imem.yaml, rules in folder sram/*) To avoid the automatically created "select" in mtd.yaml, adding: select: false Suggested-by: Bjorn Andersson <quic_bjorande@quicinc.com> Fixes: 7bdc671822e9 ("dt-bindings: mtd: physmap: Reuse the generic definitions") Signed-off-by: Zhenhua Huang <quic_zhenhuah@quicinc.com> Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/1704885705-7486-1-git-send-email-quic_zhenhuah@quicinc.com