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2023-09-25arm64: dts: imx8mp: Simplify USB C on DH i.MX8M Plus DHCOM PDK3Marek Vasut
Remove the connector as well as all the links and only connect the PTN5150 with xHCI controller. This is sufficient to implement the role switching. Furthermore, this makes resume work without hanging. Without this patch, the platform would hang on resume of 'connector'. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: imx8mp: Add micfil nodeAdam Ford
The i.MX8MP has a micfil controller which is used for interfacing with a pulse density microphone. Add the node and mark it as disabled by default. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: imx8mp: Add easrc nodeAdam Ford
The i.MX8MP has an asynchronous sample rate converter which seems to be the same as what is available on the i.MX8M Nano. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: freescale: imx8m*-venice: remove label = "cpu" from DSA dt-bindingTim Harvey
This is not used by the DSA dt-binding, so remove it from the devicetrees. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25ARM: dts: imx6qdl-gw5904: add internal mdio nodesTim Harvey
Complete the switch definition by adding the internal mdio nodes. This does not change behavior on Linux but is required if the dt is used for U-Boot which requires the internal PHY ports to be defined for DSA. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25ARM: dts: imx: add support for the ATM0700D4 panel attached to sk-imx53Dmitry Baryshkov
The SK-ATM0700D4-Plug is an extension board (provided by the same manufacturer, [1]) which can be connected to the SK-IMX53 panel kit. The panel can be connected either using the RGB parallel bus or using the LVDS connector (recommended). Add DT files describing this "shield", both RGB and LVDS connections. [1] http://starterkit.ru/html/index.php?name=shop&op=view&id=64 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: imx93-evk: add uart5Frank Li
Enable uart5 for imx93-evk board. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: imx93: add dma support for lpuart[1..8]Frank Li
Add dma support for lpuart[1..8]. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: imx93: add edma1 and edma2Frank Li
Add edma<n> nodes. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: imx8mq-tqma8mq-mba8mx: Add LVDS overlayAlexander Stein
This overlay enables the DSI-LVDS display chain and configures the actual panel compatible. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: imx8mn-tqma8mqnl-mba8mx: Add LVDS overlayAlexander Stein
This overlay enables the DSI-LVDS display chain and configures the actual panel compatible. Also add the DSIM supply voltages. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: imx8mm-tqma8mqml-mba8mx: Add LVDS overlayAlexander Stein
This overlay enables the DSI-LVDS display chain and configures the actual panel compatible. Also add the DSIM supply voltages. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: mba8mx: Add DSI-LVDS bridge nodesAlexander Stein
This adds the DSI-LVDS bridge including the regulator, backlight and an unspecified panel. It is expected to set the compatible when the display chain is enabled. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: imx8qm-apalis: Remove invalid FEC propertyFabio Estevam
The 'fsl,rgmii_txc_dly' is not a valid property. Remove it to fix the following schema warning: imx8qm-apalis-ixora-v1.1.dtb: ethernet@5b040000: Unevaluated properties are not allowed ('fsl,rgmii_txc_dly' was unexpected) from schema $id: http://devicetree.org/schemas/net/fsl,fec.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: imx8mq-thor96: Fix sdio-pwrseq GPIO propertyFabio Estevam
As per mmc-pwrseq-simple.yaml, the correct way to describe the GPIO is by using the 'reset-gpios' property. Change it accordingly to fix the following schema warning: imx8mq-thor96.dtb: sdio-pwrseq: 'gpio' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: imx8mq-pico-pi: Fix PMIC propertiesFabio Estevam
Pass the required '#clock-cells' property and remove the invalid 'interrupt-names' property to fix the following schema warnings: imx8mq-pico-pi.dtb: pmic@4b: '#clock-cells' is a required property from schema $id: http://devicetree.org/schemas/mfd/rohm,bd71837-pmic.yaml# imx8mq-pico-pi.dtb: pmic@4b: 'interrupt-names' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/mfd/rohm,bd71837-pmic.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: imx8mq-librem5: Fix gpio-hog propertyFabio Estevam
The 'lane-mapping' property is not a valid one and cause the following schema warning: imx8mq-librem5-r2.dtb: pmic-5v-hog: 'lane-mapping' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/gpio/gpio-hog.yaml# Replace it with 'line-name'. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: imx8mp: Switch PCIe to HSIO PLL on i.MX8MP DHCOM PDK2 and ↵Marek Vasut
generate clock from SoC The PDK2 carrier board had to be manually patched to obtain working PCIe with the i.MX8MP DHCOM SoM so far, because the PCIe clock generator has not been connected to the PCIe block REF_PAD_CLK inputs. Switch to use of HSIO PLL as the clock source for the PCIe block instead, and use the REF_PAD_CLK as outputs to generate PCIe clock from the SoC. This way, it is not necessary to patch the PDK2 in any way to obtain a working PCIe. Note that PDK3 has PCIe clock generator always connected to REF_PAD_CLK and is not affected. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: imx8dxl-evk: Remove invalid SPI propertyFabio Estevam
'pinctrl-assert-gpios' is not a valid property. Remove it to fix the following schema warning: imx8dxl-evk.dtb: spi@5a030000: Unevaluated properties are not allowed ('pinctrl-assert-gpios' was unexpected) Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: imx8mm-phg: Disable flexspiFabio Estevam
The imx8mm-tqma8mqml SoM used on the PHG board does not come with the QSPI flash populated, so disable it to avoid the following error message: spi-nor spi3.0: unrecognized JEDEC id bytes: 00 00 00 00 00 00 Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: imx8mp: add imx8mp-venice-gw74xx-imx219 overlay for rpi v2 cameraTim Harvey
Add support for the RaspberryPi Camera v2 which is an IMX219 8MP module: - https://datasheets.raspberrypi.com/camera/camera-v2-schematics.pdf - has its own on-board 24MHz osc so no clock required from baseboard - pin 11 enables 1.8V and 2.8V LDO which is connected to GW74xx MIPI_GPIO4 (IMX8MP GPIO1_IO4) so we use this as a gpio Support is added via a device-tree overlay. The IMX219 supports RAW8/RAW10 image formats. Example configuration: media-ctl -l "'imx219 3-0010':0->'csis-32e40000.csi':0[1]" media-ctl -v -V "'imx219 3-0010':0 [fmt:SRGGB8/640x480 field:none]" media-ctl -v -V "'crossbar':0 [fmt:SRGGB8/640x480 field:none]" media-ctl -v -V "'mxc_isi.0':0 [fmt:SRGGB8/640x480 field:none]" v4l2-ctl --set-fmt-video=width=640,height=480,pixelformat=RGGB v4l2-ctl --stream-mmap --stream-to=frame.raw --stream-count=1 convert -size 640x480 -depth 8 gray:frame.raw frame.png gst-launch-1.0 v4l2src ! \ video/x-bayer,format=rggb,width=640,height=480,framerate=10/1 ! \ bayer2rgb ! fbdevsink Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25arm64: dts: imx8-ss-img: Assign slot for imx jpeg encoder/decoderMing Qian
assign a single slot, configure interrupt and power domain only for 1 slot, not for the all 4 slots. Signed-off-by: Ming Qian <ming.qian@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-24Linux 6.6-rc3v6.6-rc3Linus Torvalds
2023-09-24Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds
Pull kvm fixes from Paolo Bonzini: "ARM: - Fix EL2 Stage-1 MMIO mappings where a random address was used - Fix SMCCC function number comparison when the SVE hint is set RISC-V: - Fix KVM_GET_REG_LIST API for ISA_EXT registers - Fix reading ISA_EXT register of a missing extension - Fix ISA_EXT register handling in get-reg-list test - Fix filtering of AIA registers in get-reg-list test x86: - Fixes for TSC_AUX virtualization - Stop zapping page tables asynchronously, since we don't zap them as often as before" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: SVM: Do not use user return MSR support for virtualized TSC_AUX KVM: SVM: Fix TSC_AUX virtualization setup KVM: SVM: INTERCEPT_RDTSCP is never intercepted anyway KVM: x86/mmu: Stop zapping invalidated TDP MMU roots asynchronously KVM: x86/mmu: Do not filter address spaces in for_each_tdp_mmu_root_yield_safe() KVM: x86/mmu: Open code leaf invalidation from mmu_notifier KVM: riscv: selftests: Selectively filter-out AIA registers KVM: riscv: selftests: Fix ISA_EXT register handling in get-reg-list RISC-V: KVM: Fix riscv_vcpu_get_isa_ext_single() for missing extensions RISC-V: KVM: Fix KVM_GET_REG_LIST API for ISA_EXT registers KVM: selftests: Assert that vasprintf() is successful KVM: arm64: nvhe: Ignore SVE hint in SMCCC function ID KVM: arm64: Properly return allocated EL2 VA from hyp_alloc_private_va_range()
2023-09-24Merge tag 'trace-v6.6-rc2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace Pull tracing fixes from Steven Rostedt: - Fix the "bytes" output of the per_cpu stat file The tracefs/per_cpu/cpu*/stats "bytes" was giving bogus values as the accounting was not accurate. It is suppose to show how many used bytes are still in the ring buffer, but even when the ring buffer was empty it would still show there were bytes used. - Fix a bug in eventfs where reading a dynamic event directory (open) and then creating a dynamic event that goes into that diretory screws up the accounting. On close, the newly created event dentry will get a "dput" without ever having a "dget" done for it. The fix is to allocate an array on dir open to save what dentries were actually "dget" on, and what ones to "dput" on close. * tag 'trace-v6.6-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace: eventfs: Remember what dentries were created on dir open ring-buffer: Fix bytes info in per_cpu buffer stats
2023-09-24Merge tag 'cxl-fixes-6.6-rc3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl Pull cxl fixes from Dan Williams: "A collection of regression fixes, bug fixes, and some small cleanups to the Compute Express Link code. The regressions arrived in the v6.5 dev cycle and missed the v6.6 merge window due to my personal absences this cycle. The most important fixes are for scenarios where the CXL subsystem fails to parse valid region configurations established by platform firmware. This is important because agreement between OS and BIOS on the CXL configuration is fundamental to implementing "OS native" error handling, i.e. address translation and component failure identification. Other important fixes are a driver load error when the BIOS lets the Linux PCI core handle AER events, but not CXL memory errors. The other fixex might have end user impact, but for now are only known to trigger in our test/emulation environment. Summary: - Fix multiple scenarios where platform firmware defined regions fail to be assembled by the CXL core. - Fix a spurious driver-load failure on platforms that enable OS native AER, but not OS native CXL error handling. - Fix a regression detecting "poison" commands when "security" commands are also defined. - Fix a cxl_test regression with the move to centralize CXL port register enumeration in the CXL core. - Miscellaneous small fixes and cleanups" * tag 'cxl-fixes-6.6-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl: cxl/acpi: Annotate struct cxl_cxims_data with __counted_by cxl/port: Fix cxl_test register enumeration regression cxl/region: Refactor granularity select in cxl_port_setup_targets() cxl/region: Match auto-discovered region decoders by HPA range cxl/mbox: Fix CEL logic for poison and security commands cxl/pci: Replace host_bridge->native_aer with pcie_aer_is_native() PCI/AER: Export pcie_aer_is_native() cxl/pci: Fix appropriate checking for _OSC while handling CXL RAS registers
2023-09-24riscv: dts: allwinner: d1: Add PMU event nodeInochi Amaoto
D1 has several pmu events supported by opensbi. These events can be used by perf for profiling. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Link: https://dl.linux-sunxi.org/D1/Xuantie_C906_R1S0_User_Manual.pdf Link: https://github.com/T-head-Semi/openc906/blob/main/C906_RTL_FACTORY/gen_rtl/pmu/rtl/aq_hpcp_top.v#L657 Reviewed-by: Guo Ren <guoren@kernel.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/IA1PR20MB49534918FCA69399CE2E0C53BBE0A@IA1PR20MB4953.namprd20.prod.outlook.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-09-24arm64: dts: allwinner: h616: Add BigTreeTech Pi supportMartin Botka
The BigTreeTech Pi is an H616 based board based on CB1. Just in Rpi format board. It features the same internals as BTT CB1 but adds: - Fan port - IR receiver - ADXL345 Accelerometer connector via SPI - 24V DC power supply via terminal plugs - USB to CAN module connector (External Module) List of currently working things is same as BTT CB1 but also: - IR receiver - ADXL345 connector Signed-off-by: Martin Botka <martin@biqu3d.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230912-b4-cb1-v6-4-bb11238f3a9c@somainline.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-09-24arm64: dts: allwinner: h616: Add BigTreeTech CB1 SoM & boards supportMartin Botka
CB1 is Compute Module style board that plugs into Rpi board style adapter or Manta 3D printer boards (M4P/M8P). The SoM features: - H616 SoC - 1GiB of RAM - AXP313A PMIC - RTL8189FTV WiFi Boards feature: - 4x USB via USB2 hub (usb1 on SoM). - SDcard slot for loading images. - Ethernet port wired to the internal PHY. (100M) - 2x HDMI 2.0. (Only 1 usable on CB1) - Power and Status LEDs. (Only Status LED usable on CB1) - 40 pin GPIO header Currently working: - Booting - USB - UART - MMC - Status LED - WiFi (RTL8189FS via out of tree driver) I didnt want to duplicate things so the manta DTS can also be used on BTT pi4b adapter. CB1 SoM has its own DTSI file in case other boards shows up that accept this SoM. Signed-off-by: Martin Botka <martin.botka@somainline.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230912-b4-cb1-v6-3-bb11238f3a9c@somainline.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-09-24dt-bindings: arm: sunxi: Add BigTreeTech boardsMartin Botka
Add name & compatible for BigTreeTech Manta boards and BigTreeTech Pi Signed-off-by: Martin Botka <martin.botka@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230912-b4-cb1-v6-2-bb11238f3a9c@somainline.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-09-24dt-bindings: vendor-prefixes: Add BigTreeTechMartin Botka
BigTreeTech is a company based in Shenzhen that makes 3D printers and accessories. Add prefix for it. Signed-off-by: Martin Botka <martin.botka@somainline.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230912-b4-cb1-v6-1-bb11238f3a9c@somainline.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-09-24arm64: dts: allwinner: h616: Add SID controller nodeMartin Botka
Add node for the H616 SID controller Signed-off-by: Martin Botka <martin.botka@somainline.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230912-sid-h616-v3-2-ee18e1c5bbb5@somainline.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-09-24dt-bindings: nvmem: SID: Add binding for H616 SID controllerMartin Botka
Add binding for the SID controller found in H616 SoC Signed-off-by: Martin Botka <martin.botka@somainline.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230912-sid-h616-v3-1-ee18e1c5bbb5@somainline.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-09-24riscv: dts: allwinner: remove address-cells from intc nodeConor Dooley
A recent submission [1] from Rob has added additionalProperties: false to the interrupt-controller child node of RISC-V cpus, highlighting that the D1 DT has been incorrectly using #address-cells since its introduction. It has no child nodes, so #address-cells is not needed. Remove it. Fixes: 077e5f4f5528 ("riscv: dts: allwinner: Add the D1/D1s SoC devicetree") Link: https://patchwork.kernel.org/project/linux-riscv/patch/20230915201946.4184468-1-robh@kernel.org/ [1] Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230916-saddling-dastardly-8cf6d1263c24@spud Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-09-24riscv: dts: use capital "OR" for multiple licenses in SPDXKrzysztof Kozlowski
Documentation/process/license-rules.rst and checkpatch expect the SPDX identifier syntax for multiple licenses to use capital "OR". Correct it to keep consistent format and avoid copy-paste issues. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230823085238.113642-1-krzysztof.kozlowski@linaro.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-09-24arm64: dts: marvell: minor whitespace cleanup around '='Krzysztof Kozlowski
The DTS code coding style expects exactly one space before and after '=' sign. Link: https://lore.kernel.org/r/20230702185301.44505-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-09-24arm64: dts: mediatek: minor whitespace cleanup around '='Krzysztof Kozlowski
The DTS code coding style expects exactly one space before and after '=' sign. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230702185128.44052-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-09-24ARM: dts: nuvoton: add missing space before {Krzysztof Kozlowski
Add missing whitespace between node name/label and opening {. Link: https://lore.kernel.org/r/20230705150045.293879-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-09-24ARM: dts: mediatek: minor whitespace cleanup around '='Krzysztof Kozlowski
The DTS code coding style expects exactly one space before and after '=' sign. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230702185128.44052-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-09-24arm64: dts: mediatek: add missing space before {Krzysztof Kozlowski
Add missing whitespace between node name/label and opening {. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230705150006.293690-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-09-24ARM: dts: mediatek: add missing space before {Krzysztof Kozlowski
Add missing whitespace between node name/label and opening {. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230705150006.293690-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-09-24arm64: dts: apm: add missing space before {Krzysztof Kozlowski
Add missing whitespace between node name/label and opening {. Link: https://lore.kernel.org/r/20230705145934.293487-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-09-24ARM: dts: omap3-devkit8000: correct ethernet reg addresses (split)Krzysztof Kozlowski
The davicom,dm9000 Ethernet Controller accepts two reg addresses. Link: https://lore.kernel.org/r/20230713152913.82846-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-09-24arm64: dts: bitmain: lowercase unit addressesKrzysztof Kozlowski
Unit addresses are expected to be lower case. Pointed also by W=1 builds: Warning (simple_bus_reg): /soc/serial@5801A000: simple-bus unit address format error, expected "5801a000" Link: https://lore.kernel.org/r/20230712074611.35952-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-09-24ARM: dts: nxp: imx6qdl-nitrogen6: correct regulator node nameKrzysztof Kozlowski
Root node is not a bus, thus top-level nodes do not have unit addresses. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-24ARM: dts: imx6ul: mba6ulx: Fix gpio-keys button node namesAlexander Stein
Numbers are separated by dashes. Fixes the warnings: arch/arm/boot/dts/nxp/imx/imx6ull-tqma6ull2-mba6ulx.dtb: gpio-keys: 'button1', 'button2', 'button3' do not match any of the regexes: '^(button|event|key|switch|(button|event|key|switch)-[a-z0-9-]+|[a-z0-9-]+-(button|event|key|switch))$', 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/input/gpio-keys.yaml# Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-24ARM: dts: imx6ul: mba6ulx: Mark gpio-buttons as wakeup-sourceAlexander Stein
I2C expander is capable of generating an IRQ during powersave, so the attached buttons can be used for waking up the system. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-24arm64: dts: imx8mm-evk: Fix hdmi@3d nodeLiu Ying
The hdmi@3d node's compatible string is "adi,adv7535" instead of "adi,adv7533" or "adi,adv751*". Fix the hdmi@3d node by means of: * Use default register addresses for "cec", "edid" and "packet", because there is no need to use a non-default address map. * Add missing interrupt related properties. * Drop "adi,input-*" properties which are only valid for adv751*. * Add VDDEXT_3V3 fixed regulator * Add "*-supply" properties, since most are required. * Fix label names - s/adv7533/adv7535/. Fixes: a27335b3f1e0 ("arm64: dts: imx8mm-evk: Add HDMI support") Signed-off-by: Liu Ying <victor.liu@nxp.com> Tested-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-24soc: imx8m: Enable OCOTP clock for imx8mm before reading registersNathan Rossi
Commit 836fb30949d9 ("soc: imx8m: Enable OCOTP clock before reading the register") added configuration to enable the OCOTP clock before attempting to read from the associated registers. This same kexec issue is present with the imx8m SoCs that use the imx8mm_soc_uid function (e.g. imx8mp). This requires the imx8mm_soc_uid function to configure the OCOTP clock before accessing the associated registers. This change implements the same clock enable functionality that is present in the imx8mq_soc_revision function for the imx8mm_soc_uid function. Signed-off-by: Nathan Rossi <nathan.rossi@digi.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Fixes: 836fb30949d9 ("soc: imx8m: Enable OCOTP clock before reading the register") Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-24arm64: dts: imx8mp-beacon-kit: Fix audio_pll2 clockAdam Ford
Commit 16c984524862 ("arm64: dts: imx8mp: don't initialize audio clocks from CCM node") removed the Audio clocks from the main clock node, because the intent is to force people to setup the audio PLL clocks per board instead of having a common set of rates since not all boards may use the various audio PLL clocks for audio devices. This resulted in an incorrect clock rate when attempting to playback audio, since the AUDIO_PLL2 wasn't set any longer. Fix this by setting the AUDIO_PLL2 rate inside the SAI3 node since it's the SAI3 that needs it. Fixes: 16c984524862 ("arm64: dts: imx8mp: don't initialize audio clocks from CCM node") Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>