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2020-01-16Merge tag 'tegra-for-5.6-bus' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers bus: tegra: Changes for v5.6-rc1 Contains a single fix to remove a Kconfig dependency that's no longer required. * tag 'tegra-for-5.6-bus' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: bus: tegra-aconnect: Remove PM_CLK dependency Link: https://lore.kernel.org/r/20200111003553.2411874-2-thierry.reding@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-10Merge tag 'samsung-drivers-5.6' of ↵Olof Johansson
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers Samsung soc drivers changes for v5.6 1. Convert to managed (devm_x()) versions, 2. Cleanups (Samsung and Exynos names). * tag 'samsung-drivers-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: memory: samsung: Rename Exynos to lowercase soc: samsung: Rename Samsung and Exynos to lowercase memory: samsung: exynos5422-dmc: Convert to devm_platform_ioremap_resource soc: samsung: exynos-pmu: Convert to devm_platform_ioremap_resource Link: https://lore.kernel.org/r/20200110172334.4767-2-krzk@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-10Merge tag 'reset-for-5.6' of git://git.pengutronix.de/pza/linux into arm/driversOlof Johansson
Reset controller updates for v5.6 This tag adds support for the Nuvoton NPCM, Intel Gatway SoC, and Broadcom BCM7216 RESCAL reset controllers, adds missing SCSSI reset controls for newer Uniphier SoCs, aligns the program flow in the devm_reset_controller_register, __devm_reset_control_get, and devm_reset_control_array_get functions for better consistency, and allows to build the Qcom AOSS reset driver as a module. This is based on v5.5-rc3 because the core patch depends on commit db23808615e2 ("reset: Do not register resource data for missing resets"). * tag 'reset-for-5.6' of git://git.pengutronix.de/pza/linux: reset: qcom-aoss: Allow CONFIG_RESET_QCOM_AOSS to be a tristate reset: Add Broadcom STB RESCAL reset controller dt-bindings: reset: Document BCM7216 RESCAL reset controller reset: intel: Add system reset controller driver dt-bindings: reset: Add YAML schemas for the Intel Reset controller reset: uniphier: Add SCSSI reset control for each channel reset: Align logic and flow in managed helpers reset: npcm: add NPCM reset controller driver dt-bindings: reset: Add binding constants for NPCM7xx reset controller dt-bindings: reset: add NPCM reset controller documentation Link: https://lore.kernel.org/r/dbbb2ca7490a0146d9ba632fd4d9f38063e03e9f.camel@pengutronix.de Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-10Merge tag 'arm-soc/for-5.6/drivers' of https://github.com/Broadcom/stblinux ↵Olof Johansson
into arm/drivers This pull request contains Broadcom ARM/ARM64/MIPS-based SoCs drivers changes for 5.6, please pull the following: - Florian provides a set of updates to the Bus Interface Unit control to tune it appropriately for the most recent chips: 7255, 7260, 7216, 7211 * tag 'arm-soc/for-5.6/drivers' of https://github.com/Broadcom/stblinux: soc: bcm: brcmstb: biuctrl: Update programming for 7211 soc: bcm: brcmstb: biuctrl: Update layout for A72 on 7211 soc: bcm: brcmstb: biuctrl: Tune interface for 7255 and 7216 soc: bcm: brcmstb: biuctrl: Tune 7260 BIU interface Link: https://lore.kernel.org/r/20200108191114.15987-2-f.fainelli@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-10bus: tegra-aconnect: Remove PM_CLK dependencySameer Pujar
The ACONNECT bus driver does not use pm-clk interface anymore and hence the dependency can be removed from its Kconfig option. Fixes: 0d7dab926130 ("bus: tegra-aconnect: use devm_clk_*() helpers") Signed-off-by: Sameer Pujar <spujar@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-08Merge tag 'cpuidle_psci-v5.5-rc4' of ↵Olof Johansson
git://git.linaro.org/people/ulf.hansson/linux-pm into arm/drivers Initial support for hierarchical CPU arrangement, managed by PSCI and its corresponding cpuidle driver. This support is based upon using the generic PM domain, which already supports devices belonging to CPUs. Finally, these is a DTS patch that enables the hierarchical topology to be used for the Qcom 410c Dragonboard, which supports the PSCI OS-initiated mode. * tag 'cpuidle_psci-v5.5-rc4' of git://git.linaro.org/people/ulf.hansson/linux-pm: (611 commits) arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916 cpuidle: psci: Add support for PM domains by using genpd PM / Domains: Introduce a genpd OF helper that removes a subdomain cpuidle: psci: Support CPU hotplug for the hierarchical model cpuidle: psci: Manage runtime PM in the idle path cpuidle: psci: Prepare to use OS initiated suspend mode via PM domains cpuidle: psci: Attach CPU devices to their PM domains cpuidle: psci: Add a helper to attach a CPU to its PM domain cpuidle: psci: Support hierarchical CPU idle states cpuidle: psci: Simplify OF parsing of CPU idle state nodes cpuidle: dt: Support hierarchical CPU idle states of: base: Add of_get_cpu_state_node() to get idle states for a CPU node firmware: psci: Export functions to manage the OSI mode dt: psci: Update DT bindings to support hierarchical PSCI states cpuidle: psci: Align psci_power_state count with idle state count Linux 5.5-rc4 locks: print unsigned ino in /proc/locks riscv: export flush_icache_all to modules riscv: reject invalid syscalls below -1 riscv: fix compile failure with EXPORT_SYMBOL() & !MMU ... Link: https://lore.kernel.org/r/20200102160820.3572-1-ulf.hansson@linaro.org Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-08reset: qcom-aoss: Allow CONFIG_RESET_QCOM_AOSS to be a tristateJohn Stultz
Allow CONFIG_RESET_QCOM_AOSS to be set as as =m to allow for the driver to be loaded from a modules. Also replaces the builtin_platform_driver() line with module_platform_driver() and adds a MODULE_DEVICE_TABLE() entry. Cc: Todd Kjos <tkjos@google.com> Cc: Alistair Delva <adelva@google.com> Cc: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: John Stultz <john.stultz@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-01-07memory: samsung: Rename Exynos to lowercaseKrzysztof Kozlowski
Fix up inconsistent usage of upper and lowercase letters in "Exynos" name. "EXYNOS" is not an abbreviation but a regular trademarked name. Therefore it should be written with lowercase letters starting with capital letter. The lowercase "Exynos" name is promoted by its manufacturer Samsung Electronics Co., Ltd., in advertisement materials and on website. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-01-07soc: samsung: Rename Samsung and Exynos to lowercaseKrzysztof Kozlowski
Fix up inconsistent usage of upper and lowercase letters in "Samsung" and "Exynos" names. "SAMSUNG" and "EXYNOS" are not abbreviations but regular trademarked names. Therefore they should be written with lowercase letters starting with capital letter. The lowercase "Exynos" name is promoted by its manufacturer Samsung Electronics Co., Ltd., in advertisement materials and on website. Although advertisement materials usually use uppercase "SAMSUNG", the lowercase version is used in all legal aspects (e.g. on Wikipedia and in privacy/legal statements on https://www.samsung.com/semiconductor/privacy-global/). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-01-06Merge tag 'renesas-drivers-for-v5.6-tag1' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers Renesas driver updates for v5.6 - Remove now unused ARCH_R8A7796 config symbol, - Fix a sparse warning, - Add split R-Car H3 ES1.x and ES2.0+ config symbols. * tag 'renesas-drivers-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: soc: renesas: Add ARCH_R8A7795[01] for existing R-Car H3 soc: renesas: rcar-rst: Fix __iomem on configure call soc: renesas: Remove ARCH_R8A7796 Link: https://lore.kernel.org/r/20200106104857.8361-5-geert+renesas@glider.be Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06Merge tag 'tee-optee-pldrv-for-5.6' of ↵Olof Johansson
git://git.linaro.org:/people/jens.wiklander/linux-tee into arm/drivers Model OP-TEE as a platform device/driver * tag 'tee-optee-pldrv-for-5.6' of git://git.linaro.org:/people/jens.wiklander/linux-tee: optee: model OP-TEE as a platform device/driver Link: https://lore.kernel.org/r/20200103090025.GA11243@jax Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06Merge tag 'scmi-updates-5.6' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers ARM SCMI updates for v5.6 1. Addition of multiple device support per protocol to enable use of some procotols by multiple kernel subsystems simultaneously and corresponding updates to the existing scmi drivers 2. Addition of trace events around the scmi transfer code to measure any delays and capture anomalies that can also be used during investigation of some platform firmware related issues * tag 'scmi-updates-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: drivers: firmware: scmi: Extend SCMI transport layer by trace events include: trace: Add SCMI header with trace events reset: reset-scmi: Match scmi device by both name and protocol id hwmon: (scmi-hwmon) Match scmi device by both name and protocol id cpufreq: scmi: Match scmi device by both name and protocol id clk: scmi: Match scmi device by both name and protocol id firmware: arm_scmi: Skip protocol initialisation for additional devices firmware: arm_scmi: Stash version in protocol init functions firmware: arm_scmi: Match scmi device by both name and protocol id firmware: arm_scmi: Add versions and identifier attributes using dev_groups firmware: arm_scmi: Add names to scmi devices created firmware: arm_scmi: Skip scmi mbox channel setup for addtional devices firmware: arm_scmi: Add support for multiple device per protocol Link: https://lore.kernel.org/r/20191230182956.GA29349@bogus Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06soc: renesas: Add ARCH_R8A7795[01] for existing R-Car H3Geert Uytterhoeven
Despite using the same compatible values ("r8a7795"-based) because of historical reasons, R-Car H3 ES1.x (R8A77950) and R-Car H3 ES2.0+ (R8A77951) are really different SoCs, with different part numbers. Reflect this in the SoC configuration, by adding CONFIG_ARCH_R8A77950 and CONFIG_ARCH_R8A77951 as new config symbols. These are intended to replace CONFIG_ARCH_R8A7795, and will allow making support for early SoC revisions optional. Note that for now, CONFIG_ARCH_R8A7795 is retained, and just selects CONFIG_ARCH_R8A77950 and CONFIG_ARCH_R8A77951. This relaxes dependencies of other subsystems on the SoC configuration symbol, and provides a smooth transition path for config files through "make oldconfig". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191217183841.432-6-geert+renesas@glider.be
2020-01-06soc: renesas: rcar-rst: Fix __iomem on configure callBen Dooks (Codethink)
The configure call back takes a register pointer, so should have been marked with __iomem. Add this to silence the following sparse warnings: drivers/soc/renesas/rcar-rst.c:33:22: warning: incorrect type in initializer (incompatible argument 1 (different address spaces)) drivers/soc/renesas/rcar-rst.c:33:22: expected int ( *configure )( ... ) drivers/soc/renesas/rcar-rst.c:33:22: got int ( * )( ... ) drivers/soc/renesas/rcar-rst.c:97:40: warning: incorrect type in argument 1 (different address spaces) drivers/soc/renesas/rcar-rst.c:97:40: expected void *base drivers/soc/renesas/rcar-rst.c:97:40: got void [noderef] <asn:2> *[assigned] base Signed-off-by: Ben Dooks (Codethink) <ben.dooks@codethink.co.uk> Link: https://lore.kernel.org/r/20191218135230.2610161-1-ben.dooks@codethink.co.uk Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-01-06reset: Add Broadcom STB RESCAL reset controllerJim Quinlan
On BCM7216 there is a special purpose reset controller named RESCAL (reset calibration) which is necessary for SATA and PCIe0/1 to operate correctly. This commit adds support for such a reset controller to be available. Signed-off-by: Jim Quinlan <jim2101024@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-01-06dt-bindings: reset: Document BCM7216 RESCAL reset controllerJim Quinlan
BCM7216 has a special purpose RESCAL reset controller for its SATA and PCIe0/1 instances. This is a simple reset controller with #reset-cells set to 0. Signed-off-by: Jim Quinlan <jim2101024@gmail.com> [florian: Convert to YAML binding] Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-01-05soc: bcm: brcmstb: biuctrl: Update programming for 7211Florian Fainelli
Add a matching entry for 7211 which can be programmed with the same BIUCTRL settings as other Brahma-B53 based SoCs. While at it, rename the function to include a72 in the name to reflect this applies to both types of 64-bit capable CPUs that we support (Brahma-B53 and Cortex-A72). Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-01-05soc: bcm: brcmstb: biuctrl: Update layout for A72 on 7211Florian Fainelli
The BIUCTRL layout is a little different on 7211 which is equipped with a Cortex-A72, account for those register offset differences. We will match 7211 specifically in a subsequent commit. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-01-05soc: bcm: brcmstb: biuctrl: Tune interface for 7255 and 7216Florian Fainelli
7255 and 7216 are some of the latest chips that were produced and support the full register range configuration for the BIU, add the two entries to get the expected programming. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-01-05soc: bcm: brcmstb: biuctrl: Tune 7260 BIU interfaceFlorian Fainelli
7260A0 and B0 are both supported, and 7260A0 has a small difference in that it does not support the write-back control register, which is why we have a different array of registers. Update the comment above b53_cpubiuctrl_no_wb_regs to denote that difference. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-01-03reset: intel: Add system reset controller driverDilip Kota
Add driver for the reset controller present on Intel Gateway SoCs for performing reset management of the devices present on the SoC. Driver also registers a reset handler to peform the entire device reset. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-01-03dt-bindings: reset: Add YAML schemas for the Intel Reset controllerDilip Kota
Add YAML schemas for the reset controller on Intel Gateway SoC. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-01-03optee: model OP-TEE as a platform device/driverArd Biesheuvel
To simplify adding ACPI support to the OP-TEE driver, model it as a platform driver. This will permit us to use the generic device property layer for parsing additional properties, regardless of whether DT or ACPI is being used. Note that this change will result in the OP-TEE driver to be loaded automatically on systems that advertise the presence of OP-TEE via the device tree. Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2020-01-02arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916Ulf Hansson
To enable the OS to better support PSCI OS initiated CPU suspend mode, let's convert from the flattened layout to the hierarchical layout. In the hierarchical layout, let's create a power domain provider per CPU and describe the idle states for each CPU inside the power domain provider node. To group the CPUs into a cluster, let's add another power domain provider and make it act as the master domain. Note that, the CPU's idle states remains compatible with "arm,idle-state", while the cluster's idle state becomes compatible with "domain-idle-state". Co-developed-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
2020-01-02cpuidle: psci: Add support for PM domains by using genpdUlf Hansson
When the hierarchical CPU topology layout is used in DT and the PSCI OSI mode is supported by the PSCI FW, let's initialize a corresponding PM domain topology by using genpd. This enables a CPU and a group of CPUs, when attached to the topology, to be power-managed accordingly. To trigger the attempt to initialize the genpd data structures let's use a subsys_initcall, which should be early enough to allow CPUs, but also other devices to be attached. The initialization consists of parsing the PSCI OF node for the topology and the "domain idle states" DT bindings. In case the idle states are compatible with "domain-idle-state", the initialized genpd becomes responsible of selecting an idle state for the PM domain, via assigning it a genpd governor. Note that, a successful initialization of the genpd data structures, is followed by a call to psci_set_osi_mode(), as to try to enable the OSI mode in the PSCI FW. In case this fails, we fall back into a degraded mode rather than bailing out and returning error codes. Co-developed-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Rafael J. Wysocki <rafael@kernel.org>
2020-01-02PM / Domains: Introduce a genpd OF helper that removes a subdomainUlf Hansson
We already have the of_genpd_add_subdomain() helper, but no corresponding of_genpd_remove_subdomain(), so let's add it. Subsequent changes starts to make use of it. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Rafael J. Wysocki <rafael@kernel.org>
2020-01-02cpuidle: psci: Support CPU hotplug for the hierarchical modelUlf Hansson
When the hierarchical CPU topology is used and when a CPU is put offline, that CPU prevents its PM domain from being powered off, which is because genpd observes the corresponding attached device as being active from a runtime PM point of view. Furthermore, any potential master PM domains are also prevented from being powered off. To address this limitation, let's add add a new CPU hotplug state (CPUHP_AP_CPU_PM_STARTING) and register up/down callbacks for it, which allows us to deal with runtime PM accordingly. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Rafael J. Wysocki <rafael@kernel.org>
2020-01-02cpuidle: psci: Manage runtime PM in the idle pathUlf Hansson
In case we have succeeded to attach a CPU to its PM domain, let's deploy runtime PM support for the corresponding attached device, to allow the CPU to be powered-managed accordingly. The triggering point for when runtime PM reference counting should be done, has been selected to the deepest idle state for the CPU. However, from the hierarchical point view, there may be good reasons to do runtime PM reference counting even on shallower idle states, but at this point this isn't supported, mainly due to limitations set by the generic PM domain. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Rafael J. Wysocki <rafael@kernel.org>
2020-01-02cpuidle: psci: Prepare to use OS initiated suspend mode via PM domainsUlf Hansson
The per CPU variable psci_power_state, contains an array of fixed values, which reflects the corresponding arm,psci-suspend-param parsed from DT, for each of the available CPU idle states. This isn't sufficient when using the hierarchical CPU topology in DT, in combination with having PSCI OS initiated (OSI) mode enabled. More precisely, in OSI mode, Linux is responsible of telling the PSCI FW what idle state the cluster (a group of CPUs) should enter, while in PSCI Platform Coordinated (PC) mode, each CPU independently votes for an idle state of the cluster. For this reason, introduce a per CPU variable called domain_state and implement two helper functions to read/write its value. Then let the domain_state take precedence over the regular selected state, when entering and idle state. To avoid executing the above OSI specific code in the ->enter() callback, while operating in the default PSCI Platform Coordinated mode, let's also add a new enter-function and use it for OSI. Co-developed-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Rafael J. Wysocki <rafael@kernel.org>
2020-01-02cpuidle: psci: Attach CPU devices to their PM domainsUlf Hansson
In order to enable a CPU to be power managed through its PM domain, let's try to attach it by calling psci_dt_attach_cpu() during the cpuidle initialization. psci_dt_attach_cpu() returns a pointer to the attached struct device, which later should be used for runtime PM, hence we need to store it somewhere. Rather than adding yet another per CPU variable, let's create a per CPU struct to collect the relevant per CPU variables. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Rafael J. Wysocki <rafael@kernel.org>
2020-01-02cpuidle: psci: Add a helper to attach a CPU to its PM domainUlf Hansson
Introduce a PSCI DT helper function, psci_dt_attach_cpu(), which takes a CPU number as an in-parameter and tries to attach the CPU's struct device to its corresponding PM domain. Let's makes use of dev_pm_domain_attach_by_name(), as it allows us to specify "psci" as the "name" of the PM domain to attach to. Additionally, let's also prepare the attached device to be power managed via runtime PM. Note that, the implementation of the new helper function is in a new separate c-file, which may seems a bit too much at this point. However, subsequent changes that implements the remaining part of the PM domain support for cpuidle-psci, helps to justify this split. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Rafael J. Wysocki <rafael@kernel.org>
2020-01-02cpuidle: psci: Support hierarchical CPU idle statesUlf Hansson
Currently CPU's idle states are represented using the flattened model. Let's add support for the hierarchical layout, via converting to use of_get_cpu_state_node(). Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Rafael J. Wysocki <rafael@kernel.org>
2020-01-02cpuidle: psci: Simplify OF parsing of CPU idle state nodesUlf Hansson
Iterating through the idle state nodes in DT, to find out the number of states that needs to be allocated is unnecessary, as it has already been done from dt_init_idle_driver(). Therefore, drop the iteration and use the number we already have at hand. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Rafael J. Wysocki <rafael@kernel.org>
2020-01-02cpuidle: dt: Support hierarchical CPU idle statesLina Iyer
Currently CPU's idle states are represented using the flattened model. Let's add support for the hierarchical layout, via converting to use of_get_cpu_state_node(). Suggested-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Co-developed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Rafael J. Wysocki <rafael@kernel.org>
2020-01-02of: base: Add of_get_cpu_state_node() to get idle states for a CPU nodeUlf Hansson
The CPU's idle state nodes are currently parsed at the common cpuidle DT library, but also when initializing data for specific CPU idle operations, as in the PSCI cpuidle driver case and qcom-spm cpuidle case. To avoid open-coding, let's introduce of_get_cpu_state_node(), which takes the device node for the CPU and the index to the requested idle state node, as in-parameters. In case a corresponding idle state node is found, it returns the node with the refcount incremented for it, else it returns NULL. Moreover, for PSCI there are two options to describe the CPU's idle states [1], either via a flattened description or a hierarchical layout. Hence, let's take both options into account. [1] Documentation/devicetree/bindings/arm/psci.yaml Suggested-by: Sudeep Holla <sudeep.holla@arm.com> Co-developed-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
2020-01-02firmware: psci: Export functions to manage the OSI modeUlf Hansson
To allow subsequent changes to implement support for OSI mode through the cpuidle-psci driver, export the existing psci_has_osi_support(). Export also a new function, psci_set_osi_mode(), that allows its caller to enable the OS-initiated CPU-suspend mode in the PSCI FW. To deal with backwards compatibility for a kernel started through a kexec call, default to set the CPU-suspend mode to the Platform Coordinated mode during boot. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
2020-01-02dt: psci: Update DT bindings to support hierarchical PSCI statesUlf Hansson
Update PSCI DT bindings to allow to represent idle states for CPUs and the CPU topology, by using a hierarchical layout. Primarily this is done by re-using the existing DT bindings for PM domains [1] and for PM domain idle states [2]. Let's also add an example into the document for the PSCI DT bindings, to clearly show the new hierarchical based layout. The currently supported flattened layout, is already described in the ARM idle states bindings [3], so let's leave that as is. [1] Documentation/devicetree/bindings/power/power_domain.txt [2] Documentation/devicetree/bindings/power/domain-idle-state.txt [3] Documentation/devicetree/bindings/arm/idle-states.txt Co-developed-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-01-02cpuidle: psci: Align psci_power_state count with idle state countSudeep Holla
Instead of allocating 'n-1' states in psci_power_state to manage 'n' idle states which include "ARM WFI" state, it would be simpler to have 1:1 mapping between psci_power_state and cpuidle driver states. ARM WFI state(i.e. idx == 0) is handled specially in the generic macro CPU_PM_CPU_IDLE_ENTER_PARAM and hence state[-1] is not possible. However for sake of code readability, it is better to have 1:1 mapping and not use [idx - 1] to access psci_power_state corresponding to driver cpuidle state for idx. psci_power_state[0] is default initialised to 0 and is never accessed while entering WFI state. Reported-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Rafael J. Wysocki <rafael@kernel.org>
2020-01-02reset: uniphier: Add SCSSI reset control for each channelKunihiko Hayashi
SCSSI has reset controls for each channel in the SoCs newer than Pro4, so this adds missing reset controls for channel 1, 2 and 3. And more, this moves MCSSI reset ID after SCSSI. Fixes: 6b39fd590aeb ("reset: uniphier: add reset control support for SPI") Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-01-02reset: Align logic and flow in managed helpersGeert Uytterhoeven
__devm_reset_control_get() and devm_reset_control_array_get() are very similar, but they do not look similar, due to inverted logic. Make them more similar, following the "bail out early" paradigm. Adjust the logic and flow in devm_reset_controller_register() to match the two other functions. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-01-02reset: npcm: add NPCM reset controller driverTomer Maimon
Add Nuvoton NPCM BMC reset controller driver. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-01-02dt-bindings: reset: Add binding constants for NPCM7xx reset controllerTomer Maimon
Add device tree binding constants for Nuvoton BMC NPCM7xx reset controller. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-01-02dt-bindings: reset: add NPCM reset controller documentationTomer Maimon
Added device tree binding documentation for Nuvoton BMC NPCM reset controller. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-12-30memory: samsung: exynos5422-dmc: Convert to devm_platform_ioremap_resourceYangtao Li
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Acked-by: Lukasz Luba <lukasz.luba@arm.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-12-30drivers: firmware: scmi: Extend SCMI transport layer by trace eventsLukasz Luba
The SCMI transport layer communicates via mailboxes and shared memory with firmware running on a microcontroller. It is platform specific how long it takes to pass a SCMI message. The most sensitive requests are coming from CPUFreq subsystem, which might be used by the scheduler. Thus, there is a need to measure these delays and capture anomalies. This change introduces trace events wrapped around transfer code. According to Jim's suggestion a unique transfer_id is to distinguish similar entries which might have the same message id, protocol id and sequence. This is a case then there are some timeouts in transfers. Suggested-by: Jim Quinlan <james.quinlan@broadcom.com> Signed-off-by: Lukasz Luba <lukasz.luba@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-12-30include: trace: Add SCMI header with trace eventsLukasz Luba
Adding trace events would help to measure the speed of the communication channel. It can be also potentially used helpful during investigation of some issues platforms which use different transport layer. Update also MAINTAINERS file with information that the new trace events are maintained. Suggested-by: Jim Quinlan <james.quinlan@broadcom.com> Signed-off-by: Lukasz Luba <lukasz.luba@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-12-29Linux 5.5-rc4v5.5-rc4Linus Torvalds
2019-12-29Merge tag 'riscv/for-v5.5-rc4' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Paul Walmsley: "One important fix for RISC-V: - Redirect any incoming syscall with an ID less than -1 to sys_ni_syscall, rather than allowing them to fall through into the syscall handler. and two minor build fixes: - Export __asm_copy_{from,to}_user() from where they are defined. This fixes a build error triggered by some randconfigs. - Export flush_icache_all(). I'd resisted this before, since historically we didn't want modules to be able to flush the I$ directly; but apparently everyone else is doing it now" * tag 'riscv/for-v5.5-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: export flush_icache_all to modules riscv: reject invalid syscalls below -1 riscv: fix compile failure with EXPORT_SYMBOL() & !MMU
2019-12-29Merge tag 'locks-v5.5-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/jlayton/linux Pull /proc/locks formatting fix from Jeff Layton: "This is a trivial fix for a _very_ long standing bug in /proc/locks formatting. Ordinarily, I'd wait for the merge window for something like this, but it is making it difficult to validate some overlayfs fixes. I've also gone ahead and marked this for stable" * tag 'locks-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/jlayton/linux: locks: print unsigned ino in /proc/locks
2019-12-29Merge tag '5.5-rc3-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6Linus Torvalds
Pull cifs fixes from Steve French: "One performance fix for large directory searches, and one minor style cleanup noticed by Clang" * tag '5.5-rc3-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6: cifs: Optimize readdir on reparse points cifs: Adjust indentation in smb2_open_file