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2010-05-19KVM: Fix wallclock version writing raceAvi Kivity
Wallclock writing uses an unprotected global variable to hold the version; this can cause one guest to interfere with another if both write their wallclock at the same time. Acked-by: Glauber Costa <glommer@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2010-05-19KVM: MMU: Don't read pdptrs with mmu spinlock held in mmu_alloc_rootsAvi Kivity
On svm, kvm_read_pdptr() may require reading guest memory, which can sleep. Push the spinlock into mmu_alloc_roots(), and only take it after we've read the pdptr. Tested-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2010-05-19KVM: VMX: enable VMXON check with SMX enabled (Intel TXT)Shane Wang
Per document, for feature control MSR: Bit 1 enables VMXON in SMX operation. If the bit is clear, execution of VMXON in SMX operation causes a general-protection exception. Bit 2 enables VMXON outside SMX operation. If the bit is clear, execution of VMXON outside SMX operation causes a general-protection exception. This patch is to enable this kind of check with SMX for VMXON in KVM. Signed-off-by: Shane Wang <shane.wang@intel.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2010-05-19KVM: x86: properly update ready_for_interrupt_injectionMarcelo Tosatti
The recent changes to emulate string instructions without entering guest mode exposed a bug where pending interrupts are not properly reflected in ready_for_interrupt_injection. The result is that userspace overwrites a previously queued interrupt, when irqchip's are emulated in userspace. Fix by always updating state before returning to userspace. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2010-05-19KVM: VMX: Atomically switch efer if EPT && !EFER.NXAvi Kivity
When EPT is enabled, we cannot emulate EFER.NX=0 through the shadow page tables. This causes accesses through ptes with bit 63 set to succeed instead of failing a reserved bit check. Signed-off-by: Avi Kivity <avi@redhat.com>
2010-05-19KVM: VMX: Add facility to atomically switch MSRs on guest entry/exitAvi Kivity
Some guest msr values cannot be used on the host (for example. EFER.NX=0), so we need to switch them atomically during guest entry or exit. Add a facility to program the vmx msr autoload registers accordingly. Signed-off-by: Avi Kivity <avi@redhat.com>
2010-05-19KVM: VMX: Add definitions for guest and host EFER autoswitch vmcs entriesAvi Kivity
Signed-off-by: Avi Kivity <avi@redhat.com>
2010-05-19KVM: VMX: Add definition for msr autoload entryAvi Kivity
Signed-off-by: Avi Kivity <avi@redhat.com>
2010-05-19KVM: Let vcpu structure alignment be determined at runtimeAvi Kivity
vmx and svm vcpus have different contents and therefore may have different alignmment requirements. Let each specify its required alignment. Signed-off-by: Avi Kivity <avi@redhat.com>
2010-05-19KVM: MMU: cleanup invlpg codeXiao Guangrong
Using is_last_spte() to cleanup invlpg code Signed-off-by: Xiao Guangrong <xiaoguangrong@cn.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2010-05-19KVM: MMU: move unsync/sync tracpoints to proper placeXiao Guangrong
Move unsync/sync tracepoints to the proper place, it's good for us to obtain unsync page live time Signed-off-by: Xiao Guangrong <xiaoguangrong@cn.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2010-05-19KVM: MMU: convert mmu tracepointsXiao Guangrong
Convert mmu tracepoints by using DECLARE_EVENT_CLASS Signed-off-by: Xiao Guangrong <xiaoguangrong@cn.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2010-05-19KVM: MMU: fix for calculating gpa in invlpg codeXiao Guangrong
If the guest is 32-bit, we should use 'quadrant' to adjust gpa offset Signed-off-by: Xiao Guangrong <xiaoguangrong@cn.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2010-05-19KVM: powerpc: use of kzalloc/kfree requires including slab.hStephen Rothwell
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2010-05-19KVM: Fix mmu shrinker errorGui Jianfeng
kvm_mmu_remove_one_alloc_mmu_page() assumes kvm_mmu_zap_page() only reclaims only one sp, but that's not the case. This will cause mmu shrinker returns a wrong number. This patch fix the counting error. Signed-off-by: Gui Jianfeng <guijianfeng@cn.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2010-05-19KVM: MMU: fix hashing for TDP and non-paging modesEric Northup
For TDP mode, avoid creating multiple page table roots for the single guest-to-host physical address map by fixing the inputs used for the shadow page table hash in mmu_alloc_roots(). Signed-off-by: Eric Northup <digitaleric@google.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2010-05-19ds2760_battery: Document ABI changeDaniel Mack
Add some documentation for the newly added writeable properties. Suggested-by: Greg KH <gregkh@suse.de> Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
2010-05-19ds2760_battery: Make charge_now and charge_full writeableDaniel Mack
For userspace tools and daemons, it might be necessary to adjust the charge_now and charge_full properties of the ds2760 battery monitor, for example for unavoidable corrections due to aging batteries. Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: Matt Reimer <mreimer@vpop.net> Cc: Evgeniy Polyakov <zbr@ioremap.net> Cc: Tejun Heo <tj@kernel.org> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Alexey Starikovskiy <astarikovskiy@suse.de> Cc: Len Brown <len.brown@intel.com> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
2010-05-19power_supply: Add support for writeable propertiesDaniel Mack
This patch adds support for writeable power supply properties and exposes them as writeable to sysfs. A power supply implementation must implement two new function calls in order to use that feature: int set_property(struct power_supply *psy, enum power_supply_property psp, const union power_supply_propval *val); int property_is_writeable(struct power_supply *psy, enum power_supply_property psp); Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Alexey Starikovskiy <astarikovskiy@suse.de> Cc: Len Brown <len.brown@intel.com> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Matt Reimer <mreimer@vpop.net> Cc: Evgeniy Polyakov <zbr@ioremap.net> Cc: Tejun Heo <tj@kernel.org> Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
2010-05-19power_supply: Use attribute groupsAnton Vorontsov
This fixes a race between power supply device and initial attributes creation, plus makes it possible to implement writable properties. [Daniel Mack - removed superflous return statement and dropped .mode attribute from POWER_SUPPLY_ATTR] Suggested-by: Greg KH <gregkh@suse.de> Suggested-by: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com> Tested-by: Daniel Mack <daniel@caiaq.de>
2010-05-19module: drop the lock while waiting for module to complete initialization.Rusty Russell
This fixes "gave up waiting for init of module libcrc32c." which happened at boot time due to multiple parallel module loads. The problem was a deadlock: we wait for a module to finish initializing, but we keep the module_lock mutex so it can't complete. In particular, this could reasonably happen if a module does a request_module() in its initialization routine. So we change use_module() to return an errno rather than a bool, and if it's -EBUSY we drop the lock and wait in the caller, then reaquire the lock. Reported-by: Brandon Philips <brandon@ifup.org> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Tested-by: Brandon Philips <brandon@ifup.org>
2010-05-19MODULE_DEVICE_TABLE(isapnp, ...) does nothingOndrej Zary
On Monday 23 November 2009 04:29:53 Rusty Russell wrote: > On Mon, 23 Nov 2009 07:31:57 am Ondrej Zary wrote: > > The problem is that > > scripts/mod/file2alias.c simply ignores isapnp. > > AFAICT it always has, and noone has complained until now. Perhaps > something was still reading /lib/modules/`uname -r`/modules.isapnpmap? The patch below works fine (at least with Debian). It needs your first patch that moves the definitions to mod_devicetable.h. Verified that aliases for these modules are generated correctly: drivers/media/radio/radio-sf16fmi.c drivers/net/ne.c drivers/net/3c515.c drivers/net/smc-ultra.c drivers/pcmcia/i82365.c drivers/scsi/aha1542.c drivers/scsi/aha152x.c drivers/scsi/sym53c416.c drivers/scsi/g_NCR5380.c Tested with RTL8019AS (ne), AVA-1505AE (aha152x) and dtc436e (g_NCR5380) cards - they now work automatically. Generate pnp:d aliases for isapnp_device_tables. This allows udev to load these modules automatically. Signed-off-by: Ondrej Zary <linux@rainbow-software.org> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2010-05-19hisax_fcpcipnp: fix broken isapnp device table.Rusty Russell
Found that drivers/isdn/hisax/hisax_fcpcipnp.c has broken pnp device table - wrong type (isapnp instead of pnp) and also ending record missing. Signed-off-by: Ondrej Zary <linux@rainbow-software.org> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> (split patch)
2010-05-19isapnp: move definitions to mod_devicetable.h so file2alias can reach them.Rusty Russell
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2010-05-19perf, x86: P4 PMU -- add missing bit in CCCR maskCyrill Gorcunov
Should be there for the sake of RAW events. Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org> CC: Lin Ming <ming.m.lin@intel.com> CC: Peter Zijlstra <a.p.zijlstra@chello.nl> CC: Frederic Weisbecker <fweisbec@gmail.com> LKML-Reference: <20100518212439.354345151@openvz.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-05-19perf, x86: P4_pmu_schedule_events -- use smp_processor_id instead of raw_Cyrill Gorcunov
This snippet somehow escaped the commit: | commit 137351e0feeb9f25d99488ee1afc1c79f5499a9a | Author: Cyrill Gorcunov <gorcunov@openvz.org> | Date: Sat May 8 15:25:52 2010 +0400 | | x86, perf: P4 PMU -- protect sensible procedures from preemption so bring it eventually back. It helps to catch preemption issue (if there will be, rule of thumb -- don't use raw_ if you can). Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org> Cc: Lin Ming <ming.m.lin@intel.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> LKML-Reference: <20100518212439.167259349@openvz.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-05-19perf, x86: P4 PMU -- do a real check for ESCR address being in hashCyrill Gorcunov
To prevent from clashes in future code modifications do a real check for ESCR address being in hash. At moment the callers are known to pass sane values but better to be on a safe side. And comment fix. Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org> CC: Lin Ming <ming.m.lin@intel.com> CC: Peter Zijlstra <a.p.zijlstra@chello.nl> CC: Frederic Weisbecker <fweisbec@gmail.com> LKML-Reference: <20100518212439.004503600@openvz.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-05-19intel-iommu: Set a more specific taint flag for invalid BIOS DMAR tablesBen Hutchings
We now know how to deal with these tables so that they are harmless. Set TAINT_FIRMWARE_WORKAROUND instead of the default TAINT_WARN. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-05-19intel-iommu: Combine the BIOS DMAR table warning messagesBen Hutchings
We have nearly the same code for warnings repeated four times. Move it into a separate function. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-05-19panic: Add taint flag TAINT_FIRMWARE_WORKAROUND ('I')Ben Hutchings
This taint flag will initially be used when warning about invalid ACPI DMAR tables. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-05-19panic: Allow warnings to set different taint flagsBen Hutchings
WARN() is used in some places to report firmware or hardware bugs that are then worked-around. These bugs do not affect the stability of the kernel and should not set the flag for TAINT_WARN. To allow for this, add WARN_TAINT() and WARN_TAINT_ONCE() macros that take a taint number as argument. Architectures that implement warnings using trap instructions instead of calls to warn_slowpath_*() now implement __WARN_TAINT(taint) instead of __WARN(). Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Acked-by: Helge Deller <deller@gmx.de> Tested-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-05-19drm/nouveau: fix i2c-related init table handlersBen Skeggs
Mutliple issues. INIT_ZM_I2C_BYTE/INIT_I2C_BYTE didn't even try and use the register value, and all the handlers were using the wrong slave address. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-05-19drm/nouveau: support init table i2c device identifier 0x81Ben Skeggs
It appears to be meant to reference the second "default index". Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-05-19drm/nouveau: ensure we've parsed i2c table entry for INIT_*I2C* handlersBen Skeggs
We may not have parsed the entry yet if the i2c_index is for an i2c bus that's not referenced by a DCB encoder. This could be done oh so much more nicely, except we have to care about prehistoric DCB tables too, and they make life painful. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-05-19drm/nouveau: display error message for any failed init table opcodeBen Skeggs
Some handlers don't report specific errors, but we still *really* want to know if we failed to parse a complete init table. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-05-19drm/nouveau: fix init table handlers to return proper error codesBen Skeggs
We really want to be able to distinguish between INIT_DONE and an actual error sometimes. This commit fixes up several lazy "return 0;" to be actual error codes, and explicitly reserves "0" as "success, but stop parsing this table". Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-05-19drm/nv50: support fractional feedback divider on newer chipsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-05-18Merge branch 'master' of /home/davem/src/GIT/linux-2.6/David S. Miller
Conflicts: include/linux/mod_devicetable.h scripts/mod/file2alias.c
2010-05-18qlcnic: adding co maintainerAmit Kumar Salecha
Adding Anirban as co maintainer Signed-off-by: Amit Kumar Salecha <amit.salecha@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2010-05-19crypto: n2 - Add Niagara2 crypto driverDavid S. Miller
Current deficiencies: 1) No HMAC hash support yet. 2) Although the algs are registered as ASYNC they always run synchronously. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2010-05-19crypto: skcipher - Add ablkcipher_walk interfacesDavid S. Miller
These are akin to the blkcipher_walk helpers. The main differences in the async variant are: 1) Only physical walking is supported. We can't hold on to kmap mappings across the async operation to support virtual ablkcipher_walk operations anyways. 2) Bounce buffers used for async more need to be persistent and freed at a later point in time when the async op completes. Therefore we maintain a list of writeback buffers and require that the ablkcipher_walk user call the 'complete' operation so we can copy the bounce buffers out to the real buffers and free up the bounce buffer chunks. These interfaces will be used by the new Niagara2 crypto driver. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2010-05-19crypto: testmgr - Add testing for async hashing and update/finalDavid S. Miller
Extend testmgr such that it tests async hash algorithms, and that for both sync and async hashes it tests both ->digest() and ->update()/->final() sequences. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2010-05-19crypto: tcrypt - Add speed tests for async hashingDavid S. Miller
These are invoked in the 'mode' range of 400 to 499. The cost of async vs. sync for the software algorithm implementations varies. It can be as low as 16 cycles but as much as a couple hundred. Here two runs of md5 testing, async then sync: testing speed of async md5 test 0 ( 16 byte blocks, 16 bytes per update, 1 updates): 2448 cycles/operation, 153 cycles/byte test 1 ( 64 byte blocks, 16 bytes per update, 4 updates): 4992 cycles/operation, 78 cycles/byte test 2 ( 64 byte blocks, 64 bytes per update, 1 updates): 3808 cycles/operation, 59 cycles/byte test 3 ( 256 byte blocks, 16 bytes per update, 16 updates): 14000 cycles/operation, 54 cycles/byte test 4 ( 256 byte blocks, 64 bytes per update, 4 updates): 8480 cycles/operation, 33 cycles/byte test 5 ( 256 byte blocks, 256 bytes per update, 1 updates): 7280 cycles/operation, 28 cycles/byte test 6 ( 1024 byte blocks, 16 bytes per update, 64 updates): 50016 cycles/operation, 48 cycles/byte test 7 ( 1024 byte blocks, 256 bytes per update, 4 updates): 22496 cycles/operation, 21 cycles/byte test 8 ( 1024 byte blocks, 1024 bytes per update, 1 updates): 21232 cycles/operation, 20 cycles/byte test 9 ( 2048 byte blocks, 16 bytes per update, 128 updates): 117184 cycles/operation, 57 cycles/byte test 10 ( 2048 byte blocks, 256 bytes per update, 8 updates): 43008 cycles/operation, 21 cycles/byte test 11 ( 2048 byte blocks, 1024 bytes per update, 2 updates): 40176 cycles/operation, 19 cycles/byte test 12 ( 2048 byte blocks, 2048 bytes per update, 1 updates): 39888 cycles/operation, 19 cycles/byte test 13 ( 4096 byte blocks, 16 bytes per update, 256 updates): 194176 cycles/operation, 47 cycles/byte test 14 ( 4096 byte blocks, 256 bytes per update, 16 updates): 84096 cycles/operation, 20 cycles/byte test 15 ( 4096 byte blocks, 1024 bytes per update, 4 updates): 78336 cycles/operation, 19 cycles/byte test 16 ( 4096 byte blocks, 4096 bytes per update, 1 updates): 77120 cycles/operation, 18 cycles/byte test 17 ( 8192 byte blocks, 16 bytes per update, 512 updates): 403056 cycles/operation, 49 cycles/byte test 18 ( 8192 byte blocks, 256 bytes per update, 32 updates): 166112 cycles/operation, 20 cycles/byte test 19 ( 8192 byte blocks, 1024 bytes per update, 8 updates): 154768 cycles/operation, 18 cycles/byte test 20 ( 8192 byte blocks, 4096 bytes per update, 2 updates): 151904 cycles/operation, 18 cycles/byte test 21 ( 8192 byte blocks, 8192 bytes per update, 1 updates): 155456 cycles/operation, 18 cycles/byte testing speed of md5 test 0 ( 16 byte blocks, 16 bytes per update, 1 updates): 2208 cycles/operation, 138 cycles/byte test 1 ( 64 byte blocks, 16 bytes per update, 4 updates): 5008 cycles/operation, 78 cycles/byte test 2 ( 64 byte blocks, 64 bytes per update, 1 updates): 3600 cycles/operation, 56 cycles/byte test 3 ( 256 byte blocks, 16 bytes per update, 16 updates): 14080 cycles/operation, 55 cycles/byte test 4 ( 256 byte blocks, 64 bytes per update, 4 updates): 8560 cycles/operation, 33 cycles/byte test 5 ( 256 byte blocks, 256 bytes per update, 1 updates): 7040 cycles/operation, 27 cycles/byte test 6 ( 1024 byte blocks, 16 bytes per update, 64 updates): 50592 cycles/operation, 49 cycles/byte test 7 ( 1024 byte blocks, 256 bytes per update, 4 updates): 22736 cycles/operation, 22 cycles/byte test 8 ( 1024 byte blocks, 1024 bytes per update, 1 updates): 24960 cycles/operation, 24 cycles/byte test 9 ( 2048 byte blocks, 16 bytes per update, 128 updates): 99312 cycles/operation, 48 cycles/byte test 10 ( 2048 byte blocks, 256 bytes per update, 8 updates): 43520 cycles/operation, 21 cycles/byte test 11 ( 2048 byte blocks, 1024 bytes per update, 2 updates): 40704 cycles/operation, 19 cycles/byte test 12 ( 2048 byte blocks, 2048 bytes per update, 1 updates): 39552 cycles/operation, 19 cycles/byte test 13 ( 4096 byte blocks, 16 bytes per update, 256 updates): 196720 cycles/operation, 48 cycles/byte test 14 ( 4096 byte blocks, 256 bytes per update, 16 updates): 85152 cycles/operation, 20 cycles/byte test 15 ( 4096 byte blocks, 1024 bytes per update, 4 updates): 79408 cycles/operation, 19 cycles/byte test 16 ( 4096 byte blocks, 4096 bytes per update, 1 updates): 76816 cycles/operation, 18 cycles/byte test 17 ( 8192 byte blocks, 16 bytes per update, 512 updates): 391520 cycles/operation, 47 cycles/byte test 18 ( 8192 byte blocks, 256 bytes per update, 32 updates): 168464 cycles/operation, 20 cycles/byte test 19 ( 8192 byte blocks, 1024 bytes per update, 8 updates): 156912 cycles/operation, 19 cycles/byte test 20 ( 8192 byte blocks, 4096 bytes per update, 2 updates): 154016 cycles/operation, 18 cycles/byte test 21 ( 8192 byte blocks, 8192 bytes per update, 1 updates): 153856 cycles/operation, 18 cycles/byte We can ditch the sync hash code at some point if we feel that makes sense. For now I've left it there. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2010-05-19crypto: scatterwalk - Fix scatterwalk_done() testDavid S. Miller
We are done with the scattergather entry when the walk offset goes past sg->offset + sg->length, not when it crosses a page boundary. There is a similarly queer test in the second half of scatterwalk_pagedone() that probably needs some scrutiny. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2010-05-19crypto: hifn_795x - Rename ablkcipher_walk to hifn_cipher_walkDavid S. Miller
This is in preparation for the generic ablkcipher_walk helpers that will be added to the crypto layer. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2010-05-19padata: Use get_online_cpus/put_online_cpus in padata_freeSteffen Klassert
Add get_online_cpus/put_online_cpus to ensure that no cpu goes offline during the flushing of the padata percpu queues. Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2010-05-19padata: Add some code commentsSteffen Klassert
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2010-05-19padata: Flush the padata queues activelySteffen Klassert
yield was used to wait until all references of the internal control structure in use are dropped before it is freed. This patch implements padata_flush_queues which actively flushes the padata percpu queues in this case. Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2010-05-19padata: Use a timer to handle remaining objects in the reorder queues Steffen Klassert
padata_get_next needs to check whether the next object that need serialization must be parallel processed by the local cpu. This check was wrong implemented and returned always true, so the try_again loop in padata_reorder was never taken. This can lead to object leaks in some rare cases due to a race that appears with the trylock in padata_reorder. The try_again loop was not a good idea after all, because a cpu could take that loop frequently, so we handle this with a timer instead. This patch adds a timer to handle the race that appears with the trylock. If cpu1 queues an object to the reorder queue while cpu2 holds the pd->lock but left the while loop in padata_reorder already, cpu2 can't care for this object and cpu1 exits because it can't get the lock. Usually the next cpu that takes the lock cares for this object too. We need the timer just if this object was the last one that arrives to the reorder queues. The timer function sends it out in this case. Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2010-05-19drm/nv50: fix monitor detection on certain chipsetsBen Skeggs
There appears to be some kind of switch on certain chips to control whether the DP auxch or traditional i2c bus will be operational on a connector, this commit hopefully fixes nouveau to do the right thing. Likely only relevent on chips with DP outputs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>