summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2016-06-06clk: renesas: cpg-mssr: Document r8a7796 supportGeert Uytterhoeven
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Tested-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-06soc: renesas: rcar-sysc: Add support for R-Car M3-W power areasGeert Uytterhoeven
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-06soc: renesas: Add r8a7796 SYSC PM Domain Binding DefinitionsGeert Uytterhoeven
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-06soc: renesas: rcar-sysc: Document r8a7796 supportGeert Uytterhoeven
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-03arm64: dts: Add dts files for LG Electronics's lg1313 SoCChanho Min
Add dtsi file to support lg1313 SoC which based on Cortex-A53. Also add dts file to support lg1312 reference board which based on lg1313 SoC. Signed-off-by: Chanho Min <chanho.min@lge.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2016-06-03arm64: dts: mt8173: Add display subsystem related nodesCK Hu
This patch adds the device nodes for the DISP function blocks comprising the display subsystem. Signed-off-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: Cawa Cheng <cawa.cheng@mediatek.com> Signed-off-by: Jie Qiu <jie.qiu@mediatek.com> Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2016-06-01ARM64: dts: amlogic: Enable Reset Controller on GXBB-based platformsNeil Armstrong
Update DTSI file to add the reset controller node. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-06-01ARM64: dts: amlogic: gxbb: add ethernetKevin Hilman
Add node for ethernet interface and pinctrl pins. Enable on odroid-C2 and P20x boards. Acked-by: Carlo Caione <carlo@endlessm.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-06-01ARM64: dts: amlogic: gxbb: pinctrl: add/update UARTKevin Hilman
Add DT nodes for additional UARTs (UART B & C in EE domain) and add pins for all EE domain UARTs. Acked-by: Carlo Caione <carlo@endlessm.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-06-01ARM64: dts: amlogic: add pins for EMMC, SDKevin Hilman
Acked-by: Carlo Caione <carlo@endlessm.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-06-01ARM64: dts: amlogic: Enable pin controller on GXBB-based platformsCarlo Caione
Update DTS and DTSI files to enable the pin controller. We also now support the blinking blue LED on the Odroid-C2. Signed-off-by: Carlo Caione <carlo@endlessm.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-06-01documentation: Add compatibles for Amlogic Meson GXBB pin controllersCarlo Caione
Add the two new compatibles for the Amlogic Meson GXBB pin controllers. Signed-off-by: Carlo Caione <carlo@endlessm.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-06-01ARM64: dts: amlogic: Add hiu and periphs busesCarlo Caione
Add two new buses in the DTS: hiu and periphs buses. In the Amlogic S905/GXBB SoC several devices (clock / eth / pin controllers, etc...) are mapped under these two buses. Add them in the DT before starting to add new devices. Signed-off-by: Carlo Caione <carlo@endlessm.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-06-01dt-bindings: reset: Add bindings for the Meson SoC Reset ControllerNeil Armstrong
Add DT bindings for the Meson SoC Reset Controller documentation and the associated include file. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-06-01reset: Add support for the Amlogic Meson SoC Reset ControllerNeil Armstrong
This patch adds the platform driver for the Amlogic Meson SoC Reset Controller. The Meson8b and GXBB SoCs are supported. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-06-01reset: Return -ENOTSUPP when not configuredJohn Youn
Prior to commit 6c96f05c8bb8 ("reset: Make [of_]reset_control_get[_foo] functions wrappers"), the "optional" functions returned -ENOTSUPP when CONFIG_RESET_CONTROLLER was not set. Revert back to the old behavior by changing the new __devm_reset_control_get() and __of_reset_control_get() functions to return ERR_PTR(-ENOTSUPP) when compiled without CONFIG_RESET_CONTROLLER. Otherwise they will return -EINVAL causing users to think that an error occurred when CONFIG_RESET_CONTROLLER is not set. Fixes: 6c96f05c8bb8 ("reset: Make [of_]reset_control_get[_foo] functions wrappers") Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-31arm64: dts: NS2: Add CCI-400 PMU supportJon Mason
Add support to the Northstar 2 Device tree file for the ARM CCI-400 PMU. Signed-off-by: Jon Mason <jonmason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-05-31arm64: dts: NS2: Add all of the UARTsJon Mason
Add all of the UARTs present on NS2 and enable them in the SVK device tree file. Also, do some magic to make sure that uart3 is discovered as ttyS0 (as that is the console UART). Signed-off-by: Jon Mason <jonmason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-05-31arm64: dts: Enable GPIO for Broadcom NS2 SoCYendapally Reddy Dhananjaya Reddy
This enables the GPIO support for Broadcom NS2 SoC Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-05-31arm64: dts: enable pinctrl for Broadcom NS2 SoCYendapally Reddy Dhananjaya Reddy
This enables the pinctrl support for Broadcom NS2 SoC Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-05-31arm64: dts: Add SATA3 AHCI and SATA3 PHY DT nodes for NS2Anup Patel
We have one dual-port SATA3 AHCI controller present in NS2 SoC. This patch enables SATA3 AHCI controller and SATA3 PHY for NS2 SoC in NS2 DT. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-05-31dt-bindings: ata: add compatible string for iProc AHCI controllerAnup Patel
The Broadcom iProc SoCs have AHCI compliant SATA controller. This patch adds common compatible string for AHCI SATA controller on iProc SoCs. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-05-31ARM: bcm2835: dt: Add the ethernet to the device treesLubomir Rintel
The hub and the ethernet in its port 1 are hardwired on the board. Compared to the adapters that can be plugged into the USB ports, this one has no serial EEPROM to store its MAC. Nevertheless, the Raspberry Pi has the MAC address for this adapter in its ROM, accessible from its firmware. U-Boot can read out the address and set the local-mac-address property of the node with "ethernet" alias. Let's add the node so that U-Boot can do its business. Model B rev2 and Model B+ entries were verified by me, the hierarchy and pid/vid pair for the Version 2 was provided by Peter Chen. Original Model B is a blind shot, though very likely correct. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2016-05-30arm64: dts: rockchip: add rk3399 io-domain core nodesHeiko Stuebner
Add the core io-domain nodes to grf and pmugrf which individual boards than just have to enable and add the necessary supplies to. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-05-30arm64: dts: rockchip: add rk3368-r88 iodomainsHeiko Stuebner
Add the supply-links according to the R88 schematics. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-05-30arm64: dts: rockchip: add rk3368 io-domain core nodesHeiko Stuebner
Add the core io-domain nodes to grf and pmugrf which individual boards than just have to enable and add the necessary supplies to. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-05-30arm64: dts: rockchip: make rk3368 grf syscons simple-mfdsHeiko Stuebner
The general register files do contain a lot of separate functions and while some really are only registers with a lot of different 1-bit settings, there are also a lot of them containing some bigger function blocks. To be able to define these as sub-devices, make them simple-mfds. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: David Wu <david.wu@rock-chips.com>
2016-05-30arm64: dts: rockchip: enable eMMC for rk3399 EVBBrian Norris
Rockchip's rk3399 evaluation board has eMMC. Let's enable the newly-added nodes. Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-05-30arm64: dts: rockchip: add sdhci/emmc for rk3399Brian Norris
Add description for the SDHCI v5.1 eMMC controller on rk3399. Fix it to 200 MHz, to support all supported timing modes. Note that 'rockchip,rk3399-sdhci-5.1' is not documented; we presumably have a compliant Arasan controller, but let's have a rockchip property as the canonical backup/precautionary measure. Per Heiko's previous suggestion, let's not clutter the arasan doc with it. Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-05-30arm64: dts: rockchip: make rk3399's grf a "simple-mfd"Brian Norris
Per the examples in Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt, we need the grf node to be a simple-mfd in order to properly enumerate child devices like our eMMC PHY. Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> [directly mimic for the pmugrf, which will need the same change later and there is no need to pollute commit history with another patch] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-05-30arm64: dts: rockchip: assign default rates for core rk3399 clocksXing Zheng
These clocks are all core clocks used by many blocks/peripherals, many of whose drivers don't set their clock rates at all. Let's assign reasonable default clock rates for these core clocks, so that these peripherals get something reasonable by default, and also so that if child devices want to select a clock rate themselves, their muxes have some reasonable parent clock rates to branch off of (rather than just the boot-time defaults). This helps the eMMC PHY, for one, to get a reasonable ACLK rate. Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-05-30reset: oxnas: Use devm register API and get rid of platform removeNeil Armstrong
Use the brand new devm_reset_controller_register() API to get rid of the platform driver remove callback. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-30reset: fix Kconfig menu to include reset drivers in sub-menuMasahiro Yamada
In "make menuconfig", reset drivers are currently lined up together with the reset sub-system menu, like this: -*- Reset Controller Support ---- < > Hi6220 Reset Driver (It also means, the menu "Reset Controller Support" is always empty.) "Hi6220 Reset Driver" should go into the sub-menu of the "Reset Controller Support". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-30reset: zynq: use devm_reset_controller_register()Masahiro Yamada
Use devm_reset_controller_register() for the reset controller registration and drop the .remove callback. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-30reset: socfpga: use devm_reset_controller_register()Masahiro Yamada
Use devm_reset_controller_register() for the reset controller registration and drop the .remove callback. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-30reset: sunxi: use devm_reset_controller_register()Masahiro Yamada
Use devm_reset_controller_register() for the reset controller registration and drop the .remove callback. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-30reset: pistachio: use devm_reset_controller_register()Masahiro Yamada
Use devm_reset_controller_register() for the reset controller registration and drop the .remove callback. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-30reset: ath79: use devm_reset_controller_register()Masahiro Yamada
Use devm_reset_controller_register() for the reset controller registration and remove the unregister call from the .remove callback. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-30reset: add devm_reset_controller_register APIMasahiro Yamada
Add a device managed API for reset_controller_register(). This helps in reducing code in .remove callbacks and sometimes dropping .remove callbacks entirely. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-30arm64: dts: r8a7795: Drop 0x from unit address of gicSimon Horman
Drop 0x from unit address of gic as this is the desired form for a unit address. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-05-30arm64: dts: salvator-x: Fix W=1 dtc warningsGeert Uytterhoeven
Warning (unit_address_vs_reg): Node /regulator@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /regulator@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /regulator@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /regulator@4 has a unit name, but no reg property Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30arm64: dts: r8a7795: Fix W=1 dtc warningsGeert Uytterhoeven
Warning (unit_address_vs_reg): Node /cache-controller@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /cache-controller@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,dvc/dvc@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,dvc/dvc@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@7 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@8 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@9 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property Move the cache-controller nodes under the cpus node, and make their unit names and reg properties match the MPIDR values. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30arm64: dts: r8a7795: Use SYSC "always-on" PM Domain for RWDT nodeGeert Uytterhoeven
Hook up the RWDT device node to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Cfr. commit 38dbb45ee4bc ("arm64: dts: r8a7795: Use SYSC "always-on" PM Domain") Fixes: f43838a7ae014cba ("arm64: dts: r8a7795: Add RWDT node") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30arm64: dts: salvator-x: Enable watchdog timerWolfram Sang
This patch enables watchdog timer for Salvator-X board. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30arm64: dts: r8a7795: Add RWDT nodeWolfram Sang
This patch adds the RWDT device node for r8a7795. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30arm64: dts: r8a7795: enable DMA for I2CNiklas Söderlund
Add DMA properties to the I2C nodes. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30arm64: dts: r8a7795: Increase the size of GIC-400 mapped registersPooya Keshavarzi
There are some requirements about the GIC-400 memory layout and its mapping if using 64k aligned base addresses like on r8a7795. See e.g. http://xenbits.xen.org/gitweb/?p=xen.git;a=commit;h=21550029f709072aacf3b9 Map the whole memory range instead of only 0x2000. This will fix the issue that some hypervisors, e.g. Xen, fail to handle the interrupts correctly. Signed-off-by: Pooya Keshavarzi <Pooya.Keshavarzi@de.bosch.com> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30arm64: dts: salvator-x: SCIF1 supports RTS/CTS hardware flow controlGeert Uytterhoeven
On the Salvator-X development board, the RTS and CTS pins of debug serial-1 port SCIF1 are wired to the CP2102 Serial-USB bridge. Reflect this in the DTS by adding the "uart-has-rtscts" property to the scif1 device node. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-29Linux 4.7-rc1v4.7-rc1Linus Torvalds
2016-05-29hash_string: Fix zero-length case for !DCACHE_WORD_ACCESSGeorge Spelvin
The self-test was updated to cover zero-length strings; the function needs to be updated, too. Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: George Spelvin <linux@sciencehorizons.net> Fixes: fcfd2fbf22d2 ("fs/namei.c: Add hashlen_string() function") Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
generated by cgit (git 2.34.1) at 2025-09-28 04:37:26 +0000