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2020-07-15ARM: tegra: Add missing DSI controller on Tegra30Thierry Reding
Tegra30 has a DSI controller, although it is never used on any of the devices supported by the upstream Linux kernel. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15ARM: tegra: Add i2c-bus subnode for DPAUX controllersThierry Reding
The DPAUX controller device tree bindings require the bus to have an i2c-bus subnode to distinguish between I2C clients and pinmux groups. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15memory: tegra: Add Tegra132 compatible string matchThierry Reding
Ensure that the driver will bind against the Tegra132 instantiation of the external memory controller. While the two are roughly the same from a capability perspective, they do require some incompatible changes to the programming sequences and therefore need separate compatible strings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15platform/x86: pcengines-apuv2: revert wiring up simswitch GPIO as LEDFlorian Eckert
This reverts commit 5037d4ddda31c2dbbb018109655f61054b1756dc. Explanation why this does not work: This change connects the simswap to the LED subsystem of the kernel. From my point of view, it's nonsense. If we do it this way, then this can be switched relatively easily via the LED subsystem (trigger: none/default-on) and that is dangerous! If this is used, it would be unfavorable, since there is also another trigger (trigger: heartbeat/netdev). Therefore, this simswap GPIO should remain in the GPIO subsystem and be switched via it and not be connected to the LED subsystem. To avoid the problems mentioned above. The LED subsystem is not made for this and it is not a good compromise, but rather dangerous. Signed-off-by: Florian Eckert <fe@dev.tdt.de> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15platform/x86: asus-wmi: allow BAT1 battery nameVasiliy Kupriakov
The battery on my laptop ASUS TUF Gaming FX706II is named BAT1. This patch allows battery extension to load. Signed-off-by: Vasiliy Kupriakov <rublag-ns@yandex.ru> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15platform/x86: ISST: Add new PCI device idsSrinivas Pandruvada
Added new PCI device ids for supporting mailbox and MMIO interface for Sapphire Rapids. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15platform/x86: mlx-platform: Extend FAN platform data descriptionVadim Pasternak
Extend FAN platform data with register presence field. Add register present entry per rotor (tachometer) description tuple. The purpose is to allow indication of FAN presence. Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15platform_data/mlxreg: Add presence register field for FAN devicesVadim Pasternak
Add new field 'reg_prsnt' to the structure 'mlxreg_core_data' to provide the number FAN drawers equpped within the system. The purpose is to allow mapping between FAN drawers and FAN rotors (tachometer), since FAN drawer can be eqipped with a few rotors. Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15Documentation/ABI: Add new attribute for mlxreg-io sysfs interfacesVadim Pasternak
Add documentation for the new attributes for exposing CPLDs part numbers and CPLD minor versions. Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15platform/mellanox: mlxreg-io: Add support for complex attributesVadim Pasternak
Add support for attributes composed from few registers. Such attributes could occupy from 2 to 4 sequential registers. For word size register space complex attributes can occupy up to two registers, for byte size - up to four. These attributes can carry, for example, CPLD or FPGA versioning, power consuming info, etcetera. Such registers contain read-only data. Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15platform/x86: mlx-platform: Add more definitions for system attributesVadim Pasternak
Add new attributes for the all type systems specifying for each equipped CPLD device, the CPLD part number and the CPLD minor version of the device: 'cpld{n}_pn' and 'cpld{n}_version_min'. This information is to be used for mathcing the current CPLD image and for making decision if image upgrade is required for CPLD device. Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15platform_data/mlxreg: Add support for complex attributesVadim Pasternak
Add new field 'regnum' to the structure 'mlxreg_core_data' to specify the number of registers occupied by multi-register attribute. Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15platform/mellanox: mlxreg-hotplug: Add environmental data to ueventVadim Pasternak
Send "udev" event with environmental data in order to allow handling "ENV{}" variables in "udev" rules. Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15platform/mellanox: mlxreg-hotplug: Use capability register for attribute ↵Vadim Pasternak
creation Create the 'sysfs' attributes according to configuration provided through the capability register, which purpose is to indicate the actual number of the components within the particular group. Such components could be, for example the FAN or power supply units. The motivation is to avoid adding a new code in the future in order to distinct between the systems types supporting a different number of the components like power supplies, FANs, ASICs, line cards. Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15platform/mellanox: mlxreg-hotplug: Modify module licenseVadim Pasternak
Change module license to 'SPDX'. Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15lib/test-string_helpers.c: Add string_upper() and string_lower() testsVadim Pasternak
Add few of simple tests for string_upper() and string_lower() helpers. Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15lib/string_helpers: Introduce string_upper() and string_lower() helpersVadim Pasternak
Provide the helpers for string conversions to upper and lower cases. Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15platform/x86: thinkpad_acpi: Replace HTTP links with HTTPS onesAlexander A. Klimov
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15platform/x86: thinkpad_acpi: not loading brightness_init when _BCL invalidAaron Ma
When _BCL invalid, disable thinkpad_acpi backlight brightness control. brightness_enable is already checked at the beginning. Most new thinkpads are using GPU driver to control brightness now, print notice when enabled brightness control even when brightness_enable = 1. Signed-off-by: Aaron Ma <aaron.ma@canonical.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15platform/x86: thinkpad_acpi: lap or desk mode interfaceMark Pearson
Newer Lenovo Thinkpad platforms have support to identify whether the system is on-lap or not using an ACPI DYTC event from the firmware. This patch provides the ability to retrieve the current mode via sysfs entrypoints and will be used by userspace for thermal mode and WWAN functionality Co-developed-by: Nitin Joshi <njoshi1@lenovo.com> Signed-off-by: Nitin Joshi <njoshi1@lenovo.com> Reviewed-by: Sugumaran <slacshiminar@lenovo.com> Reviewed-by: Bastien Nocera <bnocera@redhat.com> Signed-off-by: Mark Pearson <markpearson@lenovo.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15platform/x86: thinkpad_acpi: Revert "Use strndup_user() in ↵Andy Shevchenko
dispatch_proc_write()" This reverts commit 35d13c7a05126a5a54a1ef40aff4c6984474e604. This broke procfs interface due to neglecting the fact that the strings are not coming NULL terminated. Revert the change till we will have a better clean up. Fixes: 35d13c7a0512 ("platform/x86: thinkpad_acpi: Use strndup_user() in dispatch_proc_write()") Reported-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15platform/x86: thinkpad_acpi: Revert "Use strndup_user() in ↵Andy Shevchenko
dispatch_proc_write()" This reverts commit 35d13c7a05126a5a54a1ef40aff4c6984474e604. This broke procfs interface due to neglecting the fact that the strings are not coming NULL terminated. Revert the change till we will have a better clean up. Fixes: 35d13c7a0512 ("platform/x86: thinkpad_acpi: Use strndup_user() in dispatch_proc_write()") Reported-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-07-15Revert "thermal: mediatek: fix register index error"Enric Balletbo i Serra
This reverts commit eb9aecd90d1a39601e91cd08b90d5fee51d321a6 The above patch is supposed to fix a register index error on mt2701. It is not clear if the problem solved is a hang or just an invalid value returned, my guess is the second. The patch introduces, though, a new hang on MT8173 device making them unusable. So, seems reasonable, revert the patch because introduces a worst issue. The reason I send a revert instead of trying to fix the issue for MT8173 is because the information needed to fix the issue is in the datasheet and is not public. So I am not really able to fix it. Fixes the following bug when CONFIG_MTK_THERMAL is set on MT8173 devices. [ 2.222488] Unable to handle kernel paging request at virtual address ffff8000125f5001 [ 2.230421] Mem abort info: [ 2.233207] ESR = 0x96000021 [ 2.236261] EC = 0x25: DABT (current EL), IL = 32 bits [ 2.241571] SET = 0, FnV = 0 [ 2.244623] EA = 0, S1PTW = 0 [ 2.247762] Data abort info: [ 2.250640] ISV = 0, ISS = 0x00000021 [ 2.254473] CM = 0, WnR = 0 [ 2.257544] swapper pgtable: 4k pages, 48-bit VAs, pgdp=0000000041850000 [ 2.264251] [ffff8000125f5001] pgd=000000013ffff003, pud=000000013fffe003, pmd=000000013fff9003, pte=006800001100b707 [ 2.274867] Internal error: Oops: 96000021 [#1] PREEMPT SMP [ 2.280432] Modules linked in: [ 2.283483] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.7.0-rc6+ #162 [ 2.289914] Hardware name: Google Elm (DT) [ 2.294003] pstate: 20000005 (nzCv daif -PAN -UAO) [ 2.298792] pc : mtk_read_temp+0xb8/0x1c8 [ 2.302793] lr : mtk_read_temp+0x7c/0x1c8 [ 2.306794] sp : ffff80001003b930 [ 2.310100] x29: ffff80001003b930 x28: 0000000000000000 [ 2.315404] x27: 0000000000000002 x26: ffff0000f9550b10 [ 2.320709] x25: ffff0000f9550a80 x24: 0000000000000090 [ 2.326014] x23: ffff80001003ba24 x22: 00000000610344c0 [ 2.331318] x21: 0000000000002710 x20: 00000000000001f4 [ 2.336622] x19: 0000000000030d40 x18: ffff800011742ec0 [ 2.341926] x17: 0000000000000001 x16: 0000000000000001 [ 2.347230] x15: ffffffffffffffff x14: ffffff0000000000 [ 2.352535] x13: ffffffffffffffff x12: 0000000000000028 [ 2.357839] x11: 0000000000000003 x10: ffff800011295ec8 [ 2.363143] x9 : 000000000000291b x8 : 0000000000000002 [ 2.368447] x7 : 00000000000000a8 x6 : 0000000000000004 [ 2.373751] x5 : 0000000000000000 x4 : ffff800011295cb0 [ 2.379055] x3 : 0000000000000002 x2 : ffff8000125f5001 [ 2.384359] x1 : 0000000000000001 x0 : ffff0000f9550a80 [ 2.389665] Call trace: [ 2.392105] mtk_read_temp+0xb8/0x1c8 [ 2.395760] of_thermal_get_temp+0x2c/0x40 [ 2.399849] thermal_zone_get_temp+0x78/0x160 [ 2.404198] thermal_zone_device_update.part.0+0x3c/0x1f8 [ 2.409589] thermal_zone_device_update+0x34/0x48 [ 2.414286] of_thermal_set_mode+0x58/0x88 [ 2.418375] thermal_zone_of_sensor_register+0x1a8/0x1d8 [ 2.423679] devm_thermal_zone_of_sensor_register+0x64/0xb0 [ 2.429242] mtk_thermal_probe+0x690/0x7d0 [ 2.433333] platform_drv_probe+0x5c/0xb0 [ 2.437335] really_probe+0xe4/0x448 [ 2.440901] driver_probe_device+0xe8/0x140 [ 2.445077] device_driver_attach+0x7c/0x88 [ 2.449252] __driver_attach+0xac/0x178 [ 2.453082] bus_for_each_dev+0x78/0xc8 [ 2.456909] driver_attach+0x2c/0x38 [ 2.460476] bus_add_driver+0x14c/0x230 [ 2.464304] driver_register+0x6c/0x128 [ 2.468131] __platform_driver_register+0x50/0x60 [ 2.472831] mtk_thermal_driver_init+0x24/0x30 [ 2.477268] do_one_initcall+0x50/0x298 [ 2.481098] kernel_init_freeable+0x1ec/0x264 [ 2.485450] kernel_init+0x1c/0x110 [ 2.488931] ret_from_fork+0x10/0x1c [ 2.492502] Code: f9401081 f9400402 b8a67821 8b010042 (b9400042) [ 2.498599] ---[ end trace e43e3105ed27dc99 ]--- [ 2.503367] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b [ 2.511020] SMP: stopping secondary CPUs [ 2.514941] Kernel Offset: disabled [ 2.518421] CPU features: 0x090002,25006005 [ 2.522595] Memory Limit: none [ 2.525644] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b ]-- Cc: Michael Kao <michael.kao@mediatek.com> Fixes: eb9aecd90d1a ("thermal: mediatek: fix register index error") Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200707103412.1010823-1-enric.balletbo@collabora.com
2020-07-15arm64: tegra: Sort aliases alphabeticallyThierry Reding
Most device tree files already do this, so update the remaining ones for consistency. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Remove spurious tabsThierry Reding
Remove tabs in places where they don't belong (i.e. where a single space is sufficient). Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Populate VBUS for USB3 on Jetson TX2Jon Hunter
The VBUS for USB3 connector on the Jetson TX2 is connected to the vdd_usb1 supply and although this is populated for the USB2 port on the USB3 connector it is not populated for the USB3 port and causes the following warning to be seen on boot ... usb3-0: supply vbus not found, using dummy regulator Fix this by also adding the VBUS supply to the USB3 port. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Enable DFLL support on Jetson NanoJon Hunter
Populate the DFLL node and corresponding PWM pin nodes in order to enable CPUFREQ support on the Jetson Nano platform. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Add support for Jetson Xavier NXJon Hunter
Add the device-tree source files for the Tegra194 Jetson Xavier NX Developer Kit. The Xavier NX Developer Kit consists of a small form factor system-on-module (SOM) board (part number p3668-0000) and a carrier board (part number p3509-0000). The Xavier NX Developer Kit SOM features a micro-SD card slot, however, there is also a variant of the SOM available that features a 16GB eMMC. Given that the carrier board can be used with the different SOM variants, that have different part numbers, both the compatible string and file name of the device-tree source file for the Developer Kit is a concatenation of the SOM and carrier board part numbers. Based on some initial work by Thierry Reding <treding@nvidia.com>. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Re-order PCIe aperture mappingsVidya Sagar
Re-order Tegra194's PCIe aperture mappings to have IO window moved to 64-bit aperture and have the entire 32-bit aperture used for accessing the configuration space. This makes it to use the entire 32MB of the 32-bit aperture for ECAM purpose while booting through ACPI. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Enable Tegra VI CSI support for Jetson NanoSowjanya Komatineni
This patch enables VI and CSI in device tree for Jetson Nano. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: jetson-tx1: Add camera suppliesSowjanya Komatineni
Jetson TX1 development board has a camera expansion connector which has 2V8, 1V8 and 1V2 supplies to power up the camera sensor on the supported camera modules. Camera module designed as per Jetson TX1 camera expansion connector may use these supplies for camera sensor avdd 2V8, digital core 1V8, and digital interface 1V2 voltages. These supplies are from fixed regulators on TX1 carrier board with enable control signals from I2C GPIO expanders. This patch adds these camera supplies to Jetson TX1 device tree to allow using these when a camera module is used. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Fix order of XUSB controller clocksThierry Reding
This is purely to make the json-schema validation tools happy because they cannot deal with string arrays that may be in arbitrary order. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Rename cbb@0 to bus@0 on Tegra194Thierry Reding
The control backbone is a simple-bus and hence its device tree node should be named "bus@<unit-address>" according to the bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Sort nodes by unit-address on Jetson NanoThierry Reding
Move the usb@700d0000 node to the correct place in the device tree, ordered by unit-address. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Various fixes for PMICsThierry Reding
Standardize on "pmic" as the node name for the PMIC on Tegra210 systems and use consistent names for pinmux and GPIO hog nodes. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Rename agic -> interrupt-controllerThierry Reding
Device tree nodes for interrupt controllers should be named "interrupt- controller", so rename the AGIC accordingly. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Fix indentation in Tegra194 device treeThierry Reding
Properly indent subsequent lines so that they align with the first line. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Fix indentation in Tegra132 device treeThierry Reding
Properly indent subsequent lines so that they align with the first line. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Remove unused interrupts from Tegra194 AON GPIOThierry Reding
The AON GPIO controller on Tegra194 currently only uses a single interrupt, so remove the extra ones. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Use standard names for SRAM nodesThierry Reding
SRAM nodes should be named sram@<unit-address> to match the bindings. While at it, also remove the unneeded, custom compatible string for SRAM partition nodes. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Do not mark display hub as simple busThierry Reding
The display hub on Tegra186 and Tegra194 is not a simple bus, so drop the corresponding compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Fix {clock,reset}-names orderingThierry Reding
It's very difficult to describe string lists that can be in arbitrary order using the json-schema based validation tooling. Since the OS is not going to care either way, take the easy way out and reorder these entries to match the order defined in the bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Remove XUSB pad controller interrupt from XUSB nodeThierry Reding
The XUSB controller doesn't need the XUSB pad controller's interrupt, so remove it. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Use standard EEPROM propertiesThierry Reding
The address-bits and page-size properties that are currently used are not valid properties according to the bindings. Use the address-width and pagesize properties instead. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Update USB connector nodesThierry Reding
Use the preferred {id,vbus}-gpios over the {id,vbus}-gpio properties and fix the ordering of compatible strings (most-specific ones should come first). Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Remove unneeded power suppliesThierry Reding
On Tegra186 and later, the BPMP is responsible for enabling/disabling the PCIe related power supplies of the pad controller and there is no need for the operating system to control them, so they can be removed. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Add missing #phy-cells property to USB PHYsThierry Reding
USB PHYs must have a #phy-cells property, so add one to the Tegra USB PHYs which don't have one. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Tegra132 EMC is not compatible with Tegra124Thierry Reding
The external memory controller found on Tegra132 is not fully compatible with the instantiation on Tegra124, so remove the corresponding string from the list of compatible strings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Use sor0_out clock on Tegra132Thierry Reding
The sor0_out clock is required to make eDP work properly. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Do not mark host1x as simple busThierry Reding
The host1x is not a simple bus, so drop the corresponding compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>